1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
28 #include <linux/kfifo.h>
31 #include <asm/pvclock-abi.h>
34 #include <asm/msr-index.h>
36 #include <asm/kvm_page_track.h>
37 #include <asm/kvm_vcpu_regs.h>
38 #include <asm/hyperv-tlfs.h>
40 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
42 #define KVM_MAX_VCPUS 1024
45 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
46 * might be larger than the actual number of VCPUs because the
47 * APIC ID encodes CPU topology information.
49 * In the worst case, we'll need less than one extra bit for the
50 * Core ID, and less than one extra bit for the Package (Die) ID,
51 * so ratio of 4 should be enough.
53 #define KVM_VCPU_ID_RATIO 4
54 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
56 /* memory slots that are not exposed to userspace */
57 #define KVM_INTERNAL_MEM_SLOTS 3
59 #define KVM_HALT_POLL_NS_DEFAULT 200000
61 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
63 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
64 KVM_DIRTY_LOG_INITIALLY_SET)
66 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
67 KVM_BUS_LOCK_DETECTION_EXIT)
69 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \
70 KVM_X86_NOTIFY_VMEXIT_USER)
72 /* x86-specific vcpu->requests bit members */
73 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
74 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
75 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
76 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
77 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
78 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
79 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
80 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
81 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
82 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
83 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
84 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
86 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
88 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
89 #define KVM_REQ_MCLOCK_INPROGRESS \
90 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
91 #define KVM_REQ_SCAN_IOAPIC \
92 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
93 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
94 #define KVM_REQ_APIC_PAGE_RELOAD \
95 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
96 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
97 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
98 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
99 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
100 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
101 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
102 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
103 #define KVM_REQ_APICV_UPDATE \
104 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
105 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
106 #define KVM_REQ_TLB_FLUSH_GUEST \
107 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
108 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
109 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
110 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
111 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
112 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
113 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
114 #define KVM_REQ_HV_TLB_FLUSH \
115 KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
117 #define CR0_RESERVED_BITS \
118 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
119 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
120 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
122 #define CR4_RESERVED_BITS \
123 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
124 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
125 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
126 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
127 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
128 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
130 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
134 #define INVALID_PAGE (~(hpa_t)0)
135 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
137 /* KVM Hugepage definitions for x86 */
138 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
139 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
140 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
141 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
142 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
143 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
144 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
146 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
147 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
148 #define KVM_MMU_HASH_SHIFT 12
149 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
150 #define KVM_MIN_FREE_MMU_PAGES 5
151 #define KVM_REFILL_PAGES 25
152 #define KVM_MAX_CPUID_ENTRIES 256
153 #define KVM_NR_FIXED_MTRR_REGION 88
154 #define KVM_NR_VAR_MTRR 8
156 #define ASYNC_PF_PER_VCPU 64
159 VCPU_REGS_RAX
= __VCPU_REGS_RAX
,
160 VCPU_REGS_RCX
= __VCPU_REGS_RCX
,
161 VCPU_REGS_RDX
= __VCPU_REGS_RDX
,
162 VCPU_REGS_RBX
= __VCPU_REGS_RBX
,
163 VCPU_REGS_RSP
= __VCPU_REGS_RSP
,
164 VCPU_REGS_RBP
= __VCPU_REGS_RBP
,
165 VCPU_REGS_RSI
= __VCPU_REGS_RSI
,
166 VCPU_REGS_RDI
= __VCPU_REGS_RDI
,
168 VCPU_REGS_R8
= __VCPU_REGS_R8
,
169 VCPU_REGS_R9
= __VCPU_REGS_R9
,
170 VCPU_REGS_R10
= __VCPU_REGS_R10
,
171 VCPU_REGS_R11
= __VCPU_REGS_R11
,
172 VCPU_REGS_R12
= __VCPU_REGS_R12
,
173 VCPU_REGS_R13
= __VCPU_REGS_R13
,
174 VCPU_REGS_R14
= __VCPU_REGS_R14
,
175 VCPU_REGS_R15
= __VCPU_REGS_R15
,
180 VCPU_EXREG_PDPTR
= NR_VCPU_REGS
,
186 VCPU_EXREG_EXIT_INFO_1
,
187 VCPU_EXREG_EXIT_INFO_2
,
201 enum exit_fastpath_completion
{
203 EXIT_FASTPATH_REENTER_GUEST
,
204 EXIT_FASTPATH_EXIT_HANDLED
,
206 typedef enum exit_fastpath_completion fastpath_t
;
208 struct x86_emulate_ctxt
;
209 struct x86_exception
;
212 enum x86_intercept_stage
;
214 #define KVM_NR_DB_REGS 4
216 #define DR6_BUS_LOCK (1 << 11)
217 #define DR6_BD (1 << 13)
218 #define DR6_BS (1 << 14)
219 #define DR6_BT (1 << 15)
220 #define DR6_RTM (1 << 16)
222 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
223 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
224 * they will never be 0 for now, but when they are defined
225 * in the future it will require no code change.
227 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
229 #define DR6_ACTIVE_LOW 0xffff0ff0
230 #define DR6_VOLATILE 0x0001e80f
231 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
233 #define DR7_BP_EN_MASK 0x000000ff
234 #define DR7_GE (1 << 9)
235 #define DR7_GD (1 << 13)
236 #define DR7_FIXED_1 0x00000400
237 #define DR7_VOLATILE 0xffff2bff
239 #define KVM_GUESTDBG_VALID_MASK \
240 (KVM_GUESTDBG_ENABLE | \
241 KVM_GUESTDBG_SINGLESTEP | \
242 KVM_GUESTDBG_USE_HW_BP | \
243 KVM_GUESTDBG_USE_SW_BP | \
244 KVM_GUESTDBG_INJECT_BP | \
245 KVM_GUESTDBG_INJECT_DB | \
246 KVM_GUESTDBG_BLOCKIRQ)
249 #define PFERR_PRESENT_BIT 0
250 #define PFERR_WRITE_BIT 1
251 #define PFERR_USER_BIT 2
252 #define PFERR_RSVD_BIT 3
253 #define PFERR_FETCH_BIT 4
254 #define PFERR_PK_BIT 5
255 #define PFERR_SGX_BIT 15
256 #define PFERR_GUEST_FINAL_BIT 32
257 #define PFERR_GUEST_PAGE_BIT 33
258 #define PFERR_IMPLICIT_ACCESS_BIT 48
260 #define PFERR_PRESENT_MASK BIT(PFERR_PRESENT_BIT)
261 #define PFERR_WRITE_MASK BIT(PFERR_WRITE_BIT)
262 #define PFERR_USER_MASK BIT(PFERR_USER_BIT)
263 #define PFERR_RSVD_MASK BIT(PFERR_RSVD_BIT)
264 #define PFERR_FETCH_MASK BIT(PFERR_FETCH_BIT)
265 #define PFERR_PK_MASK BIT(PFERR_PK_BIT)
266 #define PFERR_SGX_MASK BIT(PFERR_SGX_BIT)
267 #define PFERR_GUEST_FINAL_MASK BIT_ULL(PFERR_GUEST_FINAL_BIT)
268 #define PFERR_GUEST_PAGE_MASK BIT_ULL(PFERR_GUEST_PAGE_BIT)
269 #define PFERR_IMPLICIT_ACCESS BIT_ULL(PFERR_IMPLICIT_ACCESS_BIT)
271 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
275 /* apic attention bits */
276 #define KVM_APIC_CHECK_VAPIC 0
278 * The following bit is set with PV-EOI, unset on EOI.
279 * We detect PV-EOI changes by guest by comparing
280 * this bit with PV-EOI in guest memory.
281 * See the implementation in apic_update_pv_eoi.
283 #define KVM_APIC_PV_EOI_PENDING 1
285 struct kvm_kernel_irq_routing_entry
;
288 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
289 * also includes TDP pages) to determine whether or not a page can be used in
290 * the given MMU context. This is a subset of the overall kvm_cpu_role to
291 * minimize the size of kvm_memory_slot.arch.gfn_write_track, i.e. allows
292 * allocating 2 bytes per gfn instead of 4 bytes per gfn.
294 * Upper-level shadow pages having gptes are tracked for write-protection via
295 * gfn_write_track. As above, gfn_write_track is a 16 bit counter, so KVM must
296 * not create more than 2^16-1 upper-level shadow pages at a single gfn,
297 * otherwise gfn_write_track will overflow and explosions will ensue.
299 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
300 * cannot be reused. The ability to reuse a SP is tracked by its role, which
301 * incorporates various mode bits and properties of the SP. Roughly speaking,
302 * the number of unique SPs that can theoretically be created is 2^n, where n
303 * is the number of bits that are used to compute the role.
305 * But, even though there are 19 bits in the mask below, not all combinations
306 * of modes and flags are possible:
308 * - invalid shadow pages are not accounted, so the bits are effectively 18
310 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
311 * execonly and ad_disabled are only used for nested EPT which has
312 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
314 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
315 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
316 * paging has exactly one upper level, making level completely redundant
317 * when has_4_byte_gpte=1.
319 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
320 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
322 * Therefore, the maximum number of possible upper-level shadow pages for a
323 * single gfn is a bit less than 2^13.
325 union kvm_mmu_page_role
{
329 unsigned has_4_byte_gpte
:1;
336 unsigned smep_andnot_wp
:1;
337 unsigned smap_andnot_wp
:1;
338 unsigned ad_disabled
:1;
339 unsigned guest_mode
:1;
340 unsigned passthrough
:1;
344 * This is left at the top of the word so that
345 * kvm_memslots_for_spte_role can extract it with a
346 * simple shift. While there is room, give it a whole
347 * byte so it is also faster to load it from memory.
354 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
355 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
356 * including on nested transitions, if nothing in the full role changes then
357 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
358 * don't treat all-zero structure as valid data.
360 * The properties that are tracked in the extended role but not the page role
361 * are for things that either (a) do not affect the validity of the shadow page
362 * or (b) are indirectly reflected in the shadow page's role. For example,
363 * CR4.PKE only affects permission checks for software walks of the guest page
364 * tables (because KVM doesn't support Protection Keys with shadow paging), and
365 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
367 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
368 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
369 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
370 * SMAP aware regardless of CR0.WP.
372 union kvm_mmu_extended_role
{
375 unsigned int valid
:1;
376 unsigned int execonly
:1;
377 unsigned int cr4_pse
:1;
378 unsigned int cr4_pke
:1;
379 unsigned int cr4_smap
:1;
380 unsigned int cr4_smep
:1;
381 unsigned int cr4_la57
:1;
382 unsigned int efer_lma
:1;
389 union kvm_mmu_page_role base
;
390 union kvm_mmu_extended_role ext
;
394 struct kvm_rmap_head
{
398 struct kvm_pio_request
{
399 unsigned long linear_rip
;
406 #define PT64_ROOT_MAX_LEVEL 5
408 struct rsvd_bits_validate
{
409 u64 rsvd_bits_mask
[2][PT64_ROOT_MAX_LEVEL
];
413 struct kvm_mmu_root_info
{
418 #define KVM_MMU_ROOT_INFO_INVALID \
419 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
421 #define KVM_MMU_NUM_PREV_ROOTS 3
423 #define KVM_MMU_ROOT_CURRENT BIT(0)
424 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
425 #define KVM_MMU_ROOTS_ALL (BIT(1 + KVM_MMU_NUM_PREV_ROOTS) - 1)
427 #define KVM_HAVE_MMU_RWLOCK
430 struct kvm_page_fault
;
433 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
434 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
438 unsigned long (*get_guest_pgd
)(struct kvm_vcpu
*vcpu
);
439 u64 (*get_pdptr
)(struct kvm_vcpu
*vcpu
, int index
);
440 int (*page_fault
)(struct kvm_vcpu
*vcpu
, struct kvm_page_fault
*fault
);
441 void (*inject_page_fault
)(struct kvm_vcpu
*vcpu
,
442 struct x86_exception
*fault
);
443 gpa_t (*gva_to_gpa
)(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
444 gpa_t gva_or_gpa
, u64 access
,
445 struct x86_exception
*exception
);
446 int (*sync_spte
)(struct kvm_vcpu
*vcpu
,
447 struct kvm_mmu_page
*sp
, int i
);
448 struct kvm_mmu_root_info root
;
449 union kvm_cpu_role cpu_role
;
450 union kvm_mmu_page_role root_role
;
453 * The pkru_mask indicates if protection key checks are needed. It
454 * consists of 16 domains indexed by page fault error code bits [4:1],
455 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
456 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
460 struct kvm_mmu_root_info prev_roots
[KVM_MMU_NUM_PREV_ROOTS
];
463 * Bitmap; bit set = permission fault
464 * Byte index: page fault error code [4:1]
465 * Bit index: pte permissions in ACC_* format
474 * check zero bits on shadow page table entries, these
475 * bits include not only hardware reserved bits but also
476 * the bits spte never used.
478 struct rsvd_bits_validate shadow_zero_check
;
480 struct rsvd_bits_validate guest_rsvd_check
;
482 u64 pdptrs
[4]; /* pae */
498 struct perf_event
*perf_event
;
499 struct kvm_vcpu
*vcpu
;
501 * only for creating or reusing perf_event,
502 * eventsel value for general purpose counters,
503 * ctrl value for fixed counters.
508 /* More counters may conflict with other existing Architectural MSRs */
509 #define KVM_INTEL_PMC_MAX_GENERIC 8
510 #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
511 #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
512 #define KVM_PMC_MAX_FIXED 3
513 #define MSR_ARCH_PERFMON_FIXED_CTR_MAX (MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_PMC_MAX_FIXED - 1)
514 #define KVM_AMD_PMC_MAX_GENERIC 6
517 unsigned nr_arch_gp_counters
;
518 unsigned nr_arch_fixed_counters
;
519 unsigned available_event_types
;
521 u64 fixed_ctr_ctrl_mask
;
524 u64 counter_bitmask
[2];
525 u64 global_ctrl_mask
;
526 u64 global_status_mask
;
529 struct kvm_pmc gp_counters
[KVM_INTEL_PMC_MAX_GENERIC
];
530 struct kvm_pmc fixed_counters
[KVM_PMC_MAX_FIXED
];
531 struct irq_work irq_work
;
534 * Overlay the bitmap with a 64-bit atomic so that all bits can be
535 * set in a single access, e.g. to reprogram all counters when the PMU
539 DECLARE_BITMAP(reprogram_pmi
, X86_PMC_IDX_MAX
);
540 atomic64_t __reprogram_pmi
;
542 DECLARE_BITMAP(all_valid_pmc_idx
, X86_PMC_IDX_MAX
);
543 DECLARE_BITMAP(pmc_in_use
, X86_PMC_IDX_MAX
);
547 u64 pebs_enable_mask
;
549 u64 pebs_data_cfg_mask
;
552 * If a guest counter is cross-mapped to host counter with different
553 * index, its PEBS capability will be temporarily disabled.
555 * The user should make sure that this mask is updated
556 * after disabling interrupts and before perf_guest_get_msrs();
558 u64 host_cross_mapped_mask
;
561 * The gate to release perf_events not marked in
562 * pmc_in_use only once in a vcpu time slice.
567 * The total number of programmed perf_events and it helps to avoid
568 * redundant check before cleanup if guest don't use vPMU at all.
576 KVM_DEBUGREG_BP_ENABLED
= 1,
577 KVM_DEBUGREG_WONT_EXIT
= 2,
580 struct kvm_mtrr_range
{
583 struct list_head node
;
587 struct kvm_mtrr_range var_ranges
[KVM_NR_VAR_MTRR
];
588 mtrr_type fixed_ranges
[KVM_NR_FIXED_MTRR_REGION
];
591 struct list_head head
;
594 /* Hyper-V SynIC timer */
595 struct kvm_vcpu_hv_stimer
{
596 struct hrtimer timer
;
598 union hv_stimer_config config
;
601 struct hv_message msg
;
605 /* Hyper-V synthetic interrupt controller (SynIC)*/
606 struct kvm_vcpu_hv_synic
{
611 atomic64_t sint
[HV_SYNIC_SINT_COUNT
];
612 atomic_t sint_to_gsi
[HV_SYNIC_SINT_COUNT
];
613 DECLARE_BITMAP(auto_eoi_bitmap
, 256);
614 DECLARE_BITMAP(vec_bitmap
, 256);
616 bool dont_zero_synic_pages
;
619 /* The maximum number of entries on the TLB flush fifo. */
620 #define KVM_HV_TLB_FLUSH_FIFO_SIZE (16)
622 * Note: the following 'magic' entry is made up by KVM to avoid putting
623 * anything besides GVA on the TLB flush fifo. It is theoretically possible
624 * to observe a request to flush 4095 PFNs starting from 0xfffffffffffff000
625 * which will look identical. KVM's action to 'flush everything' instead of
626 * flushing these particular addresses is, however, fully legitimate as
627 * flushing more than requested is always OK.
629 #define KVM_HV_TLB_FLUSHALL_ENTRY ((u64)-1)
631 enum hv_tlb_flush_fifos
{
632 HV_L1_TLB_FLUSH_FIFO
,
633 HV_L2_TLB_FLUSH_FIFO
,
634 HV_NR_TLB_FLUSH_FIFOS
,
637 struct kvm_vcpu_hv_tlb_flush_fifo
{
638 spinlock_t write_lock
;
639 DECLARE_KFIFO(entries
, u64
, KVM_HV_TLB_FLUSH_FIFO_SIZE
);
642 /* Hyper-V per vcpu emulation context */
644 struct kvm_vcpu
*vcpu
;
648 struct kvm_vcpu_hv_synic synic
;
649 struct kvm_hyperv_exit exit
;
650 struct kvm_vcpu_hv_stimer stimer
[HV_SYNIC_STIMER_COUNT
];
651 DECLARE_BITMAP(stimer_pending_bitmap
, HV_SYNIC_STIMER_COUNT
);
654 u32 features_eax
; /* HYPERV_CPUID_FEATURES.EAX */
655 u32 features_ebx
; /* HYPERV_CPUID_FEATURES.EBX */
656 u32 features_edx
; /* HYPERV_CPUID_FEATURES.EDX */
657 u32 enlightenments_eax
; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
658 u32 enlightenments_ebx
; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
659 u32 syndbg_cap_eax
; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
660 u32 nested_eax
; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
661 u32 nested_ebx
; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
664 struct kvm_vcpu_hv_tlb_flush_fifo tlb_flush_fifo
[HV_NR_TLB_FLUSH_FIFOS
];
666 /* Preallocated buffer for handling hypercalls passing sparse vCPU set */
667 u64 sparse_banks
[HV_MAX_SPARSE_VCPU_BANKS
];
669 struct hv_vp_assist_page vp_assist_page
;
678 struct kvm_hypervisor_cpuid
{
683 /* Xen HVM per vcpu emulation context */
684 struct kvm_vcpu_xen
{
686 u32 current_runstate
;
688 struct gfn_to_pfn_cache vcpu_info_cache
;
689 struct gfn_to_pfn_cache vcpu_time_info_cache
;
690 struct gfn_to_pfn_cache runstate_cache
;
691 struct gfn_to_pfn_cache runstate2_cache
;
693 u64 runstate_entry_time
;
694 u64 runstate_times
[4];
695 unsigned long evtchn_pending_sel
;
696 u32 vcpu_id
; /* The Xen / ACPI vCPU ID */
698 u64 timer_expires
; /* In guest epoch */
699 atomic_t timer_pending
;
700 struct hrtimer timer
;
702 struct timer_list poll_timer
;
703 struct kvm_hypervisor_cpuid cpuid
;
706 struct kvm_queued_exception
{
712 unsigned long payload
;
716 struct kvm_vcpu_arch
{
718 * rip and regs accesses must go through
719 * kvm_{register,rip}_{read,write} functions.
721 unsigned long regs
[NR_VCPU_REGS
];
726 unsigned long cr0_guest_owned_bits
;
730 unsigned long cr4_guest_owned_bits
;
731 unsigned long cr4_guest_rsvd_bits
;
738 struct kvm_lapic
*apic
; /* kernel irqchip context */
739 bool load_eoi_exitmap_pending
;
740 DECLARE_BITMAP(ioapic_handled_vectors
, 256);
741 unsigned long apic_attention
;
742 int32_t apic_arb_prio
;
744 u64 ia32_misc_enable_msr
;
747 bool at_instruction_boundary
;
748 bool tpr_access_reporting
;
749 bool xfd_no_write_intercept
;
751 u64 microcode_version
;
752 u64 arch_capabilities
;
753 u64 perf_capabilities
;
756 * Paging state of the vcpu
758 * If the vcpu runs in guest mode with two level paging this still saves
759 * the paging mode of the l1 guest. This context is always used to
764 /* Non-nested MMU for L1 */
765 struct kvm_mmu root_mmu
;
767 /* L1 MMU when running nested */
768 struct kvm_mmu guest_mmu
;
771 * Paging state of an L2 guest (used for nested npt)
773 * This context will save all necessary information to walk page tables
774 * of an L2 guest. This context is only initialized for page table
775 * walking and not for faulting since we never handle l2 page faults on
778 struct kvm_mmu nested_mmu
;
781 * Pointer to the mmu context currently used for
782 * gva_to_gpa translations.
784 struct kvm_mmu
*walk_mmu
;
786 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache
;
787 struct kvm_mmu_memory_cache mmu_shadow_page_cache
;
788 struct kvm_mmu_memory_cache mmu_shadowed_info_cache
;
789 struct kvm_mmu_memory_cache mmu_page_header_cache
;
792 * QEMU userspace and the guest each have their own FPU state.
793 * In vcpu_run, we switch between the user and guest FPU contexts.
794 * While running a VCPU, the VCPU thread will have the guest FPU
797 * Note that while the PKRU state lives inside the fpu registers,
798 * it is switched out separately at VMENTER and VMEXIT time. The
799 * "guest_fpstate" state here contains the guest FPU context, with the
802 struct fpu_guest guest_fpu
;
805 u64 guest_supported_xcr0
;
807 struct kvm_pio_request pio
;
810 unsigned sev_pio_count
;
812 u8 event_exit_inst_len
;
814 bool exception_from_userspace
;
816 /* Exceptions to be injected to the guest. */
817 struct kvm_queued_exception exception
;
818 /* Exception VM-Exits to be synthesized to L1. */
819 struct kvm_queued_exception exception_vmexit
;
821 struct kvm_queued_interrupt
{
827 int halt_request
; /* real mode on Intel only */
830 struct kvm_cpuid_entry2
*cpuid_entries
;
831 struct kvm_hypervisor_cpuid kvm_cpuid
;
834 * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly
835 * when "struct kvm_vcpu_arch" is no longer defined in an
836 * arch/x86/include/asm header. The max is mostly arbitrary, i.e.
837 * can be increased as necessary.
839 #define KVM_MAX_NR_GOVERNED_FEATURES BITS_PER_LONG
842 * Track whether or not the guest is allowed to use features that are
843 * governed by KVM, where "governed" means KVM needs to manage state
844 * and/or explicitly enable the feature in hardware. Typically, but
845 * not always, governed features can be used by the guest if and only
846 * if both KVM and userspace want to expose the feature to the guest.
849 DECLARE_BITMAP(enabled
, KVM_MAX_NR_GOVERNED_FEATURES
);
852 u64 reserved_gpa_bits
;
855 /* emulate context */
857 struct x86_emulate_ctxt
*emulate_ctxt
;
858 bool emulate_regs_need_sync_to_vcpu
;
859 bool emulate_regs_need_sync_from_vcpu
;
860 int (*complete_userspace_io
)(struct kvm_vcpu
*vcpu
);
863 struct pvclock_vcpu_time_info hv_clock
;
864 unsigned int hw_tsc_khz
;
865 struct gfn_to_pfn_cache pv_time
;
866 /* set guest stopped flag in pvclock flags field */
867 bool pvclock_set_guest_stopped_request
;
873 struct gfn_to_hva_cache cache
;
877 u64 tsc_offset
; /* current tsc offset */
880 u64 tsc_offset_adjustment
;
883 u64 this_tsc_generation
;
885 bool tsc_always_catchup
;
886 s8 virtual_tsc_shift
;
887 u32 virtual_tsc_mult
;
889 s64 ia32_tsc_adjust_msr
;
890 u64 msr_ia32_power_ctl
;
891 u64 l1_tsc_scaling_ratio
;
892 u64 tsc_scaling_ratio
; /* current scaling ratio */
894 atomic_t nmi_queued
; /* unprocessed asynchronous NMIs */
895 /* Number of NMIs pending injection, not including hardware vNMIs. */
896 unsigned int nmi_pending
;
897 bool nmi_injected
; /* Trying to inject an NMI this entry */
898 bool smi_pending
; /* SMI queued after currently running handler */
899 u8 handling_intr_from_guest
;
901 struct kvm_mtrr mtrr_state
;
904 unsigned switch_db_regs
;
905 unsigned long db
[KVM_NR_DB_REGS
];
908 unsigned long eff_db
[KVM_NR_DB_REGS
];
909 unsigned long guest_debug_dr7
;
910 u64 msr_platform_info
;
911 u64 msr_misc_features_enables
;
920 /* Cache MMIO info */
922 unsigned mmio_access
;
928 /* used for guest single stepping over the given code position */
929 unsigned long singlestep_rip
;
932 struct kvm_vcpu_hv
*hyperv
;
933 struct kvm_vcpu_xen xen
;
935 cpumask_var_t wbinvd_dirty_mask
;
937 unsigned long last_retry_eip
;
938 unsigned long last_retry_addr
;
942 gfn_t gfns
[ASYNC_PF_PER_VCPU
];
943 struct gfn_to_hva_cache data
;
944 u64 msr_en_val
; /* MSR_KVM_ASYNC_PF_EN */
945 u64 msr_int_val
; /* MSR_KVM_ASYNC_PF_INT */
950 bool delivery_as_pf_vmexit
;
951 bool pageready_pending
;
954 /* OSVW MSRs (AMD only) */
962 struct gfn_to_hva_cache data
;
965 u64 msr_kvm_poll_control
;
967 /* set at EPT violation at this point */
968 unsigned long exit_qualification
;
970 /* pv related host specific info */
975 int pending_ioapic_eoi
;
976 int pending_external_vector
;
978 /* be preempted when it's in kernel-mode(cpl=0) */
979 bool preempted_in_kernel
;
981 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
984 /* Host CPU on which VM-entry was most recently attempted */
985 int last_vmentry_cpu
;
987 /* AMD MSRC001_0015 Hardware Configuration */
990 /* pv related cpuid info */
993 * value of the eax register in the KVM_CPUID_FEATURES CPUID
999 * indicates whether pv emulation should be disabled if features
1000 * are not present in the guest's cpuid
1005 /* Protected Guests */
1006 bool guest_state_protected
;
1009 * Set when PDPTS were loaded directly by the userspace without
1010 * reading the guest memory
1012 bool pdptrs_from_userspace
;
1014 #if IS_ENABLED(CONFIG_HYPERV)
1019 struct kvm_lpage_info
{
1023 struct kvm_arch_memory_slot
{
1024 struct kvm_rmap_head
*rmap
[KVM_NR_PAGE_SIZES
];
1025 struct kvm_lpage_info
*lpage_info
[KVM_NR_PAGE_SIZES
- 1];
1026 unsigned short *gfn_write_track
;
1030 * Track the mode of the optimized logical map, as the rules for decoding the
1031 * destination vary per mode. Enabling the optimized logical map requires all
1032 * software-enabled local APIs to be in the same mode, each addressable APIC to
1033 * be mapped to only one MDA, and each MDA to map to at most one APIC.
1035 enum kvm_apic_logical_mode
{
1036 /* All local APICs are software disabled. */
1037 KVM_APIC_MODE_SW_DISABLED
,
1038 /* All software enabled local APICs in xAPIC cluster addressing mode. */
1039 KVM_APIC_MODE_XAPIC_CLUSTER
,
1040 /* All software enabled local APICs in xAPIC flat addressing mode. */
1041 KVM_APIC_MODE_XAPIC_FLAT
,
1042 /* All software enabled local APICs in x2APIC mode. */
1043 KVM_APIC_MODE_X2APIC
,
1045 * Optimized map disabled, e.g. not all local APICs in the same logical
1046 * mode, same logical ID assigned to multiple APICs, etc.
1048 KVM_APIC_MODE_MAP_DISABLED
,
1051 struct kvm_apic_map
{
1052 struct rcu_head rcu
;
1053 enum kvm_apic_logical_mode logical_mode
;
1056 struct kvm_lapic
*xapic_flat_map
[8];
1057 struct kvm_lapic
*xapic_cluster_map
[16][4];
1059 struct kvm_lapic
*phys_map
[];
1062 /* Hyper-V synthetic debugger (SynDbg)*/
1063 struct kvm_hv_syndbg
{
1074 /* Current state of Hyper-V TSC page clocksource */
1075 enum hv_tsc_page_status
{
1076 /* TSC page was not set up or disabled */
1077 HV_TSC_PAGE_UNSET
= 0,
1078 /* TSC page MSR was written by the guest, update pending */
1079 HV_TSC_PAGE_GUEST_CHANGED
,
1080 /* TSC page update was triggered from the host side */
1081 HV_TSC_PAGE_HOST_CHANGED
,
1082 /* TSC page was properly set up and is currently active */
1084 /* TSC page was set up with an inaccessible GPA */
1088 /* Hyper-V emulation context */
1090 struct mutex hv_lock
;
1094 enum hv_tsc_page_status hv_tsc_page_status
;
1096 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1097 u64 hv_crash_param
[HV_X64_MSR_CRASH_PARAMS
];
1100 struct ms_hyperv_tsc_page tsc_ref
;
1102 struct idr conn_to_evt
;
1104 u64 hv_reenlightenment_control
;
1105 u64 hv_tsc_emulation_control
;
1106 u64 hv_tsc_emulation_status
;
1107 u64 hv_invtsc_control
;
1109 /* How many vCPUs have VP index != vCPU index */
1110 atomic_t num_mismatched_vp_indexes
;
1113 * How many SynICs use 'AutoEOI' feature
1114 * (protected by arch.apicv_update_lock)
1116 unsigned int synic_auto_eoi_used
;
1118 struct hv_partition_assist_pg
*hv_pa_pg
;
1119 struct kvm_hv_syndbg hv_syndbg
;
1122 struct msr_bitmap_range
{
1126 unsigned long *bitmap
;
1129 /* Xen emulation context */
1131 struct mutex xen_lock
;
1134 bool runstate_update_flag
;
1136 struct gfn_to_pfn_cache shinfo_cache
;
1137 struct idr evtchn_ports
;
1138 unsigned long poll_mask
[BITS_TO_LONGS(KVM_MAX_VCPUS
)];
1141 enum kvm_irqchip_mode
{
1143 KVM_IRQCHIP_KERNEL
, /* created with KVM_CREATE_IRQCHIP */
1144 KVM_IRQCHIP_SPLIT
, /* created with KVM_CAP_SPLIT_IRQCHIP */
1147 struct kvm_x86_msr_filter
{
1149 bool default_allow
:1;
1150 struct msr_bitmap_range ranges
[16];
1153 struct kvm_x86_pmu_event_filter
{
1156 __u32 fixed_counter_bitmap
;
1165 enum kvm_apicv_inhibit
{
1167 /********************************************************************/
1168 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1169 /********************************************************************/
1172 * APIC acceleration is disabled by a module parameter
1173 * and/or not supported in hardware.
1175 APICV_INHIBIT_REASON_DISABLE
,
1178 * APIC acceleration is inhibited because AutoEOI feature is
1179 * being used by a HyperV guest.
1181 APICV_INHIBIT_REASON_HYPERV
,
1184 * APIC acceleration is inhibited because the userspace didn't yet
1185 * enable the kernel/split irqchip.
1187 APICV_INHIBIT_REASON_ABSENT
,
1189 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1190 * (out of band, debug measure of blocking all interrupts on this vCPU)
1191 * was enabled, to avoid AVIC/APICv bypassing it.
1193 APICV_INHIBIT_REASON_BLOCKIRQ
,
1196 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1197 * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack.
1199 APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED
,
1202 * For simplicity, the APIC acceleration is inhibited
1203 * first time either APIC ID or APIC base are changed by the guest
1204 * from their reset values.
1206 APICV_INHIBIT_REASON_APIC_ID_MODIFIED
,
1207 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED
,
1209 /******************************************************/
1210 /* INHIBITs that are relevant only to the AMD's AVIC. */
1211 /******************************************************/
1214 * AVIC is inhibited on a vCPU because it runs a nested guest.
1216 * This is needed because unlike APICv, the peers of this vCPU
1217 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1218 * a vCPU runs nested.
1220 APICV_INHIBIT_REASON_NESTED
,
1223 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1224 * which cannot be injected when the AVIC is enabled, thus AVIC
1225 * is inhibited while KVM waits for IRQ window.
1227 APICV_INHIBIT_REASON_IRQWIN
,
1230 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1231 * which AVIC doesn't support for edge triggered interrupts.
1233 APICV_INHIBIT_REASON_PIT_REINJ
,
1236 * AVIC is disabled because SEV doesn't support it.
1238 APICV_INHIBIT_REASON_SEV
,
1241 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
1242 * mapping between logical ID and vCPU.
1244 APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED
,
1248 unsigned long n_used_mmu_pages
;
1249 unsigned long n_requested_mmu_pages
;
1250 unsigned long n_max_mmu_pages
;
1251 unsigned int indirect_shadow_pages
;
1253 struct hlist_head mmu_page_hash
[KVM_NUM_MMU_PAGES
];
1254 struct list_head active_mmu_pages
;
1255 struct list_head zapped_obsolete_pages
;
1257 * A list of kvm_mmu_page structs that, if zapped, could possibly be
1258 * replaced by an NX huge page. A shadow page is on this list if its
1259 * existence disallows an NX huge page (nx_huge_page_disallowed is set)
1260 * and there are no other conditions that prevent a huge page, e.g.
1261 * the backing host page is huge, dirtly logging is not enabled for its
1262 * memslot, etc... Note, zapping shadow pages on this list doesn't
1263 * guarantee an NX huge page will be created in its stead, e.g. if the
1264 * guest attempts to execute from the region then KVM obviously can't
1265 * create an NX huge page (without hanging the guest).
1267 struct list_head possible_nx_huge_pages
;
1268 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1269 struct kvm_page_track_notifier_head track_notifier_head
;
1272 * Protects marking pages unsync during page faults, as TDP MMU page
1273 * faults only take mmu_lock for read. For simplicity, the unsync
1274 * pages lock is always taken when marking pages unsync regardless of
1275 * whether mmu_lock is held for read or write.
1277 spinlock_t mmu_unsync_pages_lock
;
1279 struct list_head assigned_dev_head
;
1280 struct iommu_domain
*iommu_domain
;
1281 bool iommu_noncoherent
;
1282 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1283 atomic_t noncoherent_dma_count
;
1284 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1285 atomic_t assigned_device_count
;
1286 struct kvm_pic
*vpic
;
1287 struct kvm_ioapic
*vioapic
;
1288 struct kvm_pit
*vpit
;
1289 atomic_t vapics_in_nmi_mode
;
1290 struct mutex apic_map_lock
;
1291 struct kvm_apic_map __rcu
*apic_map
;
1292 atomic_t apic_map_dirty
;
1294 bool apic_access_memslot_enabled
;
1295 bool apic_access_memslot_inhibited
;
1297 /* Protects apicv_inhibit_reasons */
1298 struct rw_semaphore apicv_update_lock
;
1299 unsigned long apicv_inhibit_reasons
;
1303 bool mwait_in_guest
;
1305 bool pause_in_guest
;
1306 bool cstate_in_guest
;
1308 unsigned long irq_sources_bitmap
;
1309 s64 kvmclock_offset
;
1312 * This also protects nr_vcpus_matched_tsc which is read from a
1313 * preemption-disabled region, so it must be a raw spinlock.
1315 raw_spinlock_t tsc_write_lock
;
1319 u64 last_tsc_offset
;
1323 u64 cur_tsc_generation
;
1324 int nr_vcpus_matched_tsc
;
1326 u32 default_tsc_khz
;
1328 seqcount_raw_spinlock_t pvclock_sc
;
1329 bool use_master_clock
;
1330 u64 master_kernel_ns
;
1331 u64 master_cycle_now
;
1332 struct delayed_work kvmclock_update_work
;
1333 struct delayed_work kvmclock_sync_work
;
1335 struct kvm_xen_hvm_config xen_hvm_config
;
1337 /* reads protected by irq_srcu, writes by irq_lock */
1338 struct hlist_head mask_notifier_list
;
1340 struct kvm_hv hyperv
;
1343 bool backwards_tsc_observed
;
1344 bool boot_vcpu_runs_old_kvmclock
;
1347 u64 disabled_quirks
;
1349 enum kvm_irqchip_mode irqchip_mode
;
1350 u8 nr_reserved_ioapic_pins
;
1352 bool disabled_lapic_found
;
1355 bool x2apic_broadcast_quirk_disabled
;
1357 bool guest_can_read_msr_platform_info
;
1358 bool exception_payload_enabled
;
1360 bool triple_fault_event
;
1362 bool bus_lock_detection_enabled
;
1366 u32 notify_vmexit_flags
;
1368 * If exit_on_emulation_error is set, and the in-kernel instruction
1369 * emulator fails to emulate an instruction, allow userspace
1370 * the opportunity to look at it.
1372 bool exit_on_emulation_error
;
1374 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1375 u32 user_space_msr_mask
;
1376 struct kvm_x86_msr_filter __rcu
*msr_filter
;
1378 u32 hypercall_exit_enabled
;
1380 /* Guest can access the SGX PROVISIONKEY. */
1381 bool sgx_provisioning_allowed
;
1383 struct kvm_x86_pmu_event_filter __rcu
*pmu_event_filter
;
1384 struct task_struct
*nx_huge_page_recovery_thread
;
1386 #ifdef CONFIG_X86_64
1387 /* The number of TDP MMU pages across all roots. */
1388 atomic64_t tdp_mmu_pages
;
1391 * List of struct kvm_mmu_pages being used as roots.
1392 * All struct kvm_mmu_pages in the list should have
1395 * For reads, this list is protected by:
1396 * the MMU lock in read mode + RCU or
1397 * the MMU lock in write mode
1399 * For writes, this list is protected by:
1400 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1401 * the MMU lock in write mode
1403 * Roots will remain in the list until their tdp_mmu_root_count
1404 * drops to zero, at which point the thread that decremented the
1405 * count to zero should removed the root from the list and clean
1406 * it up, freeing the root after an RCU grace period.
1408 struct list_head tdp_mmu_roots
;
1411 * Protects accesses to the following fields when the MMU lock
1412 * is held in read mode:
1413 * - tdp_mmu_roots (above)
1414 * - the link field of kvm_mmu_page structs used by the TDP MMU
1415 * - possible_nx_huge_pages;
1416 * - the possible_nx_huge_page_link field of kvm_mmu_page structs used
1418 * It is acceptable, but not necessary, to acquire this lock when
1419 * the thread holds the MMU lock in write mode.
1421 spinlock_t tdp_mmu_pages_lock
;
1422 #endif /* CONFIG_X86_64 */
1425 * If set, at least one shadow root has been allocated. This flag
1426 * is used as one input when determining whether certain memslot
1427 * related allocations are necessary.
1429 bool shadow_root_allocated
;
1431 #if IS_ENABLED(CONFIG_HYPERV)
1433 spinlock_t hv_root_tdp_lock
;
1436 * VM-scope maximum vCPU ID. Used to determine the size of structures
1437 * that increase along with the maximum vCPU ID, in which case, using
1438 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1442 bool disable_nx_huge_pages
;
1445 * Memory caches used to allocate shadow pages when performing eager
1446 * page splitting. No need for a shadowed_info_cache since eager page
1447 * splitting only allocates direct shadow pages.
1449 * Protected by kvm->slots_lock.
1451 struct kvm_mmu_memory_cache split_shadow_page_cache
;
1452 struct kvm_mmu_memory_cache split_page_header_cache
;
1455 * Memory cache used to allocate pte_list_desc structs while splitting
1456 * huge pages. In the worst case, to split one huge page, 512
1457 * pte_list_desc structs are needed to add each lower level leaf sptep
1458 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1461 * Protected by kvm->slots_lock.
1463 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1464 struct kvm_mmu_memory_cache split_desc_cache
;
1467 struct kvm_vm_stat
{
1468 struct kvm_vm_stat_generic generic
;
1469 u64 mmu_shadow_zapped
;
1478 atomic64_t pages_4k
;
1479 atomic64_t pages_2m
;
1480 atomic64_t pages_1g
;
1482 atomic64_t pages
[KVM_NR_PAGE_SIZES
];
1484 u64 nx_lpage_splits
;
1485 u64 max_mmu_page_hash_collisions
;
1486 u64 max_mmu_rmap_size
;
1489 struct kvm_vcpu_stat
{
1490 struct kvm_vcpu_stat_generic generic
;
1496 u64 pf_mmio_spte_created
;
1505 u64 irq_window_exits
;
1506 u64 nmi_window_exits
;
1509 u64 request_irq_exits
;
1511 u64 host_state_reload
;
1514 u64 insn_emulation_fail
;
1520 u64 directed_yield_attempted
;
1521 u64 directed_yield_successful
;
1522 u64 preemption_reported
;
1523 u64 preemption_other
;
1525 u64 notify_window_exits
;
1528 struct x86_instruction_info
;
1531 bool host_initiated
;
1536 struct kvm_lapic_irq
{
1544 bool msi_redir_hint
;
1547 static inline u16
kvm_lapic_irq_dest_mode(bool dest_mode_logical
)
1549 return dest_mode_logical
? APIC_DEST_LOGICAL
: APIC_DEST_PHYSICAL
;
1552 struct kvm_x86_ops
{
1555 int (*check_processor_compatibility
)(void);
1557 int (*hardware_enable
)(void);
1558 void (*hardware_disable
)(void);
1559 void (*hardware_unsetup
)(void);
1560 bool (*has_emulated_msr
)(struct kvm
*kvm
, u32 index
);
1561 void (*vcpu_after_set_cpuid
)(struct kvm_vcpu
*vcpu
);
1563 unsigned int vm_size
;
1564 int (*vm_init
)(struct kvm
*kvm
);
1565 void (*vm_destroy
)(struct kvm
*kvm
);
1567 /* Create, but do not attach this VCPU */
1568 int (*vcpu_precreate
)(struct kvm
*kvm
);
1569 int (*vcpu_create
)(struct kvm_vcpu
*vcpu
);
1570 void (*vcpu_free
)(struct kvm_vcpu
*vcpu
);
1571 void (*vcpu_reset
)(struct kvm_vcpu
*vcpu
, bool init_event
);
1573 void (*prepare_switch_to_guest
)(struct kvm_vcpu
*vcpu
);
1574 void (*vcpu_load
)(struct kvm_vcpu
*vcpu
, int cpu
);
1575 void (*vcpu_put
)(struct kvm_vcpu
*vcpu
);
1577 void (*update_exception_bitmap
)(struct kvm_vcpu
*vcpu
);
1578 int (*get_msr
)(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
);
1579 int (*set_msr
)(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
);
1580 u64 (*get_segment_base
)(struct kvm_vcpu
*vcpu
, int seg
);
1581 void (*get_segment
)(struct kvm_vcpu
*vcpu
,
1582 struct kvm_segment
*var
, int seg
);
1583 int (*get_cpl
)(struct kvm_vcpu
*vcpu
);
1584 void (*set_segment
)(struct kvm_vcpu
*vcpu
,
1585 struct kvm_segment
*var
, int seg
);
1586 void (*get_cs_db_l_bits
)(struct kvm_vcpu
*vcpu
, int *db
, int *l
);
1587 bool (*is_valid_cr0
)(struct kvm_vcpu
*vcpu
, unsigned long cr0
);
1588 void (*set_cr0
)(struct kvm_vcpu
*vcpu
, unsigned long cr0
);
1589 void (*post_set_cr3
)(struct kvm_vcpu
*vcpu
, unsigned long cr3
);
1590 bool (*is_valid_cr4
)(struct kvm_vcpu
*vcpu
, unsigned long cr4
);
1591 void (*set_cr4
)(struct kvm_vcpu
*vcpu
, unsigned long cr4
);
1592 int (*set_efer
)(struct kvm_vcpu
*vcpu
, u64 efer
);
1593 void (*get_idt
)(struct kvm_vcpu
*vcpu
, struct desc_ptr
*dt
);
1594 void (*set_idt
)(struct kvm_vcpu
*vcpu
, struct desc_ptr
*dt
);
1595 void (*get_gdt
)(struct kvm_vcpu
*vcpu
, struct desc_ptr
*dt
);
1596 void (*set_gdt
)(struct kvm_vcpu
*vcpu
, struct desc_ptr
*dt
);
1597 void (*sync_dirty_debug_regs
)(struct kvm_vcpu
*vcpu
);
1598 void (*set_dr7
)(struct kvm_vcpu
*vcpu
, unsigned long value
);
1599 void (*cache_reg
)(struct kvm_vcpu
*vcpu
, enum kvm_reg reg
);
1600 unsigned long (*get_rflags
)(struct kvm_vcpu
*vcpu
);
1601 void (*set_rflags
)(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
1602 bool (*get_if_flag
)(struct kvm_vcpu
*vcpu
);
1604 void (*flush_tlb_all
)(struct kvm_vcpu
*vcpu
);
1605 void (*flush_tlb_current
)(struct kvm_vcpu
*vcpu
);
1606 int (*flush_remote_tlbs
)(struct kvm
*kvm
);
1607 int (*flush_remote_tlbs_range
)(struct kvm
*kvm
, gfn_t gfn
,
1611 * Flush any TLB entries associated with the given GVA.
1612 * Does not need to flush GPA->HPA mappings.
1613 * Can potentially get non-canonical addresses through INVLPGs, which
1614 * the implementation may choose to ignore if appropriate.
1616 void (*flush_tlb_gva
)(struct kvm_vcpu
*vcpu
, gva_t addr
);
1619 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1620 * does not need to flush GPA->HPA mappings.
1622 void (*flush_tlb_guest
)(struct kvm_vcpu
*vcpu
);
1624 int (*vcpu_pre_run
)(struct kvm_vcpu
*vcpu
);
1625 enum exit_fastpath_completion (*vcpu_run
)(struct kvm_vcpu
*vcpu
);
1626 int (*handle_exit
)(struct kvm_vcpu
*vcpu
,
1627 enum exit_fastpath_completion exit_fastpath
);
1628 int (*skip_emulated_instruction
)(struct kvm_vcpu
*vcpu
);
1629 void (*update_emulated_instruction
)(struct kvm_vcpu
*vcpu
);
1630 void (*set_interrupt_shadow
)(struct kvm_vcpu
*vcpu
, int mask
);
1631 u32 (*get_interrupt_shadow
)(struct kvm_vcpu
*vcpu
);
1632 void (*patch_hypercall
)(struct kvm_vcpu
*vcpu
,
1633 unsigned char *hypercall_addr
);
1634 void (*inject_irq
)(struct kvm_vcpu
*vcpu
, bool reinjected
);
1635 void (*inject_nmi
)(struct kvm_vcpu
*vcpu
);
1636 void (*inject_exception
)(struct kvm_vcpu
*vcpu
);
1637 void (*cancel_injection
)(struct kvm_vcpu
*vcpu
);
1638 int (*interrupt_allowed
)(struct kvm_vcpu
*vcpu
, bool for_injection
);
1639 int (*nmi_allowed
)(struct kvm_vcpu
*vcpu
, bool for_injection
);
1640 bool (*get_nmi_mask
)(struct kvm_vcpu
*vcpu
);
1641 void (*set_nmi_mask
)(struct kvm_vcpu
*vcpu
, bool masked
);
1642 /* Whether or not a virtual NMI is pending in hardware. */
1643 bool (*is_vnmi_pending
)(struct kvm_vcpu
*vcpu
);
1645 * Attempt to pend a virtual NMI in harware. Returns %true on success
1646 * to allow using static_call_ret0 as the fallback.
1648 bool (*set_vnmi_pending
)(struct kvm_vcpu
*vcpu
);
1649 void (*enable_nmi_window
)(struct kvm_vcpu
*vcpu
);
1650 void (*enable_irq_window
)(struct kvm_vcpu
*vcpu
);
1651 void (*update_cr8_intercept
)(struct kvm_vcpu
*vcpu
, int tpr
, int irr
);
1652 bool (*check_apicv_inhibit_reasons
)(enum kvm_apicv_inhibit reason
);
1653 const unsigned long required_apicv_inhibits
;
1654 bool allow_apicv_in_x2apic_without_x2apic_virtualization
;
1655 void (*refresh_apicv_exec_ctrl
)(struct kvm_vcpu
*vcpu
);
1656 void (*hwapic_irr_update
)(struct kvm_vcpu
*vcpu
, int max_irr
);
1657 void (*hwapic_isr_update
)(int isr
);
1658 bool (*guest_apic_has_interrupt
)(struct kvm_vcpu
*vcpu
);
1659 void (*load_eoi_exitmap
)(struct kvm_vcpu
*vcpu
, u64
*eoi_exit_bitmap
);
1660 void (*set_virtual_apic_mode
)(struct kvm_vcpu
*vcpu
);
1661 void (*set_apic_access_page_addr
)(struct kvm_vcpu
*vcpu
);
1662 void (*deliver_interrupt
)(struct kvm_lapic
*apic
, int delivery_mode
,
1663 int trig_mode
, int vector
);
1664 int (*sync_pir_to_irr
)(struct kvm_vcpu
*vcpu
);
1665 int (*set_tss_addr
)(struct kvm
*kvm
, unsigned int addr
);
1666 int (*set_identity_map_addr
)(struct kvm
*kvm
, u64 ident_addr
);
1667 u8 (*get_mt_mask
)(struct kvm_vcpu
*vcpu
, gfn_t gfn
, bool is_mmio
);
1669 void (*load_mmu_pgd
)(struct kvm_vcpu
*vcpu
, hpa_t root_hpa
,
1672 bool (*has_wbinvd_exit
)(void);
1674 u64 (*get_l2_tsc_offset
)(struct kvm_vcpu
*vcpu
);
1675 u64 (*get_l2_tsc_multiplier
)(struct kvm_vcpu
*vcpu
);
1676 void (*write_tsc_offset
)(struct kvm_vcpu
*vcpu
);
1677 void (*write_tsc_multiplier
)(struct kvm_vcpu
*vcpu
);
1680 * Retrieve somewhat arbitrary exit information. Intended to
1681 * be used only from within tracepoints or error paths.
1683 void (*get_exit_info
)(struct kvm_vcpu
*vcpu
, u32
*reason
,
1684 u64
*info1
, u64
*info2
,
1685 u32
*exit_int_info
, u32
*exit_int_info_err_code
);
1687 int (*check_intercept
)(struct kvm_vcpu
*vcpu
,
1688 struct x86_instruction_info
*info
,
1689 enum x86_intercept_stage stage
,
1690 struct x86_exception
*exception
);
1691 void (*handle_exit_irqoff
)(struct kvm_vcpu
*vcpu
);
1693 void (*request_immediate_exit
)(struct kvm_vcpu
*vcpu
);
1695 void (*sched_in
)(struct kvm_vcpu
*kvm
, int cpu
);
1698 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1699 * value indicates CPU dirty logging is unsupported or disabled.
1701 int cpu_dirty_log_size
;
1702 void (*update_cpu_dirty_logging
)(struct kvm_vcpu
*vcpu
);
1704 const struct kvm_x86_nested_ops
*nested_ops
;
1706 void (*vcpu_blocking
)(struct kvm_vcpu
*vcpu
);
1707 void (*vcpu_unblocking
)(struct kvm_vcpu
*vcpu
);
1709 int (*pi_update_irte
)(struct kvm
*kvm
, unsigned int host_irq
,
1710 uint32_t guest_irq
, bool set
);
1711 void (*pi_start_assignment
)(struct kvm
*kvm
);
1712 void (*apicv_post_state_restore
)(struct kvm_vcpu
*vcpu
);
1713 bool (*dy_apicv_has_pending_interrupt
)(struct kvm_vcpu
*vcpu
);
1715 int (*set_hv_timer
)(struct kvm_vcpu
*vcpu
, u64 guest_deadline_tsc
,
1717 void (*cancel_hv_timer
)(struct kvm_vcpu
*vcpu
);
1719 void (*setup_mce
)(struct kvm_vcpu
*vcpu
);
1721 #ifdef CONFIG_KVM_SMM
1722 int (*smi_allowed
)(struct kvm_vcpu
*vcpu
, bool for_injection
);
1723 int (*enter_smm
)(struct kvm_vcpu
*vcpu
, union kvm_smram
*smram
);
1724 int (*leave_smm
)(struct kvm_vcpu
*vcpu
, const union kvm_smram
*smram
);
1725 void (*enable_smi_window
)(struct kvm_vcpu
*vcpu
);
1728 int (*mem_enc_ioctl
)(struct kvm
*kvm
, void __user
*argp
);
1729 int (*mem_enc_register_region
)(struct kvm
*kvm
, struct kvm_enc_region
*argp
);
1730 int (*mem_enc_unregister_region
)(struct kvm
*kvm
, struct kvm_enc_region
*argp
);
1731 int (*vm_copy_enc_context_from
)(struct kvm
*kvm
, unsigned int source_fd
);
1732 int (*vm_move_enc_context_from
)(struct kvm
*kvm
, unsigned int source_fd
);
1733 void (*guest_memory_reclaimed
)(struct kvm
*kvm
);
1735 int (*get_msr_feature
)(struct kvm_msr_entry
*entry
);
1737 bool (*can_emulate_instruction
)(struct kvm_vcpu
*vcpu
, int emul_type
,
1738 void *insn
, int insn_len
);
1740 bool (*apic_init_signal_blocked
)(struct kvm_vcpu
*vcpu
);
1741 int (*enable_l2_tlb_flush
)(struct kvm_vcpu
*vcpu
);
1743 void (*migrate_timers
)(struct kvm_vcpu
*vcpu
);
1744 void (*msr_filter_changed
)(struct kvm_vcpu
*vcpu
);
1745 int (*complete_emulated_msr
)(struct kvm_vcpu
*vcpu
, int err
);
1747 void (*vcpu_deliver_sipi_vector
)(struct kvm_vcpu
*vcpu
, u8 vector
);
1750 * Returns vCPU specific APICv inhibit reasons
1752 unsigned long (*vcpu_get_apicv_inhibit_reasons
)(struct kvm_vcpu
*vcpu
);
1755 struct kvm_x86_nested_ops
{
1756 void (*leave_nested
)(struct kvm_vcpu
*vcpu
);
1757 bool (*is_exception_vmexit
)(struct kvm_vcpu
*vcpu
, u8 vector
,
1759 int (*check_events
)(struct kvm_vcpu
*vcpu
);
1760 bool (*has_events
)(struct kvm_vcpu
*vcpu
);
1761 void (*triple_fault
)(struct kvm_vcpu
*vcpu
);
1762 int (*get_state
)(struct kvm_vcpu
*vcpu
,
1763 struct kvm_nested_state __user
*user_kvm_nested_state
,
1764 unsigned user_data_size
);
1765 int (*set_state
)(struct kvm_vcpu
*vcpu
,
1766 struct kvm_nested_state __user
*user_kvm_nested_state
,
1767 struct kvm_nested_state
*kvm_state
);
1768 bool (*get_nested_state_pages
)(struct kvm_vcpu
*vcpu
);
1769 int (*write_log_dirty
)(struct kvm_vcpu
*vcpu
, gpa_t l2_gpa
);
1771 int (*enable_evmcs
)(struct kvm_vcpu
*vcpu
,
1772 uint16_t *vmcs_version
);
1773 uint16_t (*get_evmcs_version
)(struct kvm_vcpu
*vcpu
);
1774 void (*hv_inject_synthetic_vmexit_post_tlb_flush
)(struct kvm_vcpu
*vcpu
);
1777 struct kvm_x86_init_ops
{
1778 int (*hardware_setup
)(void);
1779 unsigned int (*handle_intel_pt_intr
)(void);
1781 struct kvm_x86_ops
*runtime_ops
;
1782 struct kvm_pmu_ops
*pmu_ops
;
1785 struct kvm_arch_async_pf
{
1792 extern u32 __read_mostly kvm_nr_uret_msrs
;
1793 extern u64 __read_mostly host_efer
;
1794 extern bool __read_mostly allow_smaller_maxphyaddr
;
1795 extern bool __read_mostly enable_apicv
;
1796 extern struct kvm_x86_ops kvm_x86_ops
;
1798 #define KVM_X86_OP(func) \
1799 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1800 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1801 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1802 #include <asm/kvm-x86-ops.h>
1804 int kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
);
1805 void kvm_x86_vendor_exit(void);
1807 #define __KVM_HAVE_ARCH_VM_ALLOC
1808 static inline struct kvm
*kvm_arch_alloc_vm(void)
1810 return __vmalloc(kvm_x86_ops
.vm_size
, GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
1813 #define __KVM_HAVE_ARCH_VM_FREE
1814 void kvm_arch_free_vm(struct kvm
*kvm
);
1816 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS
1817 static inline int kvm_arch_flush_remote_tlbs(struct kvm
*kvm
)
1819 if (kvm_x86_ops
.flush_remote_tlbs
&&
1820 !static_call(kvm_x86_flush_remote_tlbs
)(kvm
))
1826 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
1828 #define kvm_arch_pmi_in_guest(vcpu) \
1829 ((vcpu) && (vcpu)->arch.handling_intr_from_guest)
1831 void __init
kvm_mmu_x86_module_init(void);
1832 int kvm_mmu_vendor_module_init(void);
1833 void kvm_mmu_vendor_module_exit(void);
1835 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
);
1836 int kvm_mmu_create(struct kvm_vcpu
*vcpu
);
1837 void kvm_mmu_init_vm(struct kvm
*kvm
);
1838 void kvm_mmu_uninit_vm(struct kvm
*kvm
);
1840 void kvm_mmu_after_set_cpuid(struct kvm_vcpu
*vcpu
);
1841 void kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
);
1842 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
,
1843 const struct kvm_memory_slot
*memslot
,
1845 void kvm_mmu_slot_try_split_huge_pages(struct kvm
*kvm
,
1846 const struct kvm_memory_slot
*memslot
,
1848 void kvm_mmu_try_split_huge_pages(struct kvm
*kvm
,
1849 const struct kvm_memory_slot
*memslot
,
1852 void kvm_mmu_zap_collapsible_sptes(struct kvm
*kvm
,
1853 const struct kvm_memory_slot
*memslot
);
1854 void kvm_mmu_slot_leaf_clear_dirty(struct kvm
*kvm
,
1855 const struct kvm_memory_slot
*memslot
);
1856 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
, u64 gen
);
1857 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned long kvm_nr_mmu_pages
);
1859 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
);
1861 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
1862 const void *val
, int bytes
);
1864 struct kvm_irq_mask_notifier
{
1865 void (*func
)(struct kvm_irq_mask_notifier
*kimn
, bool masked
);
1867 struct hlist_node link
;
1870 void kvm_register_irq_mask_notifier(struct kvm
*kvm
, int irq
,
1871 struct kvm_irq_mask_notifier
*kimn
);
1872 void kvm_unregister_irq_mask_notifier(struct kvm
*kvm
, int irq
,
1873 struct kvm_irq_mask_notifier
*kimn
);
1874 void kvm_fire_mask_notifiers(struct kvm
*kvm
, unsigned irqchip
, unsigned pin
,
1877 extern bool tdp_enabled
;
1879 u64
vcpu_tsc_khz(struct kvm_vcpu
*vcpu
);
1882 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1883 * userspace I/O) to indicate that the emulation context
1884 * should be reused as is, i.e. skip initialization of
1885 * emulation context, instruction fetch and decode.
1887 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1888 * Indicates that only select instructions (tagged with
1889 * EmulateOnUD) should be emulated (to minimize the emulator
1890 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1892 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1893 * decode the instruction length. For use *only* by
1894 * kvm_x86_ops.skip_emulated_instruction() implementations if
1895 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1897 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1898 * retry native execution under certain conditions,
1899 * Can only be set in conjunction with EMULTYPE_PF.
1901 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1902 * triggered by KVM's magic "force emulation" prefix,
1903 * which is opt in via module param (off by default).
1904 * Bypasses EmulateOnUD restriction despite emulating
1905 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1906 * Used to test the full emulator from userspace.
1908 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1909 * backdoor emulation, which is opt in via module param.
1910 * VMware backdoor emulation handles select instructions
1911 * and reinjects the #GP for all other cases.
1913 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1914 * case the CR2/GPA value pass on the stack is valid.
1916 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1917 * state and inject single-step #DBs after skipping
1918 * an instruction (after completing userspace I/O).
1920 * EMULTYPE_WRITE_PF_TO_SP - Set when emulating an intercepted page fault that
1921 * is attempting to write a gfn that contains one or
1922 * more of the PTEs used to translate the write itself,
1923 * and the owning page table is being shadowed by KVM.
1924 * If emulation of the faulting instruction fails and
1925 * this flag is set, KVM will exit to userspace instead
1926 * of retrying emulation as KVM cannot make forward
1929 * If emulation fails for a write to guest page tables,
1930 * KVM unprotects (zaps) the shadow page for the target
1931 * gfn and resumes the guest to retry the non-emulatable
1932 * instruction (on hardware). Unprotecting the gfn
1933 * doesn't allow forward progress for a self-changing
1934 * access because doing so also zaps the translation for
1935 * the gfn, i.e. retrying the instruction will hit a
1936 * !PRESENT fault, which results in a new shadow page
1937 * and sends KVM back to square one.
1939 #define EMULTYPE_NO_DECODE (1 << 0)
1940 #define EMULTYPE_TRAP_UD (1 << 1)
1941 #define EMULTYPE_SKIP (1 << 2)
1942 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1943 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1944 #define EMULTYPE_VMWARE_GP (1 << 5)
1945 #define EMULTYPE_PF (1 << 6)
1946 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
1947 #define EMULTYPE_WRITE_PF_TO_SP (1 << 8)
1949 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
);
1950 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
1951 void *insn
, int insn_len
);
1952 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
,
1953 u64
*data
, u8 ndata
);
1954 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
);
1956 void kvm_enable_efer_bits(u64
);
1957 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
);
1958 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
, bool host_initiated
);
1959 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
);
1960 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
);
1961 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
);
1962 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
);
1963 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
);
1964 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
);
1965 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
);
1966 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
);
1967 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
);
1969 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
);
1970 int kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
);
1971 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
);
1972 int kvm_emulate_halt_noskip(struct kvm_vcpu
*vcpu
);
1973 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
);
1974 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
);
1976 void kvm_get_segment(struct kvm_vcpu
*vcpu
, struct kvm_segment
*var
, int seg
);
1977 void kvm_set_segment(struct kvm_vcpu
*vcpu
, struct kvm_segment
*var
, int seg
);
1978 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
);
1979 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
);
1981 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
1982 int reason
, bool has_error_code
, u32 error_code
);
1984 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
);
1985 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
);
1986 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
);
1987 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
);
1988 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
);
1989 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
);
1990 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
);
1991 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
);
1992 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
);
1993 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
);
1994 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
);
1996 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
);
1997 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
);
1999 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
);
2000 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
2001 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
);
2003 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
);
2004 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
);
2005 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
, unsigned long payload
);
2006 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
);
2007 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
);
2008 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
);
2009 void kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
2010 struct x86_exception
*fault
);
2011 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
);
2012 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
);
2014 static inline int __kvm_irq_line_state(unsigned long *irq_state
,
2015 int irq_source_id
, int level
)
2017 /* Logical OR for level trig interrupt */
2019 __set_bit(irq_source_id
, irq_state
);
2021 __clear_bit(irq_source_id
, irq_state
);
2023 return !!(*irq_state
);
2026 int kvm_pic_set_irq(struct kvm_pic
*pic
, int irq
, int irq_source_id
, int level
);
2027 void kvm_pic_clear_all(struct kvm_pic
*pic
, int irq_source_id
);
2029 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
);
2030 int kvm_get_nr_pending_nmis(struct kvm_vcpu
*vcpu
);
2032 void kvm_update_dr7(struct kvm_vcpu
*vcpu
);
2034 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
);
2035 void kvm_mmu_free_roots(struct kvm
*kvm
, struct kvm_mmu
*mmu
,
2036 ulong roots_to_free
);
2037 void kvm_mmu_free_guest_mode_roots(struct kvm
*kvm
, struct kvm_mmu
*mmu
);
2038 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
2039 struct x86_exception
*exception
);
2040 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
2041 struct x86_exception
*exception
);
2042 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
2043 struct x86_exception
*exception
);
2045 bool kvm_apicv_activated(struct kvm
*kvm
);
2046 bool kvm_vcpu_apicv_activated(struct kvm_vcpu
*vcpu
);
2047 void __kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
);
2048 void __kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
2049 enum kvm_apicv_inhibit reason
, bool set
);
2050 void kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
2051 enum kvm_apicv_inhibit reason
, bool set
);
2053 static inline void kvm_set_apicv_inhibit(struct kvm
*kvm
,
2054 enum kvm_apicv_inhibit reason
)
2056 kvm_set_or_clear_apicv_inhibit(kvm
, reason
, true);
2059 static inline void kvm_clear_apicv_inhibit(struct kvm
*kvm
,
2060 enum kvm_apicv_inhibit reason
)
2062 kvm_set_or_clear_apicv_inhibit(kvm
, reason
, false);
2065 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
);
2067 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
, u64 error_code
,
2068 void *insn
, int insn_len
);
2069 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
);
2070 void kvm_mmu_invalidate_addr(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
2071 u64 addr
, unsigned long roots
);
2072 void kvm_mmu_invpcid_gva(struct kvm_vcpu
*vcpu
, gva_t gva
, unsigned long pcid
);
2073 void kvm_mmu_new_pgd(struct kvm_vcpu
*vcpu
, gpa_t new_pgd
);
2075 void kvm_configure_mmu(bool enable_tdp
, int tdp_forced_root_level
,
2076 int tdp_max_root_level
, int tdp_huge_page_level
);
2078 static inline u16
kvm_read_ldt(void)
2081 asm("sldt %0" : "=g"(ldt
));
2085 static inline void kvm_load_ldt(u16 sel
)
2087 asm("lldt %0" : : "rm"(sel
));
2090 #ifdef CONFIG_X86_64
2091 static inline unsigned long read_msr(unsigned long msr
)
2100 static inline void kvm_inject_gp(struct kvm_vcpu
*vcpu
, u32 error_code
)
2102 kvm_queue_exception_e(vcpu
, GP_VECTOR
, error_code
);
2105 #define TSS_IOPB_BASE_OFFSET 0x66
2106 #define TSS_BASE_SIZE 0x68
2107 #define TSS_IOPB_SIZE (65536 / 8)
2108 #define TSS_REDIRECTION_SIZE (256 / 8)
2109 #define RMODE_TSS_SIZE \
2110 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
2113 TASK_SWITCH_CALL
= 0,
2114 TASK_SWITCH_IRET
= 1,
2115 TASK_SWITCH_JMP
= 2,
2116 TASK_SWITCH_GATE
= 3,
2119 #define HF_GUEST_MASK (1 << 0) /* VCPU is in guest-mode */
2121 #ifdef CONFIG_KVM_SMM
2122 #define HF_SMM_MASK (1 << 1)
2123 #define HF_SMM_INSIDE_NMI_MASK (1 << 2)
2125 # define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
2126 # define KVM_ADDRESS_SPACE_NUM 2
2127 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2128 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2130 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2133 #define KVM_ARCH_WANT_MMU_NOTIFIER
2135 int kvm_cpu_has_injectable_intr(struct kvm_vcpu
*v
);
2136 int kvm_cpu_has_interrupt(struct kvm_vcpu
*vcpu
);
2137 int kvm_cpu_has_extint(struct kvm_vcpu
*v
);
2138 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
);
2139 int kvm_cpu_get_interrupt(struct kvm_vcpu
*v
);
2140 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
);
2142 int kvm_pv_send_ipi(struct kvm
*kvm
, unsigned long ipi_bitmap_low
,
2143 unsigned long ipi_bitmap_high
, u32 min
,
2144 unsigned long icr
, int op_64_bit
);
2146 int kvm_add_user_return_msr(u32 msr
);
2147 int kvm_find_user_return_msr(u32 msr
);
2148 int kvm_set_user_return_msr(unsigned index
, u64 val
, u64 mask
);
2150 static inline bool kvm_is_supported_user_return_msr(u32 msr
)
2152 return kvm_find_user_return_msr(msr
) >= 0;
2155 u64
kvm_scale_tsc(u64 tsc
, u64 ratio
);
2156 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
);
2157 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
);
2158 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
);
2160 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
);
2161 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
);
2163 void kvm_make_scan_ioapic_request(struct kvm
*kvm
);
2164 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
2165 unsigned long *vcpu_bitmap
);
2167 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
2168 struct kvm_async_pf
*work
);
2169 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
2170 struct kvm_async_pf
*work
);
2171 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
,
2172 struct kvm_async_pf
*work
);
2173 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
);
2174 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
);
2175 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
);
2177 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
);
2178 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
);
2179 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
);
2181 void __user
*__x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
2183 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
);
2184 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
);
2186 bool kvm_intr_is_single_vcpu(struct kvm
*kvm
, struct kvm_lapic_irq
*irq
,
2187 struct kvm_vcpu
**dest_vcpu
);
2189 void kvm_set_msi_irq(struct kvm
*kvm
, struct kvm_kernel_irq_routing_entry
*e
,
2190 struct kvm_lapic_irq
*irq
);
2192 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq
*irq
)
2194 /* We can only post Fixed and LowPrio IRQs */
2195 return (irq
->delivery_mode
== APIC_DM_FIXED
||
2196 irq
->delivery_mode
== APIC_DM_LOWEST
);
2199 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu
*vcpu
)
2201 static_call_cond(kvm_x86_vcpu_blocking
)(vcpu
);
2204 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu
*vcpu
)
2206 static_call_cond(kvm_x86_vcpu_unblocking
)(vcpu
);
2209 static inline int kvm_cpu_get_apicid(int mps_cpu
)
2211 #ifdef CONFIG_X86_LOCAL_APIC
2212 return default_cpu_present_to_apicid(mps_cpu
);
2219 int memslot_rmap_alloc(struct kvm_memory_slot
*slot
, unsigned long npages
);
2221 #define KVM_CLOCK_VALID_FLAGS \
2222 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2224 #define KVM_X86_VALID_QUIRKS \
2225 (KVM_X86_QUIRK_LINT0_REENABLED | \
2226 KVM_X86_QUIRK_CD_NW_CLEARED | \
2227 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
2228 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
2229 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \
2230 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \
2231 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2234 * KVM previously used a u32 field in kvm_run to indicate the hypercall was
2235 * initiated from long mode. KVM now sets bit 0 to indicate long mode, but the
2236 * remaining 31 lower bits must be 0 to preserve ABI.
2238 #define KVM_EXIT_HYPERCALL_MBZ GENMASK_ULL(31, 1)
2240 #endif /* _ASM_X86_KVM_HOST_H */