arch/x86/include/asm/pnp_def.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   4  *
   5  * Adapted from coreboot src/include/device/pnp_def.h
   6  * and arch/x86/include/arch/io.h
   7  */
   8
   9 #ifndef _ASM_PNP_DEF_H_
  10 #define _ASM_PNP_DEF_H_
  11
  12 #include <asm/io.h>
  13
  14 #define PNP_IDX_EN   0x30
  15 #define PNP_IDX_IO0  0x60
  16 #define PNP_IDX_IO1  0x62
  17 #define PNP_IDX_IO2  0x64
  18 #define PNP_IDX_IO3  0x66
  19 #define PNP_IDX_IRQ0 0x70
  20 #define PNP_IDX_IRQ1 0x72
  21 #define PNP_IDX_DRQ0 0x74
  22 #define PNP_IDX_DRQ1 0x75
  23 #define PNP_IDX_MSC0 0xf0
  24 #define PNP_IDX_MSC1 0xf1
  25
  26 /* Generic functions for pnp devices */
  27
  28 /*
  29  * pnp device is a 16-bit integer composed of its i/o port address at high byte
  30  * and logic function number at low byte.
  31  */
  32 #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
  33
  34 static inline void pnp_write_config(uint16_t dev, uint8_t reg, uint8_t value)
  35 {
  36         uint8_t port = dev >> 8;
  37
  38         outb(reg, port);
  39         outb(value, port + 1);
  40 }
  41
  42 static inline uint8_t pnp_read_config(uint16_t dev, uint8_t reg)
  43 {
  44         uint8_t port = dev >> 8;
  45
  46         outb(reg, port);
  47         return inb(port + 1);
  48 }
  49
  50 static inline void pnp_set_logical_device(uint16_t dev)
  51 {
  52         uint8_t device = dev & 0xff;
  53
  54         pnp_write_config(dev, 0x07, device);
  55 }
  56
  57 static inline void pnp_set_enable(uint16_t dev, int enable)
  58 {
  59         pnp_write_config(dev, PNP_IDX_EN, enable ? 1 : 0);
  60 }
  61
  62 static inline int pnp_read_enable(uint16_t dev)
  63 {
  64         return !!pnp_read_config(dev, PNP_IDX_EN);
  65 }
  66
  67 static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase)
  68 {
  69         pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
  70         pnp_write_config(dev, index + 1, iobase & 0xff);
  71 }
  72
  73 static inline uint16_t pnp_read_iobase(uint16_t dev, uint8_t index)
  74 {
  75         return ((uint16_t)(pnp_read_config(dev, index)) << 8) |
  76                 pnp_read_config(dev, index + 1);
  77 }
  78
  79 static inline void pnp_set_irq(uint16_t dev, uint8_t index, unsigned irq)
  80 {
  81         pnp_write_config(dev, index, irq);
  82 }
  83
  84 static inline void pnp_set_drq(uint16_t dev, uint8_t index, unsigned drq)
  85 {
  86         pnp_write_config(dev, index, drq & 0xff);
  87 }
  88
  89 #endif /* _ASM_PNP_DEF_H_ */