arch/x86/kernel/fpu/regset.c

   1 /*
   2  * FPU register's regset abstraction, for ptrace, core dumps, etc.
   3  */
   4 #include <asm/fpu/internal.h>
   5 #include <asm/fpu/signal.h>
   6 #include <asm/fpu/regset.h>
   7 #include <asm/fpu/xstate.h>
   8 #include <linux/sched/task_stack.h>
   9
  10 /*
  11  * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
  12  * as the "regset->n" for the xstate regset will be updated based on the feature
  13  * capabilities supported by the xsave.
  14  */
  15 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
  16 {
  17         struct fpu *target_fpu = &target->thread.fpu;
  18
  19         return target_fpu->fpstate_active ? regset->n : 0;
  20 }
  21
  22 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
  23 {
  24         struct fpu *target_fpu = &target->thread.fpu;
  25
  26         if (boot_cpu_has(X86_FEATURE_FXSR) && target_fpu->fpstate_active)
  27                 return regset->n;
  28         else
  29                 return 0;
  30 }
  31
  32 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
  33                 unsigned int pos, unsigned int count,
  34                 void *kbuf, void __user *ubuf)
  35 {
  36         struct fpu *fpu = &target->thread.fpu;
  37
  38         if (!boot_cpu_has(X86_FEATURE_FXSR))
  39                 return -ENODEV;
  40
  41         fpu__activate_fpstate_read(fpu);
  42         fpstate_sanitize_xstate(fpu);
  43
  44         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  45                                    &fpu->state.fxsave, 0, -1);
  46 }
  47
  48 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
  49                 unsigned int pos, unsigned int count,
  50                 const void *kbuf, const void __user *ubuf)
  51 {
  52         struct fpu *fpu = &target->thread.fpu;
  53         int ret;
  54
  55         if (!boot_cpu_has(X86_FEATURE_FXSR))
  56                 return -ENODEV;
  57
  58         fpu__activate_fpstate_write(fpu);
  59         fpstate_sanitize_xstate(fpu);
  60
  61         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  62                                  &fpu->state.fxsave, 0, -1);
  63
  64         /*
  65          * mxcsr reserved bits must be masked to zero for security reasons.
  66          */
  67         fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
  68
  69         /*
  70          * update the header bits in the xsave header, indicating the
  71          * presence of FP and SSE state.
  72          */
  73         if (boot_cpu_has(X86_FEATURE_XSAVE))
  74                 fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
  75
  76         return ret;
  77 }
  78
  79 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
  80                 unsigned int pos, unsigned int count,
  81                 void *kbuf, void __user *ubuf)
  82 {
  83         struct fpu *fpu = &target->thread.fpu;
  84         struct xregs_state *xsave;
  85         int ret;
  86
  87         if (!boot_cpu_has(X86_FEATURE_XSAVE))
  88                 return -ENODEV;
  89
  90         xsave = &fpu->state.xsave;
  91
  92         fpu__activate_fpstate_read(fpu);
  93
  94         if (using_compacted_format()) {
  95                 if (kbuf)
  96                         ret = copy_xstate_to_kernel(kbuf, xsave, pos, count);
  97                 else
  98                         ret = copy_xstate_to_user(ubuf, xsave, pos, count);
  99         } else {
 100                 fpstate_sanitize_xstate(fpu);
 101                 /*
 102                  * Copy the 48 bytes defined by the software into the xsave
 103                  * area in the thread struct, so that we can copy the whole
 104                  * area to user using one user_regset_copyout().
 105                  */
 106                 memcpy(&xsave->i387.sw_reserved, xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 107
 108                 /*
 109                  * Copy the xstate memory layout.
 110                  */
 111                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 112         }
 113         return ret;
 114 }
 115
 116 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 117                   unsigned int pos, unsigned int count,
 118                   const void *kbuf, const void __user *ubuf)
 119 {
 120         struct fpu *fpu = &target->thread.fpu;
 121         struct xregs_state *xsave;
 122         int ret;
 123
 124         if (!boot_cpu_has(X86_FEATURE_XSAVE))
 125                 return -ENODEV;
 126
 127         /*
 128          * A whole standard-format XSAVE buffer is needed:
 129          */
 130         if ((pos != 0) || (count < fpu_user_xstate_size))
 131                 return -EFAULT;
 132
 133         xsave = &fpu->state.xsave;
 134
 135         fpu__activate_fpstate_write(fpu);
 136
 137         if (boot_cpu_has(X86_FEATURE_XSAVES))
 138                 ret = copy_user_to_xstate(kbuf, ubuf, xsave);
 139         else
 140                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 141
 142         /*
 143          * In case of failure, mark all states as init:
 144          */
 145         if (ret)
 146                 fpstate_init(&fpu->state);
 147
 148         /*
 149          * mxcsr reserved bits must be masked to zero for security reasons.
 150          */
 151         xsave->i387.mxcsr &= mxcsr_feature_mask;
 152         xsave->header.xfeatures &= xfeatures_mask;
 153         /*
 154          * These bits must be zero.
 155          */
 156         memset(&xsave->header.reserved, 0, 48);
 157
 158         return ret;
 159 }
 160
 161 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 162
 163 /*
 164  * FPU tag word conversions.
 165  */
 166
 167 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 168 {
 169         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 170
 171         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 172         tmp = ~twd;
 173         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 174         /* and move the valid bits to the lower byte. */
 175         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 176         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 177         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 178
 179         return tmp;
 180 }
 181
 182 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 183 #define FP_EXP_TAG_VALID        0
 184 #define FP_EXP_TAG_ZERO         1
 185 #define FP_EXP_TAG_SPECIAL      2
 186 #define FP_EXP_TAG_EMPTY        3
 187
 188 static inline u32 twd_fxsr_to_i387(struct fxregs_state *fxsave)
 189 {
 190         struct _fpxreg *st;
 191         u32 tos = (fxsave->swd >> 11) & 7;
 192         u32 twd = (unsigned long) fxsave->twd;
 193         u32 tag;
 194         u32 ret = 0xffff0000u;
 195         int i;
 196
 197         for (i = 0; i < 8; i++, twd >>= 1) {
 198                 if (twd & 0x1) {
 199                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 200
 201                         switch (st->exponent & 0x7fff) {
 202                         case 0x7fff:
 203                                 tag = FP_EXP_TAG_SPECIAL;
 204                                 break;
 205                         case 0x0000:
 206                                 if (!st->significand[0] &&
 207                                     !st->significand[1] &&
 208                                     !st->significand[2] &&
 209                                     !st->significand[3])
 210                                         tag = FP_EXP_TAG_ZERO;
 211                                 else
 212                                         tag = FP_EXP_TAG_SPECIAL;
 213                                 break;
 214                         default:
 215                                 if (st->significand[3] & 0x8000)
 216                                         tag = FP_EXP_TAG_VALID;
 217                                 else
 218                                         tag = FP_EXP_TAG_SPECIAL;
 219                                 break;
 220                         }
 221                 } else {
 222                         tag = FP_EXP_TAG_EMPTY;
 223                 }
 224                 ret |= tag << (2 * i);
 225         }
 226         return ret;
 227 }
 228
 229 /*
 230  * FXSR floating point environment conversions.
 231  */
 232
 233 void
 234 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 235 {
 236         struct fxregs_state *fxsave = &tsk->thread.fpu.state.fxsave;
 237         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 238         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 239         int i;
 240
 241         env->cwd = fxsave->cwd | 0xffff0000u;
 242         env->swd = fxsave->swd | 0xffff0000u;
 243         env->twd = twd_fxsr_to_i387(fxsave);
 244
 245 #ifdef CONFIG_X86_64
 246         env->fip = fxsave->rip;
 247         env->foo = fxsave->rdp;
 248         /*
 249          * should be actually ds/cs at fpu exception time, but
 250          * that information is not available in 64bit mode.
 251          */
 252         env->fcs = task_pt_regs(tsk)->cs;
 253         if (tsk == current) {
 254                 savesegment(ds, env->fos);
 255         } else {
 256                 env->fos = tsk->thread.ds;
 257         }
 258         env->fos |= 0xffff0000;
 259 #else
 260         env->fip = fxsave->fip;
 261         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 262         env->foo = fxsave->foo;
 263         env->fos = fxsave->fos;
 264 #endif
 265
 266         for (i = 0; i < 8; ++i)
 267                 memcpy(&to[i], &from[i], sizeof(to[0]));
 268 }
 269
 270 void convert_to_fxsr(struct task_struct *tsk,
 271                      const struct user_i387_ia32_struct *env)
 272
 273 {
 274         struct fxregs_state *fxsave = &tsk->thread.fpu.state.fxsave;
 275         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 276         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 277         int i;
 278
 279         fxsave->cwd = env->cwd;
 280         fxsave->swd = env->swd;
 281         fxsave->twd = twd_i387_to_fxsr(env->twd);
 282         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 283 #ifdef CONFIG_X86_64
 284         fxsave->rip = env->fip;
 285         fxsave->rdp = env->foo;
 286         /* cs and ds ignored */
 287 #else
 288         fxsave->fip = env->fip;
 289         fxsave->fcs = (env->fcs & 0xffff);
 290         fxsave->foo = env->foo;
 291         fxsave->fos = env->fos;
 292 #endif
 293
 294         for (i = 0; i < 8; ++i)
 295                 memcpy(&to[i], &from[i], sizeof(from[0]));
 296 }
 297
 298 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 299                unsigned int pos, unsigned int count,
 300                void *kbuf, void __user *ubuf)
 301 {
 302         struct fpu *fpu = &target->thread.fpu;
 303         struct user_i387_ia32_struct env;
 304
 305         fpu__activate_fpstate_read(fpu);
 306
 307         if (!boot_cpu_has(X86_FEATURE_FPU))
 308                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 309
 310         if (!boot_cpu_has(X86_FEATURE_FXSR))
 311                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 312                                            &fpu->state.fsave, 0,
 313                                            -1);
 314
 315         fpstate_sanitize_xstate(fpu);
 316
 317         if (kbuf && pos == 0 && count == sizeof(env)) {
 318                 convert_from_fxsr(kbuf, target);
 319                 return 0;
 320         }
 321
 322         convert_from_fxsr(&env, target);
 323
 324         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 325 }
 326
 327 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 328                unsigned int pos, unsigned int count,
 329                const void *kbuf, const void __user *ubuf)
 330 {
 331         struct fpu *fpu = &target->thread.fpu;
 332         struct user_i387_ia32_struct env;
 333         int ret;
 334
 335         fpu__activate_fpstate_write(fpu);
 336         fpstate_sanitize_xstate(fpu);
 337
 338         if (!boot_cpu_has(X86_FEATURE_FPU))
 339                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 340
 341         if (!boot_cpu_has(X86_FEATURE_FXSR))
 342                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 343                                           &fpu->state.fsave, 0,
 344                                           -1);
 345
 346         if (pos > 0 || count < sizeof(env))
 347                 convert_from_fxsr(&env, target);
 348
 349         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 350         if (!ret)
 351                 convert_to_fxsr(target, &env);
 352
 353         /*
 354          * update the header bit in the xsave header, indicating the
 355          * presence of FP.
 356          */
 357         if (boot_cpu_has(X86_FEATURE_XSAVE))
 358                 fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FP;
 359         return ret;
 360 }
 361
 362 /*
 363  * FPU state for core dumps.
 364  * This is only used for a.out dumps now.
 365  * It is declared generically using elf_fpregset_t (which is
 366  * struct user_i387_struct) but is in fact only used for 32-bit
 367  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 368  */
 369 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)
 370 {
 371         struct task_struct *tsk = current;
 372         struct fpu *fpu = &tsk->thread.fpu;
 373         int fpvalid;
 374
 375         fpvalid = fpu->fpstate_active;
 376         if (fpvalid)
 377                 fpvalid = !fpregs_get(tsk, NULL,
 378                                       0, sizeof(struct user_i387_ia32_struct),
 379                                       ufpu, NULL);
 380
 381         return fpvalid;
 382 }
 383 EXPORT_SYMBOL(dump_fpu);
 384
 385 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */