arch/x86/kernel/head_64.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *  linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
   4  *
   5  *  Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
   6  *  Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
   7  *  Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
   8  *  Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
   9  *  Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com>
  10  */
  11
  12
  13 #include <linux/linkage.h>
  14 #include <linux/threads.h>
  15 #include <linux/init.h>
  16 #include <asm/segment.h>
  17 #include <asm/pgtable.h>
  18 #include <asm/page.h>
  19 #include <asm/msr.h>
  20 #include <asm/cache.h>
  21 #include <asm/processor-flags.h>
  22 #include <asm/percpu.h>
  23 #include <asm/nops.h>
  24 #include "../entry/calling.h"
  25 #include <asm/export.h>
  26
  27 #ifdef CONFIG_PARAVIRT
  28 #include <asm/asm-offsets.h>
  29 #include <asm/paravirt.h>
  30 #define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg
  31 #else
  32 #define GET_CR2_INTO(reg) movq %cr2, reg
  33 #define INTERRUPT_RETURN iretq
  34 #endif
  35
  36 /* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
  37  * because we need identity-mapped pages.
  38  *
  39  */
  40
  41 #define p4d_index(x)    (((x) >> P4D_SHIFT) & (PTRS_PER_P4D-1))
  42 #define pud_index(x)    (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
  43
  44 PGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE)
  45 PGD_START_KERNEL = pgd_index(__START_KERNEL_map)
  46 L3_START_KERNEL = pud_index(__START_KERNEL_map)
  47
  48         .text
  49         __HEAD
  50         .code64
  51         .globl startup_64
  52 startup_64:
  53         UNWIND_HINT_EMPTY
  54         /*
  55          * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  56          * and someone has loaded an identity mapped page table
  57          * for us.  These identity mapped page tables map all of the
  58          * kernel pages and possibly all of memory.
  59          *
  60          * %rsi holds a physical pointer to real_mode_data.
  61          *
  62          * We come here either directly from a 64bit bootloader, or from
  63          * arch/x86/boot/compressed/head_64.S.
  64          *
  65          * We only come here initially at boot nothing else comes here.
  66          *
  67          * Since we may be loaded at an address different from what we were
  68          * compiled to run at we first fixup the physical addresses in our page
  69          * tables and then reload them.
  70          */
  71
  72         /* Set up the stack for verify_cpu(), similar to initial_stack below */
  73         leaq    (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp
  74
  75         /* Sanitize CPU configuration */
  76         call verify_cpu
  77
  78         /*
  79          * Perform pagetable fixups. Additionally, if SME is active, encrypt
  80          * the kernel and retrieve the modifier (SME encryption mask if SME
  81          * is active) to be added to the initial pgdir entry that will be
  82          * programmed into CR3.
  83          */
  84         leaq    _text(%rip), %rdi
  85         pushq   %rsi
  86         call    __startup_64
  87         popq    %rsi
  88
  89         /* Form the CR3 value being sure to include the CR3 modifier */
  90         addq    $(early_top_pgt - __START_KERNEL_map), %rax
  91         jmp 1f
  92 ENTRY(secondary_startup_64)
  93         UNWIND_HINT_EMPTY
  94         /*
  95          * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  96          * and someone has loaded a mapped page table.
  97          *
  98          * %rsi holds a physical pointer to real_mode_data.
  99          *
 100          * We come here either from startup_64 (using physical addresses)
 101          * or from trampoline.S (using virtual addresses).
 102          *
 103          * Using virtual addresses from trampoline.S removes the need
 104          * to have any identity mapped pages in the kernel page table
 105          * after the boot processor executes this code.
 106          */
 107
 108         /* Sanitize CPU configuration */
 109         call verify_cpu
 110
 111         /*
 112          * Retrieve the modifier (SME encryption mask if SME is active) to be
 113          * added to the initial pgdir entry that will be programmed into CR3.
 114          */
 115         pushq   %rsi
 116         call    __startup_secondary_64
 117         popq    %rsi
 118
 119         /* Form the CR3 value being sure to include the CR3 modifier */
 120         addq    $(init_top_pgt - __START_KERNEL_map), %rax
 121 1:
 122
 123         /* Enable PAE mode, PGE and LA57 */
 124         movl    $(X86_CR4_PAE | X86_CR4_PGE), %ecx
 125 #ifdef CONFIG_X86_5LEVEL
 126         orl     $X86_CR4_LA57, %ecx
 127 #endif
 128         movq    %rcx, %cr4
 129
 130         /* Setup early boot stage 4-/5-level pagetables. */
 131         addq    phys_base(%rip), %rax
 132         movq    %rax, %cr3
 133
 134         /* Ensure I am executing from virtual addresses */
 135         movq    $1f, %rax
 136         jmp     *%rax
 137 1:
 138         UNWIND_HINT_EMPTY
 139
 140         /* Check if nx is implemented */
 141         movl    $0x80000001, %eax
 142         cpuid
 143         movl    %edx,%edi
 144
 145         /* Setup EFER (Extended Feature Enable Register) */
 146         movl    $MSR_EFER, %ecx
 147         rdmsr
 148         btsl    $_EFER_SCE, %eax        /* Enable System Call */
 149         btl     $20,%edi                /* No Execute supported? */
 150         jnc     1f
 151         btsl    $_EFER_NX, %eax
 152         btsq    $_PAGE_BIT_NX,early_pmd_flags(%rip)
 153 1:      wrmsr                           /* Make changes effective */
 154
 155         /* Setup cr0 */
 156         movl    $CR0_STATE, %eax
 157         /* Make changes effective */
 158         movq    %rax, %cr0
 159
 160         /* Setup a boot time stack */
 161         movq initial_stack(%rip), %rsp
 162
 163         /* zero EFLAGS after setting rsp */
 164         pushq $0
 165         popfq
 166
 167         /*
 168          * We must switch to a new descriptor in kernel space for the GDT
 169          * because soon the kernel won't have access anymore to the userspace
 170          * addresses where we're currently running on. We have to do that here
 171          * because in 32bit we couldn't load a 64bit linear address.
 172          */
 173         lgdt    early_gdt_descr(%rip)
 174
 175         /* set up data segments */
 176         xorl %eax,%eax
 177         movl %eax,%ds
 178         movl %eax,%ss
 179         movl %eax,%es
 180
 181         /*
 182          * We don't really need to load %fs or %gs, but load them anyway
 183          * to kill any stale realmode selectors.  This allows execution
 184          * under VT hardware.
 185          */
 186         movl %eax,%fs
 187         movl %eax,%gs
 188
 189         /* Set up %gs.
 190          *
 191          * The base of %gs always points to the bottom of the irqstack
 192          * union.  If the stack protector canary is enabled, it is
 193          * located at %gs:40.  Note that, on SMP, the boot cpu uses
 194          * init data section till per cpu areas are set up.
 195          */
 196         movl    $MSR_GS_BASE,%ecx
 197         movl    initial_gs(%rip),%eax
 198         movl    initial_gs+4(%rip),%edx
 199         wrmsr
 200
 201         /* rsi is pointer to real mode structure with interesting info.
 202            pass it to C */
 203         movq    %rsi, %rdi
 204
 205 .Ljump_to_C_code:
 206         /*
 207          * Jump to run C code and to be on a real kernel address.
 208          * Since we are running on identity-mapped space we have to jump
 209          * to the full 64bit address, this is only possible as indirect
 210          * jump.  In addition we need to ensure %cs is set so we make this
 211          * a far return.
 212          *
 213          * Note: do not change to far jump indirect with 64bit offset.
 214          *
 215          * AMD does not support far jump indirect with 64bit offset.
 216          * AMD64 Architecture Programmer's Manual, Volume 3: states only
 217          *      JMP FAR mem16:16 FF /5 Far jump indirect,
 218          *              with the target specified by a far pointer in memory.
 219          *      JMP FAR mem16:32 FF /5 Far jump indirect,
 220          *              with the target specified by a far pointer in memory.
 221          *
 222          * Intel64 does support 64bit offset.
 223          * Software Developer Manual Vol 2: states:
 224          *      FF /5 JMP m16:16 Jump far, absolute indirect,
 225          *              address given in m16:16
 226          *      FF /5 JMP m16:32 Jump far, absolute indirect,
 227          *              address given in m16:32.
 228          *      REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
 229          *              address given in m16:64.
 230          */
 231         pushq   $.Lafter_lret   # put return address on stack for unwinder
 232         xorq    %rbp, %rbp      # clear frame pointer
 233         movq    initial_code(%rip), %rax
 234         pushq   $__KERNEL_CS    # set correct cs
 235         pushq   %rax            # target address in negative space
 236         lretq
 237 .Lafter_lret:
 238 END(secondary_startup_64)
 239
 240 #include "verify_cpu.S"
 241
 242 #ifdef CONFIG_HOTPLUG_CPU
 243 /*
 244  * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
 245  * up already except stack. We just set up stack here. Then call
 246  * start_secondary() via .Ljump_to_C_code.
 247  */
 248 ENTRY(start_cpu0)
 249         movq    initial_stack(%rip), %rsp
 250         UNWIND_HINT_EMPTY
 251         jmp     .Ljump_to_C_code
 252 ENDPROC(start_cpu0)
 253 #endif
 254
 255         /* Both SMP bootup and ACPI suspend change these variables */
 256         __REFDATA
 257         .balign 8
 258         GLOBAL(initial_code)
 259         .quad   x86_64_start_kernel
 260         GLOBAL(initial_gs)
 261         .quad   INIT_PER_CPU_VAR(irq_stack_union)
 262         GLOBAL(initial_stack)
 263         /*
 264          * The SIZEOF_PTREGS gap is a convention which helps the in-kernel
 265          * unwinder reliably detect the end of the stack.
 266          */
 267         .quad  init_thread_union + THREAD_SIZE - SIZEOF_PTREGS
 268         __FINITDATA
 269
 270         __INIT
 271 ENTRY(early_idt_handler_array)
 272         i = 0
 273         .rept NUM_EXCEPTION_VECTORS
 274         .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0
 275                 UNWIND_HINT_IRET_REGS
 276                 pushq $0        # Dummy error code, to make stack frame uniform
 277         .else
 278                 UNWIND_HINT_IRET_REGS offset=8
 279         .endif
 280         pushq $i                # 72(%rsp) Vector number
 281         jmp early_idt_handler_common
 282         UNWIND_HINT_IRET_REGS
 283         i = i + 1
 284         .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
 285         .endr
 286         UNWIND_HINT_IRET_REGS offset=16
 287 END(early_idt_handler_array)
 288
 289 early_idt_handler_common:
 290         /*
 291          * The stack is the hardware frame, an error code or zero, and the
 292          * vector number.
 293          */
 294         cld
 295
 296         incl early_recursion_flag(%rip)
 297
 298         /* The vector number is currently in the pt_regs->di slot. */
 299         pushq %rsi                              /* pt_regs->si */
 300         movq 8(%rsp), %rsi                      /* RSI = vector number */
 301         movq %rdi, 8(%rsp)                      /* pt_regs->di = RDI */
 302         pushq %rdx                              /* pt_regs->dx */
 303         pushq %rcx                              /* pt_regs->cx */
 304         pushq %rax                              /* pt_regs->ax */
 305         pushq %r8                               /* pt_regs->r8 */
 306         pushq %r9                               /* pt_regs->r9 */
 307         pushq %r10                              /* pt_regs->r10 */
 308         pushq %r11                              /* pt_regs->r11 */
 309         pushq %rbx                              /* pt_regs->bx */
 310         pushq %rbp                              /* pt_regs->bp */
 311         pushq %r12                              /* pt_regs->r12 */
 312         pushq %r13                              /* pt_regs->r13 */
 313         pushq %r14                              /* pt_regs->r14 */
 314         pushq %r15                              /* pt_regs->r15 */
 315         UNWIND_HINT_REGS
 316
 317         cmpq $14,%rsi           /* Page fault? */
 318         jnz 10f
 319         GET_CR2_INTO(%rdi)      /* Can clobber any volatile register if pv */
 320         call early_make_pgtable
 321         andl %eax,%eax
 322         jz 20f                  /* All good */
 323
 324 10:
 325         movq %rsp,%rdi          /* RDI = pt_regs; RSI is already trapnr */
 326         call early_fixup_exception
 327
 328 20:
 329         decl early_recursion_flag(%rip)
 330         jmp restore_regs_and_return_to_kernel
 331 END(early_idt_handler_common)
 332
 333         __INITDATA
 334
 335         .balign 4
 336 GLOBAL(early_recursion_flag)
 337         .long 0
 338
 339 #define NEXT_PAGE(name) \
 340         .balign PAGE_SIZE; \
 341 GLOBAL(name)
 342
 343 /* Automate the creation of 1 to 1 mapping pmd entries */
 344 #define PMDS(START, PERM, COUNT)                        \
 345         i = 0 ;                                         \
 346         .rept (COUNT) ;                                 \
 347         .quad   (START) + (i << PMD_SHIFT) + (PERM) ;   \
 348         i = i + 1 ;                                     \
 349         .endr
 350
 351         __INITDATA
 352 NEXT_PAGE(early_top_pgt)
 353         .fill   511,8,0
 354 #ifdef CONFIG_X86_5LEVEL
 355         .quad   level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 356 #else
 357         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 358 #endif
 359
 360 NEXT_PAGE(early_dynamic_pgts)
 361         .fill   512*EARLY_DYNAMIC_PAGE_TABLES,8,0
 362
 363         .data
 364
 365 #ifndef CONFIG_XEN
 366 NEXT_PAGE(init_top_pgt)
 367         .fill   512,8,0
 368 #else
 369 NEXT_PAGE(init_top_pgt)
 370         .quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 371         .org    init_top_pgt + PGD_PAGE_OFFSET*8, 0
 372         .quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 373         .org    init_top_pgt + PGD_START_KERNEL*8, 0
 374         /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
 375         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 376
 377 NEXT_PAGE(level3_ident_pgt)
 378         .quad   level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 379         .fill   511, 8, 0
 380 NEXT_PAGE(level2_ident_pgt)
 381         /* Since I easily can, map the first 1G.
 382          * Don't set NX because code runs from these pages.
 383          */
 384         PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
 385 #endif
 386
 387 #ifdef CONFIG_X86_5LEVEL
 388 NEXT_PAGE(level4_kernel_pgt)
 389         .fill   511,8,0
 390         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 391 #endif
 392
 393 NEXT_PAGE(level3_kernel_pgt)
 394         .fill   L3_START_KERNEL,8,0
 395         /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
 396         .quad   level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 397         .quad   level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 398
 399 NEXT_PAGE(level2_kernel_pgt)
 400         /*
 401          * 512 MB kernel mapping. We spend a full page on this pagetable
 402          * anyway.
 403          *
 404          * The kernel code+data+bss must not be bigger than that.
 405          *
 406          * (NOTE: at +512MB starts the module area, see MODULES_VADDR.
 407          *  If you want to increase this then increase MODULES_VADDR
 408          *  too.)
 409          */
 410         PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
 411                 KERNEL_IMAGE_SIZE/PMD_SIZE)
 412
 413 NEXT_PAGE(level2_fixmap_pgt)
 414         .fill   506,8,0
 415         .quad   level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 416         /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
 417         .fill   5,8,0
 418
 419 NEXT_PAGE(level1_fixmap_pgt)
 420         .fill   512,8,0
 421
 422 #undef PMDS
 423
 424         .data
 425         .align 16
 426         .globl early_gdt_descr
 427 early_gdt_descr:
 428         .word   GDT_ENTRIES*8-1
 429 early_gdt_descr_base:
 430         .quad   INIT_PER_CPU_VAR(gdt_page)
 431
 432 ENTRY(phys_base)
 433         /* This must match the first entry in level2_kernel_pgt */
 434         .quad   0x0000000000000000
 435 EXPORT_SYMBOL(phys_base)
 436
 437 #include "../../x86/xen/xen-head.S"
 438
 439         __PAGE_ALIGNED_BSS
 440 NEXT_PAGE(empty_zero_page)
 441         .skip PAGE_SIZE
 442 EXPORT_SYMBOL(empty_zero_page)
 443