1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
27 #include "kvm_emulate.h"
36 #include <linux/clocksource.h>
37 #include <linux/interrupt.h>
38 #include <linux/kvm.h>
40 #include <linux/vmalloc.h>
41 #include <linux/export.h>
42 #include <linux/moduleparam.h>
43 #include <linux/mman.h>
44 #include <linux/highmem.h>
45 #include <linux/iommu.h>
46 #include <linux/cpufreq.h>
47 #include <linux/user-return-notifier.h>
48 #include <linux/srcu.h>
49 #include <linux/slab.h>
50 #include <linux/perf_event.h>
51 #include <linux/uaccess.h>
52 #include <linux/hash.h>
53 #include <linux/pci.h>
54 #include <linux/timekeeper_internal.h>
55 #include <linux/pvclock_gtod.h>
56 #include <linux/kvm_irqfd.h>
57 #include <linux/irqbypass.h>
58 #include <linux/sched/stat.h>
59 #include <linux/sched/isolation.h>
60 #include <linux/mem_encrypt.h>
61 #include <linux/entry-kvm.h>
62 #include <linux/suspend.h>
63 #include <linux/smp.h>
65 #include <trace/events/ipi.h>
66 #include <trace/events/kvm.h>
68 #include <asm/debugreg.h>
73 #include <linux/kernel_stat.h>
74 #include <asm/fpu/api.h>
75 #include <asm/fpu/xcr.h>
76 #include <asm/fpu/xstate.h>
77 #include <asm/pvclock.h>
78 #include <asm/div64.h>
79 #include <asm/irq_remapping.h>
80 #include <asm/mshyperv.h>
81 #include <asm/hypervisor.h>
82 #include <asm/tlbflush.h>
83 #include <asm/intel_pt.h>
84 #include <asm/emulate_prefix.h>
86 #include <clocksource/hyperv_timer.h>
88 #define CREATE_TRACE_POINTS
91 #define MAX_IO_MSRS 256
92 #define KVM_MAX_MCE_BANKS 32
94 struct kvm_caps kvm_caps __read_mostly
= {
95 .supported_mce_cap
= MCG_CTL_P
| MCG_SER_P
,
97 EXPORT_SYMBOL_GPL(kvm_caps
);
99 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
101 #define emul_to_vcpu(ctxt) \
102 ((struct kvm_vcpu *)(ctxt)->vcpu)
105 * - enable syscall per default because its emulated by KVM
106 * - enable LME and LMA per default on 64 bit KVM
110 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
112 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
115 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
117 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
119 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
121 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
122 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
124 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
125 static void process_nmi(struct kvm_vcpu
*vcpu
);
126 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
127 static void store_regs(struct kvm_vcpu
*vcpu
);
128 static int sync_regs(struct kvm_vcpu
*vcpu
);
129 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
);
131 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
132 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
134 static DEFINE_MUTEX(vendor_module_lock
);
135 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
137 #define KVM_X86_OP(func) \
138 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
139 *(((struct kvm_x86_ops *)0)->func));
140 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
141 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
142 #include <asm/kvm-x86-ops.h>
143 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
144 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
146 static bool __read_mostly ignore_msrs
= 0;
147 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
149 bool __read_mostly report_ignored_msrs
= true;
150 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
151 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
153 unsigned int min_timer_period_us
= 200;
154 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
156 static bool __read_mostly kvmclock_periodic_sync
= true;
157 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
159 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
160 static u32 __read_mostly tsc_tolerance_ppm
= 250;
161 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
164 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
165 * adaptive tuning starting from default advancement of 1000ns. '0' disables
166 * advancement entirely. Any other value is used as-is and disables adaptive
167 * tuning, i.e. allows privileged userspace to set an exact advancement time.
169 static int __read_mostly lapic_timer_advance_ns
= -1;
170 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
172 static bool __read_mostly vector_hashing
= true;
173 module_param(vector_hashing
, bool, S_IRUGO
);
175 bool __read_mostly enable_vmware_backdoor
= false;
176 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
177 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
180 * Flags to manipulate forced emulation behavior (any non-zero value will
181 * enable forced emulation).
183 #define KVM_FEP_CLEAR_RFLAGS_RF BIT(1)
184 static int __read_mostly force_emulation_prefix
;
185 module_param(force_emulation_prefix
, int, 0644);
187 int __read_mostly pi_inject_timer
= -1;
188 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
190 /* Enable/disable PMU virtualization */
191 bool __read_mostly enable_pmu
= true;
192 EXPORT_SYMBOL_GPL(enable_pmu
);
193 module_param(enable_pmu
, bool, 0444);
195 bool __read_mostly eager_page_split
= true;
196 module_param(eager_page_split
, bool, 0644);
198 /* Enable/disable SMT_RSB bug mitigation */
199 static bool __read_mostly mitigate_smt_rsb
;
200 module_param(mitigate_smt_rsb
, bool, 0444);
203 * Restoring the host value for MSRs that are only consumed when running in
204 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
205 * returns to userspace, i.e. the kernel can run with the guest's value.
207 #define KVM_MAX_NR_USER_RETURN_MSRS 16
209 struct kvm_user_return_msrs
{
210 struct user_return_notifier urn
;
212 struct kvm_user_return_msr_values
{
215 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
218 u32 __read_mostly kvm_nr_uret_msrs
;
219 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
220 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
221 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
223 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
224 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
225 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
226 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
228 u64 __read_mostly host_efer
;
229 EXPORT_SYMBOL_GPL(host_efer
);
231 bool __read_mostly allow_smaller_maxphyaddr
= 0;
232 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
234 bool __read_mostly enable_apicv
= true;
235 EXPORT_SYMBOL_GPL(enable_apicv
);
237 u64 __read_mostly host_xss
;
238 EXPORT_SYMBOL_GPL(host_xss
);
240 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
241 KVM_GENERIC_VM_STATS(),
242 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
243 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
244 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
245 STATS_DESC_COUNTER(VM
, mmu_flooded
),
246 STATS_DESC_COUNTER(VM
, mmu_recycled
),
247 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
248 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
249 STATS_DESC_ICOUNTER(VM
, pages_4k
),
250 STATS_DESC_ICOUNTER(VM
, pages_2m
),
251 STATS_DESC_ICOUNTER(VM
, pages_1g
),
252 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
253 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
254 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
257 const struct kvm_stats_header kvm_vm_stats_header
= {
258 .name_size
= KVM_STATS_NAME_SIZE
,
259 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
260 .id_offset
= sizeof(struct kvm_stats_header
),
261 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
262 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
263 sizeof(kvm_vm_stats_desc
),
266 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
267 KVM_GENERIC_VCPU_STATS(),
268 STATS_DESC_COUNTER(VCPU
, pf_taken
),
269 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
270 STATS_DESC_COUNTER(VCPU
, pf_emulate
),
271 STATS_DESC_COUNTER(VCPU
, pf_spurious
),
272 STATS_DESC_COUNTER(VCPU
, pf_fast
),
273 STATS_DESC_COUNTER(VCPU
, pf_mmio_spte_created
),
274 STATS_DESC_COUNTER(VCPU
, pf_guest
),
275 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
276 STATS_DESC_COUNTER(VCPU
, invlpg
),
277 STATS_DESC_COUNTER(VCPU
, exits
),
278 STATS_DESC_COUNTER(VCPU
, io_exits
),
279 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
280 STATS_DESC_COUNTER(VCPU
, signal_exits
),
281 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
282 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
283 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
284 STATS_DESC_COUNTER(VCPU
, halt_exits
),
285 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
286 STATS_DESC_COUNTER(VCPU
, irq_exits
),
287 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
288 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
289 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
290 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
291 STATS_DESC_COUNTER(VCPU
, hypercalls
),
292 STATS_DESC_COUNTER(VCPU
, irq_injections
),
293 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
294 STATS_DESC_COUNTER(VCPU
, req_event
),
295 STATS_DESC_COUNTER(VCPU
, nested_run
),
296 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
297 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
298 STATS_DESC_COUNTER(VCPU
, preemption_reported
),
299 STATS_DESC_COUNTER(VCPU
, preemption_other
),
300 STATS_DESC_IBOOLEAN(VCPU
, guest_mode
),
301 STATS_DESC_COUNTER(VCPU
, notify_window_exits
),
304 const struct kvm_stats_header kvm_vcpu_stats_header
= {
305 .name_size
= KVM_STATS_NAME_SIZE
,
306 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
307 .id_offset
= sizeof(struct kvm_stats_header
),
308 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
309 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
310 sizeof(kvm_vcpu_stats_desc
),
313 u64 __read_mostly host_xcr0
;
315 static struct kmem_cache
*x86_emulator_cache
;
318 * When called, it means the previous get/set msr reached an invalid msr.
319 * Return true if we want to ignore/silent this failed msr access.
321 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
323 const char *op
= write
? "wrmsr" : "rdmsr";
326 if (report_ignored_msrs
)
327 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
332 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
338 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
340 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
341 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
343 return kmem_cache_create_usercopy("x86_emulator", size
,
344 __alignof__(struct x86_emulate_ctxt
),
345 SLAB_ACCOUNT
, useroffset
,
346 size
- useroffset
, NULL
);
349 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
351 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
354 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
355 vcpu
->arch
.apf
.gfns
[i
] = ~0;
358 static void kvm_on_user_return(struct user_return_notifier
*urn
)
361 struct kvm_user_return_msrs
*msrs
362 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
363 struct kvm_user_return_msr_values
*values
;
367 * Disabling irqs at this point since the following code could be
368 * interrupted and executed through kvm_arch_hardware_disable()
370 local_irq_save(flags
);
371 if (msrs
->registered
) {
372 msrs
->registered
= false;
373 user_return_notifier_unregister(urn
);
375 local_irq_restore(flags
);
376 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
377 values
= &msrs
->values
[slot
];
378 if (values
->host
!= values
->curr
) {
379 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
380 values
->curr
= values
->host
;
385 static int kvm_probe_user_return_msr(u32 msr
)
391 ret
= rdmsrl_safe(msr
, &val
);
394 ret
= wrmsrl_safe(msr
, val
);
400 int kvm_add_user_return_msr(u32 msr
)
402 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
404 if (kvm_probe_user_return_msr(msr
))
407 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
408 return kvm_nr_uret_msrs
++;
410 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
412 int kvm_find_user_return_msr(u32 msr
)
416 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
417 if (kvm_uret_msrs_list
[i
] == msr
)
422 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
424 static void kvm_user_return_msr_cpu_online(void)
426 unsigned int cpu
= smp_processor_id();
427 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
431 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
432 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
433 msrs
->values
[i
].host
= value
;
434 msrs
->values
[i
].curr
= value
;
438 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
440 unsigned int cpu
= smp_processor_id();
441 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
444 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
445 if (value
== msrs
->values
[slot
].curr
)
447 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
451 msrs
->values
[slot
].curr
= value
;
452 if (!msrs
->registered
) {
453 msrs
->urn
.on_user_return
= kvm_on_user_return
;
454 user_return_notifier_register(&msrs
->urn
);
455 msrs
->registered
= true;
459 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
461 static void drop_user_return_notifiers(void)
463 unsigned int cpu
= smp_processor_id();
464 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
466 if (msrs
->registered
)
467 kvm_on_user_return(&msrs
->urn
);
470 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
472 return vcpu
->arch
.apic_base
;
475 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
477 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
479 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
481 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
483 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
484 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
485 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
486 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
488 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
490 if (!msr_info
->host_initiated
) {
491 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
493 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
497 kvm_lapic_set_base(vcpu
, msr_info
->data
);
498 kvm_recalculate_apic_map(vcpu
->kvm
);
503 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
505 * Hardware virtualization extension instructions may fault if a reboot turns
506 * off virtualization while processes are running. Usually after catching the
507 * fault we just panic; during reboot instead the instruction is ignored.
509 noinstr
void kvm_spurious_fault(void)
511 /* Fault while not rebooting. We want the trace. */
512 BUG_ON(!kvm_rebooting
);
514 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
516 #define EXCPT_BENIGN 0
517 #define EXCPT_CONTRIBUTORY 1
520 static int exception_class(int vector
)
530 return EXCPT_CONTRIBUTORY
;
537 #define EXCPT_FAULT 0
539 #define EXCPT_ABORT 2
540 #define EXCPT_INTERRUPT 3
543 static int exception_type(int vector
)
547 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
548 return EXCPT_INTERRUPT
;
553 * #DBs can be trap-like or fault-like, the caller must check other CPU
554 * state, e.g. DR6, to determine whether a #DB is a trap or fault.
556 if (mask
& (1 << DB_VECTOR
))
559 if (mask
& ((1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
562 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
565 /* Reserved exceptions will result in fault */
569 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
,
570 struct kvm_queued_exception
*ex
)
572 if (!ex
->has_payload
)
575 switch (ex
->vector
) {
578 * "Certain debug exceptions may clear bit 0-3. The
579 * remaining contents of the DR6 register are never
580 * cleared by the processor".
582 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
584 * In order to reflect the #DB exception payload in guest
585 * dr6, three components need to be considered: active low
586 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
588 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
589 * In the target guest dr6:
590 * FIXED_1 bits should always be set.
591 * Active low bits should be cleared if 1-setting in payload.
592 * Active high bits should be set if 1-setting in payload.
594 * Note, the payload is compatible with the pending debug
595 * exceptions/exit qualification under VMX, that active_low bits
596 * are active high in payload.
597 * So they need to be flipped for DR6.
599 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
600 vcpu
->arch
.dr6
|= ex
->payload
;
601 vcpu
->arch
.dr6
^= ex
->payload
& DR6_ACTIVE_LOW
;
604 * The #DB payload is defined as compatible with the 'pending
605 * debug exceptions' field under VMX, not DR6. While bit 12 is
606 * defined in the 'pending debug exceptions' field (enabled
607 * breakpoint), it is reserved and must be zero in DR6.
609 vcpu
->arch
.dr6
&= ~BIT(12);
612 vcpu
->arch
.cr2
= ex
->payload
;
616 ex
->has_payload
= false;
619 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
621 static void kvm_queue_exception_vmexit(struct kvm_vcpu
*vcpu
, unsigned int vector
,
622 bool has_error_code
, u32 error_code
,
623 bool has_payload
, unsigned long payload
)
625 struct kvm_queued_exception
*ex
= &vcpu
->arch
.exception_vmexit
;
628 ex
->injected
= false;
630 ex
->has_error_code
= has_error_code
;
631 ex
->error_code
= error_code
;
632 ex
->has_payload
= has_payload
;
633 ex
->payload
= payload
;
636 /* Forcibly leave the nested mode in cases like a vCPU reset */
637 static void kvm_leave_nested(struct kvm_vcpu
*vcpu
)
639 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
642 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
643 unsigned nr
, bool has_error
, u32 error_code
,
644 bool has_payload
, unsigned long payload
, bool reinject
)
649 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
652 * If the exception is destined for L2 and isn't being reinjected,
653 * morph it to a VM-Exit if L1 wants to intercept the exception. A
654 * previously injected exception is not checked because it was checked
655 * when it was original queued, and re-checking is incorrect if _L1_
656 * injected the exception, in which case it's exempt from interception.
658 if (!reinject
&& is_guest_mode(vcpu
) &&
659 kvm_x86_ops
.nested_ops
->is_exception_vmexit(vcpu
, nr
, error_code
)) {
660 kvm_queue_exception_vmexit(vcpu
, nr
, has_error
, error_code
,
661 has_payload
, payload
);
665 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
669 * On VM-Entry, an exception can be pending if and only
670 * if event injection was blocked by nested_run_pending.
671 * In that case, however, vcpu_enter_guest() requests an
672 * immediate exit, and the guest shouldn't proceed far
673 * enough to need reinjection.
675 WARN_ON_ONCE(kvm_is_exception_pending(vcpu
));
676 vcpu
->arch
.exception
.injected
= true;
677 if (WARN_ON_ONCE(has_payload
)) {
679 * A reinjected event has already
680 * delivered its payload.
686 vcpu
->arch
.exception
.pending
= true;
687 vcpu
->arch
.exception
.injected
= false;
689 vcpu
->arch
.exception
.has_error_code
= has_error
;
690 vcpu
->arch
.exception
.vector
= nr
;
691 vcpu
->arch
.exception
.error_code
= error_code
;
692 vcpu
->arch
.exception
.has_payload
= has_payload
;
693 vcpu
->arch
.exception
.payload
= payload
;
694 if (!is_guest_mode(vcpu
))
695 kvm_deliver_exception_payload(vcpu
,
696 &vcpu
->arch
.exception
);
700 /* to check exception */
701 prev_nr
= vcpu
->arch
.exception
.vector
;
702 if (prev_nr
== DF_VECTOR
) {
703 /* triple fault -> shutdown */
704 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
707 class1
= exception_class(prev_nr
);
708 class2
= exception_class(nr
);
709 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
) ||
710 (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
712 * Synthesize #DF. Clear the previously injected or pending
713 * exception so as not to incorrectly trigger shutdown.
715 vcpu
->arch
.exception
.injected
= false;
716 vcpu
->arch
.exception
.pending
= false;
718 kvm_queue_exception_e(vcpu
, DF_VECTOR
, 0);
720 /* replace previous exception with a new one in a hope
721 that instruction re-execution will regenerate lost
727 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
729 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
731 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
733 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
735 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
737 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
739 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
740 unsigned long payload
)
742 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
744 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
746 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
747 u32 error_code
, unsigned long payload
)
749 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
750 true, payload
, false);
753 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
756 kvm_inject_gp(vcpu
, 0);
758 return kvm_skip_emulated_instruction(vcpu
);
762 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
764 static int complete_emulated_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
767 kvm_inject_gp(vcpu
, 0);
771 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
772 EMULTYPE_COMPLETE_USER_EXIT
);
775 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
777 ++vcpu
->stat
.pf_guest
;
780 * Async #PF in L2 is always forwarded to L1 as a VM-Exit regardless of
781 * whether or not L1 wants to intercept "regular" #PF.
783 if (is_guest_mode(vcpu
) && fault
->async_page_fault
)
784 kvm_queue_exception_vmexit(vcpu
, PF_VECTOR
,
785 true, fault
->error_code
,
786 true, fault
->address
);
788 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
792 void kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
793 struct x86_exception
*fault
)
795 struct kvm_mmu
*fault_mmu
;
796 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
798 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
802 * Invalidate the TLB entry for the faulting address, if it exists,
803 * else the access will fault indefinitely (and to emulate hardware).
805 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
806 !(fault
->error_code
& PFERR_RSVD_MASK
))
807 kvm_mmu_invalidate_addr(vcpu
, fault_mmu
, fault
->address
,
808 KVM_MMU_ROOT_CURRENT
);
810 fault_mmu
->inject_page_fault(vcpu
, fault
);
812 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
814 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
816 atomic_inc(&vcpu
->arch
.nmi_queued
);
817 kvm_make_request(KVM_REQ_NMI
, vcpu
);
820 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
822 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
824 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
826 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
828 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
830 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
833 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
834 * a #GP and return false.
836 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
838 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
840 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
844 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
846 if ((dr
!= 4 && dr
!= 5) || !kvm_is_cr4_bit_set(vcpu
, X86_CR4_DE
))
849 kvm_queue_exception(vcpu
, UD_VECTOR
);
852 EXPORT_SYMBOL_GPL(kvm_require_dr
);
854 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
856 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
860 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
862 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
864 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
865 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
869 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
872 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
875 real_gpa
= kvm_translate_gpa(vcpu
, mmu
, gfn_to_gpa(pdpt_gfn
),
876 PFERR_USER_MASK
| PFERR_WRITE_MASK
, NULL
);
877 if (real_gpa
== INVALID_GPA
)
880 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
881 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa_to_gfn(real_gpa
), pdpte
,
882 cr3
& GENMASK(11, 5), sizeof(pdpte
));
886 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
887 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
888 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
894 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
895 * Shadow page roots need to be reconstructed instead.
897 if (!tdp_enabled
&& memcmp(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
)))
898 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, KVM_MMU_ROOT_CURRENT
);
900 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
901 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
902 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
903 vcpu
->arch
.pdptrs_from_userspace
= false;
907 EXPORT_SYMBOL_GPL(load_pdptrs
);
909 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
912 * CR0.WP is incorporated into the MMU role, but only for non-nested,
913 * indirect shadow MMUs. If paging is disabled, no updates are needed
914 * as there are no permission bits to emulate. If TDP is enabled, the
915 * MMU's metadata needs to be updated, e.g. so that emulating guest
916 * translations does the right thing, but there's no need to unload the
917 * root as CR0.WP doesn't affect SPTEs.
919 if ((cr0
^ old_cr0
) == X86_CR0_WP
) {
920 if (!(cr0
& X86_CR0_PG
))
929 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
930 kvm_clear_async_pf_completion_queue(vcpu
);
931 kvm_async_pf_hash_reset(vcpu
);
934 * Clearing CR0.PG is defined to flush the TLB from the guest's
937 if (!(cr0
& X86_CR0_PG
))
938 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
941 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
942 kvm_mmu_reset_context(vcpu
);
944 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
945 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
946 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
947 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
949 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
951 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
953 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
958 if (cr0
& 0xffffffff00000000UL
)
962 cr0
&= ~CR0_RESERVED_BITS
;
964 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
967 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
971 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
972 (cr0
& X86_CR0_PG
)) {
977 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
982 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
983 is_pae(vcpu
) && ((cr0
^ old_cr0
) & X86_CR0_PDPTR_BITS
) &&
984 !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
987 if (!(cr0
& X86_CR0_PG
) &&
988 (is_64_bit_mode(vcpu
) || kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
)))
991 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
993 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
997 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
999 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
1001 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
1003 EXPORT_SYMBOL_GPL(kvm_lmsw
);
1005 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
1007 if (vcpu
->arch
.guest_state_protected
)
1010 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_OSXSAVE
)) {
1012 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1013 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
1015 if (vcpu
->arch
.xsaves_enabled
&&
1016 vcpu
->arch
.ia32_xss
!= host_xss
)
1017 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
1020 if (cpu_feature_enabled(X86_FEATURE_PKU
) &&
1021 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
&&
1022 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1023 kvm_is_cr4_bit_set(vcpu
, X86_CR4_PKE
)))
1024 write_pkru(vcpu
->arch
.pkru
);
1026 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
1028 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
1030 if (vcpu
->arch
.guest_state_protected
)
1033 if (cpu_feature_enabled(X86_FEATURE_PKU
) &&
1034 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1035 kvm_is_cr4_bit_set(vcpu
, X86_CR4_PKE
))) {
1036 vcpu
->arch
.pkru
= rdpkru();
1037 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
1038 write_pkru(vcpu
->arch
.host_pkru
);
1041 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_OSXSAVE
)) {
1043 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1044 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
1046 if (vcpu
->arch
.xsaves_enabled
&&
1047 vcpu
->arch
.ia32_xss
!= host_xss
)
1048 wrmsrl(MSR_IA32_XSS
, host_xss
);
1052 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
1054 #ifdef CONFIG_X86_64
1055 static inline u64
kvm_guest_supported_xfd(struct kvm_vcpu
*vcpu
)
1057 return vcpu
->arch
.guest_supported_xcr0
& XFEATURE_MASK_USER_DYNAMIC
;
1061 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
1064 u64 old_xcr0
= vcpu
->arch
.xcr0
;
1067 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1068 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
1070 if (!(xcr0
& XFEATURE_MASK_FP
))
1072 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
1076 * Do not allow the guest to set bits that we do not support
1077 * saving. However, xcr0 bit 0 is always set, even if the
1078 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1080 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
1081 if (xcr0
& ~valid_bits
)
1084 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1085 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1088 if (xcr0
& XFEATURE_MASK_AVX512
) {
1089 if (!(xcr0
& XFEATURE_MASK_YMM
))
1091 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1095 if ((xcr0
& XFEATURE_MASK_XTILE
) &&
1096 ((xcr0
& XFEATURE_MASK_XTILE
) != XFEATURE_MASK_XTILE
))
1099 vcpu
->arch
.xcr0
= xcr0
;
1101 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1102 kvm_update_cpuid_runtime(vcpu
);
1106 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1108 /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1109 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1110 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1111 kvm_inject_gp(vcpu
, 0);
1115 return kvm_skip_emulated_instruction(vcpu
);
1117 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1119 bool __kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1121 if (cr4
& cr4_reserved_bits
)
1124 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1129 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4
);
1131 static bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1133 return __kvm_is_valid_cr4(vcpu
, cr4
) &&
1134 static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1137 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1139 if ((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
)
1140 kvm_mmu_reset_context(vcpu
);
1143 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1144 * according to the SDM; however, stale prev_roots could be reused
1145 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1146 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1147 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1151 (cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
))
1152 kvm_mmu_unload(vcpu
);
1155 * The TLB has to be flushed for all PCIDs if any of the following
1156 * (architecturally required) changes happen:
1157 * - CR4.PCIDE is changed from 1 to 0
1158 * - CR4.PGE is toggled
1160 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1162 if (((cr4
^ old_cr4
) & X86_CR4_PGE
) ||
1163 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1164 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1167 * The TLB has to be flushed for the current PCID if any of the
1168 * following (architecturally required) changes happen:
1169 * - CR4.SMEP is changed from 0 to 1
1170 * - CR4.PAE is toggled
1172 else if (((cr4
^ old_cr4
) & X86_CR4_PAE
) ||
1173 ((cr4
& X86_CR4_SMEP
) && !(old_cr4
& X86_CR4_SMEP
)))
1174 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1177 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1179 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1181 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1183 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1186 if (is_long_mode(vcpu
)) {
1187 if (!(cr4
& X86_CR4_PAE
))
1189 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1191 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1192 && ((cr4
^ old_cr4
) & X86_CR4_PDPTR_BITS
)
1193 && !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
1196 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1197 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1198 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1202 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1204 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1208 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1210 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1212 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1213 unsigned long roots_to_free
= 0;
1217 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1218 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1219 * also via the emulator. KVM's TDP page tables are not in the scope of
1220 * the invalidation, but the guest's TLB entries need to be flushed as
1221 * the CPU may have cached entries in its TLB for the target PCID.
1223 if (unlikely(tdp_enabled
)) {
1224 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1229 * If neither the current CR3 nor any of the prev_roots use the given
1230 * PCID, then nothing needs to be done here because a resync will
1231 * happen anyway before switching to any other CR3.
1233 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1234 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1235 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1239 * If PCID is disabled, there is no need to free prev_roots even if the
1240 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1243 if (!kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
))
1246 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1247 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1248 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1250 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, roots_to_free
);
1253 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1255 bool skip_tlb_flush
= false;
1256 unsigned long pcid
= 0;
1257 #ifdef CONFIG_X86_64
1258 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
)) {
1259 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1260 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1261 pcid
= cr3
& X86_CR3_PCID_MASK
;
1265 /* PDPTRs are always reloaded for PAE paging. */
1266 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1267 goto handle_tlb_flush
;
1270 * Do not condition the GPA check on long mode, this helper is used to
1271 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1272 * the current vCPU mode is accurate.
1274 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1277 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
))
1280 if (cr3
!= kvm_read_cr3(vcpu
))
1281 kvm_mmu_new_pgd(vcpu
, cr3
);
1283 vcpu
->arch
.cr3
= cr3
;
1284 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
1285 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1289 * A load of CR3 that flushes the TLB flushes only the current PCID,
1290 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1291 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1292 * and it's impossible to use a non-zero PCID when PCID is disabled,
1293 * i.e. only PCID=0 can be relevant.
1295 if (!skip_tlb_flush
)
1296 kvm_invalidate_pcid(vcpu
, pcid
);
1300 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1302 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1304 if (cr8
& CR8_RESERVED_BITS
)
1306 if (lapic_in_kernel(vcpu
))
1307 kvm_lapic_set_tpr(vcpu
, cr8
);
1309 vcpu
->arch
.cr8
= cr8
;
1312 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1314 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1316 if (lapic_in_kernel(vcpu
))
1317 return kvm_lapic_get_cr8(vcpu
);
1319 return vcpu
->arch
.cr8
;
1321 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1323 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1327 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1328 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1329 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1333 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1337 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1338 dr7
= vcpu
->arch
.guest_debug_dr7
;
1340 dr7
= vcpu
->arch
.dr7
;
1341 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1342 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1343 if (dr7
& DR7_BP_EN_MASK
)
1344 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1346 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1348 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1350 u64 fixed
= DR6_FIXED_1
;
1352 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1355 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1356 fixed
|= DR6_BUS_LOCK
;
1360 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1362 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1366 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1367 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1368 vcpu
->arch
.eff_db
[dr
] = val
;
1372 if (!kvm_dr6_valid(val
))
1374 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1378 if (!kvm_dr7_valid(val
))
1380 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1381 kvm_update_dr7(vcpu
);
1387 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1389 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1391 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1395 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1399 *val
= vcpu
->arch
.dr6
;
1403 *val
= vcpu
->arch
.dr7
;
1407 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1409 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1411 u32 ecx
= kvm_rcx_read(vcpu
);
1414 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1415 kvm_inject_gp(vcpu
, 0);
1419 kvm_rax_write(vcpu
, (u32
)data
);
1420 kvm_rdx_write(vcpu
, data
>> 32);
1421 return kvm_skip_emulated_instruction(vcpu
);
1423 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1426 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features) track
1427 * the set of MSRs that KVM exposes to userspace through KVM_GET_MSRS,
1428 * KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. msrs_to_save holds MSRs that
1429 * require host support, i.e. should be probed via RDMSR. emulated_msrs holds
1430 * MSRs that KVM emulates without strictly requiring host support.
1431 * msr_based_features holds MSRs that enumerate features, i.e. are effectively
1432 * CPUID leafs. Note, msr_based_features isn't mutually exclusive with
1433 * msrs_to_save and emulated_msrs.
1436 static const u32 msrs_to_save_base
[] = {
1437 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1439 #ifdef CONFIG_X86_64
1440 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1442 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1443 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1444 MSR_IA32_SPEC_CTRL
, MSR_IA32_TSX_CTRL
,
1445 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1446 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1447 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1448 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1449 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1450 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1451 MSR_IA32_UMWAIT_CONTROL
,
1453 MSR_IA32_XFD
, MSR_IA32_XFD_ERR
,
1456 static const u32 msrs_to_save_pmu
[] = {
1457 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1458 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1459 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1460 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1461 MSR_IA32_PEBS_ENABLE
, MSR_IA32_DS_AREA
, MSR_PEBS_DATA_CFG
,
1463 /* This part of MSRs should match KVM_INTEL_PMC_MAX_GENERIC. */
1464 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1465 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1466 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1467 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1468 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1469 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1470 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1471 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1473 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1474 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1476 /* This part of MSRs should match KVM_AMD_PMC_MAX_GENERIC. */
1477 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1478 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1479 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1480 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1483 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_base
) +
1484 ARRAY_SIZE(msrs_to_save_pmu
)];
1485 static unsigned num_msrs_to_save
;
1487 static const u32 emulated_msrs_all
[] = {
1488 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1489 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1490 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1491 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1492 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1493 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1494 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1496 HV_X64_MSR_VP_INDEX
,
1497 HV_X64_MSR_VP_RUNTIME
,
1498 HV_X64_MSR_SCONTROL
,
1499 HV_X64_MSR_STIMER0_CONFIG
,
1500 HV_X64_MSR_VP_ASSIST_PAGE
,
1501 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1502 HV_X64_MSR_TSC_EMULATION_STATUS
, HV_X64_MSR_TSC_INVARIANT_CONTROL
,
1503 HV_X64_MSR_SYNDBG_OPTIONS
,
1504 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1505 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1506 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1508 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1509 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1511 MSR_IA32_TSC_ADJUST
,
1512 MSR_IA32_TSC_DEADLINE
,
1513 MSR_IA32_ARCH_CAPABILITIES
,
1514 MSR_IA32_PERF_CAPABILITIES
,
1515 MSR_IA32_MISC_ENABLE
,
1516 MSR_IA32_MCG_STATUS
,
1518 MSR_IA32_MCG_EXT_CTL
,
1522 MSR_MISC_FEATURES_ENABLES
,
1523 MSR_AMD64_VIRT_SPEC_CTRL
,
1524 MSR_AMD64_TSC_RATIO
,
1529 * KVM always supports the "true" VMX control MSRs, even if the host
1530 * does not. The VMX MSRs as a whole are considered "emulated" as KVM
1531 * doesn't strictly require them to exist in the host (ignoring that
1532 * KVM would refuse to load in the first place if the core set of MSRs
1533 * aren't supported).
1536 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1537 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1538 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1539 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1541 MSR_IA32_VMX_CR0_FIXED0
,
1542 MSR_IA32_VMX_CR4_FIXED0
,
1543 MSR_IA32_VMX_VMCS_ENUM
,
1544 MSR_IA32_VMX_PROCBASED_CTLS2
,
1545 MSR_IA32_VMX_EPT_VPID_CAP
,
1546 MSR_IA32_VMX_VMFUNC
,
1549 MSR_KVM_POLL_CONTROL
,
1552 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1553 static unsigned num_emulated_msrs
;
1556 * List of MSRs that control the existence of MSR-based features, i.e. MSRs
1557 * that are effectively CPUID leafs. VMX MSRs are also included in the set of
1558 * feature MSRs, but are handled separately to allow expedited lookups.
1560 static const u32 msr_based_features_all_except_vmx
[] = {
1563 MSR_IA32_ARCH_CAPABILITIES
,
1564 MSR_IA32_PERF_CAPABILITIES
,
1567 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all_except_vmx
) +
1568 (KVM_LAST_EMULATED_VMX_MSR
- KVM_FIRST_EMULATED_VMX_MSR
+ 1)];
1569 static unsigned int num_msr_based_features
;
1572 * All feature MSRs except uCode revID, which tracks the currently loaded uCode
1573 * patch, are immutable once the vCPU model is defined.
1575 static bool kvm_is_immutable_feature_msr(u32 msr
)
1579 if (msr
>= KVM_FIRST_EMULATED_VMX_MSR
&& msr
<= KVM_LAST_EMULATED_VMX_MSR
)
1582 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all_except_vmx
); i
++) {
1583 if (msr
== msr_based_features_all_except_vmx
[i
])
1584 return msr
!= MSR_IA32_UCODE_REV
;
1591 * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1592 * does not yet virtualize. These include:
1593 * 10 - MISC_PACKAGE_CTRLS
1594 * 11 - ENERGY_FILTERING_CTL
1596 * 18 - FB_CLEAR_CTRL
1597 * 21 - XAPIC_DISABLE_STATUS
1598 * 23 - OVERCLOCKING_STATUS
1601 #define KVM_SUPPORTED_ARCH_CAP \
1602 (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1603 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1604 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1605 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1606 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO)
1608 static u64
kvm_get_arch_capabilities(void)
1612 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
)) {
1613 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1614 data
&= KVM_SUPPORTED_ARCH_CAP
;
1618 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1619 * the nested hypervisor runs with NX huge pages. If it is not,
1620 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1621 * L1 guests, so it need not worry about its own (L2) guests.
1623 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1626 * If we're doing cache flushes (either "always" or "cond")
1627 * we will do one whenever the guest does a vmlaunch/vmresume.
1628 * If an outer hypervisor is doing the cache flush for us
1629 * (ARCH_CAP_SKIP_VMENTRY_L1DFLUSH), we can safely pass that
1630 * capability to the guest too, and if EPT is disabled we're not
1631 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1632 * require a nested hypervisor to do a flush of its own.
1634 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1635 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1637 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1638 data
|= ARCH_CAP_RDCL_NO
;
1639 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1640 data
|= ARCH_CAP_SSB_NO
;
1641 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1642 data
|= ARCH_CAP_MDS_NO
;
1644 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1646 * If RTM=0 because the kernel has disabled TSX, the host might
1647 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1648 * and therefore knows that there cannot be TAA) but keep
1649 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1650 * and we want to allow migrating those guests to tsx=off hosts.
1652 data
&= ~ARCH_CAP_TAA_NO
;
1653 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1654 data
|= ARCH_CAP_TAA_NO
;
1657 * Nothing to do here; we emulate TSX_CTRL if present on the
1658 * host so the guest can choose between disabling TSX or
1659 * using VERW to clear CPU buffers.
1666 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1668 switch (msr
->index
) {
1669 case MSR_IA32_ARCH_CAPABILITIES
:
1670 msr
->data
= kvm_get_arch_capabilities();
1672 case MSR_IA32_PERF_CAPABILITIES
:
1673 msr
->data
= kvm_caps
.supported_perf_cap
;
1675 case MSR_IA32_UCODE_REV
:
1676 rdmsrl_safe(msr
->index
, &msr
->data
);
1679 return static_call(kvm_x86_get_msr_feature
)(msr
);
1684 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1686 struct kvm_msr_entry msr
;
1690 r
= kvm_get_msr_feature(&msr
);
1692 if (r
== KVM_MSR_RET_INVALID
) {
1693 /* Unconditionally clear the output for simplicity */
1695 if (kvm_msr_ignored_check(index
, 0, false))
1707 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1709 if (efer
& EFER_AUTOIBRS
&& !guest_cpuid_has(vcpu
, X86_FEATURE_AUTOIBRS
))
1712 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1715 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1718 if (efer
& (EFER_LME
| EFER_LMA
) &&
1719 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1722 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1728 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1730 if (efer
& efer_reserved_bits
)
1733 return __kvm_valid_efer(vcpu
, efer
);
1735 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1737 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1739 u64 old_efer
= vcpu
->arch
.efer
;
1740 u64 efer
= msr_info
->data
;
1743 if (efer
& efer_reserved_bits
)
1746 if (!msr_info
->host_initiated
) {
1747 if (!__kvm_valid_efer(vcpu
, efer
))
1750 if (is_paging(vcpu
) &&
1751 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1756 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1758 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1764 if ((efer
^ old_efer
) & KVM_MMU_EFER_ROLE_BITS
)
1765 kvm_mmu_reset_context(vcpu
);
1770 void kvm_enable_efer_bits(u64 mask
)
1772 efer_reserved_bits
&= ~mask
;
1774 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1776 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1778 struct kvm_x86_msr_filter
*msr_filter
;
1779 struct msr_bitmap_range
*ranges
;
1780 struct kvm
*kvm
= vcpu
->kvm
;
1785 /* x2APIC MSRs do not support filtering. */
1786 if (index
>= 0x800 && index
<= 0x8ff)
1789 idx
= srcu_read_lock(&kvm
->srcu
);
1791 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1797 allowed
= msr_filter
->default_allow
;
1798 ranges
= msr_filter
->ranges
;
1800 for (i
= 0; i
< msr_filter
->count
; i
++) {
1801 u32 start
= ranges
[i
].base
;
1802 u32 end
= start
+ ranges
[i
].nmsrs
;
1803 u32 flags
= ranges
[i
].flags
;
1804 unsigned long *bitmap
= ranges
[i
].bitmap
;
1806 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1807 allowed
= test_bit(index
- start
, bitmap
);
1813 srcu_read_unlock(&kvm
->srcu
, idx
);
1817 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1820 * Write @data into the MSR specified by @index. Select MSR specific fault
1821 * checks are bypassed if @host_initiated is %true.
1822 * Returns 0 on success, non-0 otherwise.
1823 * Assumes vcpu_load() was already called.
1825 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1826 bool host_initiated
)
1828 struct msr_data msr
;
1833 case MSR_KERNEL_GS_BASE
:
1836 if (is_noncanonical_address(data
, vcpu
))
1839 case MSR_IA32_SYSENTER_EIP
:
1840 case MSR_IA32_SYSENTER_ESP
:
1842 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1843 * non-canonical address is written on Intel but not on
1844 * AMD (which ignores the top 32-bits, because it does
1845 * not implement 64-bit SYSENTER).
1847 * 64-bit code should hence be able to write a non-canonical
1848 * value on AMD. Making the address canonical ensures that
1849 * vmentry does not fail on Intel after writing a non-canonical
1850 * value, and that something deterministic happens if the guest
1851 * invokes 64-bit SYSENTER.
1853 data
= __canonical_address(data
, vcpu_virt_addr_bits(vcpu
));
1856 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1859 if (!host_initiated
&&
1860 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1861 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1865 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1866 * incomplete and conflicting architectural behavior. Current
1867 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1868 * reserved and always read as zeros. Enforce Intel's reserved
1869 * bits check if and only if the guest CPU is Intel, and clear
1870 * the bits in all other cases. This ensures cross-vendor
1871 * migration will provide consistent behavior for the guest.
1873 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1882 msr
.host_initiated
= host_initiated
;
1884 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1887 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1888 u32 index
, u64 data
, bool host_initiated
)
1890 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1892 if (ret
== KVM_MSR_RET_INVALID
)
1893 if (kvm_msr_ignored_check(index
, data
, true))
1900 * Read the MSR specified by @index into @data. Select MSR specific fault
1901 * checks are bypassed if @host_initiated is %true.
1902 * Returns 0 on success, non-0 otherwise.
1903 * Assumes vcpu_load() was already called.
1905 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1906 bool host_initiated
)
1908 struct msr_data msr
;
1913 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1916 if (!host_initiated
&&
1917 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1918 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1924 msr
.host_initiated
= host_initiated
;
1926 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1932 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1933 u32 index
, u64
*data
, bool host_initiated
)
1935 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1937 if (ret
== KVM_MSR_RET_INVALID
) {
1938 /* Unconditionally clear *data for simplicity */
1940 if (kvm_msr_ignored_check(index
, 0, false))
1947 static int kvm_get_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1949 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1950 return KVM_MSR_RET_FILTERED
;
1951 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1954 static int kvm_set_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1956 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1957 return KVM_MSR_RET_FILTERED
;
1958 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1961 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1963 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1965 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1967 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1969 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1971 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1973 static void complete_userspace_rdmsr(struct kvm_vcpu
*vcpu
)
1975 if (!vcpu
->run
->msr
.error
) {
1976 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1977 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1981 static int complete_emulated_msr_access(struct kvm_vcpu
*vcpu
)
1983 return complete_emulated_insn_gp(vcpu
, vcpu
->run
->msr
.error
);
1986 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1988 complete_userspace_rdmsr(vcpu
);
1989 return complete_emulated_msr_access(vcpu
);
1992 static int complete_fast_msr_access(struct kvm_vcpu
*vcpu
)
1994 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1997 static int complete_fast_rdmsr(struct kvm_vcpu
*vcpu
)
1999 complete_userspace_rdmsr(vcpu
);
2000 return complete_fast_msr_access(vcpu
);
2003 static u64
kvm_msr_reason(int r
)
2006 case KVM_MSR_RET_INVALID
:
2007 return KVM_MSR_EXIT_REASON_UNKNOWN
;
2008 case KVM_MSR_RET_FILTERED
:
2009 return KVM_MSR_EXIT_REASON_FILTER
;
2011 return KVM_MSR_EXIT_REASON_INVAL
;
2015 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
2016 u32 exit_reason
, u64 data
,
2017 int (*completion
)(struct kvm_vcpu
*vcpu
),
2020 u64 msr_reason
= kvm_msr_reason(r
);
2022 /* Check if the user wanted to know about this MSR fault */
2023 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
2026 vcpu
->run
->exit_reason
= exit_reason
;
2027 vcpu
->run
->msr
.error
= 0;
2028 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
2029 vcpu
->run
->msr
.reason
= msr_reason
;
2030 vcpu
->run
->msr
.index
= index
;
2031 vcpu
->run
->msr
.data
= data
;
2032 vcpu
->arch
.complete_userspace_io
= completion
;
2037 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
2039 u32 ecx
= kvm_rcx_read(vcpu
);
2043 r
= kvm_get_msr_with_filter(vcpu
, ecx
, &data
);
2046 trace_kvm_msr_read(ecx
, data
);
2048 kvm_rax_write(vcpu
, data
& -1u);
2049 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
2051 /* MSR read failed? See if we should ask user space */
2052 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_RDMSR
, 0,
2053 complete_fast_rdmsr
, r
))
2055 trace_kvm_msr_read_ex(ecx
);
2058 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2060 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
2062 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
2064 u32 ecx
= kvm_rcx_read(vcpu
);
2065 u64 data
= kvm_read_edx_eax(vcpu
);
2068 r
= kvm_set_msr_with_filter(vcpu
, ecx
, data
);
2071 trace_kvm_msr_write(ecx
, data
);
2073 /* MSR write failed? See if we should ask user space */
2074 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_WRMSR
, data
,
2075 complete_fast_msr_access
, r
))
2077 /* Signal all other negative errors to userspace */
2080 trace_kvm_msr_write_ex(ecx
, data
);
2083 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2085 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
2087 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
2089 return kvm_skip_emulated_instruction(vcpu
);
2092 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
2094 /* Treat an INVD instruction as a NOP and just skip it. */
2095 return kvm_emulate_as_nop(vcpu
);
2097 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
2099 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
2101 kvm_queue_exception(vcpu
, UD_VECTOR
);
2104 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
2107 static int kvm_emulate_monitor_mwait(struct kvm_vcpu
*vcpu
, const char *insn
)
2109 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS
) &&
2110 !guest_cpuid_has(vcpu
, X86_FEATURE_MWAIT
))
2111 return kvm_handle_invalid_op(vcpu
);
2113 pr_warn_once("%s instruction emulated as NOP!\n", insn
);
2114 return kvm_emulate_as_nop(vcpu
);
2116 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
2118 return kvm_emulate_monitor_mwait(vcpu
, "MWAIT");
2120 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
2122 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
2124 return kvm_emulate_monitor_mwait(vcpu
, "MONITOR");
2126 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
2128 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
2130 xfer_to_guest_mode_prepare();
2131 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
2132 xfer_to_guest_mode_work_pending();
2136 * The fast path for frequent and performance sensitive wrmsr emulation,
2137 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2138 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2139 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2140 * other cases which must be called after interrupts are enabled on the host.
2142 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
2144 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
2147 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
2148 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
2149 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
2150 ((u32
)(data
>> 32) != X2APIC_BROADCAST
))
2151 return kvm_x2apic_icr_write(vcpu
->arch
.apic
, data
);
2156 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
2158 if (!kvm_can_use_hv_timer(vcpu
))
2161 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2165 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2167 u32 msr
= kvm_rcx_read(vcpu
);
2169 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2172 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2173 data
= kvm_read_edx_eax(vcpu
);
2174 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2175 kvm_skip_emulated_instruction(vcpu
);
2176 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2179 case MSR_IA32_TSC_DEADLINE
:
2180 data
= kvm_read_edx_eax(vcpu
);
2181 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2182 kvm_skip_emulated_instruction(vcpu
);
2183 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2190 if (ret
!= EXIT_FASTPATH_NONE
)
2191 trace_kvm_msr_write(msr
, data
);
2195 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2198 * Adapt set_msr() to msr_io()'s calling convention
2200 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2202 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2205 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2210 * Disallow writes to immutable feature MSRs after KVM_RUN. KVM does
2211 * not support modifying the guest vCPU model on the fly, e.g. changing
2212 * the nVMX capabilities while L2 is running is nonsensical. Ignore
2213 * writes of the same value, e.g. to allow userspace to blindly stuff
2214 * all MSRs when emulating RESET.
2216 if (kvm_vcpu_has_run(vcpu
) && kvm_is_immutable_feature_msr(index
)) {
2217 if (do_get_msr(vcpu
, index
, &val
) || *data
!= val
)
2223 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2226 #ifdef CONFIG_X86_64
2227 struct pvclock_clock
{
2237 struct pvclock_gtod_data
{
2240 struct pvclock_clock clock
; /* extract of a clocksource struct */
2241 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2247 static struct pvclock_gtod_data pvclock_gtod_data
;
2249 static void update_pvclock_gtod(struct timekeeper
*tk
)
2251 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2253 write_seqcount_begin(&vdata
->seq
);
2255 /* copy pvclock gtod data */
2256 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2257 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2258 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2259 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2260 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2261 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2262 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2264 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2265 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2266 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2267 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2268 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2269 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2270 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2272 vdata
->wall_time_sec
= tk
->xtime_sec
;
2274 vdata
->offs_boot
= tk
->offs_boot
;
2276 write_seqcount_end(&vdata
->seq
);
2279 static s64
get_kvmclock_base_ns(void)
2281 /* Count up from boot time, but with the frequency of the raw clock. */
2282 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2285 static s64
get_kvmclock_base_ns(void)
2287 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2288 return ktime_get_boottime_ns();
2292 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2296 struct pvclock_wall_clock wc
;
2303 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2308 ++version
; /* first time write, random junk */
2312 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2316 * The guest calculates current wall clock time by adding
2317 * system time (updated by kvm_guest_time_update below) to the
2318 * wall clock specified here. We do the reverse here.
2320 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2322 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2323 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2324 wc
.version
= version
;
2326 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2329 wc_sec_hi
= wall_nsec
>> 32;
2330 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2331 &wc_sec_hi
, sizeof(wc_sec_hi
));
2335 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2338 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2339 bool old_msr
, bool host_initiated
)
2341 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2343 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2344 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2345 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2347 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2350 vcpu
->arch
.time
= system_time
;
2351 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2353 /* we verify if the enable bit is set... */
2354 if (system_time
& 1)
2355 kvm_gpc_activate(&vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2356 sizeof(struct pvclock_vcpu_time_info
));
2358 kvm_gpc_deactivate(&vcpu
->arch
.pv_time
);
2363 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2365 do_shl32_div32(dividend
, divisor
);
2369 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2370 s8
*pshift
, u32
*pmultiplier
)
2378 scaled64
= scaled_hz
;
2379 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2384 tps32
= (uint32_t)tps64
;
2385 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2386 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2394 *pmultiplier
= div_frac(scaled64
, tps32
);
2397 #ifdef CONFIG_X86_64
2398 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2401 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2402 static unsigned long max_tsc_khz
;
2404 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2406 u64 v
= (u64
)khz
* (1000000 + ppm
);
2411 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2413 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2417 /* Guest TSC same frequency as host TSC? */
2419 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_caps
.default_tsc_scaling_ratio
);
2423 /* TSC scaling supported? */
2424 if (!kvm_caps
.has_tsc_control
) {
2425 if (user_tsc_khz
> tsc_khz
) {
2426 vcpu
->arch
.tsc_catchup
= 1;
2427 vcpu
->arch
.tsc_always_catchup
= 1;
2430 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2435 /* TSC scaling required - calculate ratio */
2436 ratio
= mul_u64_u32_div(1ULL << kvm_caps
.tsc_scaling_ratio_frac_bits
,
2437 user_tsc_khz
, tsc_khz
);
2439 if (ratio
== 0 || ratio
>= kvm_caps
.max_tsc_scaling_ratio
) {
2440 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2445 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2449 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2451 u32 thresh_lo
, thresh_hi
;
2452 int use_scaling
= 0;
2454 /* tsc_khz can be zero if TSC calibration fails */
2455 if (user_tsc_khz
== 0) {
2456 /* set tsc_scaling_ratio to a safe value */
2457 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_caps
.default_tsc_scaling_ratio
);
2461 /* Compute a scale to convert nanoseconds in TSC cycles */
2462 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2463 &vcpu
->arch
.virtual_tsc_shift
,
2464 &vcpu
->arch
.virtual_tsc_mult
);
2465 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2468 * Compute the variation in TSC rate which is acceptable
2469 * within the range of tolerance and decide if the
2470 * rate being applied is within that bounds of the hardware
2471 * rate. If so, no scaling or compensation need be done.
2473 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2474 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2475 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2476 pr_debug("requested TSC rate %u falls outside tolerance [%u,%u]\n",
2477 user_tsc_khz
, thresh_lo
, thresh_hi
);
2480 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2483 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2485 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2486 vcpu
->arch
.virtual_tsc_mult
,
2487 vcpu
->arch
.virtual_tsc_shift
);
2488 tsc
+= vcpu
->arch
.this_tsc_write
;
2492 #ifdef CONFIG_X86_64
2493 static inline int gtod_is_based_on_tsc(int mode
)
2495 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2499 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2501 #ifdef CONFIG_X86_64
2503 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2504 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2506 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2507 atomic_read(&vcpu
->kvm
->online_vcpus
));
2510 * Once the masterclock is enabled, always perform request in
2511 * order to update it.
2513 * In order to enable masterclock, the host clocksource must be TSC
2514 * and the vcpus need to have matched TSCs. When that happens,
2515 * perform request to enable masterclock.
2517 if (ka
->use_master_clock
||
2518 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2519 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2521 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2522 atomic_read(&vcpu
->kvm
->online_vcpus
),
2523 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2528 * Multiply tsc by a fixed point number represented by ratio.
2530 * The most significant 64-N bits (mult) of ratio represent the
2531 * integral part of the fixed point number; the remaining N bits
2532 * (frac) represent the fractional part, ie. ratio represents a fixed
2533 * point number (mult + frac * 2^(-N)).
2535 * N equals to kvm_caps.tsc_scaling_ratio_frac_bits.
2537 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2539 return mul_u64_u64_shr(tsc
, ratio
, kvm_caps
.tsc_scaling_ratio_frac_bits
);
2542 u64
kvm_scale_tsc(u64 tsc
, u64 ratio
)
2546 if (ratio
!= kvm_caps
.default_tsc_scaling_ratio
)
2547 _tsc
= __scale_tsc(ratio
, tsc
);
2552 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2556 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2558 return target_tsc
- tsc
;
2561 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2563 return vcpu
->arch
.l1_tsc_offset
+
2564 kvm_scale_tsc(host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2566 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2568 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2572 if (l2_multiplier
== kvm_caps
.default_tsc_scaling_ratio
)
2573 nested_offset
= l1_offset
;
2575 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2576 kvm_caps
.tsc_scaling_ratio_frac_bits
);
2578 nested_offset
+= l2_offset
;
2579 return nested_offset
;
2581 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2583 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2585 if (l2_multiplier
!= kvm_caps
.default_tsc_scaling_ratio
)
2586 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2587 kvm_caps
.tsc_scaling_ratio_frac_bits
);
2589 return l1_multiplier
;
2591 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2593 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2595 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2596 vcpu
->arch
.l1_tsc_offset
,
2599 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2602 * If we are here because L1 chose not to trap WRMSR to TSC then
2603 * according to the spec this should set L1's TSC (as opposed to
2604 * setting L1's offset for L2).
2606 if (is_guest_mode(vcpu
))
2607 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2609 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2610 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2612 vcpu
->arch
.tsc_offset
= l1_offset
;
2614 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2617 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2619 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2621 /* Userspace is changing the multiplier while L2 is active */
2622 if (is_guest_mode(vcpu
))
2623 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2625 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2627 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2629 if (kvm_caps
.has_tsc_control
)
2630 static_call(kvm_x86_write_tsc_multiplier
)(
2631 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2634 static inline bool kvm_check_tsc_unstable(void)
2636 #ifdef CONFIG_X86_64
2638 * TSC is marked unstable when we're running on Hyper-V,
2639 * 'TSC page' clocksource is good.
2641 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2644 return check_tsc_unstable();
2648 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2649 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2652 static void __kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 offset
, u64 tsc
,
2653 u64 ns
, bool matched
)
2655 struct kvm
*kvm
= vcpu
->kvm
;
2657 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2660 * We also track th most recent recorded KHZ, write and time to
2661 * allow the matching interval to be extended at each write.
2663 kvm
->arch
.last_tsc_nsec
= ns
;
2664 kvm
->arch
.last_tsc_write
= tsc
;
2665 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2666 kvm
->arch
.last_tsc_offset
= offset
;
2668 vcpu
->arch
.last_guest_tsc
= tsc
;
2670 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2674 * We split periods of matched TSC writes into generations.
2675 * For each generation, we track the original measured
2676 * nanosecond time, offset, and write, so if TSCs are in
2677 * sync, we can match exact offset, and if not, we can match
2678 * exact software computation in compute_guest_tsc()
2680 * These values are tracked in kvm->arch.cur_xxx variables.
2682 kvm
->arch
.cur_tsc_generation
++;
2683 kvm
->arch
.cur_tsc_nsec
= ns
;
2684 kvm
->arch
.cur_tsc_write
= tsc
;
2685 kvm
->arch
.cur_tsc_offset
= offset
;
2686 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2687 } else if (vcpu
->arch
.this_tsc_generation
!= kvm
->arch
.cur_tsc_generation
) {
2688 kvm
->arch
.nr_vcpus_matched_tsc
++;
2691 /* Keep track of which generation this VCPU has synchronized to */
2692 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2693 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2694 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2696 kvm_track_tsc_matching(vcpu
);
2699 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2701 struct kvm
*kvm
= vcpu
->kvm
;
2702 u64 offset
, ns
, elapsed
;
2703 unsigned long flags
;
2704 bool matched
= false;
2705 bool synchronizing
= false;
2707 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2708 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2709 ns
= get_kvmclock_base_ns();
2710 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2712 if (vcpu
->arch
.virtual_tsc_khz
) {
2715 * detection of vcpu initialization -- need to sync
2716 * with other vCPUs. This particularly helps to keep
2717 * kvm_clock stable after CPU hotplug
2719 synchronizing
= true;
2721 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2722 nsec_to_cycles(vcpu
, elapsed
);
2723 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2725 * Special case: TSC write with a small delta (1 second)
2726 * of virtual cycle time against real time is
2727 * interpreted as an attempt to synchronize the CPU.
2729 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2730 data
+ tsc_hz
> tsc_exp
;
2735 * For a reliable TSC, we can match TSC offsets, and for an unstable
2736 * TSC, we add elapsed time in this computation. We could let the
2737 * compensation code attempt to catch up if we fall behind, but
2738 * it's better to try to match offsets from the beginning.
2740 if (synchronizing
&&
2741 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2742 if (!kvm_check_tsc_unstable()) {
2743 offset
= kvm
->arch
.cur_tsc_offset
;
2745 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2747 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2752 __kvm_synchronize_tsc(vcpu
, offset
, data
, ns
, matched
);
2753 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2756 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2759 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2760 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2763 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2765 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_caps
.default_tsc_scaling_ratio
)
2766 WARN_ON(adjustment
< 0);
2767 adjustment
= kvm_scale_tsc((u64
) adjustment
,
2768 vcpu
->arch
.l1_tsc_scaling_ratio
);
2769 adjust_tsc_offset_guest(vcpu
, adjustment
);
2772 #ifdef CONFIG_X86_64
2774 static u64
read_tsc(void)
2776 u64 ret
= (u64
)rdtsc_ordered();
2777 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2779 if (likely(ret
>= last
))
2783 * GCC likes to generate cmov here, but this branch is extremely
2784 * predictable (it's just a function of time and the likely is
2785 * very likely) and there's a data dependence, so force GCC
2786 * to generate a branch instead. I don't barrier() because
2787 * we don't actually need a barrier, and if this function
2788 * ever gets inlined it will generate worse code.
2794 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2800 switch (clock
->vclock_mode
) {
2801 case VDSO_CLOCKMODE_HVCLOCK
:
2802 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2804 if (tsc_pg_val
!= U64_MAX
) {
2805 /* TSC page valid */
2806 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2807 v
= (tsc_pg_val
- clock
->cycle_last
) &
2810 /* TSC page invalid */
2811 *mode
= VDSO_CLOCKMODE_NONE
;
2814 case VDSO_CLOCKMODE_TSC
:
2815 *mode
= VDSO_CLOCKMODE_TSC
;
2816 *tsc_timestamp
= read_tsc();
2817 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2821 *mode
= VDSO_CLOCKMODE_NONE
;
2824 if (*mode
== VDSO_CLOCKMODE_NONE
)
2825 *tsc_timestamp
= v
= 0;
2827 return v
* clock
->mult
;
2830 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2832 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2838 seq
= read_seqcount_begin(>od
->seq
);
2839 ns
= gtod
->raw_clock
.base_cycles
;
2840 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2841 ns
>>= gtod
->raw_clock
.shift
;
2842 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2843 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2849 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2851 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2857 seq
= read_seqcount_begin(>od
->seq
);
2858 ts
->tv_sec
= gtod
->wall_time_sec
;
2859 ns
= gtod
->clock
.base_cycles
;
2860 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2861 ns
>>= gtod
->clock
.shift
;
2862 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2864 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2870 /* returns true if host is using TSC based clocksource */
2871 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2873 /* checked again under seqlock below */
2874 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2877 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2881 /* returns true if host is using TSC based clocksource */
2882 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2885 /* checked again under seqlock below */
2886 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2889 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2895 * Assuming a stable TSC across physical CPUS, and a stable TSC
2896 * across virtual CPUs, the following condition is possible.
2897 * Each numbered line represents an event visible to both
2898 * CPUs at the next numbered event.
2900 * "timespecX" represents host monotonic time. "tscX" represents
2903 * VCPU0 on CPU0 | VCPU1 on CPU1
2905 * 1. read timespec0,tsc0
2906 * 2. | timespec1 = timespec0 + N
2908 * 3. transition to guest | transition to guest
2909 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2910 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2911 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2913 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2916 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2918 * - 0 < N - M => M < N
2920 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2921 * always the case (the difference between two distinct xtime instances
2922 * might be smaller then the difference between corresponding TSC reads,
2923 * when updating guest vcpus pvclock areas).
2925 * To avoid that problem, do not allow visibility of distinct
2926 * system_timestamp/tsc_timestamp values simultaneously: use a master
2927 * copy of host monotonic time values. Update that master copy
2930 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2934 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2936 #ifdef CONFIG_X86_64
2937 struct kvm_arch
*ka
= &kvm
->arch
;
2939 bool host_tsc_clocksource
, vcpus_matched
;
2941 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2942 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2943 atomic_read(&kvm
->online_vcpus
));
2946 * If the host uses TSC clock, then passthrough TSC as stable
2949 host_tsc_clocksource
= kvm_get_time_and_clockread(
2950 &ka
->master_kernel_ns
,
2951 &ka
->master_cycle_now
);
2953 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2954 && !ka
->backwards_tsc_observed
2955 && !ka
->boot_vcpu_runs_old_kvmclock
;
2957 if (ka
->use_master_clock
)
2958 atomic_set(&kvm_guest_has_master_clock
, 1);
2960 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2961 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2966 static void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2968 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2971 static void __kvm_start_pvclock_update(struct kvm
*kvm
)
2973 raw_spin_lock_irq(&kvm
->arch
.tsc_write_lock
);
2974 write_seqcount_begin(&kvm
->arch
.pvclock_sc
);
2977 static void kvm_start_pvclock_update(struct kvm
*kvm
)
2979 kvm_make_mclock_inprogress_request(kvm
);
2981 /* no guest entries from this point */
2982 __kvm_start_pvclock_update(kvm
);
2985 static void kvm_end_pvclock_update(struct kvm
*kvm
)
2987 struct kvm_arch
*ka
= &kvm
->arch
;
2988 struct kvm_vcpu
*vcpu
;
2991 write_seqcount_end(&ka
->pvclock_sc
);
2992 raw_spin_unlock_irq(&ka
->tsc_write_lock
);
2993 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2994 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2996 /* guest entries allowed */
2997 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2998 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
3001 static void kvm_update_masterclock(struct kvm
*kvm
)
3003 kvm_hv_request_tsc_page_update(kvm
);
3004 kvm_start_pvclock_update(kvm
);
3005 pvclock_update_vm_gtod_copy(kvm
);
3006 kvm_end_pvclock_update(kvm
);
3010 * Use the kernel's tsc_khz directly if the TSC is constant, otherwise use KVM's
3011 * per-CPU value (which may be zero if a CPU is going offline). Note, tsc_khz
3012 * can change during boot even if the TSC is constant, as it's possible for KVM
3013 * to be loaded before TSC calibration completes. Ideally, KVM would get a
3014 * notification when calibration completes, but practically speaking calibration
3015 * will complete before userspace is alive enough to create VMs.
3017 static unsigned long get_cpu_tsc_khz(void)
3019 if (static_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3022 return __this_cpu_read(cpu_tsc_khz
);
3025 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
3026 static void __get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
3028 struct kvm_arch
*ka
= &kvm
->arch
;
3029 struct pvclock_vcpu_time_info hv_clock
;
3031 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
3035 if (ka
->use_master_clock
&&
3036 (static_cpu_has(X86_FEATURE_CONSTANT_TSC
) || __this_cpu_read(cpu_tsc_khz
))) {
3037 #ifdef CONFIG_X86_64
3038 struct timespec64 ts
;
3040 if (kvm_get_walltime_and_clockread(&ts
, &data
->host_tsc
)) {
3041 data
->realtime
= ts
.tv_nsec
+ NSEC_PER_SEC
* ts
.tv_sec
;
3042 data
->flags
|= KVM_CLOCK_REALTIME
| KVM_CLOCK_HOST_TSC
;
3045 data
->host_tsc
= rdtsc();
3047 data
->flags
|= KVM_CLOCK_TSC_STABLE
;
3048 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
3049 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
3050 kvm_get_time_scale(NSEC_PER_SEC
, get_cpu_tsc_khz() * 1000LL,
3051 &hv_clock
.tsc_shift
,
3052 &hv_clock
.tsc_to_system_mul
);
3053 data
->clock
= __pvclock_read_cycles(&hv_clock
, data
->host_tsc
);
3055 data
->clock
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
3061 static void get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
3063 struct kvm_arch
*ka
= &kvm
->arch
;
3067 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3068 __get_kvmclock(kvm
, data
);
3069 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3072 u64
get_kvmclock_ns(struct kvm
*kvm
)
3074 struct kvm_clock_data data
;
3076 get_kvmclock(kvm
, &data
);
3080 static void kvm_setup_guest_pvclock(struct kvm_vcpu
*v
,
3081 struct gfn_to_pfn_cache
*gpc
,
3082 unsigned int offset
)
3084 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3085 struct pvclock_vcpu_time_info
*guest_hv_clock
;
3086 unsigned long flags
;
3088 read_lock_irqsave(&gpc
->lock
, flags
);
3089 while (!kvm_gpc_check(gpc
, offset
+ sizeof(*guest_hv_clock
))) {
3090 read_unlock_irqrestore(&gpc
->lock
, flags
);
3092 if (kvm_gpc_refresh(gpc
, offset
+ sizeof(*guest_hv_clock
)))
3095 read_lock_irqsave(&gpc
->lock
, flags
);
3098 guest_hv_clock
= (void *)(gpc
->khva
+ offset
);
3101 * This VCPU is paused, but it's legal for a guest to read another
3102 * VCPU's kvmclock, so we really have to follow the specification where
3103 * it says that version is odd if data is being modified, and even after
3107 guest_hv_clock
->version
= vcpu
->hv_clock
.version
= (guest_hv_clock
->version
+ 1) | 1;
3110 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3111 vcpu
->hv_clock
.flags
|= (guest_hv_clock
->flags
& PVCLOCK_GUEST_STOPPED
);
3113 if (vcpu
->pvclock_set_guest_stopped_request
) {
3114 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
3115 vcpu
->pvclock_set_guest_stopped_request
= false;
3118 memcpy(guest_hv_clock
, &vcpu
->hv_clock
, sizeof(*guest_hv_clock
));
3121 guest_hv_clock
->version
= ++vcpu
->hv_clock
.version
;
3123 mark_page_dirty_in_slot(v
->kvm
, gpc
->memslot
, gpc
->gpa
>> PAGE_SHIFT
);
3124 read_unlock_irqrestore(&gpc
->lock
, flags
);
3126 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
3129 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
3131 unsigned long flags
, tgt_tsc_khz
;
3133 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3134 struct kvm_arch
*ka
= &v
->kvm
->arch
;
3136 u64 tsc_timestamp
, host_tsc
;
3138 bool use_master_clock
;
3144 * If the host uses TSC clock, then passthrough TSC as stable
3148 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3149 use_master_clock
= ka
->use_master_clock
;
3150 if (use_master_clock
) {
3151 host_tsc
= ka
->master_cycle_now
;
3152 kernel_ns
= ka
->master_kernel_ns
;
3154 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3156 /* Keep irq disabled to prevent changes to the clock */
3157 local_irq_save(flags
);
3158 tgt_tsc_khz
= get_cpu_tsc_khz();
3159 if (unlikely(tgt_tsc_khz
== 0)) {
3160 local_irq_restore(flags
);
3161 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3164 if (!use_master_clock
) {
3166 kernel_ns
= get_kvmclock_base_ns();
3169 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
3172 * We may have to catch up the TSC to match elapsed wall clock
3173 * time for two reasons, even if kvmclock is used.
3174 * 1) CPU could have been running below the maximum TSC rate
3175 * 2) Broken TSC compensation resets the base at each VCPU
3176 * entry to avoid unknown leaps of TSC even when running
3177 * again on the same CPU. This may cause apparent elapsed
3178 * time to disappear, and the guest to stand still or run
3181 if (vcpu
->tsc_catchup
) {
3182 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
3183 if (tsc
> tsc_timestamp
) {
3184 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
3185 tsc_timestamp
= tsc
;
3189 local_irq_restore(flags
);
3191 /* With all the info we got, fill in the values */
3193 if (kvm_caps
.has_tsc_control
)
3194 tgt_tsc_khz
= kvm_scale_tsc(tgt_tsc_khz
,
3195 v
->arch
.l1_tsc_scaling_ratio
);
3197 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
3198 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
3199 &vcpu
->hv_clock
.tsc_shift
,
3200 &vcpu
->hv_clock
.tsc_to_system_mul
);
3201 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
3202 kvm_xen_update_tsc_info(v
);
3205 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
3206 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
3207 vcpu
->last_guest_tsc
= tsc_timestamp
;
3209 /* If the host uses TSC clocksource, then it is stable */
3211 if (use_master_clock
)
3212 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
3214 vcpu
->hv_clock
.flags
= pvclock_flags
;
3216 if (vcpu
->pv_time
.active
)
3217 kvm_setup_guest_pvclock(v
, &vcpu
->pv_time
, 0);
3218 if (vcpu
->xen
.vcpu_info_cache
.active
)
3219 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_info_cache
,
3220 offsetof(struct compat_vcpu_info
, time
));
3221 if (vcpu
->xen
.vcpu_time_info_cache
.active
)
3222 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
3223 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
3228 * kvmclock updates which are isolated to a given vcpu, such as
3229 * vcpu->cpu migration, should not allow system_timestamp from
3230 * the rest of the vcpus to remain static. Otherwise ntp frequency
3231 * correction applies to one vcpu's system_timestamp but not
3234 * So in those cases, request a kvmclock update for all vcpus.
3235 * We need to rate-limit these requests though, as they can
3236 * considerably slow guests that have a large number of vcpus.
3237 * The time for a remote vcpu to update its kvmclock is bound
3238 * by the delay we use to rate-limit the updates.
3241 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3243 static void kvmclock_update_fn(struct work_struct
*work
)
3246 struct delayed_work
*dwork
= to_delayed_work(work
);
3247 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3248 kvmclock_update_work
);
3249 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3250 struct kvm_vcpu
*vcpu
;
3252 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3253 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3254 kvm_vcpu_kick(vcpu
);
3258 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3260 struct kvm
*kvm
= v
->kvm
;
3262 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3263 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3264 KVMCLOCK_UPDATE_DELAY
);
3267 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3269 static void kvmclock_sync_fn(struct work_struct
*work
)
3271 struct delayed_work
*dwork
= to_delayed_work(work
);
3272 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3273 kvmclock_sync_work
);
3274 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3276 if (!kvmclock_periodic_sync
)
3279 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3280 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3281 KVMCLOCK_SYNC_PERIOD
);
3284 /* These helpers are safe iff @msr is known to be an MCx bank MSR. */
3285 static bool is_mci_control_msr(u32 msr
)
3287 return (msr
& 3) == 0;
3289 static bool is_mci_status_msr(u32 msr
)
3291 return (msr
& 3) == 1;
3295 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3297 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3299 /* McStatusWrEn enabled? */
3300 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3301 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3306 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3308 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3309 unsigned bank_num
= mcg_cap
& 0xff;
3310 u32 msr
= msr_info
->index
;
3311 u64 data
= msr_info
->data
;
3312 u32 offset
, last_msr
;
3315 case MSR_IA32_MCG_STATUS
:
3316 vcpu
->arch
.mcg_status
= data
;
3318 case MSR_IA32_MCG_CTL
:
3319 if (!(mcg_cap
& MCG_CTL_P
) &&
3320 (data
|| !msr_info
->host_initiated
))
3322 if (data
!= 0 && data
!= ~(u64
)0)
3324 vcpu
->arch
.mcg_ctl
= data
;
3326 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
3327 last_msr
= MSR_IA32_MCx_CTL2(bank_num
) - 1;
3331 if (!(mcg_cap
& MCG_CMCI_P
) && (data
|| !msr_info
->host_initiated
))
3333 /* An attempt to write a 1 to a reserved bit raises #GP */
3334 if (data
& ~(MCI_CTL2_CMCI_EN
| MCI_CTL2_CMCI_THRESHOLD_MASK
))
3336 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL2
,
3337 last_msr
+ 1 - MSR_IA32_MC0_CTL2
);
3338 vcpu
->arch
.mci_ctl2_banks
[offset
] = data
;
3340 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3341 last_msr
= MSR_IA32_MCx_CTL(bank_num
) - 1;
3346 * Only 0 or all 1s can be written to IA32_MCi_CTL, all other
3347 * values are architecturally undefined. But, some Linux
3348 * kernels clear bit 10 in bank 4 to workaround a BIOS/GART TLB
3349 * issue on AMD K8s, allow bit 10 to be clear when setting all
3350 * other bits in order to avoid an uncaught #GP in the guest.
3352 * UNIXWARE clears bit 0 of MC1_CTL to ignore correctable,
3353 * single-bit ECC data errors.
3355 if (is_mci_control_msr(msr
) &&
3356 data
!= 0 && (data
| (1 << 10) | 1) != ~(u64
)0)
3360 * All CPUs allow writing 0 to MCi_STATUS MSRs to clear the MSR.
3361 * AMD-based CPUs allow non-zero values, but if and only if
3362 * HWCR[McStatusWrEn] is set.
3364 if (!msr_info
->host_initiated
&& is_mci_status_msr(msr
) &&
3365 data
!= 0 && !can_set_mci_status(vcpu
))
3368 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL
,
3369 last_msr
+ 1 - MSR_IA32_MC0_CTL
);
3370 vcpu
->arch
.mce_banks
[offset
] = data
;
3378 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3380 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3382 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3385 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3387 gpa_t gpa
= data
& ~0x3f;
3389 /* Bits 4:5 are reserved, Should be zero */
3393 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3394 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3397 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3398 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3401 if (!lapic_in_kernel(vcpu
))
3402 return data
? 1 : 0;
3404 vcpu
->arch
.apf
.msr_en_val
= data
;
3406 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3407 kvm_clear_async_pf_completion_queue(vcpu
);
3408 kvm_async_pf_hash_reset(vcpu
);
3412 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3416 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3417 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3419 kvm_async_pf_wakeup_all(vcpu
);
3424 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3426 /* Bits 8-63 are reserved */
3430 if (!lapic_in_kernel(vcpu
))
3433 vcpu
->arch
.apf
.msr_int_val
= data
;
3435 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3440 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3442 kvm_gpc_deactivate(&vcpu
->arch
.pv_time
);
3443 vcpu
->arch
.time
= 0;
3446 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3448 ++vcpu
->stat
.tlb_flush
;
3449 static_call(kvm_x86_flush_tlb_all
)(vcpu
);
3451 /* Flushing all ASIDs flushes the current ASID... */
3452 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
3455 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3457 ++vcpu
->stat
.tlb_flush
;
3461 * A TLB flush on behalf of the guest is equivalent to
3462 * INVPCID(all), toggling CR4.PGE, etc., which requires
3463 * a forced sync of the shadow page tables. Ensure all the
3464 * roots are synced and the guest TLB in hardware is clean.
3466 kvm_mmu_sync_roots(vcpu
);
3467 kvm_mmu_sync_prev_roots(vcpu
);
3470 static_call(kvm_x86_flush_tlb_guest
)(vcpu
);
3473 * Flushing all "guest" TLB is always a superset of Hyper-V's fine
3476 kvm_hv_vcpu_purge_flush_tlb(vcpu
);
3480 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3482 ++vcpu
->stat
.tlb_flush
;
3483 static_call(kvm_x86_flush_tlb_current
)(vcpu
);
3487 * Service "local" TLB flush requests, which are specific to the current MMU
3488 * context. In addition to the generic event handling in vcpu_enter_guest(),
3489 * TLB flushes that are targeted at an MMU context also need to be serviced
3490 * prior before nested VM-Enter/VM-Exit.
3492 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3494 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3495 kvm_vcpu_flush_tlb_current(vcpu
);
3497 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3498 kvm_vcpu_flush_tlb_guest(vcpu
);
3500 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3502 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3504 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3505 struct kvm_steal_time __user
*st
;
3506 struct kvm_memslots
*slots
;
3507 gpa_t gpa
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3511 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3512 kvm_xen_runstate_set_running(vcpu
);
3516 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3519 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3522 slots
= kvm_memslots(vcpu
->kvm
);
3524 if (unlikely(slots
->generation
!= ghc
->generation
||
3526 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3527 /* We rely on the fact that it fits in a single page. */
3528 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3530 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gpa
, sizeof(*st
)) ||
3531 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3535 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3537 * Doing a TLB flush here, on the guest's behalf, can avoid
3540 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3541 u8 st_preempted
= 0;
3544 if (!user_access_begin(st
, sizeof(*st
)))
3547 asm volatile("1: xchgb %0, %2\n"
3550 _ASM_EXTABLE_UA(1b
, 2b
)
3551 : "+q" (st_preempted
),
3553 "+m" (st
->preempted
));
3559 vcpu
->arch
.st
.preempted
= 0;
3561 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3562 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3563 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3564 kvm_vcpu_flush_tlb_guest(vcpu
);
3566 if (!user_access_begin(st
, sizeof(*st
)))
3569 if (!user_access_begin(st
, sizeof(*st
)))
3572 unsafe_put_user(0, &st
->preempted
, out
);
3573 vcpu
->arch
.st
.preempted
= 0;
3576 unsafe_get_user(version
, &st
->version
, out
);
3578 version
+= 1; /* first time write, random junk */
3581 unsafe_put_user(version
, &st
->version
, out
);
3585 unsafe_get_user(steal
, &st
->steal
, out
);
3586 steal
+= current
->sched_info
.run_delay
-
3587 vcpu
->arch
.st
.last_steal
;
3588 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3589 unsafe_put_user(steal
, &st
->steal
, out
);
3592 unsafe_put_user(version
, &st
->version
, out
);
3597 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3600 static bool kvm_is_msr_to_save(u32 msr_index
)
3604 for (i
= 0; i
< num_msrs_to_save
; i
++) {
3605 if (msrs_to_save
[i
] == msr_index
)
3612 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3614 u32 msr
= msr_info
->index
;
3615 u64 data
= msr_info
->data
;
3617 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3618 return kvm_xen_write_hypercall_page(vcpu
, data
);
3621 case MSR_AMD64_NB_CFG
:
3622 case MSR_IA32_UCODE_WRITE
:
3623 case MSR_VM_HSAVE_PA
:
3624 case MSR_AMD64_PATCH_LOADER
:
3625 case MSR_AMD64_BU_CFG2
:
3626 case MSR_AMD64_DC_CFG
:
3627 case MSR_F15H_EX_CFG
:
3630 case MSR_IA32_UCODE_REV
:
3631 if (msr_info
->host_initiated
)
3632 vcpu
->arch
.microcode_version
= data
;
3634 case MSR_IA32_ARCH_CAPABILITIES
:
3635 if (!msr_info
->host_initiated
)
3637 vcpu
->arch
.arch_capabilities
= data
;
3639 case MSR_IA32_PERF_CAPABILITIES
:
3640 if (!msr_info
->host_initiated
)
3642 if (data
& ~kvm_caps
.supported_perf_cap
)
3646 * Note, this is not just a performance optimization! KVM
3647 * disallows changing feature MSRs after the vCPU has run; PMU
3648 * refresh will bug the VM if called after the vCPU has run.
3650 if (vcpu
->arch
.perf_capabilities
== data
)
3653 vcpu
->arch
.perf_capabilities
= data
;
3654 kvm_pmu_refresh(vcpu
);
3656 case MSR_IA32_PRED_CMD
:
3657 if (!msr_info
->host_initiated
&& !guest_has_pred_cmd_msr(vcpu
))
3660 if (!boot_cpu_has(X86_FEATURE_IBPB
) || (data
& ~PRED_CMD_IBPB
))
3665 wrmsrl(MSR_IA32_PRED_CMD
, PRED_CMD_IBPB
);
3667 case MSR_IA32_FLUSH_CMD
:
3668 if (!msr_info
->host_initiated
&&
3669 !guest_cpuid_has(vcpu
, X86_FEATURE_FLUSH_L1D
))
3672 if (!boot_cpu_has(X86_FEATURE_FLUSH_L1D
) || (data
& ~L1D_FLUSH
))
3677 wrmsrl(MSR_IA32_FLUSH_CMD
, L1D_FLUSH
);
3680 return set_efer(vcpu
, msr_info
);
3682 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3683 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3684 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3686 /* Handle McStatusWrEn */
3687 if (data
== BIT_ULL(18)) {
3688 vcpu
->arch
.msr_hwcr
= data
;
3689 } else if (data
!= 0) {
3690 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3694 case MSR_FAM10H_MMIO_CONF_BASE
:
3696 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3700 case MSR_IA32_CR_PAT
:
3701 if (!kvm_pat_valid(data
))
3704 vcpu
->arch
.pat
= data
;
3706 case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000
:
3707 case MSR_MTRRdefType
:
3708 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3709 case MSR_IA32_APICBASE
:
3710 return kvm_set_apic_base(vcpu
, msr_info
);
3711 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3712 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3713 case MSR_IA32_TSC_DEADLINE
:
3714 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3716 case MSR_IA32_TSC_ADJUST
:
3717 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3718 if (!msr_info
->host_initiated
) {
3719 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3720 adjust_tsc_offset_guest(vcpu
, adj
);
3721 /* Before back to guest, tsc_timestamp must be adjusted
3722 * as well, otherwise guest's percpu pvclock time could jump.
3724 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3726 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3729 case MSR_IA32_MISC_ENABLE
: {
3730 u64 old_val
= vcpu
->arch
.ia32_misc_enable_msr
;
3732 if (!msr_info
->host_initiated
) {
3734 if ((old_val
^ data
) & MSR_IA32_MISC_ENABLE_PMU_RO_MASK
)
3737 /* R bits, i.e. writes are ignored, but don't fault. */
3738 data
= data
& ~MSR_IA32_MISC_ENABLE_EMON
;
3739 data
|= old_val
& MSR_IA32_MISC_ENABLE_EMON
;
3742 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3743 ((old_val
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3744 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3746 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3747 kvm_update_cpuid_runtime(vcpu
);
3749 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3753 case MSR_IA32_SMBASE
:
3754 if (!IS_ENABLED(CONFIG_KVM_SMM
) || !msr_info
->host_initiated
)
3756 vcpu
->arch
.smbase
= data
;
3758 case MSR_IA32_POWER_CTL
:
3759 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3762 if (msr_info
->host_initiated
) {
3763 kvm_synchronize_tsc(vcpu
, data
);
3765 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3766 adjust_tsc_offset_guest(vcpu
, adj
);
3767 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3771 if (!msr_info
->host_initiated
&&
3772 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3775 * KVM supports exposing PT to the guest, but does not support
3776 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3777 * XSAVES/XRSTORS to save/restore PT MSRs.
3779 if (data
& ~kvm_caps
.supported_xss
)
3781 vcpu
->arch
.ia32_xss
= data
;
3782 kvm_update_cpuid_runtime(vcpu
);
3785 if (!msr_info
->host_initiated
)
3787 vcpu
->arch
.smi_count
= data
;
3789 case MSR_KVM_WALL_CLOCK_NEW
:
3790 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3793 vcpu
->kvm
->arch
.wall_clock
= data
;
3794 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3796 case MSR_KVM_WALL_CLOCK
:
3797 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3800 vcpu
->kvm
->arch
.wall_clock
= data
;
3801 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3803 case MSR_KVM_SYSTEM_TIME_NEW
:
3804 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3807 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3809 case MSR_KVM_SYSTEM_TIME
:
3810 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3813 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3815 case MSR_KVM_ASYNC_PF_EN
:
3816 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3819 if (kvm_pv_enable_async_pf(vcpu
, data
))
3822 case MSR_KVM_ASYNC_PF_INT
:
3823 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3826 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3829 case MSR_KVM_ASYNC_PF_ACK
:
3830 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3833 vcpu
->arch
.apf
.pageready_pending
= false;
3834 kvm_check_async_pf_completion(vcpu
);
3837 case MSR_KVM_STEAL_TIME
:
3838 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3841 if (unlikely(!sched_info_on()))
3844 if (data
& KVM_STEAL_RESERVED_MASK
)
3847 vcpu
->arch
.st
.msr_val
= data
;
3849 if (!(data
& KVM_MSR_ENABLED
))
3852 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3855 case MSR_KVM_PV_EOI_EN
:
3856 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3859 if (kvm_lapic_set_pv_eoi(vcpu
, data
, sizeof(u8
)))
3863 case MSR_KVM_POLL_CONTROL
:
3864 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3867 /* only enable bit supported */
3868 if (data
& (-1ULL << 1))
3871 vcpu
->arch
.msr_kvm_poll_control
= data
;
3874 case MSR_IA32_MCG_CTL
:
3875 case MSR_IA32_MCG_STATUS
:
3876 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3877 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
3878 return set_msr_mce(vcpu
, msr_info
);
3880 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3881 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3882 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3883 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3884 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3885 return kvm_pmu_set_msr(vcpu
, msr_info
);
3888 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3890 case MSR_K7_CLK_CTL
:
3892 * Ignore all writes to this no longer documented MSR.
3893 * Writes are only relevant for old K7 processors,
3894 * all pre-dating SVM, but a recommended workaround from
3895 * AMD for these chips. It is possible to specify the
3896 * affected processor models on the command line, hence
3897 * the need to ignore the workaround.
3900 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3901 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3902 case HV_X64_MSR_SYNDBG_OPTIONS
:
3903 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3904 case HV_X64_MSR_CRASH_CTL
:
3905 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3906 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3907 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3908 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3909 case HV_X64_MSR_TSC_INVARIANT_CONTROL
:
3910 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3911 msr_info
->host_initiated
);
3912 case MSR_IA32_BBL_CR_CTL3
:
3913 /* Drop writes to this legacy MSR -- see rdmsr
3914 * counterpart for further detail.
3916 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3918 case MSR_AMD64_OSVW_ID_LENGTH
:
3919 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3921 vcpu
->arch
.osvw
.length
= data
;
3923 case MSR_AMD64_OSVW_STATUS
:
3924 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3926 vcpu
->arch
.osvw
.status
= data
;
3928 case MSR_PLATFORM_INFO
:
3929 if (!msr_info
->host_initiated
||
3930 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3931 cpuid_fault_enabled(vcpu
)))
3933 vcpu
->arch
.msr_platform_info
= data
;
3935 case MSR_MISC_FEATURES_ENABLES
:
3936 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3937 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3938 !supports_cpuid_fault(vcpu
)))
3940 vcpu
->arch
.msr_misc_features_enables
= data
;
3942 #ifdef CONFIG_X86_64
3944 if (!msr_info
->host_initiated
&&
3945 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
3948 if (data
& ~kvm_guest_supported_xfd(vcpu
))
3951 fpu_update_guest_xfd(&vcpu
->arch
.guest_fpu
, data
);
3953 case MSR_IA32_XFD_ERR
:
3954 if (!msr_info
->host_initiated
&&
3955 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
3958 if (data
& ~kvm_guest_supported_xfd(vcpu
))
3961 vcpu
->arch
.guest_fpu
.xfd_err
= data
;
3965 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3966 return kvm_pmu_set_msr(vcpu
, msr_info
);
3969 * Userspace is allowed to write '0' to MSRs that KVM reports
3970 * as to-be-saved, even if an MSRs isn't fully supported.
3972 if (msr_info
->host_initiated
&& !data
&&
3973 kvm_is_msr_to_save(msr
))
3976 return KVM_MSR_RET_INVALID
;
3980 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3982 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3985 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3986 unsigned bank_num
= mcg_cap
& 0xff;
3987 u32 offset
, last_msr
;
3990 case MSR_IA32_P5_MC_ADDR
:
3991 case MSR_IA32_P5_MC_TYPE
:
3994 case MSR_IA32_MCG_CAP
:
3995 data
= vcpu
->arch
.mcg_cap
;
3997 case MSR_IA32_MCG_CTL
:
3998 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
4000 data
= vcpu
->arch
.mcg_ctl
;
4002 case MSR_IA32_MCG_STATUS
:
4003 data
= vcpu
->arch
.mcg_status
;
4005 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4006 last_msr
= MSR_IA32_MCx_CTL2(bank_num
) - 1;
4010 if (!(mcg_cap
& MCG_CMCI_P
) && !host
)
4012 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL2
,
4013 last_msr
+ 1 - MSR_IA32_MC0_CTL2
);
4014 data
= vcpu
->arch
.mci_ctl2_banks
[offset
];
4016 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4017 last_msr
= MSR_IA32_MCx_CTL(bank_num
) - 1;
4021 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL
,
4022 last_msr
+ 1 - MSR_IA32_MC0_CTL
);
4023 data
= vcpu
->arch
.mce_banks
[offset
];
4032 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
4034 switch (msr_info
->index
) {
4035 case MSR_IA32_PLATFORM_ID
:
4036 case MSR_IA32_EBL_CR_POWERON
:
4037 case MSR_IA32_LASTBRANCHFROMIP
:
4038 case MSR_IA32_LASTBRANCHTOIP
:
4039 case MSR_IA32_LASTINTFROMIP
:
4040 case MSR_IA32_LASTINTTOIP
:
4041 case MSR_AMD64_SYSCFG
:
4042 case MSR_K8_TSEG_ADDR
:
4043 case MSR_K8_TSEG_MASK
:
4044 case MSR_VM_HSAVE_PA
:
4045 case MSR_K8_INT_PENDING_MSG
:
4046 case MSR_AMD64_NB_CFG
:
4047 case MSR_FAM10H_MMIO_CONF_BASE
:
4048 case MSR_AMD64_BU_CFG2
:
4049 case MSR_IA32_PERF_CTL
:
4050 case MSR_AMD64_DC_CFG
:
4051 case MSR_F15H_EX_CFG
:
4053 * Intel Sandy Bridge CPUs must support the RAPL (running average power
4054 * limit) MSRs. Just return 0, as we do not want to expose the host
4055 * data here. Do not conditionalize this on CPUID, as KVM does not do
4056 * so for existing CPU-specific MSRs.
4058 case MSR_RAPL_POWER_UNIT
:
4059 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
4060 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
4061 case MSR_PKG_ENERGY_STATUS
: /* Total package */
4062 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
4065 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
4066 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
4067 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
4068 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
4069 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4070 return kvm_pmu_get_msr(vcpu
, msr_info
);
4073 case MSR_IA32_UCODE_REV
:
4074 msr_info
->data
= vcpu
->arch
.microcode_version
;
4076 case MSR_IA32_ARCH_CAPABILITIES
:
4077 if (!msr_info
->host_initiated
&&
4078 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
4080 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
4082 case MSR_IA32_PERF_CAPABILITIES
:
4083 if (!msr_info
->host_initiated
&&
4084 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
4086 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
4088 case MSR_IA32_POWER_CTL
:
4089 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
4091 case MSR_IA32_TSC
: {
4093 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
4094 * even when not intercepted. AMD manual doesn't explicitly
4095 * state this but appears to behave the same.
4097 * On userspace reads and writes, however, we unconditionally
4098 * return L1's TSC value to ensure backwards-compatible
4099 * behavior for migration.
4103 if (msr_info
->host_initiated
) {
4104 offset
= vcpu
->arch
.l1_tsc_offset
;
4105 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
4107 offset
= vcpu
->arch
.tsc_offset
;
4108 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
4111 msr_info
->data
= kvm_scale_tsc(rdtsc(), ratio
) + offset
;
4114 case MSR_IA32_CR_PAT
:
4115 msr_info
->data
= vcpu
->arch
.pat
;
4118 case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000
:
4119 case MSR_MTRRdefType
:
4120 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
4121 case 0xcd: /* fsb frequency */
4125 * MSR_EBC_FREQUENCY_ID
4126 * Conservative value valid for even the basic CPU models.
4127 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
4128 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
4129 * and 266MHz for model 3, or 4. Set Core Clock
4130 * Frequency to System Bus Frequency Ratio to 1 (bits
4131 * 31:24) even though these are only valid for CPU
4132 * models > 2, however guests may end up dividing or
4133 * multiplying by zero otherwise.
4135 case MSR_EBC_FREQUENCY_ID
:
4136 msr_info
->data
= 1 << 24;
4138 case MSR_IA32_APICBASE
:
4139 msr_info
->data
= kvm_get_apic_base(vcpu
);
4141 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
4142 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
4143 case MSR_IA32_TSC_DEADLINE
:
4144 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
4146 case MSR_IA32_TSC_ADJUST
:
4147 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
4149 case MSR_IA32_MISC_ENABLE
:
4150 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
4152 case MSR_IA32_SMBASE
:
4153 if (!IS_ENABLED(CONFIG_KVM_SMM
) || !msr_info
->host_initiated
)
4155 msr_info
->data
= vcpu
->arch
.smbase
;
4158 msr_info
->data
= vcpu
->arch
.smi_count
;
4160 case MSR_IA32_PERF_STATUS
:
4161 /* TSC increment by tick */
4162 msr_info
->data
= 1000ULL;
4163 /* CPU multiplier */
4164 msr_info
->data
|= (((uint64_t)4ULL) << 40);
4167 msr_info
->data
= vcpu
->arch
.efer
;
4169 case MSR_KVM_WALL_CLOCK
:
4170 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
4173 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
4175 case MSR_KVM_WALL_CLOCK_NEW
:
4176 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
4179 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
4181 case MSR_KVM_SYSTEM_TIME
:
4182 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
4185 msr_info
->data
= vcpu
->arch
.time
;
4187 case MSR_KVM_SYSTEM_TIME_NEW
:
4188 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
4191 msr_info
->data
= vcpu
->arch
.time
;
4193 case MSR_KVM_ASYNC_PF_EN
:
4194 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
4197 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
4199 case MSR_KVM_ASYNC_PF_INT
:
4200 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4203 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
4205 case MSR_KVM_ASYNC_PF_ACK
:
4206 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4211 case MSR_KVM_STEAL_TIME
:
4212 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
4215 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
4217 case MSR_KVM_PV_EOI_EN
:
4218 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
4221 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
4223 case MSR_KVM_POLL_CONTROL
:
4224 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
4227 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
4229 case MSR_IA32_P5_MC_ADDR
:
4230 case MSR_IA32_P5_MC_TYPE
:
4231 case MSR_IA32_MCG_CAP
:
4232 case MSR_IA32_MCG_CTL
:
4233 case MSR_IA32_MCG_STATUS
:
4234 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4235 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4236 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
4237 msr_info
->host_initiated
);
4239 if (!msr_info
->host_initiated
&&
4240 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
4242 msr_info
->data
= vcpu
->arch
.ia32_xss
;
4244 case MSR_K7_CLK_CTL
:
4246 * Provide expected ramp-up count for K7. All other
4247 * are set to zero, indicating minimum divisors for
4250 * This prevents guest kernels on AMD host with CPU
4251 * type 6, model 8 and higher from exploding due to
4252 * the rdmsr failing.
4254 msr_info
->data
= 0x20000000;
4256 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
4257 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
4258 case HV_X64_MSR_SYNDBG_OPTIONS
:
4259 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
4260 case HV_X64_MSR_CRASH_CTL
:
4261 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
4262 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
4263 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
4264 case HV_X64_MSR_TSC_EMULATION_STATUS
:
4265 case HV_X64_MSR_TSC_INVARIANT_CONTROL
:
4266 return kvm_hv_get_msr_common(vcpu
,
4267 msr_info
->index
, &msr_info
->data
,
4268 msr_info
->host_initiated
);
4269 case MSR_IA32_BBL_CR_CTL3
:
4270 /* This legacy MSR exists but isn't fully documented in current
4271 * silicon. It is however accessed by winxp in very narrow
4272 * scenarios where it sets bit #19, itself documented as
4273 * a "reserved" bit. Best effort attempt to source coherent
4274 * read data here should the balance of the register be
4275 * interpreted by the guest:
4277 * L2 cache control register 3: 64GB range, 256KB size,
4278 * enabled, latency 0x1, configured
4280 msr_info
->data
= 0xbe702111;
4282 case MSR_AMD64_OSVW_ID_LENGTH
:
4283 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4285 msr_info
->data
= vcpu
->arch
.osvw
.length
;
4287 case MSR_AMD64_OSVW_STATUS
:
4288 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4290 msr_info
->data
= vcpu
->arch
.osvw
.status
;
4292 case MSR_PLATFORM_INFO
:
4293 if (!msr_info
->host_initiated
&&
4294 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
4296 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
4298 case MSR_MISC_FEATURES_ENABLES
:
4299 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
4302 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
4304 #ifdef CONFIG_X86_64
4306 if (!msr_info
->host_initiated
&&
4307 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4310 msr_info
->data
= vcpu
->arch
.guest_fpu
.fpstate
->xfd
;
4312 case MSR_IA32_XFD_ERR
:
4313 if (!msr_info
->host_initiated
&&
4314 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4317 msr_info
->data
= vcpu
->arch
.guest_fpu
.xfd_err
;
4321 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4322 return kvm_pmu_get_msr(vcpu
, msr_info
);
4325 * Userspace is allowed to read MSRs that KVM reports as
4326 * to-be-saved, even if an MSR isn't fully supported.
4328 if (msr_info
->host_initiated
&&
4329 kvm_is_msr_to_save(msr_info
->index
)) {
4334 return KVM_MSR_RET_INVALID
;
4338 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
4341 * Read or write a bunch of msrs. All parameters are kernel addresses.
4343 * @return number of msrs set successfully.
4345 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
4346 struct kvm_msr_entry
*entries
,
4347 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4348 unsigned index
, u64
*data
))
4352 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
4353 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
4360 * Read or write a bunch of msrs. Parameters are user addresses.
4362 * @return number of msrs set successfully.
4364 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
4365 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4366 unsigned index
, u64
*data
),
4369 struct kvm_msrs msrs
;
4370 struct kvm_msr_entry
*entries
;
4375 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
4379 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
4382 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
4383 entries
= memdup_user(user_msrs
->entries
, size
);
4384 if (IS_ERR(entries
)) {
4385 r
= PTR_ERR(entries
);
4389 r
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4391 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4399 static inline bool kvm_can_mwait_in_guest(void)
4401 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4402 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4403 boot_cpu_has(X86_FEATURE_ARAT
);
4406 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4407 struct kvm_cpuid2 __user
*cpuid_arg
)
4409 struct kvm_cpuid2 cpuid
;
4413 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4416 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4421 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4427 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4432 case KVM_CAP_IRQCHIP
:
4434 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4435 case KVM_CAP_SET_TSS_ADDR
:
4436 case KVM_CAP_EXT_CPUID
:
4437 case KVM_CAP_EXT_EMUL_CPUID
:
4438 case KVM_CAP_CLOCKSOURCE
:
4440 case KVM_CAP_NOP_IO_DELAY
:
4441 case KVM_CAP_MP_STATE
:
4442 case KVM_CAP_SYNC_MMU
:
4443 case KVM_CAP_USER_NMI
:
4444 case KVM_CAP_REINJECT_CONTROL
:
4445 case KVM_CAP_IRQ_INJECT_STATUS
:
4446 case KVM_CAP_IOEVENTFD
:
4447 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4449 case KVM_CAP_PIT_STATE2
:
4450 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4451 case KVM_CAP_VCPU_EVENTS
:
4452 case KVM_CAP_HYPERV
:
4453 case KVM_CAP_HYPERV_VAPIC
:
4454 case KVM_CAP_HYPERV_SPIN
:
4455 case KVM_CAP_HYPERV_SYNIC
:
4456 case KVM_CAP_HYPERV_SYNIC2
:
4457 case KVM_CAP_HYPERV_VP_INDEX
:
4458 case KVM_CAP_HYPERV_EVENTFD
:
4459 case KVM_CAP_HYPERV_TLBFLUSH
:
4460 case KVM_CAP_HYPERV_SEND_IPI
:
4461 case KVM_CAP_HYPERV_CPUID
:
4462 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4463 case KVM_CAP_SYS_HYPERV_CPUID
:
4464 case KVM_CAP_PCI_SEGMENT
:
4465 case KVM_CAP_DEBUGREGS
:
4466 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4468 case KVM_CAP_ASYNC_PF
:
4469 case KVM_CAP_ASYNC_PF_INT
:
4470 case KVM_CAP_GET_TSC_KHZ
:
4471 case KVM_CAP_KVMCLOCK_CTRL
:
4472 case KVM_CAP_READONLY_MEM
:
4473 case KVM_CAP_HYPERV_TIME
:
4474 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4475 case KVM_CAP_TSC_DEADLINE_TIMER
:
4476 case KVM_CAP_DISABLE_QUIRKS
:
4477 case KVM_CAP_SET_BOOT_CPU_ID
:
4478 case KVM_CAP_SPLIT_IRQCHIP
:
4479 case KVM_CAP_IMMEDIATE_EXIT
:
4480 case KVM_CAP_PMU_EVENT_FILTER
:
4481 case KVM_CAP_PMU_EVENT_MASKED_EVENTS
:
4482 case KVM_CAP_GET_MSR_FEATURES
:
4483 case KVM_CAP_MSR_PLATFORM_INFO
:
4484 case KVM_CAP_EXCEPTION_PAYLOAD
:
4485 case KVM_CAP_X86_TRIPLE_FAULT_EVENT
:
4486 case KVM_CAP_SET_GUEST_DEBUG
:
4487 case KVM_CAP_LAST_CPU
:
4488 case KVM_CAP_X86_USER_SPACE_MSR
:
4489 case KVM_CAP_X86_MSR_FILTER
:
4490 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4491 #ifdef CONFIG_X86_SGX_KVM
4492 case KVM_CAP_SGX_ATTRIBUTE
:
4494 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4495 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
4496 case KVM_CAP_SREGS2
:
4497 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4498 case KVM_CAP_VCPU_ATTRIBUTES
:
4499 case KVM_CAP_SYS_ATTRIBUTES
:
4501 case KVM_CAP_ENABLE_CAP
:
4502 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES
:
4503 case KVM_CAP_IRQFD_RESAMPLE
:
4506 case KVM_CAP_EXIT_HYPERCALL
:
4507 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4509 case KVM_CAP_SET_GUEST_DEBUG2
:
4510 return KVM_GUESTDBG_VALID_MASK
;
4511 #ifdef CONFIG_KVM_XEN
4512 case KVM_CAP_XEN_HVM
:
4513 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4514 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4515 KVM_XEN_HVM_CONFIG_SHARED_INFO
|
4516 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL
|
4517 KVM_XEN_HVM_CONFIG_EVTCHN_SEND
;
4518 if (sched_info_on())
4519 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
|
4520 KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG
;
4523 case KVM_CAP_SYNC_REGS
:
4524 r
= KVM_SYNC_X86_VALID_FIELDS
;
4526 case KVM_CAP_ADJUST_CLOCK
:
4527 r
= KVM_CLOCK_VALID_FLAGS
;
4529 case KVM_CAP_X86_DISABLE_EXITS
:
4530 r
= KVM_X86_DISABLE_EXITS_PAUSE
;
4532 if (!mitigate_smt_rsb
) {
4533 r
|= KVM_X86_DISABLE_EXITS_HLT
|
4534 KVM_X86_DISABLE_EXITS_CSTATE
;
4536 if (kvm_can_mwait_in_guest())
4537 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4540 case KVM_CAP_X86_SMM
:
4541 if (!IS_ENABLED(CONFIG_KVM_SMM
))
4544 /* SMBASE is usually relocated above 1M on modern chipsets,
4545 * and SMM handlers might indeed rely on 4G segment limits,
4546 * so do not report SMM to be available if real mode is
4547 * emulated via vm86 mode. Still, do not go to great lengths
4548 * to avoid userspace's usage of the feature, because it is a
4549 * fringe case that is not enabled except via specific settings
4550 * of the module parameters.
4552 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4554 case KVM_CAP_NR_VCPUS
:
4555 r
= min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS
);
4557 case KVM_CAP_MAX_VCPUS
:
4560 case KVM_CAP_MAX_VCPU_ID
:
4561 r
= KVM_MAX_VCPU_IDS
;
4563 case KVM_CAP_PV_MMU
: /* obsolete */
4567 r
= KVM_MAX_MCE_BANKS
;
4570 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4572 case KVM_CAP_TSC_CONTROL
:
4573 case KVM_CAP_VM_TSC_CONTROL
:
4574 r
= kvm_caps
.has_tsc_control
;
4576 case KVM_CAP_X2APIC_API
:
4577 r
= KVM_X2APIC_API_VALID_FLAGS
;
4579 case KVM_CAP_NESTED_STATE
:
4580 r
= kvm_x86_ops
.nested_ops
->get_state
?
4581 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4583 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4584 r
= kvm_x86_ops
.enable_l2_tlb_flush
!= NULL
;
4586 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4587 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4589 case KVM_CAP_SMALLER_MAXPHYADDR
:
4590 r
= (int) allow_smaller_maxphyaddr
;
4592 case KVM_CAP_STEAL_TIME
:
4593 r
= sched_info_on();
4595 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4596 if (kvm_caps
.has_bus_lock_exit
)
4597 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4598 KVM_BUS_LOCK_DETECTION_EXIT
;
4602 case KVM_CAP_XSAVE2
: {
4603 r
= xstate_required_size(kvm_get_filtered_xcr0(), false);
4604 if (r
< sizeof(struct kvm_xsave
))
4605 r
= sizeof(struct kvm_xsave
);
4608 case KVM_CAP_PMU_CAPABILITY
:
4609 r
= enable_pmu
? KVM_CAP_PMU_VALID_MASK
: 0;
4611 case KVM_CAP_DISABLE_QUIRKS2
:
4612 r
= KVM_X86_VALID_QUIRKS
;
4614 case KVM_CAP_X86_NOTIFY_VMEXIT
:
4615 r
= kvm_caps
.has_notify_vmexit
;
4623 static inline void __user
*kvm_get_attr_addr(struct kvm_device_attr
*attr
)
4625 void __user
*uaddr
= (void __user
*)(unsigned long)attr
->addr
;
4627 if ((u64
)(unsigned long)uaddr
!= attr
->addr
)
4628 return ERR_PTR_USR(-EFAULT
);
4632 static int kvm_x86_dev_get_attr(struct kvm_device_attr
*attr
)
4634 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
4640 return PTR_ERR(uaddr
);
4642 switch (attr
->attr
) {
4643 case KVM_X86_XCOMP_GUEST_SUPP
:
4644 if (put_user(kvm_caps
.supported_xcr0
, uaddr
))
4653 static int kvm_x86_dev_has_attr(struct kvm_device_attr
*attr
)
4658 switch (attr
->attr
) {
4659 case KVM_X86_XCOMP_GUEST_SUPP
:
4666 long kvm_arch_dev_ioctl(struct file
*filp
,
4667 unsigned int ioctl
, unsigned long arg
)
4669 void __user
*argp
= (void __user
*)arg
;
4673 case KVM_GET_MSR_INDEX_LIST
: {
4674 struct kvm_msr_list __user
*user_msr_list
= argp
;
4675 struct kvm_msr_list msr_list
;
4679 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4682 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4683 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4686 if (n
< msr_list
.nmsrs
)
4689 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4690 num_msrs_to_save
* sizeof(u32
)))
4692 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4694 num_emulated_msrs
* sizeof(u32
)))
4699 case KVM_GET_SUPPORTED_CPUID
:
4700 case KVM_GET_EMULATED_CPUID
: {
4701 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4702 struct kvm_cpuid2 cpuid
;
4705 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4708 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4714 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4719 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4721 if (copy_to_user(argp
, &kvm_caps
.supported_mce_cap
,
4722 sizeof(kvm_caps
.supported_mce_cap
)))
4726 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4727 struct kvm_msr_list __user
*user_msr_list
= argp
;
4728 struct kvm_msr_list msr_list
;
4732 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4735 msr_list
.nmsrs
= num_msr_based_features
;
4736 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4739 if (n
< msr_list
.nmsrs
)
4742 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4743 num_msr_based_features
* sizeof(u32
)))
4749 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4751 case KVM_GET_SUPPORTED_HV_CPUID
:
4752 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4754 case KVM_GET_DEVICE_ATTR
: {
4755 struct kvm_device_attr attr
;
4757 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4759 r
= kvm_x86_dev_get_attr(&attr
);
4762 case KVM_HAS_DEVICE_ATTR
: {
4763 struct kvm_device_attr attr
;
4765 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4767 r
= kvm_x86_dev_has_attr(&attr
);
4778 static void wbinvd_ipi(void *garbage
)
4783 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4785 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4788 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4790 /* Address WBINVD may be executed by guest */
4791 if (need_emulate_wbinvd(vcpu
)) {
4792 if (static_call(kvm_x86_has_wbinvd_exit
)())
4793 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4794 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4795 smp_call_function_single(vcpu
->cpu
,
4796 wbinvd_ipi
, NULL
, 1);
4799 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4801 /* Save host pkru register if supported */
4802 vcpu
->arch
.host_pkru
= read_pkru();
4804 /* Apply any externally detected TSC adjustments (due to suspend) */
4805 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4806 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4807 vcpu
->arch
.tsc_offset_adjustment
= 0;
4808 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4811 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4812 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4813 rdtsc() - vcpu
->arch
.last_host_tsc
;
4815 mark_tsc_unstable("KVM discovered backwards TSC");
4817 if (kvm_check_tsc_unstable()) {
4818 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4819 vcpu
->arch
.last_guest_tsc
);
4820 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4821 vcpu
->arch
.tsc_catchup
= 1;
4824 if (kvm_lapic_hv_timer_in_use(vcpu
))
4825 kvm_lapic_restart_hv_timer(vcpu
);
4828 * On a host with synchronized TSC, there is no need to update
4829 * kvmclock on vcpu->cpu migration
4831 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4832 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4833 if (vcpu
->cpu
!= cpu
)
4834 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4838 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4841 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4843 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4844 struct kvm_steal_time __user
*st
;
4845 struct kvm_memslots
*slots
;
4846 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4847 gpa_t gpa
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
4850 * The vCPU can be marked preempted if and only if the VM-Exit was on
4851 * an instruction boundary and will not trigger guest emulation of any
4852 * kind (see vcpu_run). Vendor specific code controls (conservatively)
4853 * when this is true, for example allowing the vCPU to be marked
4854 * preempted if and only if the VM-Exit was due to a host interrupt.
4856 if (!vcpu
->arch
.at_instruction_boundary
) {
4857 vcpu
->stat
.preemption_other
++;
4861 vcpu
->stat
.preemption_reported
++;
4862 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4865 if (vcpu
->arch
.st
.preempted
)
4868 /* This happens on process exit */
4869 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4872 slots
= kvm_memslots(vcpu
->kvm
);
4874 if (unlikely(slots
->generation
!= ghc
->generation
||
4876 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4879 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4880 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4882 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4883 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4885 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4888 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4892 if (vcpu
->preempted
) {
4893 if (!vcpu
->arch
.guest_state_protected
)
4894 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4897 * Take the srcu lock as memslots will be accessed to check the gfn
4898 * cache generation against the memslots generation.
4900 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4901 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4902 kvm_xen_runstate_set_preempted(vcpu
);
4904 kvm_steal_time_set_preempted(vcpu
);
4905 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4908 static_call(kvm_x86_vcpu_put
)(vcpu
);
4909 vcpu
->arch
.last_host_tsc
= rdtsc();
4912 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4913 struct kvm_lapic_state
*s
)
4915 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
4917 return kvm_apic_get_state(vcpu
, s
);
4920 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4921 struct kvm_lapic_state
*s
)
4925 r
= kvm_apic_set_state(vcpu
, s
);
4928 update_cr8_intercept(vcpu
);
4933 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4936 * We can accept userspace's request for interrupt injection
4937 * as long as we have a place to store the interrupt number.
4938 * The actual injection will happen when the CPU is able to
4939 * deliver the interrupt.
4941 if (kvm_cpu_has_extint(vcpu
))
4944 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4945 return (!lapic_in_kernel(vcpu
) ||
4946 kvm_apic_accept_pic_intr(vcpu
));
4949 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4952 * Do not cause an interrupt window exit if an exception
4953 * is pending or an event needs reinjection; userspace
4954 * might want to inject the interrupt manually using KVM_SET_REGS
4955 * or KVM_SET_SREGS. For that to work, we must be at an
4956 * instruction boundary and with no events half-injected.
4958 return (kvm_arch_interrupt_allowed(vcpu
) &&
4959 kvm_cpu_accept_dm_intr(vcpu
) &&
4960 !kvm_event_needs_reinjection(vcpu
) &&
4961 !kvm_is_exception_pending(vcpu
));
4964 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4965 struct kvm_interrupt
*irq
)
4967 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4970 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4971 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4972 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4977 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4978 * fail for in-kernel 8259.
4980 if (pic_in_kernel(vcpu
->kvm
))
4983 if (vcpu
->arch
.pending_external_vector
!= -1)
4986 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4987 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4991 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4993 kvm_inject_nmi(vcpu
);
4998 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4999 struct kvm_tpr_access_ctl
*tac
)
5003 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
5007 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
5011 unsigned bank_num
= mcg_cap
& 0xff, bank
;
5014 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
5016 if (mcg_cap
& ~(kvm_caps
.supported_mce_cap
| 0xff | 0xff0000))
5019 vcpu
->arch
.mcg_cap
= mcg_cap
;
5020 /* Init IA32_MCG_CTL to all 1s */
5021 if (mcg_cap
& MCG_CTL_P
)
5022 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
5023 /* Init IA32_MCi_CTL to all 1s, IA32_MCi_CTL2 to all 0s */
5024 for (bank
= 0; bank
< bank_num
; bank
++) {
5025 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
5026 if (mcg_cap
& MCG_CMCI_P
)
5027 vcpu
->arch
.mci_ctl2_banks
[bank
] = 0;
5030 kvm_apic_after_set_mcg_cap(vcpu
);
5032 static_call(kvm_x86_setup_mce
)(vcpu
);
5038 * Validate this is an UCNA (uncorrectable no action) error by checking the
5039 * MCG_STATUS and MCi_STATUS registers:
5040 * - none of the bits for Machine Check Exceptions are set
5041 * - both the VAL (valid) and UC (uncorrectable) bits are set
5042 * MCI_STATUS_PCC - Processor Context Corrupted
5043 * MCI_STATUS_S - Signaled as a Machine Check Exception
5044 * MCI_STATUS_AR - Software recoverable Action Required
5046 static bool is_ucna(struct kvm_x86_mce
*mce
)
5048 return !mce
->mcg_status
&&
5049 !(mce
->status
& (MCI_STATUS_PCC
| MCI_STATUS_S
| MCI_STATUS_AR
)) &&
5050 (mce
->status
& MCI_STATUS_VAL
) &&
5051 (mce
->status
& MCI_STATUS_UC
);
5054 static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu
*vcpu
, struct kvm_x86_mce
*mce
, u64
* banks
)
5056 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
5058 banks
[1] = mce
->status
;
5059 banks
[2] = mce
->addr
;
5060 banks
[3] = mce
->misc
;
5061 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
5063 if (!(mcg_cap
& MCG_CMCI_P
) ||
5064 !(vcpu
->arch
.mci_ctl2_banks
[mce
->bank
] & MCI_CTL2_CMCI_EN
))
5067 if (lapic_in_kernel(vcpu
))
5068 kvm_apic_local_deliver(vcpu
->arch
.apic
, APIC_LVTCMCI
);
5073 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
5074 struct kvm_x86_mce
*mce
)
5076 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
5077 unsigned bank_num
= mcg_cap
& 0xff;
5078 u64
*banks
= vcpu
->arch
.mce_banks
;
5080 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
5083 banks
+= array_index_nospec(4 * mce
->bank
, 4 * bank_num
);
5086 return kvm_vcpu_x86_set_ucna(vcpu
, mce
, banks
);
5089 * if IA32_MCG_CTL is not all 1s, the uncorrected error
5090 * reporting is disabled
5092 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
5093 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
5096 * if IA32_MCi_CTL is not all 1s, the uncorrected error
5097 * reporting is disabled for the bank
5099 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
5101 if (mce
->status
& MCI_STATUS_UC
) {
5102 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
5103 !kvm_is_cr4_bit_set(vcpu
, X86_CR4_MCE
)) {
5104 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5107 if (banks
[1] & MCI_STATUS_VAL
)
5108 mce
->status
|= MCI_STATUS_OVER
;
5109 banks
[2] = mce
->addr
;
5110 banks
[3] = mce
->misc
;
5111 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
5112 banks
[1] = mce
->status
;
5113 kvm_queue_exception(vcpu
, MC_VECTOR
);
5114 } else if (!(banks
[1] & MCI_STATUS_VAL
)
5115 || !(banks
[1] & MCI_STATUS_UC
)) {
5116 if (banks
[1] & MCI_STATUS_VAL
)
5117 mce
->status
|= MCI_STATUS_OVER
;
5118 banks
[2] = mce
->addr
;
5119 banks
[3] = mce
->misc
;
5120 banks
[1] = mce
->status
;
5122 banks
[1] |= MCI_STATUS_OVER
;
5126 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
5127 struct kvm_vcpu_events
*events
)
5129 struct kvm_queued_exception
*ex
;
5133 #ifdef CONFIG_KVM_SMM
5134 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
5139 * KVM's ABI only allows for one exception to be migrated. Luckily,
5140 * the only time there can be two queued exceptions is if there's a
5141 * non-exiting _injected_ exception, and a pending exiting exception.
5142 * In that case, ignore the VM-Exiting exception as it's an extension
5143 * of the injected exception.
5145 if (vcpu
->arch
.exception_vmexit
.pending
&&
5146 !vcpu
->arch
.exception
.pending
&&
5147 !vcpu
->arch
.exception
.injected
)
5148 ex
= &vcpu
->arch
.exception_vmexit
;
5150 ex
= &vcpu
->arch
.exception
;
5153 * In guest mode, payload delivery should be deferred if the exception
5154 * will be intercepted by L1, e.g. KVM should not modifying CR2 if L1
5155 * intercepts #PF, ditto for DR6 and #DBs. If the per-VM capability,
5156 * KVM_CAP_EXCEPTION_PAYLOAD, is not set, userspace may or may not
5157 * propagate the payload and so it cannot be safely deferred. Deliver
5158 * the payload if the capability hasn't been requested.
5160 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
5161 ex
->pending
&& ex
->has_payload
)
5162 kvm_deliver_exception_payload(vcpu
, ex
);
5164 memset(events
, 0, sizeof(*events
));
5167 * The API doesn't provide the instruction length for software
5168 * exceptions, so don't report them. As long as the guest RIP
5169 * isn't advanced, we should expect to encounter the exception
5172 if (!kvm_exception_is_soft(ex
->vector
)) {
5173 events
->exception
.injected
= ex
->injected
;
5174 events
->exception
.pending
= ex
->pending
;
5176 * For ABI compatibility, deliberately conflate
5177 * pending and injected exceptions when
5178 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
5180 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
5181 events
->exception
.injected
|= ex
->pending
;
5183 events
->exception
.nr
= ex
->vector
;
5184 events
->exception
.has_error_code
= ex
->has_error_code
;
5185 events
->exception
.error_code
= ex
->error_code
;
5186 events
->exception_has_payload
= ex
->has_payload
;
5187 events
->exception_payload
= ex
->payload
;
5189 events
->interrupt
.injected
=
5190 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
5191 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
5192 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
5194 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
5195 events
->nmi
.pending
= kvm_get_nr_pending_nmis(vcpu
);
5196 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
5198 /* events->sipi_vector is never valid when reporting to user space */
5200 #ifdef CONFIG_KVM_SMM
5201 events
->smi
.smm
= is_smm(vcpu
);
5202 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
5203 events
->smi
.smm_inside_nmi
=
5204 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
5206 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
5208 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
5209 | KVM_VCPUEVENT_VALID_SHADOW
5210 | KVM_VCPUEVENT_VALID_SMM
);
5211 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
5212 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
5213 if (vcpu
->kvm
->arch
.triple_fault_event
) {
5214 events
->triple_fault
.pending
= kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5215 events
->flags
|= KVM_VCPUEVENT_VALID_TRIPLE_FAULT
;
5219 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
5220 struct kvm_vcpu_events
*events
)
5222 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
5223 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
5224 | KVM_VCPUEVENT_VALID_SHADOW
5225 | KVM_VCPUEVENT_VALID_SMM
5226 | KVM_VCPUEVENT_VALID_PAYLOAD
5227 | KVM_VCPUEVENT_VALID_TRIPLE_FAULT
))
5230 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
5231 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
5233 if (events
->exception
.pending
)
5234 events
->exception
.injected
= 0;
5236 events
->exception_has_payload
= 0;
5238 events
->exception
.pending
= 0;
5239 events
->exception_has_payload
= 0;
5242 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
5243 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
5246 /* INITs are latched while in SMM */
5247 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
5248 (events
->smi
.smm
|| events
->smi
.pending
) &&
5249 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
5255 * Flag that userspace is stuffing an exception, the next KVM_RUN will
5256 * morph the exception to a VM-Exit if appropriate. Do this only for
5257 * pending exceptions, already-injected exceptions are not subject to
5258 * intercpetion. Note, userspace that conflates pending and injected
5259 * is hosed, and will incorrectly convert an injected exception into a
5260 * pending exception, which in turn may cause a spurious VM-Exit.
5262 vcpu
->arch
.exception_from_userspace
= events
->exception
.pending
;
5264 vcpu
->arch
.exception_vmexit
.pending
= false;
5266 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
5267 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
5268 vcpu
->arch
.exception
.vector
= events
->exception
.nr
;
5269 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
5270 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
5271 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
5272 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
5274 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
5275 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
5276 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
5277 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
5278 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
5279 events
->interrupt
.shadow
);
5281 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
5282 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
) {
5283 vcpu
->arch
.nmi_pending
= 0;
5284 atomic_set(&vcpu
->arch
.nmi_queued
, events
->nmi
.pending
);
5285 kvm_make_request(KVM_REQ_NMI
, vcpu
);
5287 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
5289 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
5290 lapic_in_kernel(vcpu
))
5291 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
5293 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
5294 #ifdef CONFIG_KVM_SMM
5295 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
5296 kvm_leave_nested(vcpu
);
5297 kvm_smm_changed(vcpu
, events
->smi
.smm
);
5300 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
5302 if (events
->smi
.smm
) {
5303 if (events
->smi
.smm_inside_nmi
)
5304 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
5306 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
5310 if (events
->smi
.smm
|| events
->smi
.pending
||
5311 events
->smi
.smm_inside_nmi
)
5315 if (lapic_in_kernel(vcpu
)) {
5316 if (events
->smi
.latched_init
)
5317 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5319 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5323 if (events
->flags
& KVM_VCPUEVENT_VALID_TRIPLE_FAULT
) {
5324 if (!vcpu
->kvm
->arch
.triple_fault_event
)
5326 if (events
->triple_fault
.pending
)
5327 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5329 kvm_clear_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5332 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5337 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
5338 struct kvm_debugregs
*dbgregs
)
5342 memset(dbgregs
, 0, sizeof(*dbgregs
));
5343 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
5344 kvm_get_dr(vcpu
, 6, &val
);
5346 dbgregs
->dr7
= vcpu
->arch
.dr7
;
5349 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
5350 struct kvm_debugregs
*dbgregs
)
5355 if (!kvm_dr6_valid(dbgregs
->dr6
))
5357 if (!kvm_dr7_valid(dbgregs
->dr7
))
5360 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
5361 kvm_update_dr0123(vcpu
);
5362 vcpu
->arch
.dr6
= dbgregs
->dr6
;
5363 vcpu
->arch
.dr7
= dbgregs
->dr7
;
5364 kvm_update_dr7(vcpu
);
5369 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
5370 struct kvm_xsave
*guest_xsave
)
5372 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5375 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
,
5376 guest_xsave
->region
,
5377 sizeof(guest_xsave
->region
),
5381 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu
*vcpu
,
5382 u8
*state
, unsigned int size
)
5384 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5387 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
,
5388 state
, size
, vcpu
->arch
.pkru
);
5391 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
5392 struct kvm_xsave
*guest_xsave
)
5394 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5397 return fpu_copy_uabi_to_guest_fpstate(&vcpu
->arch
.guest_fpu
,
5398 guest_xsave
->region
,
5399 kvm_caps
.supported_xcr0
,
5403 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
5404 struct kvm_xcrs
*guest_xcrs
)
5406 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
5407 guest_xcrs
->nr_xcrs
= 0;
5411 guest_xcrs
->nr_xcrs
= 1;
5412 guest_xcrs
->flags
= 0;
5413 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
5414 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
5417 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
5418 struct kvm_xcrs
*guest_xcrs
)
5422 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
5425 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
5428 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
5429 /* Only support XCR0 currently */
5430 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
5431 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
5432 guest_xcrs
->xcrs
[i
].value
);
5441 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5442 * stopped by the hypervisor. This function will be called from the host only.
5443 * EINVAL is returned when the host attempts to set the flag for a guest that
5444 * does not support pv clocks.
5446 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
5448 if (!vcpu
->arch
.pv_time
.active
)
5450 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
5451 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5455 static int kvm_arch_tsc_has_attr(struct kvm_vcpu
*vcpu
,
5456 struct kvm_device_attr
*attr
)
5460 switch (attr
->attr
) {
5461 case KVM_VCPU_TSC_OFFSET
:
5471 static int kvm_arch_tsc_get_attr(struct kvm_vcpu
*vcpu
,
5472 struct kvm_device_attr
*attr
)
5474 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5478 return PTR_ERR(uaddr
);
5480 switch (attr
->attr
) {
5481 case KVM_VCPU_TSC_OFFSET
:
5483 if (put_user(vcpu
->arch
.l1_tsc_offset
, uaddr
))
5494 static int kvm_arch_tsc_set_attr(struct kvm_vcpu
*vcpu
,
5495 struct kvm_device_attr
*attr
)
5497 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5498 struct kvm
*kvm
= vcpu
->kvm
;
5502 return PTR_ERR(uaddr
);
5504 switch (attr
->attr
) {
5505 case KVM_VCPU_TSC_OFFSET
: {
5506 u64 offset
, tsc
, ns
;
5507 unsigned long flags
;
5511 if (get_user(offset
, uaddr
))
5514 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
5516 matched
= (vcpu
->arch
.virtual_tsc_khz
&&
5517 kvm
->arch
.last_tsc_khz
== vcpu
->arch
.virtual_tsc_khz
&&
5518 kvm
->arch
.last_tsc_offset
== offset
);
5520 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
) + offset
;
5521 ns
= get_kvmclock_base_ns();
5523 __kvm_synchronize_tsc(vcpu
, offset
, tsc
, ns
, matched
);
5524 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
5536 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu
*vcpu
,
5540 struct kvm_device_attr attr
;
5543 if (copy_from_user(&attr
, argp
, sizeof(attr
)))
5546 if (attr
.group
!= KVM_VCPU_TSC_CTRL
)
5550 case KVM_HAS_DEVICE_ATTR
:
5551 r
= kvm_arch_tsc_has_attr(vcpu
, &attr
);
5553 case KVM_GET_DEVICE_ATTR
:
5554 r
= kvm_arch_tsc_get_attr(vcpu
, &attr
);
5556 case KVM_SET_DEVICE_ATTR
:
5557 r
= kvm_arch_tsc_set_attr(vcpu
, &attr
);
5564 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
5565 struct kvm_enable_cap
*cap
)
5568 uint16_t vmcs_version
;
5569 void __user
*user_ptr
;
5575 case KVM_CAP_HYPERV_SYNIC2
:
5580 case KVM_CAP_HYPERV_SYNIC
:
5581 if (!irqchip_in_kernel(vcpu
->kvm
))
5583 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
5584 KVM_CAP_HYPERV_SYNIC2
);
5585 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
5586 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
5588 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
5590 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
5591 if (copy_to_user(user_ptr
, &vmcs_version
,
5592 sizeof(vmcs_version
)))
5596 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5597 if (!kvm_x86_ops
.enable_l2_tlb_flush
)
5600 return static_call(kvm_x86_enable_l2_tlb_flush
)(vcpu
);
5602 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5603 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5605 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5606 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5607 if (vcpu
->arch
.pv_cpuid
.enforce
)
5608 kvm_update_pv_runtime(vcpu
);
5616 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5617 unsigned int ioctl
, unsigned long arg
)
5619 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5620 void __user
*argp
= (void __user
*)arg
;
5623 struct kvm_sregs2
*sregs2
;
5624 struct kvm_lapic_state
*lapic
;
5625 struct kvm_xsave
*xsave
;
5626 struct kvm_xcrs
*xcrs
;
5634 case KVM_GET_LAPIC
: {
5636 if (!lapic_in_kernel(vcpu
))
5638 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5639 GFP_KERNEL_ACCOUNT
);
5644 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5648 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5653 case KVM_SET_LAPIC
: {
5655 if (!lapic_in_kernel(vcpu
))
5657 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5658 if (IS_ERR(u
.lapic
)) {
5659 r
= PTR_ERR(u
.lapic
);
5663 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5666 case KVM_INTERRUPT
: {
5667 struct kvm_interrupt irq
;
5670 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5672 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5676 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5680 r
= kvm_inject_smi(vcpu
);
5683 case KVM_SET_CPUID
: {
5684 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5685 struct kvm_cpuid cpuid
;
5688 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5690 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5693 case KVM_SET_CPUID2
: {
5694 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5695 struct kvm_cpuid2 cpuid
;
5698 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5700 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5701 cpuid_arg
->entries
);
5704 case KVM_GET_CPUID2
: {
5705 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5706 struct kvm_cpuid2 cpuid
;
5709 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5711 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5712 cpuid_arg
->entries
);
5716 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5721 case KVM_GET_MSRS
: {
5722 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5723 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5724 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5727 case KVM_SET_MSRS
: {
5728 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5729 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5730 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5733 case KVM_TPR_ACCESS_REPORTING
: {
5734 struct kvm_tpr_access_ctl tac
;
5737 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5739 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5743 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5748 case KVM_SET_VAPIC_ADDR
: {
5749 struct kvm_vapic_addr va
;
5753 if (!lapic_in_kernel(vcpu
))
5756 if (copy_from_user(&va
, argp
, sizeof(va
)))
5758 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5759 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5760 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5763 case KVM_X86_SETUP_MCE
: {
5767 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5769 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5772 case KVM_X86_SET_MCE
: {
5773 struct kvm_x86_mce mce
;
5776 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5778 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5781 case KVM_GET_VCPU_EVENTS
: {
5782 struct kvm_vcpu_events events
;
5784 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5787 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5792 case KVM_SET_VCPU_EVENTS
: {
5793 struct kvm_vcpu_events events
;
5796 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5799 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5802 case KVM_GET_DEBUGREGS
: {
5803 struct kvm_debugregs dbgregs
;
5805 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5808 if (copy_to_user(argp
, &dbgregs
,
5809 sizeof(struct kvm_debugregs
)))
5814 case KVM_SET_DEBUGREGS
: {
5815 struct kvm_debugregs dbgregs
;
5818 if (copy_from_user(&dbgregs
, argp
,
5819 sizeof(struct kvm_debugregs
)))
5822 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5825 case KVM_GET_XSAVE
: {
5827 if (vcpu
->arch
.guest_fpu
.uabi_size
> sizeof(struct kvm_xsave
))
5830 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5835 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5838 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5843 case KVM_SET_XSAVE
: {
5844 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
5846 u
.xsave
= memdup_user(argp
, size
);
5847 if (IS_ERR(u
.xsave
)) {
5848 r
= PTR_ERR(u
.xsave
);
5852 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5856 case KVM_GET_XSAVE2
: {
5857 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
5859 u
.xsave
= kzalloc(size
, GFP_KERNEL_ACCOUNT
);
5864 kvm_vcpu_ioctl_x86_get_xsave2(vcpu
, u
.buffer
, size
);
5867 if (copy_to_user(argp
, u
.xsave
, size
))
5874 case KVM_GET_XCRS
: {
5875 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5880 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5883 if (copy_to_user(argp
, u
.xcrs
,
5884 sizeof(struct kvm_xcrs
)))
5889 case KVM_SET_XCRS
: {
5890 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5891 if (IS_ERR(u
.xcrs
)) {
5892 r
= PTR_ERR(u
.xcrs
);
5896 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5899 case KVM_SET_TSC_KHZ
: {
5903 user_tsc_khz
= (u32
)arg
;
5905 if (kvm_caps
.has_tsc_control
&&
5906 user_tsc_khz
>= kvm_caps
.max_guest_tsc_khz
)
5909 if (user_tsc_khz
== 0)
5910 user_tsc_khz
= tsc_khz
;
5912 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5917 case KVM_GET_TSC_KHZ
: {
5918 r
= vcpu
->arch
.virtual_tsc_khz
;
5921 case KVM_KVMCLOCK_CTRL
: {
5922 r
= kvm_set_guest_paused(vcpu
);
5925 case KVM_ENABLE_CAP
: {
5926 struct kvm_enable_cap cap
;
5929 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5931 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5934 case KVM_GET_NESTED_STATE
: {
5935 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5939 if (!kvm_x86_ops
.nested_ops
->get_state
)
5942 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5944 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5947 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5952 if (r
> user_data_size
) {
5953 if (put_user(r
, &user_kvm_nested_state
->size
))
5963 case KVM_SET_NESTED_STATE
: {
5964 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5965 struct kvm_nested_state kvm_state
;
5969 if (!kvm_x86_ops
.nested_ops
->set_state
)
5973 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5977 if (kvm_state
.size
< sizeof(kvm_state
))
5980 if (kvm_state
.flags
&
5981 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5982 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5983 | KVM_STATE_NESTED_GIF_SET
))
5986 /* nested_run_pending implies guest_mode. */
5987 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5988 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5991 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5992 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5993 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5996 case KVM_GET_SUPPORTED_HV_CPUID
:
5997 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5999 #ifdef CONFIG_KVM_XEN
6000 case KVM_XEN_VCPU_GET_ATTR
: {
6001 struct kvm_xen_vcpu_attr xva
;
6004 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
6006 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
6007 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
6011 case KVM_XEN_VCPU_SET_ATTR
: {
6012 struct kvm_xen_vcpu_attr xva
;
6015 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
6017 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
6021 case KVM_GET_SREGS2
: {
6022 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
6026 __get_sregs2(vcpu
, u
.sregs2
);
6028 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
6033 case KVM_SET_SREGS2
: {
6034 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
6035 if (IS_ERR(u
.sregs2
)) {
6036 r
= PTR_ERR(u
.sregs2
);
6040 r
= __set_sregs2(vcpu
, u
.sregs2
);
6043 case KVM_HAS_DEVICE_ATTR
:
6044 case KVM_GET_DEVICE_ATTR
:
6045 case KVM_SET_DEVICE_ATTR
:
6046 r
= kvm_vcpu_ioctl_device_attr(vcpu
, ioctl
, argp
);
6058 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
6060 return VM_FAULT_SIGBUS
;
6063 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
6067 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
6069 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
6073 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
6076 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
6079 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
6080 unsigned long kvm_nr_mmu_pages
)
6082 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
6085 mutex_lock(&kvm
->slots_lock
);
6087 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
6088 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
6090 mutex_unlock(&kvm
->slots_lock
);
6094 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
6096 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
6100 switch (chip
->chip_id
) {
6101 case KVM_IRQCHIP_PIC_MASTER
:
6102 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
6103 sizeof(struct kvm_pic_state
));
6105 case KVM_IRQCHIP_PIC_SLAVE
:
6106 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
6107 sizeof(struct kvm_pic_state
));
6109 case KVM_IRQCHIP_IOAPIC
:
6110 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
6119 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
6121 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
6125 switch (chip
->chip_id
) {
6126 case KVM_IRQCHIP_PIC_MASTER
:
6127 spin_lock(&pic
->lock
);
6128 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
6129 sizeof(struct kvm_pic_state
));
6130 spin_unlock(&pic
->lock
);
6132 case KVM_IRQCHIP_PIC_SLAVE
:
6133 spin_lock(&pic
->lock
);
6134 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
6135 sizeof(struct kvm_pic_state
));
6136 spin_unlock(&pic
->lock
);
6138 case KVM_IRQCHIP_IOAPIC
:
6139 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
6145 kvm_pic_update_irq(pic
);
6149 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
6151 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
6153 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
6155 mutex_lock(&kps
->lock
);
6156 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
6157 mutex_unlock(&kps
->lock
);
6161 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
6164 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6166 mutex_lock(&pit
->pit_state
.lock
);
6167 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
6168 for (i
= 0; i
< 3; i
++)
6169 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
6170 mutex_unlock(&pit
->pit_state
.lock
);
6174 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
6176 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
6177 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
6178 sizeof(ps
->channels
));
6179 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
6180 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
6181 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
6185 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
6189 u32 prev_legacy
, cur_legacy
;
6190 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6192 mutex_lock(&pit
->pit_state
.lock
);
6193 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
6194 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
6195 if (!prev_legacy
&& cur_legacy
)
6197 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
6198 sizeof(pit
->pit_state
.channels
));
6199 pit
->pit_state
.flags
= ps
->flags
;
6200 for (i
= 0; i
< 3; i
++)
6201 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
6203 mutex_unlock(&pit
->pit_state
.lock
);
6207 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
6208 struct kvm_reinject_control
*control
)
6210 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6212 /* pit->pit_state.lock was overloaded to prevent userspace from getting
6213 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
6214 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
6216 mutex_lock(&pit
->pit_state
.lock
);
6217 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
6218 mutex_unlock(&pit
->pit_state
.lock
);
6223 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
6227 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
6228 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
6229 * on all VM-Exits, thus we only need to kick running vCPUs to force a
6232 struct kvm_vcpu
*vcpu
;
6235 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6236 kvm_vcpu_kick(vcpu
);
6239 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
6242 if (!irqchip_in_kernel(kvm
))
6245 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
6246 irq_event
->irq
, irq_event
->level
,
6251 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
6252 struct kvm_enable_cap
*cap
)
6260 case KVM_CAP_DISABLE_QUIRKS2
:
6262 if (cap
->args
[0] & ~KVM_X86_VALID_QUIRKS
)
6265 case KVM_CAP_DISABLE_QUIRKS
:
6266 kvm
->arch
.disabled_quirks
= cap
->args
[0];
6269 case KVM_CAP_SPLIT_IRQCHIP
: {
6270 mutex_lock(&kvm
->lock
);
6272 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
6273 goto split_irqchip_unlock
;
6275 if (irqchip_in_kernel(kvm
))
6276 goto split_irqchip_unlock
;
6277 if (kvm
->created_vcpus
)
6278 goto split_irqchip_unlock
;
6279 r
= kvm_setup_empty_irq_routing(kvm
);
6281 goto split_irqchip_unlock
;
6282 /* Pairs with irqchip_in_kernel. */
6284 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
6285 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
6286 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
6288 split_irqchip_unlock
:
6289 mutex_unlock(&kvm
->lock
);
6292 case KVM_CAP_X2APIC_API
:
6294 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
6297 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
6298 kvm
->arch
.x2apic_format
= true;
6299 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
6300 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
6304 case KVM_CAP_X86_DISABLE_EXITS
:
6306 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
6309 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
6310 kvm
->arch
.pause_in_guest
= true;
6312 #define SMT_RSB_MSG "This processor is affected by the Cross-Thread Return Predictions vulnerability. " \
6313 "KVM_CAP_X86_DISABLE_EXITS should only be used with SMT disabled or trusted guests."
6315 if (!mitigate_smt_rsb
) {
6316 if (boot_cpu_has_bug(X86_BUG_SMT_RSB
) && cpu_smt_possible() &&
6317 (cap
->args
[0] & ~KVM_X86_DISABLE_EXITS_PAUSE
))
6318 pr_warn_once(SMT_RSB_MSG
);
6320 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
6321 kvm_can_mwait_in_guest())
6322 kvm
->arch
.mwait_in_guest
= true;
6323 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
6324 kvm
->arch
.hlt_in_guest
= true;
6325 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
6326 kvm
->arch
.cstate_in_guest
= true;
6331 case KVM_CAP_MSR_PLATFORM_INFO
:
6332 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
6335 case KVM_CAP_EXCEPTION_PAYLOAD
:
6336 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
6339 case KVM_CAP_X86_TRIPLE_FAULT_EVENT
:
6340 kvm
->arch
.triple_fault_event
= cap
->args
[0];
6343 case KVM_CAP_X86_USER_SPACE_MSR
:
6345 if (cap
->args
[0] & ~KVM_MSR_EXIT_REASON_VALID_MASK
)
6347 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
6350 case KVM_CAP_X86_BUS_LOCK_EXIT
:
6352 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
6355 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
6356 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
6359 if (kvm_caps
.has_bus_lock_exit
&&
6360 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
6361 kvm
->arch
.bus_lock_detection_enabled
= true;
6364 #ifdef CONFIG_X86_SGX_KVM
6365 case KVM_CAP_SGX_ATTRIBUTE
: {
6366 unsigned long allowed_attributes
= 0;
6368 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
6372 /* KVM only supports the PROVISIONKEY privileged attribute. */
6373 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
6374 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
6375 kvm
->arch
.sgx_provisioning_allowed
= true;
6381 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
6383 if (!kvm_x86_ops
.vm_copy_enc_context_from
)
6386 r
= static_call(kvm_x86_vm_copy_enc_context_from
)(kvm
, cap
->args
[0]);
6388 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
6390 if (!kvm_x86_ops
.vm_move_enc_context_from
)
6393 r
= static_call(kvm_x86_vm_move_enc_context_from
)(kvm
, cap
->args
[0]);
6395 case KVM_CAP_EXIT_HYPERCALL
:
6396 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
6400 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
6403 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
6405 if (cap
->args
[0] & ~1)
6407 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
6410 case KVM_CAP_PMU_CAPABILITY
:
6412 if (!enable_pmu
|| (cap
->args
[0] & ~KVM_CAP_PMU_VALID_MASK
))
6415 mutex_lock(&kvm
->lock
);
6416 if (!kvm
->created_vcpus
) {
6417 kvm
->arch
.enable_pmu
= !(cap
->args
[0] & KVM_PMU_CAP_DISABLE
);
6420 mutex_unlock(&kvm
->lock
);
6422 case KVM_CAP_MAX_VCPU_ID
:
6424 if (cap
->args
[0] > KVM_MAX_VCPU_IDS
)
6427 mutex_lock(&kvm
->lock
);
6428 if (kvm
->arch
.max_vcpu_ids
== cap
->args
[0]) {
6430 } else if (!kvm
->arch
.max_vcpu_ids
) {
6431 kvm
->arch
.max_vcpu_ids
= cap
->args
[0];
6434 mutex_unlock(&kvm
->lock
);
6436 case KVM_CAP_X86_NOTIFY_VMEXIT
:
6438 if ((u32
)cap
->args
[0] & ~KVM_X86_NOTIFY_VMEXIT_VALID_BITS
)
6440 if (!kvm_caps
.has_notify_vmexit
)
6442 if (!((u32
)cap
->args
[0] & KVM_X86_NOTIFY_VMEXIT_ENABLED
))
6444 mutex_lock(&kvm
->lock
);
6445 if (!kvm
->created_vcpus
) {
6446 kvm
->arch
.notify_window
= cap
->args
[0] >> 32;
6447 kvm
->arch
.notify_vmexit_flags
= (u32
)cap
->args
[0];
6450 mutex_unlock(&kvm
->lock
);
6452 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES
:
6456 * Since the risk of disabling NX hugepages is a guest crashing
6457 * the system, ensure the userspace process has permission to
6458 * reboot the system.
6460 * Note that unlike the reboot() syscall, the process must have
6461 * this capability in the root namespace because exposing
6462 * /dev/kvm into a container does not limit the scope of the
6463 * iTLB multihit bug to that container. In other words,
6464 * this must use capable(), not ns_capable().
6466 if (!capable(CAP_SYS_BOOT
)) {
6474 mutex_lock(&kvm
->lock
);
6475 if (!kvm
->created_vcpus
) {
6476 kvm
->arch
.disable_nx_huge_pages
= true;
6479 mutex_unlock(&kvm
->lock
);
6488 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
6490 struct kvm_x86_msr_filter
*msr_filter
;
6492 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
6496 msr_filter
->default_allow
= default_allow
;
6500 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
6507 for (i
= 0; i
< msr_filter
->count
; i
++)
6508 kfree(msr_filter
->ranges
[i
].bitmap
);
6513 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
6514 struct kvm_msr_filter_range
*user_range
)
6516 unsigned long *bitmap
= NULL
;
6519 if (!user_range
->nmsrs
)
6522 if (user_range
->flags
& ~KVM_MSR_FILTER_RANGE_VALID_MASK
)
6525 if (!user_range
->flags
)
6528 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
6529 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
6532 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
6534 return PTR_ERR(bitmap
);
6536 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
6537 .flags
= user_range
->flags
,
6538 .base
= user_range
->base
,
6539 .nmsrs
= user_range
->nmsrs
,
6543 msr_filter
->count
++;
6547 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
,
6548 struct kvm_msr_filter
*filter
)
6550 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
6556 if (filter
->flags
& ~KVM_MSR_FILTER_VALID_MASK
)
6559 for (i
= 0; i
< ARRAY_SIZE(filter
->ranges
); i
++)
6560 empty
&= !filter
->ranges
[i
].nmsrs
;
6562 default_allow
= !(filter
->flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
6563 if (empty
&& !default_allow
)
6566 new_filter
= kvm_alloc_msr_filter(default_allow
);
6570 for (i
= 0; i
< ARRAY_SIZE(filter
->ranges
); i
++) {
6571 r
= kvm_add_msr_filter(new_filter
, &filter
->ranges
[i
]);
6573 kvm_free_msr_filter(new_filter
);
6578 mutex_lock(&kvm
->lock
);
6579 old_filter
= rcu_replace_pointer(kvm
->arch
.msr_filter
, new_filter
,
6580 mutex_is_locked(&kvm
->lock
));
6581 mutex_unlock(&kvm
->lock
);
6582 synchronize_srcu(&kvm
->srcu
);
6584 kvm_free_msr_filter(old_filter
);
6586 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
6591 #ifdef CONFIG_KVM_COMPAT
6592 /* for KVM_X86_SET_MSR_FILTER */
6593 struct kvm_msr_filter_range_compat
{
6600 struct kvm_msr_filter_compat
{
6602 struct kvm_msr_filter_range_compat ranges
[KVM_MSR_FILTER_MAX_RANGES
];
6605 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
6607 long kvm_arch_vm_compat_ioctl(struct file
*filp
, unsigned int ioctl
,
6610 void __user
*argp
= (void __user
*)arg
;
6611 struct kvm
*kvm
= filp
->private_data
;
6615 case KVM_X86_SET_MSR_FILTER_COMPAT
: {
6616 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
6617 struct kvm_msr_filter_compat filter_compat
;
6618 struct kvm_msr_filter filter
;
6621 if (copy_from_user(&filter_compat
, user_msr_filter
,
6622 sizeof(filter_compat
)))
6625 filter
.flags
= filter_compat
.flags
;
6626 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
6627 struct kvm_msr_filter_range_compat
*cr
;
6629 cr
= &filter_compat
.ranges
[i
];
6630 filter
.ranges
[i
] = (struct kvm_msr_filter_range
) {
6634 .bitmap
= (__u8
*)(ulong
)cr
->bitmap
,
6638 r
= kvm_vm_ioctl_set_msr_filter(kvm
, &filter
);
6647 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6648 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
6650 struct kvm_vcpu
*vcpu
;
6654 mutex_lock(&kvm
->lock
);
6655 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6656 if (!vcpu
->arch
.pv_time
.active
)
6659 ret
= kvm_set_guest_paused(vcpu
);
6661 kvm_err("Failed to pause guest VCPU%d: %d\n",
6662 vcpu
->vcpu_id
, ret
);
6666 mutex_unlock(&kvm
->lock
);
6668 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
6671 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
6674 case PM_HIBERNATION_PREPARE
:
6675 case PM_SUSPEND_PREPARE
:
6676 return kvm_arch_suspend_notifier(kvm
);
6681 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6683 static int kvm_vm_ioctl_get_clock(struct kvm
*kvm
, void __user
*argp
)
6685 struct kvm_clock_data data
= { 0 };
6687 get_kvmclock(kvm
, &data
);
6688 if (copy_to_user(argp
, &data
, sizeof(data
)))
6694 static int kvm_vm_ioctl_set_clock(struct kvm
*kvm
, void __user
*argp
)
6696 struct kvm_arch
*ka
= &kvm
->arch
;
6697 struct kvm_clock_data data
;
6700 if (copy_from_user(&data
, argp
, sizeof(data
)))
6704 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6705 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6707 if (data
.flags
& ~KVM_CLOCK_VALID_FLAGS
)
6710 kvm_hv_request_tsc_page_update(kvm
);
6711 kvm_start_pvclock_update(kvm
);
6712 pvclock_update_vm_gtod_copy(kvm
);
6715 * This pairs with kvm_guest_time_update(): when masterclock is
6716 * in use, we use master_kernel_ns + kvmclock_offset to set
6717 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6718 * is slightly ahead) here we risk going negative on unsigned
6719 * 'system_time' when 'data.clock' is very small.
6721 if (data
.flags
& KVM_CLOCK_REALTIME
) {
6722 u64 now_real_ns
= ktime_get_real_ns();
6725 * Avoid stepping the kvmclock backwards.
6727 if (now_real_ns
> data
.realtime
)
6728 data
.clock
+= now_real_ns
- data
.realtime
;
6731 if (ka
->use_master_clock
)
6732 now_raw_ns
= ka
->master_kernel_ns
;
6734 now_raw_ns
= get_kvmclock_base_ns();
6735 ka
->kvmclock_offset
= data
.clock
- now_raw_ns
;
6736 kvm_end_pvclock_update(kvm
);
6740 int kvm_arch_vm_ioctl(struct file
*filp
, unsigned int ioctl
, unsigned long arg
)
6742 struct kvm
*kvm
= filp
->private_data
;
6743 void __user
*argp
= (void __user
*)arg
;
6746 * This union makes it completely explicit to gcc-3.x
6747 * that these two variables' stack usage should be
6748 * combined, not added together.
6751 struct kvm_pit_state ps
;
6752 struct kvm_pit_state2 ps2
;
6753 struct kvm_pit_config pit_config
;
6757 case KVM_SET_TSS_ADDR
:
6758 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
6760 case KVM_SET_IDENTITY_MAP_ADDR
: {
6763 mutex_lock(&kvm
->lock
);
6765 if (kvm
->created_vcpus
)
6766 goto set_identity_unlock
;
6768 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
6769 goto set_identity_unlock
;
6770 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
6771 set_identity_unlock
:
6772 mutex_unlock(&kvm
->lock
);
6775 case KVM_SET_NR_MMU_PAGES
:
6776 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
6778 case KVM_CREATE_IRQCHIP
: {
6779 mutex_lock(&kvm
->lock
);
6782 if (irqchip_in_kernel(kvm
))
6783 goto create_irqchip_unlock
;
6786 if (kvm
->created_vcpus
)
6787 goto create_irqchip_unlock
;
6789 r
= kvm_pic_init(kvm
);
6791 goto create_irqchip_unlock
;
6793 r
= kvm_ioapic_init(kvm
);
6795 kvm_pic_destroy(kvm
);
6796 goto create_irqchip_unlock
;
6799 r
= kvm_setup_default_irq_routing(kvm
);
6801 kvm_ioapic_destroy(kvm
);
6802 kvm_pic_destroy(kvm
);
6803 goto create_irqchip_unlock
;
6805 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6807 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
6808 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
6809 create_irqchip_unlock
:
6810 mutex_unlock(&kvm
->lock
);
6813 case KVM_CREATE_PIT
:
6814 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
6816 case KVM_CREATE_PIT2
:
6818 if (copy_from_user(&u
.pit_config
, argp
,
6819 sizeof(struct kvm_pit_config
)))
6822 mutex_lock(&kvm
->lock
);
6825 goto create_pit_unlock
;
6827 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
6831 mutex_unlock(&kvm
->lock
);
6833 case KVM_GET_IRQCHIP
: {
6834 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6835 struct kvm_irqchip
*chip
;
6837 chip
= memdup_user(argp
, sizeof(*chip
));
6844 if (!irqchip_kernel(kvm
))
6845 goto get_irqchip_out
;
6846 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
6848 goto get_irqchip_out
;
6850 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
6851 goto get_irqchip_out
;
6857 case KVM_SET_IRQCHIP
: {
6858 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6859 struct kvm_irqchip
*chip
;
6861 chip
= memdup_user(argp
, sizeof(*chip
));
6868 if (!irqchip_kernel(kvm
))
6869 goto set_irqchip_out
;
6870 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
6877 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
6880 if (!kvm
->arch
.vpit
)
6882 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
6886 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
6893 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
6895 mutex_lock(&kvm
->lock
);
6897 if (!kvm
->arch
.vpit
)
6899 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
6901 mutex_unlock(&kvm
->lock
);
6904 case KVM_GET_PIT2
: {
6906 if (!kvm
->arch
.vpit
)
6908 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
6912 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
6917 case KVM_SET_PIT2
: {
6919 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
6921 mutex_lock(&kvm
->lock
);
6923 if (!kvm
->arch
.vpit
)
6925 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
6927 mutex_unlock(&kvm
->lock
);
6930 case KVM_REINJECT_CONTROL
: {
6931 struct kvm_reinject_control control
;
6933 if (copy_from_user(&control
, argp
, sizeof(control
)))
6936 if (!kvm
->arch
.vpit
)
6938 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6941 case KVM_SET_BOOT_CPU_ID
:
6943 mutex_lock(&kvm
->lock
);
6944 if (kvm
->created_vcpus
)
6947 kvm
->arch
.bsp_vcpu_id
= arg
;
6948 mutex_unlock(&kvm
->lock
);
6950 #ifdef CONFIG_KVM_XEN
6951 case KVM_XEN_HVM_CONFIG
: {
6952 struct kvm_xen_hvm_config xhc
;
6954 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6956 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6959 case KVM_XEN_HVM_GET_ATTR
: {
6960 struct kvm_xen_hvm_attr xha
;
6963 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6965 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6966 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6970 case KVM_XEN_HVM_SET_ATTR
: {
6971 struct kvm_xen_hvm_attr xha
;
6974 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6976 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6979 case KVM_XEN_HVM_EVTCHN_SEND
: {
6980 struct kvm_irq_routing_xen_evtchn uxe
;
6983 if (copy_from_user(&uxe
, argp
, sizeof(uxe
)))
6985 r
= kvm_xen_hvm_evtchn_send(kvm
, &uxe
);
6990 r
= kvm_vm_ioctl_set_clock(kvm
, argp
);
6993 r
= kvm_vm_ioctl_get_clock(kvm
, argp
);
6995 case KVM_SET_TSC_KHZ
: {
6999 user_tsc_khz
= (u32
)arg
;
7001 if (kvm_caps
.has_tsc_control
&&
7002 user_tsc_khz
>= kvm_caps
.max_guest_tsc_khz
)
7005 if (user_tsc_khz
== 0)
7006 user_tsc_khz
= tsc_khz
;
7008 WRITE_ONCE(kvm
->arch
.default_tsc_khz
, user_tsc_khz
);
7013 case KVM_GET_TSC_KHZ
: {
7014 r
= READ_ONCE(kvm
->arch
.default_tsc_khz
);
7017 case KVM_MEMORY_ENCRYPT_OP
: {
7019 if (!kvm_x86_ops
.mem_enc_ioctl
)
7022 r
= static_call(kvm_x86_mem_enc_ioctl
)(kvm
, argp
);
7025 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
7026 struct kvm_enc_region region
;
7029 if (copy_from_user(®ion
, argp
, sizeof(region
)))
7033 if (!kvm_x86_ops
.mem_enc_register_region
)
7036 r
= static_call(kvm_x86_mem_enc_register_region
)(kvm
, ®ion
);
7039 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
7040 struct kvm_enc_region region
;
7043 if (copy_from_user(®ion
, argp
, sizeof(region
)))
7047 if (!kvm_x86_ops
.mem_enc_unregister_region
)
7050 r
= static_call(kvm_x86_mem_enc_unregister_region
)(kvm
, ®ion
);
7053 case KVM_HYPERV_EVENTFD
: {
7054 struct kvm_hyperv_eventfd hvevfd
;
7057 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
7059 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
7062 case KVM_SET_PMU_EVENT_FILTER
:
7063 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
7065 case KVM_X86_SET_MSR_FILTER
: {
7066 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
7067 struct kvm_msr_filter filter
;
7069 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
7072 r
= kvm_vm_ioctl_set_msr_filter(kvm
, &filter
);
7082 static void kvm_probe_feature_msr(u32 msr_index
)
7084 struct kvm_msr_entry msr
= {
7088 if (kvm_get_msr_feature(&msr
))
7091 msr_based_features
[num_msr_based_features
++] = msr_index
;
7094 static void kvm_probe_msr_to_save(u32 msr_index
)
7098 if (rdmsr_safe(msr_index
, &dummy
[0], &dummy
[1]))
7102 * Even MSRs that are valid in the host may not be exposed to guests in
7105 switch (msr_index
) {
7106 case MSR_IA32_BNDCFGS
:
7107 if (!kvm_mpx_supported())
7111 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
7112 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
7115 case MSR_IA32_UMWAIT_CONTROL
:
7116 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
7119 case MSR_IA32_RTIT_CTL
:
7120 case MSR_IA32_RTIT_STATUS
:
7121 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
7124 case MSR_IA32_RTIT_CR3_MATCH
:
7125 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7126 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
7129 case MSR_IA32_RTIT_OUTPUT_BASE
:
7130 case MSR_IA32_RTIT_OUTPUT_MASK
:
7131 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7132 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
7133 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
7136 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
7137 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7138 (msr_index
- MSR_IA32_RTIT_ADDR0_A
>=
7139 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2))
7142 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR_MAX
:
7143 if (msr_index
- MSR_ARCH_PERFMON_PERFCTR0
>=
7144 kvm_pmu_cap
.num_counters_gp
)
7147 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL_MAX
:
7148 if (msr_index
- MSR_ARCH_PERFMON_EVENTSEL0
>=
7149 kvm_pmu_cap
.num_counters_gp
)
7152 case MSR_ARCH_PERFMON_FIXED_CTR0
... MSR_ARCH_PERFMON_FIXED_CTR_MAX
:
7153 if (msr_index
- MSR_ARCH_PERFMON_FIXED_CTR0
>=
7154 kvm_pmu_cap
.num_counters_fixed
)
7158 case MSR_IA32_XFD_ERR
:
7159 if (!kvm_cpu_cap_has(X86_FEATURE_XFD
))
7162 case MSR_IA32_TSX_CTRL
:
7163 if (!(kvm_get_arch_capabilities() & ARCH_CAP_TSX_CTRL_MSR
))
7170 msrs_to_save
[num_msrs_to_save
++] = msr_index
;
7173 static void kvm_init_msr_lists(void)
7177 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED
!= 3,
7178 "Please update the fixed PMCs in msrs_to_save_pmu[]");
7180 num_msrs_to_save
= 0;
7181 num_emulated_msrs
= 0;
7182 num_msr_based_features
= 0;
7184 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_base
); i
++)
7185 kvm_probe_msr_to_save(msrs_to_save_base
[i
]);
7188 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_pmu
); i
++)
7189 kvm_probe_msr_to_save(msrs_to_save_pmu
[i
]);
7192 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
7193 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
7196 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
7199 for (i
= KVM_FIRST_EMULATED_VMX_MSR
; i
<= KVM_LAST_EMULATED_VMX_MSR
; i
++)
7200 kvm_probe_feature_msr(i
);
7202 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all_except_vmx
); i
++)
7203 kvm_probe_feature_msr(msr_based_features_all_except_vmx
[i
]);
7206 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
7214 if (!(lapic_in_kernel(vcpu
) &&
7215 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
7216 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
7227 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
7234 if (!(lapic_in_kernel(vcpu
) &&
7235 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
7237 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
7239 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
7249 void kvm_set_segment(struct kvm_vcpu
*vcpu
,
7250 struct kvm_segment
*var
, int seg
)
7252 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
7255 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
7256 struct kvm_segment
*var
, int seg
)
7258 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
7261 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u64 access
,
7262 struct x86_exception
*exception
)
7264 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
7267 BUG_ON(!mmu_is_nested(vcpu
));
7269 /* NPT walks are always user-walks */
7270 access
|= PFERR_USER_MASK
;
7271 t_gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gpa
, access
, exception
);
7276 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
7277 struct x86_exception
*exception
)
7279 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7281 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7282 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7284 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
7286 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
7287 struct x86_exception
*exception
)
7289 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7291 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7292 access
|= PFERR_WRITE_MASK
;
7293 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7295 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
7297 /* uses this to access any guest's mapped memory without checking CPL */
7298 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
7299 struct x86_exception
*exception
)
7301 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7303 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, 0, exception
);
7306 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
7307 struct kvm_vcpu
*vcpu
, u64 access
,
7308 struct x86_exception
*exception
)
7310 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7312 int r
= X86EMUL_CONTINUE
;
7315 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
7316 unsigned offset
= addr
& (PAGE_SIZE
-1);
7317 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
7320 if (gpa
== INVALID_GPA
)
7321 return X86EMUL_PROPAGATE_FAULT
;
7322 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
7325 r
= X86EMUL_IO_NEEDED
;
7337 /* used for instruction fetching */
7338 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
7339 gva_t addr
, void *val
, unsigned int bytes
,
7340 struct x86_exception
*exception
)
7342 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7343 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7344 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7348 /* Inline kvm_read_guest_virt_helper for speed. */
7349 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
|PFERR_FETCH_MASK
,
7351 if (unlikely(gpa
== INVALID_GPA
))
7352 return X86EMUL_PROPAGATE_FAULT
;
7354 offset
= addr
& (PAGE_SIZE
-1);
7355 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
7356 bytes
= (unsigned)PAGE_SIZE
- offset
;
7357 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
7359 if (unlikely(ret
< 0))
7360 return X86EMUL_IO_NEEDED
;
7362 return X86EMUL_CONTINUE
;
7365 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
7366 gva_t addr
, void *val
, unsigned int bytes
,
7367 struct x86_exception
*exception
)
7369 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7372 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
7373 * is returned, but our callers are not ready for that and they blindly
7374 * call kvm_inject_page_fault. Ensure that they at least do not leak
7375 * uninitialized kernel stack memory into cr2 and error code.
7377 memset(exception
, 0, sizeof(*exception
));
7378 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
7381 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
7383 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
7384 gva_t addr
, void *val
, unsigned int bytes
,
7385 struct x86_exception
*exception
, bool system
)
7387 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7391 access
|= PFERR_IMPLICIT_ACCESS
;
7392 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7393 access
|= PFERR_USER_MASK
;
7395 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
7398 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
7399 struct kvm_vcpu
*vcpu
, u64 access
,
7400 struct x86_exception
*exception
)
7402 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7404 int r
= X86EMUL_CONTINUE
;
7407 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
7408 unsigned offset
= addr
& (PAGE_SIZE
-1);
7409 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
7412 if (gpa
== INVALID_GPA
)
7413 return X86EMUL_PROPAGATE_FAULT
;
7414 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
7416 r
= X86EMUL_IO_NEEDED
;
7428 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
7429 unsigned int bytes
, struct x86_exception
*exception
,
7432 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7433 u64 access
= PFERR_WRITE_MASK
;
7436 access
|= PFERR_IMPLICIT_ACCESS
;
7437 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7438 access
|= PFERR_USER_MASK
;
7440 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7444 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
7445 unsigned int bytes
, struct x86_exception
*exception
)
7447 /* kvm_write_guest_virt_system can pull in tons of pages. */
7448 vcpu
->arch
.l1tf_flush_l1d
= true;
7450 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7451 PFERR_WRITE_MASK
, exception
);
7453 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
7455 static int kvm_can_emulate_insn(struct kvm_vcpu
*vcpu
, int emul_type
,
7456 void *insn
, int insn_len
)
7458 return static_call(kvm_x86_can_emulate_instruction
)(vcpu
, emul_type
,
7462 int handle_ud(struct kvm_vcpu
*vcpu
)
7464 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
7465 int fep_flags
= READ_ONCE(force_emulation_prefix
);
7466 int emul_type
= EMULTYPE_TRAP_UD
;
7467 char sig
[5]; /* ud2; .ascii "kvm" */
7468 struct x86_exception e
;
7470 if (unlikely(!kvm_can_emulate_insn(vcpu
, emul_type
, NULL
, 0)))
7474 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
7475 sig
, sizeof(sig
), &e
) == 0 &&
7476 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
7477 if (fep_flags
& KVM_FEP_CLEAR_RFLAGS_RF
)
7478 kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) & ~X86_EFLAGS_RF
);
7479 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
7480 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
7483 return kvm_emulate_instruction(vcpu
, emul_type
);
7485 EXPORT_SYMBOL_GPL(handle_ud
);
7487 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7488 gpa_t gpa
, bool write
)
7490 /* For APIC access vmexit */
7491 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7494 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
7495 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
7502 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7503 gpa_t
*gpa
, struct x86_exception
*exception
,
7506 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7507 u64 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
7508 | (write
? PFERR_WRITE_MASK
: 0);
7511 * currently PKRU is only applied to ept enabled guest so
7512 * there is no pkey in EPT page table for L1 guest or EPT
7513 * shadow page table for L2 guest.
7515 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
7516 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
7517 vcpu
->arch
.mmio_access
, 0, access
))) {
7518 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
7519 (gva
& (PAGE_SIZE
- 1));
7520 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
7524 *gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7526 if (*gpa
== INVALID_GPA
)
7529 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
7532 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7533 const void *val
, int bytes
)
7537 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
7540 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
7544 struct read_write_emulator_ops
{
7545 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
7547 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7548 void *val
, int bytes
);
7549 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7550 int bytes
, void *val
);
7551 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7552 void *val
, int bytes
);
7556 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
7558 if (vcpu
->mmio_read_completed
) {
7559 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
7560 vcpu
->mmio_fragments
[0].gpa
, val
);
7561 vcpu
->mmio_read_completed
= 0;
7568 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7569 void *val
, int bytes
)
7571 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
7574 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7575 void *val
, int bytes
)
7577 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
7580 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
7582 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
7583 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
7586 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7587 void *val
, int bytes
)
7589 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
7590 return X86EMUL_IO_NEEDED
;
7593 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7594 void *val
, int bytes
)
7596 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
7598 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7599 return X86EMUL_CONTINUE
;
7602 static const struct read_write_emulator_ops read_emultor
= {
7603 .read_write_prepare
= read_prepare
,
7604 .read_write_emulate
= read_emulate
,
7605 .read_write_mmio
= vcpu_mmio_read
,
7606 .read_write_exit_mmio
= read_exit_mmio
,
7609 static const struct read_write_emulator_ops write_emultor
= {
7610 .read_write_emulate
= write_emulate
,
7611 .read_write_mmio
= write_mmio
,
7612 .read_write_exit_mmio
= write_exit_mmio
,
7616 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
7618 struct x86_exception
*exception
,
7619 struct kvm_vcpu
*vcpu
,
7620 const struct read_write_emulator_ops
*ops
)
7624 bool write
= ops
->write
;
7625 struct kvm_mmio_fragment
*frag
;
7626 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7629 * If the exit was due to a NPF we may already have a GPA.
7630 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7631 * Note, this cannot be used on string operations since string
7632 * operation using rep will only have the initial GPA from the NPF
7635 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
7636 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
7637 gpa
= ctxt
->gpa_val
;
7638 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
7640 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
7642 return X86EMUL_PROPAGATE_FAULT
;
7645 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
7646 return X86EMUL_CONTINUE
;
7649 * Is this MMIO handled locally?
7651 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
7652 if (handled
== bytes
)
7653 return X86EMUL_CONTINUE
;
7659 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
7660 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
7664 return X86EMUL_CONTINUE
;
7667 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
7669 void *val
, unsigned int bytes
,
7670 struct x86_exception
*exception
,
7671 const struct read_write_emulator_ops
*ops
)
7673 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7677 if (ops
->read_write_prepare
&&
7678 ops
->read_write_prepare(vcpu
, val
, bytes
))
7679 return X86EMUL_CONTINUE
;
7681 vcpu
->mmio_nr_fragments
= 0;
7683 /* Crossing a page boundary? */
7684 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
7687 now
= -addr
& ~PAGE_MASK
;
7688 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
7691 if (rc
!= X86EMUL_CONTINUE
)
7694 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
7700 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
7702 if (rc
!= X86EMUL_CONTINUE
)
7705 if (!vcpu
->mmio_nr_fragments
)
7708 gpa
= vcpu
->mmio_fragments
[0].gpa
;
7710 vcpu
->mmio_needed
= 1;
7711 vcpu
->mmio_cur_fragment
= 0;
7713 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
7714 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
7715 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
7716 vcpu
->run
->mmio
.phys_addr
= gpa
;
7718 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
7721 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
7725 struct x86_exception
*exception
)
7727 return emulator_read_write(ctxt
, addr
, val
, bytes
,
7728 exception
, &read_emultor
);
7731 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
7735 struct x86_exception
*exception
)
7737 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
7738 exception
, &write_emultor
);
7741 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7742 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7744 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
7749 struct x86_exception
*exception
)
7751 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7757 /* guests cmpxchg8b have to be emulated atomically */
7758 if (bytes
> 8 || (bytes
& (bytes
- 1)))
7761 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
7763 if (gpa
== INVALID_GPA
||
7764 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7768 * Emulate the atomic as a straight write to avoid #AC if SLD is
7769 * enabled in the host and the access splits a cache line.
7771 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
7772 page_line_mask
= ~(cache_line_size() - 1);
7774 page_line_mask
= PAGE_MASK
;
7776 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
7779 hva
= kvm_vcpu_gfn_to_hva(vcpu
, gpa_to_gfn(gpa
));
7780 if (kvm_is_error_hva(hva
))
7783 hva
+= offset_in_page(gpa
);
7787 r
= emulator_try_cmpxchg_user(u8
, hva
, old
, new);
7790 r
= emulator_try_cmpxchg_user(u16
, hva
, old
, new);
7793 r
= emulator_try_cmpxchg_user(u32
, hva
, old
, new);
7796 r
= emulator_try_cmpxchg_user(u64
, hva
, old
, new);
7803 return X86EMUL_UNHANDLEABLE
;
7805 return X86EMUL_CMPXCHG_FAILED
;
7807 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
7809 return X86EMUL_CONTINUE
;
7812 pr_warn_once("emulating exchange as write\n");
7814 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
7817 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
7818 unsigned short port
, void *data
,
7819 unsigned int count
, bool in
)
7824 WARN_ON_ONCE(vcpu
->arch
.pio
.count
);
7825 for (i
= 0; i
< count
; i
++) {
7827 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, port
, size
, data
);
7829 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
, port
, size
, data
);
7836 * Userspace must have unregistered the device while PIO
7837 * was running. Drop writes / read as 0.
7840 memset(data
, 0, size
* (count
- i
));
7849 vcpu
->arch
.pio
.port
= port
;
7850 vcpu
->arch
.pio
.in
= in
;
7851 vcpu
->arch
.pio
.count
= count
;
7852 vcpu
->arch
.pio
.size
= size
;
7855 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
7857 memcpy(vcpu
->arch
.pio_data
, data
, size
* count
);
7859 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
7860 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
7861 vcpu
->run
->io
.size
= size
;
7862 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
7863 vcpu
->run
->io
.count
= count
;
7864 vcpu
->run
->io
.port
= port
;
7868 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7869 unsigned short port
, void *val
, unsigned int count
)
7871 int r
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
7873 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, val
);
7878 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
7880 int size
= vcpu
->arch
.pio
.size
;
7881 unsigned int count
= vcpu
->arch
.pio
.count
;
7882 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
7883 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
7884 vcpu
->arch
.pio
.count
= 0;
7887 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
7888 int size
, unsigned short port
, void *val
,
7891 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7892 if (vcpu
->arch
.pio
.count
) {
7894 * Complete a previous iteration that required userspace I/O.
7895 * Note, @count isn't guaranteed to match pio.count as userspace
7896 * can modify ECX before rerunning the vCPU. Ignore any such
7897 * shenanigans as KVM doesn't support modifying the rep count,
7898 * and the emulator ensures @count doesn't overflow the buffer.
7900 complete_emulator_pio_in(vcpu
, val
);
7904 return emulator_pio_in(vcpu
, size
, port
, val
, count
);
7907 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7908 unsigned short port
, const void *val
,
7911 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, val
);
7912 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
7915 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
7916 int size
, unsigned short port
,
7917 const void *val
, unsigned int count
)
7919 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7922 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
7924 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
7927 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
7929 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
7932 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
7934 if (!need_emulate_wbinvd(vcpu
))
7935 return X86EMUL_CONTINUE
;
7937 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
7938 int cpu
= get_cpu();
7940 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
7941 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
7942 wbinvd_ipi
, NULL
, 1);
7944 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
7947 return X86EMUL_CONTINUE
;
7950 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7952 kvm_emulate_wbinvd_noskip(vcpu
);
7953 return kvm_skip_emulated_instruction(vcpu
);
7955 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7959 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7961 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7964 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7965 unsigned long *dest
)
7967 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7970 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7971 unsigned long value
)
7974 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7977 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7979 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7982 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7984 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7985 unsigned long value
;
7989 value
= kvm_read_cr0(vcpu
);
7992 value
= vcpu
->arch
.cr2
;
7995 value
= kvm_read_cr3(vcpu
);
7998 value
= kvm_read_cr4(vcpu
);
8001 value
= kvm_get_cr8(vcpu
);
8004 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
8011 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
8013 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8018 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
8021 vcpu
->arch
.cr2
= val
;
8024 res
= kvm_set_cr3(vcpu
, val
);
8027 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
8030 res
= kvm_set_cr8(vcpu
, val
);
8033 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
8040 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
8042 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
8045 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8047 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
8050 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8052 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
8055 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8057 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
8060 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8062 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
8065 static unsigned long emulator_get_cached_segment_base(
8066 struct x86_emulate_ctxt
*ctxt
, int seg
)
8068 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
8071 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
8072 struct desc_struct
*desc
, u32
*base3
,
8075 struct kvm_segment var
;
8077 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
8078 *selector
= var
.selector
;
8081 memset(desc
, 0, sizeof(*desc
));
8089 set_desc_limit(desc
, var
.limit
);
8090 set_desc_base(desc
, (unsigned long)var
.base
);
8091 #ifdef CONFIG_X86_64
8093 *base3
= var
.base
>> 32;
8095 desc
->type
= var
.type
;
8097 desc
->dpl
= var
.dpl
;
8098 desc
->p
= var
.present
;
8099 desc
->avl
= var
.avl
;
8107 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
8108 struct desc_struct
*desc
, u32 base3
,
8111 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8112 struct kvm_segment var
;
8114 var
.selector
= selector
;
8115 var
.base
= get_desc_base(desc
);
8116 #ifdef CONFIG_X86_64
8117 var
.base
|= ((u64
)base3
) << 32;
8119 var
.limit
= get_desc_limit(desc
);
8121 var
.limit
= (var
.limit
<< 12) | 0xfff;
8122 var
.type
= desc
->type
;
8123 var
.dpl
= desc
->dpl
;
8128 var
.avl
= desc
->avl
;
8129 var
.present
= desc
->p
;
8130 var
.unusable
= !var
.present
;
8133 kvm_set_segment(vcpu
, &var
, seg
);
8137 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
8138 u32 msr_index
, u64
*pdata
)
8140 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8143 r
= kvm_get_msr_with_filter(vcpu
, msr_index
, pdata
);
8145 return X86EMUL_UNHANDLEABLE
;
8148 if (kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_RDMSR
, 0,
8149 complete_emulated_rdmsr
, r
))
8150 return X86EMUL_IO_NEEDED
;
8152 trace_kvm_msr_read_ex(msr_index
);
8153 return X86EMUL_PROPAGATE_FAULT
;
8156 trace_kvm_msr_read(msr_index
, *pdata
);
8157 return X86EMUL_CONTINUE
;
8160 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
8161 u32 msr_index
, u64 data
)
8163 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8166 r
= kvm_set_msr_with_filter(vcpu
, msr_index
, data
);
8168 return X86EMUL_UNHANDLEABLE
;
8171 if (kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_WRMSR
, data
,
8172 complete_emulated_msr_access
, r
))
8173 return X86EMUL_IO_NEEDED
;
8175 trace_kvm_msr_write_ex(msr_index
, data
);
8176 return X86EMUL_PROPAGATE_FAULT
;
8179 trace_kvm_msr_write(msr_index
, data
);
8180 return X86EMUL_CONTINUE
;
8183 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
8184 u32 msr_index
, u64
*pdata
)
8186 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
8189 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
8192 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
))
8197 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
8198 u32 pmc
, u64
*pdata
)
8200 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
8203 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
8205 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
8208 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
8209 struct x86_instruction_info
*info
,
8210 enum x86_intercept_stage stage
)
8212 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
8216 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
8217 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
8220 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
8223 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
8225 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
8228 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
8230 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
8233 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
8235 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
8238 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt
*ctxt
)
8240 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_RDPID
);
8243 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
8245 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
8248 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
8250 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
8253 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
8255 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
8258 static bool emulator_is_smm(struct x86_emulate_ctxt
*ctxt
)
8260 return is_smm(emul_to_vcpu(ctxt
));
8263 static bool emulator_is_guest_mode(struct x86_emulate_ctxt
*ctxt
)
8265 return is_guest_mode(emul_to_vcpu(ctxt
));
8268 #ifndef CONFIG_KVM_SMM
8269 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
)
8272 return X86EMUL_UNHANDLEABLE
;
8276 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
8278 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
8281 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
8283 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
8286 static void emulator_vm_bugged(struct x86_emulate_ctxt
*ctxt
)
8288 struct kvm
*kvm
= emul_to_vcpu(ctxt
)->kvm
;
8290 if (!kvm
->vm_bugged
)
8294 static const struct x86_emulate_ops emulate_ops
= {
8295 .vm_bugged
= emulator_vm_bugged
,
8296 .read_gpr
= emulator_read_gpr
,
8297 .write_gpr
= emulator_write_gpr
,
8298 .read_std
= emulator_read_std
,
8299 .write_std
= emulator_write_std
,
8300 .fetch
= kvm_fetch_guest_virt
,
8301 .read_emulated
= emulator_read_emulated
,
8302 .write_emulated
= emulator_write_emulated
,
8303 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
8304 .invlpg
= emulator_invlpg
,
8305 .pio_in_emulated
= emulator_pio_in_emulated
,
8306 .pio_out_emulated
= emulator_pio_out_emulated
,
8307 .get_segment
= emulator_get_segment
,
8308 .set_segment
= emulator_set_segment
,
8309 .get_cached_segment_base
= emulator_get_cached_segment_base
,
8310 .get_gdt
= emulator_get_gdt
,
8311 .get_idt
= emulator_get_idt
,
8312 .set_gdt
= emulator_set_gdt
,
8313 .set_idt
= emulator_set_idt
,
8314 .get_cr
= emulator_get_cr
,
8315 .set_cr
= emulator_set_cr
,
8316 .cpl
= emulator_get_cpl
,
8317 .get_dr
= emulator_get_dr
,
8318 .set_dr
= emulator_set_dr
,
8319 .set_msr_with_filter
= emulator_set_msr_with_filter
,
8320 .get_msr_with_filter
= emulator_get_msr_with_filter
,
8321 .get_msr
= emulator_get_msr
,
8322 .check_pmc
= emulator_check_pmc
,
8323 .read_pmc
= emulator_read_pmc
,
8324 .halt
= emulator_halt
,
8325 .wbinvd
= emulator_wbinvd
,
8326 .fix_hypercall
= emulator_fix_hypercall
,
8327 .intercept
= emulator_intercept
,
8328 .get_cpuid
= emulator_get_cpuid
,
8329 .guest_has_long_mode
= emulator_guest_has_long_mode
,
8330 .guest_has_movbe
= emulator_guest_has_movbe
,
8331 .guest_has_fxsr
= emulator_guest_has_fxsr
,
8332 .guest_has_rdpid
= emulator_guest_has_rdpid
,
8333 .set_nmi_mask
= emulator_set_nmi_mask
,
8334 .is_smm
= emulator_is_smm
,
8335 .is_guest_mode
= emulator_is_guest_mode
,
8336 .leave_smm
= emulator_leave_smm
,
8337 .triple_fault
= emulator_triple_fault
,
8338 .set_xcr
= emulator_set_xcr
,
8341 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
8343 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
8345 * an sti; sti; sequence only disable interrupts for the first
8346 * instruction. So, if the last instruction, be it emulated or
8347 * not, left the system with the INT_STI flag enabled, it
8348 * means that the last instruction is an sti. We should not
8349 * leave the flag on in this case. The same goes for mov ss
8351 if (int_shadow
& mask
)
8353 if (unlikely(int_shadow
|| mask
)) {
8354 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
8356 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8360 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
8362 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8364 if (ctxt
->exception
.vector
== PF_VECTOR
)
8365 kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
8366 else if (ctxt
->exception
.error_code_valid
)
8367 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
8368 ctxt
->exception
.error_code
);
8370 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
8373 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
8375 struct x86_emulate_ctxt
*ctxt
;
8377 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
8379 pr_err("failed to allocate vcpu's emulator\n");
8384 ctxt
->ops
= &emulate_ops
;
8385 vcpu
->arch
.emulate_ctxt
= ctxt
;
8390 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
8392 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8395 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
8397 ctxt
->gpa_available
= false;
8398 ctxt
->eflags
= kvm_get_rflags(vcpu
);
8399 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
8401 ctxt
->eip
= kvm_rip_read(vcpu
);
8402 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
8403 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
8404 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
8405 cs_db
? X86EMUL_MODE_PROT32
:
8406 X86EMUL_MODE_PROT16
;
8407 ctxt
->interruptibility
= 0;
8408 ctxt
->have_exception
= false;
8409 ctxt
->exception
.vector
= -1;
8410 ctxt
->perm_ok
= false;
8412 init_decode_cache(ctxt
);
8413 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8416 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
8418 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8421 init_emulate_ctxt(vcpu
);
8425 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
8426 ret
= emulate_int_real(ctxt
, irq
);
8428 if (ret
!= X86EMUL_CONTINUE
) {
8429 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
8431 ctxt
->eip
= ctxt
->_eip
;
8432 kvm_rip_write(vcpu
, ctxt
->eip
);
8433 kvm_set_rflags(vcpu
, ctxt
->eflags
);
8436 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
8438 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8439 u8 ndata
, u8
*insn_bytes
, u8 insn_size
)
8441 struct kvm_run
*run
= vcpu
->run
;
8446 * Zero the whole array used to retrieve the exit info, as casting to
8447 * u32 for select entries will leave some chunks uninitialized.
8449 memset(&info
, 0, sizeof(info
));
8451 static_call(kvm_x86_get_exit_info
)(vcpu
, (u32
*)&info
[0], &info
[1],
8452 &info
[2], (u32
*)&info
[3],
8455 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
8456 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
8459 * There's currently space for 13 entries, but 5 are used for the exit
8460 * reason and info. Restrict to 4 to reduce the maintenance burden
8461 * when expanding kvm_run.emulation_failure in the future.
8463 if (WARN_ON_ONCE(ndata
> 4))
8466 /* Always include the flags as a 'data' entry. */
8468 run
->emulation_failure
.flags
= 0;
8471 BUILD_BUG_ON((sizeof(run
->emulation_failure
.insn_size
) +
8472 sizeof(run
->emulation_failure
.insn_bytes
) != 16));
8474 run
->emulation_failure
.flags
|=
8475 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
8476 run
->emulation_failure
.insn_size
= insn_size
;
8477 memset(run
->emulation_failure
.insn_bytes
, 0x90,
8478 sizeof(run
->emulation_failure
.insn_bytes
));
8479 memcpy(run
->emulation_failure
.insn_bytes
, insn_bytes
, insn_size
);
8482 memcpy(&run
->internal
.data
[info_start
], info
, sizeof(info
));
8483 memcpy(&run
->internal
.data
[info_start
+ ARRAY_SIZE(info
)], data
,
8484 ndata
* sizeof(data
[0]));
8486 run
->emulation_failure
.ndata
= info_start
+ ARRAY_SIZE(info
) + ndata
;
8489 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu
*vcpu
)
8491 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8493 prepare_emulation_failure_exit(vcpu
, NULL
, 0, ctxt
->fetch
.data
,
8494 ctxt
->fetch
.end
- ctxt
->fetch
.data
);
8497 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8500 prepare_emulation_failure_exit(vcpu
, data
, ndata
, NULL
, 0);
8502 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit
);
8504 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
8506 __kvm_prepare_emulation_failure_exit(vcpu
, NULL
, 0);
8508 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit
);
8510 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
8512 struct kvm
*kvm
= vcpu
->kvm
;
8514 ++vcpu
->stat
.insn_emulation_fail
;
8515 trace_kvm_emulate_insn_failed(vcpu
);
8517 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
8518 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
8522 if (kvm
->arch
.exit_on_emulation_error
||
8523 (emulation_type
& EMULTYPE_SKIP
)) {
8524 prepare_emulation_ctxt_failure_exit(vcpu
);
8528 kvm_queue_exception(vcpu
, UD_VECTOR
);
8530 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
8531 prepare_emulation_ctxt_failure_exit(vcpu
);
8538 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
8541 gpa_t gpa
= cr2_or_gpa
;
8544 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8547 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8548 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8551 if (!vcpu
->arch
.mmu
->root_role
.direct
) {
8553 * Write permission should be allowed since only
8554 * write access need to be emulated.
8556 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8559 * If the mapping is invalid in guest, let cpu retry
8560 * it to generate fault.
8562 if (gpa
== INVALID_GPA
)
8567 * Do not retry the unhandleable instruction if it faults on the
8568 * readonly host memory, otherwise it will goto a infinite loop:
8569 * retry instruction -> write #PF -> emulation fail -> retry
8570 * instruction -> ...
8572 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
8575 * If the instruction failed on the error pfn, it can not be fixed,
8576 * report the error to userspace.
8578 if (is_error_noslot_pfn(pfn
))
8581 kvm_release_pfn_clean(pfn
);
8583 /* The instructions are well-emulated on direct mmu. */
8584 if (vcpu
->arch
.mmu
->root_role
.direct
) {
8585 unsigned int indirect_shadow_pages
;
8587 write_lock(&vcpu
->kvm
->mmu_lock
);
8588 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
8589 write_unlock(&vcpu
->kvm
->mmu_lock
);
8591 if (indirect_shadow_pages
)
8592 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8598 * if emulation was due to access to shadowed page table
8599 * and it failed try to unshadow page and re-enter the
8600 * guest to let CPU execute the instruction.
8602 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8605 * If the access faults on its page table, it can not
8606 * be fixed by unprotecting shadow page and it should
8607 * be reported to userspace.
8609 return !(emulation_type
& EMULTYPE_WRITE_PF_TO_SP
);
8612 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
8613 gpa_t cr2_or_gpa
, int emulation_type
)
8615 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8616 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
8618 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
8619 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
8622 * If the emulation is caused by #PF and it is non-page_table
8623 * writing instruction, it means the VM-EXIT is caused by shadow
8624 * page protected, we can zap the shadow page and retry this
8625 * instruction directly.
8627 * Note: if the guest uses a non-page-table modifying instruction
8628 * on the PDE that points to the instruction, then we will unmap
8629 * the instruction and go to an infinite loop. So, we cache the
8630 * last retried eip and the last fault address, if we meet the eip
8631 * and the address again, we can break out of the potential infinite
8634 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
8636 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8639 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8640 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8643 if (x86_page_table_writing_insn(ctxt
))
8646 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
8649 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
8650 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
8652 if (!vcpu
->arch
.mmu
->root_role
.direct
)
8653 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8655 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8660 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
8661 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
8663 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
8672 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
8673 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
8678 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
8680 struct kvm_run
*kvm_run
= vcpu
->run
;
8682 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
8683 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
8684 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
8685 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8686 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8689 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
8693 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
8695 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8698 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
8702 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
8705 * rflags is the old, "raw" value of the flags. The new value has
8706 * not been saved yet.
8708 * This is correct even for TF set by the guest, because "the
8709 * processor will not generate this exception after the instruction
8710 * that sets the TF flag".
8712 if (unlikely(rflags
& X86_EFLAGS_TF
))
8713 r
= kvm_vcpu_do_singlestep(vcpu
);
8716 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
8718 static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu
*vcpu
)
8722 if (kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)
8726 * Intel CPUs inhibit code #DBs when MOV/POP SS blocking is active,
8727 * but AMD CPUs do not. MOV/POP SS blocking is rare, check that first
8728 * to avoid the relatively expensive CPUID lookup.
8730 shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
8731 return (shadow
& KVM_X86_SHADOW_INT_MOV_SS
) &&
8732 guest_cpuid_is_intel(vcpu
);
8735 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu
*vcpu
,
8736 int emulation_type
, int *r
)
8738 WARN_ON_ONCE(emulation_type
& EMULTYPE_NO_DECODE
);
8741 * Do not check for code breakpoints if hardware has already done the
8742 * checks, as inferred from the emulation type. On NO_DECODE and SKIP,
8743 * the instruction has passed all exception checks, and all intercepted
8744 * exceptions that trigger emulation have lower priority than code
8745 * breakpoints, i.e. the fact that the intercepted exception occurred
8746 * means any code breakpoints have already been serviced.
8748 * Note, KVM needs to check for code #DBs on EMULTYPE_TRAP_UD_FORCED as
8749 * hardware has checked the RIP of the magic prefix, but not the RIP of
8750 * the instruction being emulated. The intent of forced emulation is
8751 * to behave as if KVM intercepted the instruction without an exception
8752 * and without a prefix.
8754 if (emulation_type
& (EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
8755 EMULTYPE_TRAP_UD
| EMULTYPE_VMWARE_GP
| EMULTYPE_PF
))
8758 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
8759 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
8760 struct kvm_run
*kvm_run
= vcpu
->run
;
8761 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8762 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8763 vcpu
->arch
.guest_debug_dr7
,
8767 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
8768 kvm_run
->debug
.arch
.pc
= eip
;
8769 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8770 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8776 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
8777 !kvm_is_code_breakpoint_inhibited(vcpu
)) {
8778 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8779 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8784 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
8793 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
8795 switch (ctxt
->opcode_len
) {
8802 case 0xe6: /* OUT */
8806 case 0x6c: /* INS */
8808 case 0x6e: /* OUTS */
8815 case 0x33: /* RDPMC */
8825 * Decode an instruction for emulation. The caller is responsible for handling
8826 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8827 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8828 * code breakpoints have higher priority and thus have already been done by
8831 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8832 * response to a machine check.
8834 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
8835 void *insn
, int insn_len
)
8837 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8840 init_emulate_ctxt(vcpu
);
8842 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
8844 trace_kvm_emulate_insn_start(vcpu
);
8845 ++vcpu
->stat
.insn_emulation
;
8849 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
8851 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
8852 int emulation_type
, void *insn
, int insn_len
)
8855 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8856 bool writeback
= true;
8858 if (unlikely(!kvm_can_emulate_insn(vcpu
, emulation_type
, insn
, insn_len
)))
8861 vcpu
->arch
.l1tf_flush_l1d
= true;
8863 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
8864 kvm_clear_exception_queue(vcpu
);
8867 * Return immediately if RIP hits a code breakpoint, such #DBs
8868 * are fault-like and are higher priority than any faults on
8869 * the code fetch itself.
8871 if (kvm_vcpu_check_code_breakpoint(vcpu
, emulation_type
, &r
))
8874 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
8876 if (r
!= EMULATION_OK
) {
8877 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
8878 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
8879 kvm_queue_exception(vcpu
, UD_VECTOR
);
8882 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
8886 if (ctxt
->have_exception
&&
8887 !(emulation_type
& EMULTYPE_SKIP
)) {
8889 * #UD should result in just EMULATION_FAILED, and trap-like
8890 * exception should not be encountered during decode.
8892 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
8893 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
8894 inject_emulated_exception(vcpu
);
8897 return handle_emulation_failure(vcpu
, emulation_type
);
8901 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
8902 !is_vmware_backdoor_opcode(ctxt
)) {
8903 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
8908 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8909 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8910 * The caller is responsible for updating interruptibility state and
8911 * injecting single-step #DBs.
8913 if (emulation_type
& EMULTYPE_SKIP
) {
8914 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
8915 ctxt
->eip
= (u32
)ctxt
->_eip
;
8917 ctxt
->eip
= ctxt
->_eip
;
8919 if (emulation_type
& EMULTYPE_COMPLETE_USER_EXIT
) {
8924 kvm_rip_write(vcpu
, ctxt
->eip
);
8925 if (ctxt
->eflags
& X86_EFLAGS_RF
)
8926 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
8930 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
8933 /* this is needed for vmware backdoor interface to work since it
8934 changes registers values during IO operation */
8935 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
8936 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8937 emulator_invalidate_register_cache(ctxt
);
8941 if (emulation_type
& EMULTYPE_PF
) {
8942 /* Save the faulting GPA (cr2) in the address field */
8943 ctxt
->exception
.address
= cr2_or_gpa
;
8945 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8946 if (vcpu
->arch
.mmu
->root_role
.direct
) {
8947 ctxt
->gpa_available
= true;
8948 ctxt
->gpa_val
= cr2_or_gpa
;
8951 /* Sanitize the address out of an abundance of paranoia. */
8952 ctxt
->exception
.address
= 0;
8955 r
= x86_emulate_insn(ctxt
);
8957 if (r
== EMULATION_INTERCEPTED
)
8960 if (r
== EMULATION_FAILED
) {
8961 if (reexecute_instruction(vcpu
, cr2_or_gpa
, emulation_type
))
8964 return handle_emulation_failure(vcpu
, emulation_type
);
8967 if (ctxt
->have_exception
) {
8968 WARN_ON_ONCE(vcpu
->mmio_needed
&& !vcpu
->mmio_is_write
);
8969 vcpu
->mmio_needed
= false;
8971 inject_emulated_exception(vcpu
);
8972 } else if (vcpu
->arch
.pio
.count
) {
8973 if (!vcpu
->arch
.pio
.in
) {
8974 /* FIXME: return into emulator if single-stepping. */
8975 vcpu
->arch
.pio
.count
= 0;
8978 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
8981 } else if (vcpu
->mmio_needed
) {
8982 ++vcpu
->stat
.mmio_exits
;
8984 if (!vcpu
->mmio_is_write
)
8987 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8988 } else if (vcpu
->arch
.complete_userspace_io
) {
8991 } else if (r
== EMULATION_RESTART
)
8998 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8999 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
9000 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9003 * Note, EXCPT_DB is assumed to be fault-like as the emulator
9004 * only supports code breakpoints and general detect #DB, both
9005 * of which are fault-like.
9007 if (!ctxt
->have_exception
||
9008 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
9009 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
9010 if (ctxt
->is_branch
)
9011 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_BRANCH_INSTRUCTIONS
);
9012 kvm_rip_write(vcpu
, ctxt
->eip
);
9013 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
9014 r
= kvm_vcpu_do_singlestep(vcpu
);
9015 static_call_cond(kvm_x86_update_emulated_instruction
)(vcpu
);
9016 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
9020 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
9021 * do nothing, and it will be requested again as soon as
9022 * the shadow expires. But we still need to check here,
9023 * because POPF has no interrupt shadow.
9025 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
9026 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9028 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
9033 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
9035 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
9037 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
9039 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
9040 void *insn
, int insn_len
)
9042 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
9044 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
9046 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
9048 vcpu
->arch
.pio
.count
= 0;
9052 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
9054 vcpu
->arch
.pio
.count
= 0;
9056 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
9059 return kvm_skip_emulated_instruction(vcpu
);
9062 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
9063 unsigned short port
)
9065 unsigned long val
= kvm_rax_read(vcpu
);
9066 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
9072 * Workaround userspace that relies on old KVM behavior of %rip being
9073 * incremented prior to exiting to userspace to handle "OUT 0x7e".
9076 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
9077 vcpu
->arch
.complete_userspace_io
=
9078 complete_fast_pio_out_port_0x7e
;
9079 kvm_skip_emulated_instruction(vcpu
);
9081 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
9082 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
9087 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
9091 /* We should only ever be called with arch.pio.count equal to 1 */
9092 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
9094 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
9095 vcpu
->arch
.pio
.count
= 0;
9099 /* For size less than 4 we merge, else we zero extend */
9100 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
9102 complete_emulator_pio_in(vcpu
, &val
);
9103 kvm_rax_write(vcpu
, val
);
9105 return kvm_skip_emulated_instruction(vcpu
);
9108 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
9109 unsigned short port
)
9114 /* For size less than 4 we merge, else we zero extend */
9115 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
9117 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
9119 kvm_rax_write(vcpu
, val
);
9123 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
9124 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
9129 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
9134 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
9136 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
9137 return ret
&& kvm_skip_emulated_instruction(vcpu
);
9139 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
9141 static int kvmclock_cpu_down_prep(unsigned int cpu
)
9143 __this_cpu_write(cpu_tsc_khz
, 0);
9147 static void tsc_khz_changed(void *data
)
9149 struct cpufreq_freqs
*freq
= data
;
9150 unsigned long khz
= 0;
9152 WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_CONSTANT_TSC
));
9157 khz
= cpufreq_quick_get(raw_smp_processor_id());
9160 __this_cpu_write(cpu_tsc_khz
, khz
);
9163 #ifdef CONFIG_X86_64
9164 static void kvm_hyperv_tsc_notifier(void)
9169 mutex_lock(&kvm_lock
);
9170 list_for_each_entry(kvm
, &vm_list
, vm_list
)
9171 kvm_make_mclock_inprogress_request(kvm
);
9173 /* no guest entries from this point */
9174 hyperv_stop_tsc_emulation();
9176 /* TSC frequency always matches when on Hyper-V */
9177 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9178 for_each_present_cpu(cpu
)
9179 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
9181 kvm_caps
.max_guest_tsc_khz
= tsc_khz
;
9183 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9184 __kvm_start_pvclock_update(kvm
);
9185 pvclock_update_vm_gtod_copy(kvm
);
9186 kvm_end_pvclock_update(kvm
);
9189 mutex_unlock(&kvm_lock
);
9193 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
9196 struct kvm_vcpu
*vcpu
;
9201 * We allow guests to temporarily run on slowing clocks,
9202 * provided we notify them after, or to run on accelerating
9203 * clocks, provided we notify them before. Thus time never
9206 * However, we have a problem. We can't atomically update
9207 * the frequency of a given CPU from this function; it is
9208 * merely a notifier, which can be called from any CPU.
9209 * Changing the TSC frequency at arbitrary points in time
9210 * requires a recomputation of local variables related to
9211 * the TSC for each VCPU. We must flag these local variables
9212 * to be updated and be sure the update takes place with the
9213 * new frequency before any guests proceed.
9215 * Unfortunately, the combination of hotplug CPU and frequency
9216 * change creates an intractable locking scenario; the order
9217 * of when these callouts happen is undefined with respect to
9218 * CPU hotplug, and they can race with each other. As such,
9219 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
9220 * undefined; you can actually have a CPU frequency change take
9221 * place in between the computation of X and the setting of the
9222 * variable. To protect against this problem, all updates of
9223 * the per_cpu tsc_khz variable are done in an interrupt
9224 * protected IPI, and all callers wishing to update the value
9225 * must wait for a synchronous IPI to complete (which is trivial
9226 * if the caller is on the CPU already). This establishes the
9227 * necessary total order on variable updates.
9229 * Note that because a guest time update may take place
9230 * anytime after the setting of the VCPU's request bit, the
9231 * correct TSC value must be set before the request. However,
9232 * to ensure the update actually makes it to any guest which
9233 * starts running in hardware virtualization between the set
9234 * and the acquisition of the spinlock, we must also ping the
9235 * CPU after setting the request bit.
9239 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
9241 mutex_lock(&kvm_lock
);
9242 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9243 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9244 if (vcpu
->cpu
!= cpu
)
9246 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9247 if (vcpu
->cpu
!= raw_smp_processor_id())
9251 mutex_unlock(&kvm_lock
);
9253 if (freq
->old
< freq
->new && send_ipi
) {
9255 * We upscale the frequency. Must make the guest
9256 * doesn't see old kvmclock values while running with
9257 * the new frequency, otherwise we risk the guest sees
9258 * time go backwards.
9260 * In case we update the frequency for another cpu
9261 * (which might be in guest context) send an interrupt
9262 * to kick the cpu out of guest context. Next time
9263 * guest context is entered kvmclock will be updated,
9264 * so the guest will not see stale values.
9266 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
9270 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
9273 struct cpufreq_freqs
*freq
= data
;
9276 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
9278 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
9281 for_each_cpu(cpu
, freq
->policy
->cpus
)
9282 __kvmclock_cpufreq_notifier(freq
, cpu
);
9287 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
9288 .notifier_call
= kvmclock_cpufreq_notifier
9291 static int kvmclock_cpu_online(unsigned int cpu
)
9293 tsc_khz_changed(NULL
);
9297 static void kvm_timer_init(void)
9299 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9300 max_tsc_khz
= tsc_khz
;
9302 if (IS_ENABLED(CONFIG_CPU_FREQ
)) {
9303 struct cpufreq_policy
*policy
;
9307 policy
= cpufreq_cpu_get(cpu
);
9309 if (policy
->cpuinfo
.max_freq
)
9310 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
9311 cpufreq_cpu_put(policy
);
9315 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
9316 CPUFREQ_TRANSITION_NOTIFIER
);
9318 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
9319 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
9323 #ifdef CONFIG_X86_64
9324 static void pvclock_gtod_update_fn(struct work_struct
*work
)
9327 struct kvm_vcpu
*vcpu
;
9330 mutex_lock(&kvm_lock
);
9331 list_for_each_entry(kvm
, &vm_list
, vm_list
)
9332 kvm_for_each_vcpu(i
, vcpu
, kvm
)
9333 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
9334 atomic_set(&kvm_guest_has_master_clock
, 0);
9335 mutex_unlock(&kvm_lock
);
9338 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
9341 * Indirection to move queue_work() out of the tk_core.seq write held
9342 * region to prevent possible deadlocks against time accessors which
9343 * are invoked with work related locks held.
9345 static void pvclock_irq_work_fn(struct irq_work
*w
)
9347 queue_work(system_long_wq
, &pvclock_gtod_work
);
9350 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
9353 * Notification about pvclock gtod data update.
9355 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
9358 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
9359 struct timekeeper
*tk
= priv
;
9361 update_pvclock_gtod(tk
);
9364 * Disable master clock if host does not trust, or does not use,
9365 * TSC based clocksource. Delegate queue_work() to irq_work as
9366 * this is invoked with tk_core.seq write held.
9368 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
9369 atomic_read(&kvm_guest_has_master_clock
) != 0)
9370 irq_work_queue(&pvclock_irq_work
);
9374 static struct notifier_block pvclock_gtod_notifier
= {
9375 .notifier_call
= pvclock_gtod_notify
,
9379 static inline void kvm_ops_update(struct kvm_x86_init_ops
*ops
)
9381 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
9383 #define __KVM_X86_OP(func) \
9384 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
9385 #define KVM_X86_OP(func) \
9386 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
9387 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
9388 #define KVM_X86_OP_OPTIONAL_RET0(func) \
9389 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
9390 (void *)__static_call_return0);
9391 #include <asm/kvm-x86-ops.h>
9394 kvm_pmu_ops_update(ops
->pmu_ops
);
9397 static int kvm_x86_check_processor_compatibility(void)
9399 int cpu
= smp_processor_id();
9400 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
9403 * Compatibility checks are done when loading KVM and when enabling
9404 * hardware, e.g. during CPU hotplug, to ensure all online CPUs are
9405 * compatible, i.e. KVM should never perform a compatibility check on
9408 WARN_ON(!cpu_online(cpu
));
9410 if (__cr4_reserved_bits(cpu_has
, c
) !=
9411 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
9414 return static_call(kvm_x86_check_processor_compatibility
)();
9417 static void kvm_x86_check_cpu_compat(void *ret
)
9419 *(int *)ret
= kvm_x86_check_processor_compatibility();
9422 static int __kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
)
9427 if (kvm_x86_ops
.hardware_enable
) {
9428 pr_err("already loaded vendor module '%s'\n", kvm_x86_ops
.name
);
9433 * KVM explicitly assumes that the guest has an FPU and
9434 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
9435 * vCPU's FPU state as a fxregs_state struct.
9437 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
9438 pr_err("inadequate fpu\n");
9442 if (IS_ENABLED(CONFIG_PREEMPT_RT
) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9443 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9448 * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
9449 * the PAT bits in SPTEs. Bail if PAT[0] is programmed to something
9450 * other than WB. Note, EPT doesn't utilize the PAT, but don't bother
9451 * with an exception. PAT[0] is set to WB on RESET and also by the
9452 * kernel, i.e. failure indicates a kernel bug or broken firmware.
9454 if (rdmsrl_safe(MSR_IA32_CR_PAT
, &host_pat
) ||
9455 (host_pat
& GENMASK(2, 0)) != 6) {
9456 pr_err("host PAT[0] is not WB\n");
9460 x86_emulator_cache
= kvm_alloc_emulator_cache();
9461 if (!x86_emulator_cache
) {
9462 pr_err("failed to allocate cache for x86 emulator\n");
9466 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
9467 if (!user_return_msrs
) {
9468 pr_err("failed to allocate percpu kvm_user_return_msrs\n");
9470 goto out_free_x86_emulator_cache
;
9472 kvm_nr_uret_msrs
= 0;
9474 r
= kvm_mmu_vendor_module_init();
9476 goto out_free_percpu
;
9478 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
9479 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
9480 kvm_caps
.supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
9483 rdmsrl_safe(MSR_EFER
, &host_efer
);
9485 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9486 rdmsrl(MSR_IA32_XSS
, host_xss
);
9488 kvm_init_pmu_capability(ops
->pmu_ops
);
9490 r
= ops
->hardware_setup();
9494 kvm_ops_update(ops
);
9496 for_each_online_cpu(cpu
) {
9497 smp_call_function_single(cpu
, kvm_x86_check_cpu_compat
, &r
, 1);
9499 goto out_unwind_ops
;
9503 * Point of no return! DO NOT add error paths below this point unless
9504 * absolutely necessary, as most operations from this point forward
9505 * require unwinding.
9509 if (pi_inject_timer
== -1)
9510 pi_inject_timer
= housekeeping_enabled(HK_TYPE_TIMER
);
9511 #ifdef CONFIG_X86_64
9512 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
9514 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9515 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
9518 kvm_register_perf_callbacks(ops
->handle_intel_pt_intr
);
9520 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
9521 kvm_caps
.supported_xss
= 0;
9523 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
9524 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
9525 #undef __kvm_cpu_cap_has
9527 if (kvm_caps
.has_tsc_control
) {
9529 * Make sure the user can only configure tsc_khz values that
9530 * fit into a signed integer.
9531 * A min value is not calculated because it will always
9532 * be 1 on all machines.
9534 u64 max
= min(0x7fffffffULL
,
9535 __scale_tsc(kvm_caps
.max_tsc_scaling_ratio
, tsc_khz
));
9536 kvm_caps
.max_guest_tsc_khz
= max
;
9538 kvm_caps
.default_tsc_scaling_ratio
= 1ULL << kvm_caps
.tsc_scaling_ratio_frac_bits
;
9539 kvm_init_msr_lists();
9543 kvm_x86_ops
.hardware_enable
= NULL
;
9544 static_call(kvm_x86_hardware_unsetup
)();
9546 kvm_mmu_vendor_module_exit();
9548 free_percpu(user_return_msrs
);
9549 out_free_x86_emulator_cache
:
9550 kmem_cache_destroy(x86_emulator_cache
);
9554 int kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
)
9558 mutex_lock(&vendor_module_lock
);
9559 r
= __kvm_x86_vendor_init(ops
);
9560 mutex_unlock(&vendor_module_lock
);
9564 EXPORT_SYMBOL_GPL(kvm_x86_vendor_init
);
9566 void kvm_x86_vendor_exit(void)
9568 kvm_unregister_perf_callbacks();
9570 #ifdef CONFIG_X86_64
9571 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9572 clear_hv_tscchange_cb();
9576 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9577 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
9578 CPUFREQ_TRANSITION_NOTIFIER
);
9579 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
9581 #ifdef CONFIG_X86_64
9582 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
9583 irq_work_sync(&pvclock_irq_work
);
9584 cancel_work_sync(&pvclock_gtod_work
);
9586 static_call(kvm_x86_hardware_unsetup
)();
9587 kvm_mmu_vendor_module_exit();
9588 free_percpu(user_return_msrs
);
9589 kmem_cache_destroy(x86_emulator_cache
);
9590 #ifdef CONFIG_KVM_XEN
9591 static_key_deferred_flush(&kvm_xen_enabled
);
9592 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
9594 mutex_lock(&vendor_module_lock
);
9595 kvm_x86_ops
.hardware_enable
= NULL
;
9596 mutex_unlock(&vendor_module_lock
);
9598 EXPORT_SYMBOL_GPL(kvm_x86_vendor_exit
);
9600 static int __kvm_emulate_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
9603 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9604 * local APIC is in-kernel, the run loop will detect the non-runnable
9605 * state and halt the vCPU. Exit to userspace if the local APIC is
9606 * managed by userspace, in which case userspace is responsible for
9607 * handling wake events.
9609 ++vcpu
->stat
.halt_exits
;
9610 if (lapic_in_kernel(vcpu
)) {
9611 vcpu
->arch
.mp_state
= state
;
9614 vcpu
->run
->exit_reason
= reason
;
9619 int kvm_emulate_halt_noskip(struct kvm_vcpu
*vcpu
)
9621 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
9623 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip
);
9625 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
9627 int ret
= kvm_skip_emulated_instruction(vcpu
);
9629 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9630 * KVM_EXIT_DEBUG here.
9632 return kvm_emulate_halt_noskip(vcpu
) && ret
;
9634 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
9636 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
9638 int ret
= kvm_skip_emulated_instruction(vcpu
);
9640 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
,
9641 KVM_EXIT_AP_RESET_HOLD
) && ret
;
9643 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
9645 #ifdef CONFIG_X86_64
9646 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
9647 unsigned long clock_type
)
9649 struct kvm_clock_pairing clock_pairing
;
9650 struct timespec64 ts
;
9654 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
9655 return -KVM_EOPNOTSUPP
;
9658 * When tsc is in permanent catchup mode guests won't be able to use
9659 * pvclock_read_retry loop to get consistent view of pvclock
9661 if (vcpu
->arch
.tsc_always_catchup
)
9662 return -KVM_EOPNOTSUPP
;
9664 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
9665 return -KVM_EOPNOTSUPP
;
9667 clock_pairing
.sec
= ts
.tv_sec
;
9668 clock_pairing
.nsec
= ts
.tv_nsec
;
9669 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
9670 clock_pairing
.flags
= 0;
9671 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
9674 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
9675 sizeof(struct kvm_clock_pairing
)))
9683 * kvm_pv_kick_cpu_op: Kick a vcpu.
9685 * @apicid - apicid of vcpu to be kicked.
9687 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, int apicid
)
9690 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
9691 * common code, e.g. for tracing. Defer initialization to the compiler.
9693 struct kvm_lapic_irq lapic_irq
= {
9694 .delivery_mode
= APIC_DM_REMRD
,
9695 .dest_mode
= APIC_DEST_PHYSICAL
,
9696 .shorthand
= APIC_DEST_NOSHORT
,
9700 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
9703 bool kvm_apicv_activated(struct kvm
*kvm
)
9705 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
9707 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
9709 bool kvm_vcpu_apicv_activated(struct kvm_vcpu
*vcpu
)
9711 ulong vm_reasons
= READ_ONCE(vcpu
->kvm
->arch
.apicv_inhibit_reasons
);
9712 ulong vcpu_reasons
= static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons
)(vcpu
);
9714 return (vm_reasons
| vcpu_reasons
) == 0;
9716 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated
);
9718 static void set_or_clear_apicv_inhibit(unsigned long *inhibits
,
9719 enum kvm_apicv_inhibit reason
, bool set
)
9722 __set_bit(reason
, inhibits
);
9724 __clear_bit(reason
, inhibits
);
9726 trace_kvm_apicv_inhibit_changed(reason
, set
, *inhibits
);
9729 static void kvm_apicv_init(struct kvm
*kvm
)
9731 unsigned long *inhibits
= &kvm
->arch
.apicv_inhibit_reasons
;
9733 init_rwsem(&kvm
->arch
.apicv_update_lock
);
9735 set_or_clear_apicv_inhibit(inhibits
, APICV_INHIBIT_REASON_ABSENT
, true);
9738 set_or_clear_apicv_inhibit(inhibits
,
9739 APICV_INHIBIT_REASON_DISABLE
, true);
9742 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
9744 struct kvm_vcpu
*target
= NULL
;
9745 struct kvm_apic_map
*map
;
9747 vcpu
->stat
.directed_yield_attempted
++;
9749 if (single_task_running())
9753 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
9755 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
9756 target
= map
->phys_map
[dest_id
]->vcpu
;
9760 if (!target
|| !READ_ONCE(target
->ready
))
9763 /* Ignore requests to yield to self */
9767 if (kvm_vcpu_yield_to(target
) <= 0)
9770 vcpu
->stat
.directed_yield_successful
++;
9776 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
9778 u64 ret
= vcpu
->run
->hypercall
.ret
;
9780 if (!is_64_bit_mode(vcpu
))
9782 kvm_rax_write(vcpu
, ret
);
9783 ++vcpu
->stat
.hypercalls
;
9784 return kvm_skip_emulated_instruction(vcpu
);
9787 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
9789 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
9792 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
9793 return kvm_xen_hypercall(vcpu
);
9795 if (kvm_hv_hypercall_enabled(vcpu
))
9796 return kvm_hv_hypercall(vcpu
);
9798 nr
= kvm_rax_read(vcpu
);
9799 a0
= kvm_rbx_read(vcpu
);
9800 a1
= kvm_rcx_read(vcpu
);
9801 a2
= kvm_rdx_read(vcpu
);
9802 a3
= kvm_rsi_read(vcpu
);
9804 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
9806 op_64_bit
= is_64_bit_hypercall(vcpu
);
9815 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
9823 case KVM_HC_VAPIC_POLL_IRQ
:
9826 case KVM_HC_KICK_CPU
:
9827 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
9830 kvm_pv_kick_cpu_op(vcpu
->kvm
, a1
);
9831 kvm_sched_yield(vcpu
, a1
);
9834 #ifdef CONFIG_X86_64
9835 case KVM_HC_CLOCK_PAIRING
:
9836 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
9839 case KVM_HC_SEND_IPI
:
9840 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
9843 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
9845 case KVM_HC_SCHED_YIELD
:
9846 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
9849 kvm_sched_yield(vcpu
, a0
);
9852 case KVM_HC_MAP_GPA_RANGE
: {
9853 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
9856 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
9859 if (!PAGE_ALIGNED(gpa
) || !npages
||
9860 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
9865 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
9866 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
9867 vcpu
->run
->hypercall
.args
[0] = gpa
;
9868 vcpu
->run
->hypercall
.args
[1] = npages
;
9869 vcpu
->run
->hypercall
.args
[2] = attrs
;
9870 vcpu
->run
->hypercall
.flags
= 0;
9872 vcpu
->run
->hypercall
.flags
|= KVM_EXIT_HYPERCALL_LONG_MODE
;
9874 WARN_ON_ONCE(vcpu
->run
->hypercall
.flags
& KVM_EXIT_HYPERCALL_MBZ
);
9875 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
9885 kvm_rax_write(vcpu
, ret
);
9887 ++vcpu
->stat
.hypercalls
;
9888 return kvm_skip_emulated_instruction(vcpu
);
9890 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
9892 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
9894 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
9895 char instruction
[3];
9896 unsigned long rip
= kvm_rip_read(vcpu
);
9899 * If the quirk is disabled, synthesize a #UD and let the guest pick up
9902 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_FIX_HYPERCALL_INSN
)) {
9903 ctxt
->exception
.error_code_valid
= false;
9904 ctxt
->exception
.vector
= UD_VECTOR
;
9905 ctxt
->have_exception
= true;
9906 return X86EMUL_PROPAGATE_FAULT
;
9909 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
9911 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
9915 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
9917 return vcpu
->run
->request_interrupt_window
&&
9918 likely(!pic_in_kernel(vcpu
->kvm
));
9921 /* Called within kvm->srcu read side. */
9922 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
9924 struct kvm_run
*kvm_run
= vcpu
->run
;
9926 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
9927 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
9928 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
9930 kvm_run
->ready_for_interrupt_injection
=
9931 pic_in_kernel(vcpu
->kvm
) ||
9932 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
9935 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
9938 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
9942 if (!kvm_x86_ops
.update_cr8_intercept
)
9945 if (!lapic_in_kernel(vcpu
))
9948 if (vcpu
->arch
.apic
->apicv_active
)
9951 if (!vcpu
->arch
.apic
->vapic_addr
)
9952 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
9959 tpr
= kvm_lapic_get_cr8(vcpu
);
9961 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
9965 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
9967 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9968 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9972 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
9975 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
9978 * Suppress the error code if the vCPU is in Real Mode, as Real Mode
9979 * exceptions don't report error codes. The presence of an error code
9980 * is carried with the exception and only stripped when the exception
9981 * is injected as intercepted #PF VM-Exits for AMD's Paged Real Mode do
9982 * report an error code despite the CPU being in Real Mode.
9984 vcpu
->arch
.exception
.has_error_code
&= is_protmode(vcpu
);
9986 trace_kvm_inj_exception(vcpu
->arch
.exception
.vector
,
9987 vcpu
->arch
.exception
.has_error_code
,
9988 vcpu
->arch
.exception
.error_code
,
9989 vcpu
->arch
.exception
.injected
);
9991 static_call(kvm_x86_inject_exception
)(vcpu
);
9995 * Check for any event (interrupt or exception) that is ready to be injected,
9996 * and if there is at least one event, inject the event with the highest
9997 * priority. This handles both "pending" events, i.e. events that have never
9998 * been injected into the guest, and "injected" events, i.e. events that were
9999 * injected as part of a previous VM-Enter, but weren't successfully delivered
10000 * and need to be re-injected.
10002 * Note, this is not guaranteed to be invoked on a guest instruction boundary,
10003 * i.e. doesn't guarantee that there's an event window in the guest. KVM must
10004 * be able to inject exceptions in the "middle" of an instruction, and so must
10005 * also be able to re-inject NMIs and IRQs in the middle of an instruction.
10006 * I.e. for exceptions and re-injected events, NOT invoking this on instruction
10007 * boundaries is necessary and correct.
10009 * For simplicity, KVM uses a single path to inject all events (except events
10010 * that are injected directly from L1 to L2) and doesn't explicitly track
10011 * instruction boundaries for asynchronous events. However, because VM-Exits
10012 * that can occur during instruction execution typically result in KVM skipping
10013 * the instruction or injecting an exception, e.g. instruction and exception
10014 * intercepts, and because pending exceptions have higher priority than pending
10015 * interrupts, KVM still honors instruction boundaries in most scenarios.
10017 * But, if a VM-Exit occurs during instruction execution, and KVM does NOT skip
10018 * the instruction or inject an exception, then KVM can incorrecty inject a new
10019 * asynchrounous event if the event became pending after the CPU fetched the
10020 * instruction (in the guest). E.g. if a page fault (#PF, #NPF, EPT violation)
10021 * occurs and is resolved by KVM, a coincident NMI, SMI, IRQ, etc... can be
10022 * injected on the restarted instruction instead of being deferred until the
10023 * instruction completes.
10025 * In practice, this virtualization hole is unlikely to be observed by the
10026 * guest, and even less likely to cause functional problems. To detect the
10027 * hole, the guest would have to trigger an event on a side effect of an early
10028 * phase of instruction execution, e.g. on the instruction fetch from memory.
10029 * And for it to be a functional problem, the guest would need to depend on the
10030 * ordering between that side effect, the instruction completing, _and_ the
10031 * delivery of the asynchronous event.
10033 static int kvm_check_and_inject_events(struct kvm_vcpu
*vcpu
,
10034 bool *req_immediate_exit
)
10040 * Process nested events first, as nested VM-Exit supercedes event
10041 * re-injection. If there's an event queued for re-injection, it will
10042 * be saved into the appropriate vmc{b,s}12 fields on nested VM-Exit.
10044 if (is_guest_mode(vcpu
))
10045 r
= kvm_check_nested_events(vcpu
);
10050 * Re-inject exceptions and events *especially* if immediate entry+exit
10051 * to/from L2 is needed, as any event that has already been injected
10052 * into L2 needs to complete its lifecycle before injecting a new event.
10054 * Don't re-inject an NMI or interrupt if there is a pending exception.
10055 * This collision arises if an exception occurred while vectoring the
10056 * injected event, KVM intercepted said exception, and KVM ultimately
10057 * determined the fault belongs to the guest and queues the exception
10058 * for injection back into the guest.
10060 * "Injected" interrupts can also collide with pending exceptions if
10061 * userspace ignores the "ready for injection" flag and blindly queues
10062 * an interrupt. In that case, prioritizing the exception is correct,
10063 * as the exception "occurred" before the exit to userspace. Trap-like
10064 * exceptions, e.g. most #DBs, have higher priority than interrupts.
10065 * And while fault-like exceptions, e.g. #GP and #PF, are the lowest
10066 * priority, they're only generated (pended) during instruction
10067 * execution, and interrupts are recognized at instruction boundaries.
10068 * Thus a pending fault-like exception means the fault occurred on the
10069 * *previous* instruction and must be serviced prior to recognizing any
10070 * new events in order to fully complete the previous instruction.
10072 if (vcpu
->arch
.exception
.injected
)
10073 kvm_inject_exception(vcpu
);
10074 else if (kvm_is_exception_pending(vcpu
))
10076 else if (vcpu
->arch
.nmi_injected
)
10077 static_call(kvm_x86_inject_nmi
)(vcpu
);
10078 else if (vcpu
->arch
.interrupt
.injected
)
10079 static_call(kvm_x86_inject_irq
)(vcpu
, true);
10082 * Exceptions that morph to VM-Exits are handled above, and pending
10083 * exceptions on top of injected exceptions that do not VM-Exit should
10084 * either morph to #DF or, sadly, override the injected exception.
10086 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
10087 vcpu
->arch
.exception
.pending
);
10090 * Bail if immediate entry+exit to/from the guest is needed to complete
10091 * nested VM-Enter or event re-injection so that a different pending
10092 * event can be serviced (or if KVM needs to exit to userspace).
10094 * Otherwise, continue processing events even if VM-Exit occurred. The
10095 * VM-Exit will have cleared exceptions that were meant for L2, but
10096 * there may now be events that can be injected into L1.
10102 * A pending exception VM-Exit should either result in nested VM-Exit
10103 * or force an immediate re-entry and exit to/from L2, and exception
10104 * VM-Exits cannot be injected (flag should _never_ be set).
10106 WARN_ON_ONCE(vcpu
->arch
.exception_vmexit
.injected
||
10107 vcpu
->arch
.exception_vmexit
.pending
);
10110 * New events, other than exceptions, cannot be injected if KVM needs
10111 * to re-inject a previous event. See above comments on re-injecting
10112 * for why pending exceptions get priority.
10114 can_inject
= !kvm_event_needs_reinjection(vcpu
);
10116 if (vcpu
->arch
.exception
.pending
) {
10118 * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
10119 * value pushed on the stack. Trap-like exception and all #DBs
10120 * leave RF as-is (KVM follows Intel's behavior in this regard;
10121 * AMD states that code breakpoint #DBs excplitly clear RF=0).
10123 * Note, most versions of Intel's SDM and AMD's APM incorrectly
10124 * describe the behavior of General Detect #DBs, which are
10125 * fault-like. They do _not_ set RF, a la code breakpoints.
10127 if (exception_type(vcpu
->arch
.exception
.vector
) == EXCPT_FAULT
)
10128 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
10131 if (vcpu
->arch
.exception
.vector
== DB_VECTOR
) {
10132 kvm_deliver_exception_payload(vcpu
, &vcpu
->arch
.exception
);
10133 if (vcpu
->arch
.dr7
& DR7_GD
) {
10134 vcpu
->arch
.dr7
&= ~DR7_GD
;
10135 kvm_update_dr7(vcpu
);
10139 kvm_inject_exception(vcpu
);
10141 vcpu
->arch
.exception
.pending
= false;
10142 vcpu
->arch
.exception
.injected
= true;
10144 can_inject
= false;
10147 /* Don't inject interrupts if the user asked to avoid doing so */
10148 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
10152 * Finally, inject interrupt events. If an event cannot be injected
10153 * due to architectural conditions (e.g. IF=0) a window-open exit
10154 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
10155 * and can architecturally be injected, but we cannot do it right now:
10156 * an interrupt could have arrived just now and we have to inject it
10157 * as a vmexit, or there could already an event in the queue, which is
10158 * indicated by can_inject. In that case we request an immediate exit
10159 * in order to make progress and get back here for another iteration.
10160 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
10162 #ifdef CONFIG_KVM_SMM
10163 if (vcpu
->arch
.smi_pending
) {
10164 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
10168 vcpu
->arch
.smi_pending
= false;
10169 ++vcpu
->arch
.smi_count
;
10171 can_inject
= false;
10173 static_call(kvm_x86_enable_smi_window
)(vcpu
);
10177 if (vcpu
->arch
.nmi_pending
) {
10178 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
10182 --vcpu
->arch
.nmi_pending
;
10183 vcpu
->arch
.nmi_injected
= true;
10184 static_call(kvm_x86_inject_nmi
)(vcpu
);
10185 can_inject
= false;
10186 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
10188 if (vcpu
->arch
.nmi_pending
)
10189 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
10192 if (kvm_cpu_has_injectable_intr(vcpu
)) {
10193 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
10197 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
10198 static_call(kvm_x86_inject_irq
)(vcpu
, false);
10199 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
10201 if (kvm_cpu_has_injectable_intr(vcpu
))
10202 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10205 if (is_guest_mode(vcpu
) &&
10206 kvm_x86_ops
.nested_ops
->has_events
&&
10207 kvm_x86_ops
.nested_ops
->has_events(vcpu
))
10208 *req_immediate_exit
= true;
10211 * KVM must never queue a new exception while injecting an event; KVM
10212 * is done emulating and should only propagate the to-be-injected event
10213 * to the VMCS/VMCB. Queueing a new exception can put the vCPU into an
10214 * infinite loop as KVM will bail from VM-Enter to inject the pending
10215 * exception and start the cycle all over.
10217 * Exempt triple faults as they have special handling and won't put the
10218 * vCPU into an infinite loop. Triple fault can be queued when running
10219 * VMX without unrestricted guest, as that requires KVM to emulate Real
10220 * Mode events (see kvm_inject_realmode_interrupt()).
10222 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
||
10223 vcpu
->arch
.exception_vmexit
.pending
);
10228 *req_immediate_exit
= true;
10234 static void process_nmi(struct kvm_vcpu
*vcpu
)
10236 unsigned int limit
;
10239 * x86 is limited to one NMI pending, but because KVM can't react to
10240 * incoming NMIs as quickly as bare metal, e.g. if the vCPU is
10241 * scheduled out, KVM needs to play nice with two queued NMIs showing
10242 * up at the same time. To handle this scenario, allow two NMIs to be
10243 * (temporarily) pending so long as NMIs are not blocked and KVM is not
10244 * waiting for a previous NMI injection to complete (which effectively
10245 * blocks NMIs). KVM will immediately inject one of the two NMIs, and
10246 * will request an NMI window to handle the second NMI.
10248 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
10254 * Adjust the limit to account for pending virtual NMIs, which aren't
10255 * tracked in vcpu->arch.nmi_pending.
10257 if (static_call(kvm_x86_is_vnmi_pending
)(vcpu
))
10260 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
10261 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
10263 if (vcpu
->arch
.nmi_pending
&&
10264 (static_call(kvm_x86_set_vnmi_pending
)(vcpu
)))
10265 vcpu
->arch
.nmi_pending
--;
10267 if (vcpu
->arch
.nmi_pending
)
10268 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10271 /* Return total number of NMIs pending injection to the VM */
10272 int kvm_get_nr_pending_nmis(struct kvm_vcpu
*vcpu
)
10274 return vcpu
->arch
.nmi_pending
+
10275 static_call(kvm_x86_is_vnmi_pending
)(vcpu
);
10278 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
10279 unsigned long *vcpu_bitmap
)
10281 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
, vcpu_bitmap
);
10284 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
10286 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
10289 void __kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
10291 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
10294 if (!lapic_in_kernel(vcpu
))
10297 down_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
10300 /* Do not activate APICV when APIC is disabled */
10301 activate
= kvm_vcpu_apicv_activated(vcpu
) &&
10302 (kvm_get_apic_mode(vcpu
) != LAPIC_MODE_DISABLED
);
10304 if (apic
->apicv_active
== activate
)
10307 apic
->apicv_active
= activate
;
10308 kvm_apic_update_apicv(vcpu
);
10309 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
10312 * When APICv gets disabled, we may still have injected interrupts
10313 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
10314 * still active when the interrupt got accepted. Make sure
10315 * kvm_check_and_inject_events() is called to check for that.
10317 if (!apic
->apicv_active
)
10318 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10322 up_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
10324 EXPORT_SYMBOL_GPL(__kvm_vcpu_update_apicv
);
10326 static void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
10328 if (!lapic_in_kernel(vcpu
))
10332 * Due to sharing page tables across vCPUs, the xAPIC memslot must be
10333 * deleted if any vCPU has xAPIC virtualization and x2APIC enabled, but
10334 * and hardware doesn't support x2APIC virtualization. E.g. some AMD
10335 * CPUs support AVIC but not x2APIC. KVM still allows enabling AVIC in
10336 * this case so that KVM can the AVIC doorbell to inject interrupts to
10337 * running vCPUs, but KVM must not create SPTEs for the APIC base as
10338 * the vCPU would incorrectly be able to access the vAPIC page via MMIO
10339 * despite being in x2APIC mode. For simplicity, inhibiting the APIC
10340 * access page is sticky.
10342 if (apic_x2apic_mode(vcpu
->arch
.apic
) &&
10343 kvm_x86_ops
.allow_apicv_in_x2apic_without_x2apic_virtualization
)
10344 kvm_inhibit_apic_access_page(vcpu
);
10346 __kvm_vcpu_update_apicv(vcpu
);
10349 void __kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
10350 enum kvm_apicv_inhibit reason
, bool set
)
10352 unsigned long old
, new;
10354 lockdep_assert_held_write(&kvm
->arch
.apicv_update_lock
);
10356 if (!(kvm_x86_ops
.required_apicv_inhibits
& BIT(reason
)))
10359 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
10361 set_or_clear_apicv_inhibit(&new, reason
, set
);
10363 if (!!old
!= !!new) {
10365 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
10366 * false positives in the sanity check WARN in svm_vcpu_run().
10367 * This task will wait for all vCPUs to ack the kick IRQ before
10368 * updating apicv_inhibit_reasons, and all other vCPUs will
10369 * block on acquiring apicv_update_lock so that vCPUs can't
10370 * redo svm_vcpu_run() without seeing the new inhibit state.
10372 * Note, holding apicv_update_lock and taking it in the read
10373 * side (handling the request) also prevents other vCPUs from
10374 * servicing the request with a stale apicv_inhibit_reasons.
10376 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
10377 kvm
->arch
.apicv_inhibit_reasons
= new;
10379 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
10380 int idx
= srcu_read_lock(&kvm
->srcu
);
10382 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
10383 srcu_read_unlock(&kvm
->srcu
, idx
);
10386 kvm
->arch
.apicv_inhibit_reasons
= new;
10390 void kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
10391 enum kvm_apicv_inhibit reason
, bool set
)
10396 down_write(&kvm
->arch
.apicv_update_lock
);
10397 __kvm_set_or_clear_apicv_inhibit(kvm
, reason
, set
);
10398 up_write(&kvm
->arch
.apicv_update_lock
);
10400 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit
);
10402 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
10404 if (!kvm_apic_present(vcpu
))
10407 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
10409 if (irqchip_split(vcpu
->kvm
))
10410 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
10412 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10413 if (ioapic_in_kernel(vcpu
->kvm
))
10414 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
10417 if (is_guest_mode(vcpu
))
10418 vcpu
->arch
.load_eoi_exitmap_pending
= true;
10420 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
10423 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
10425 u64 eoi_exit_bitmap
[4];
10427 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
10430 if (to_hv_vcpu(vcpu
)) {
10431 bitmap_or((ulong
*)eoi_exit_bitmap
,
10432 vcpu
->arch
.ioapic_handled_vectors
,
10433 to_hv_synic(vcpu
)->vec_bitmap
, 256);
10434 static_call_cond(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
10438 static_call_cond(kvm_x86_load_eoi_exitmap
)(
10439 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
10442 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
10443 unsigned long start
, unsigned long end
)
10445 unsigned long apic_address
;
10448 * The physical address of apic access page is stored in the VMCS.
10449 * Update it when it becomes invalid.
10451 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
10452 if (start
<= apic_address
&& apic_address
< end
)
10453 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
10456 void kvm_arch_guest_memory_reclaimed(struct kvm
*kvm
)
10458 static_call_cond(kvm_x86_guest_memory_reclaimed
)(kvm
);
10461 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
10463 if (!lapic_in_kernel(vcpu
))
10466 static_call_cond(kvm_x86_set_apic_access_page_addr
)(vcpu
);
10469 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
10471 smp_send_reschedule(vcpu
->cpu
);
10473 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
10476 * Called within kvm->srcu read side.
10477 * Returns 1 to let vcpu_run() continue the guest execution loop without
10478 * exiting to the userspace. Otherwise, the value will be returned to the
10481 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
10485 dm_request_for_irq_injection(vcpu
) &&
10486 kvm_cpu_accept_dm_intr(vcpu
);
10487 fastpath_t exit_fastpath
;
10489 bool req_immediate_exit
= false;
10491 if (kvm_request_pending(vcpu
)) {
10492 if (kvm_check_request(KVM_REQ_VM_DEAD
, vcpu
)) {
10497 if (kvm_dirty_ring_check_request(vcpu
)) {
10502 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
10503 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
10508 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS
, vcpu
))
10509 kvm_mmu_free_obsolete_roots(vcpu
);
10510 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
10511 __kvm_migrate_timers(vcpu
);
10512 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
10513 kvm_update_masterclock(vcpu
->kvm
);
10514 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
10515 kvm_gen_kvmclock_update(vcpu
);
10516 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
10517 r
= kvm_guest_time_update(vcpu
);
10521 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
10522 kvm_mmu_sync_roots(vcpu
);
10523 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
10524 kvm_mmu_load_pgd(vcpu
);
10527 * Note, the order matters here, as flushing "all" TLB entries
10528 * also flushes the "current" TLB entries, i.e. servicing the
10529 * flush "all" will clear any request to flush "current".
10531 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
10532 kvm_vcpu_flush_tlb_all(vcpu
);
10534 kvm_service_local_tlb_flush_requests(vcpu
);
10537 * Fall back to a "full" guest flush if Hyper-V's precise
10538 * flushing fails. Note, Hyper-V's flushing is per-vCPU, but
10539 * the flushes are considered "remote" and not "local" because
10540 * the requests can be initiated from other vCPUs.
10542 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH
, vcpu
) &&
10543 kvm_hv_vcpu_flush_tlb(vcpu
))
10544 kvm_vcpu_flush_tlb_guest(vcpu
);
10546 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
10547 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
10551 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10552 if (is_guest_mode(vcpu
))
10553 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
10555 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10556 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
10557 vcpu
->mmio_needed
= 0;
10562 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
10563 /* Page is swapped out. Do synthetic halt */
10564 vcpu
->arch
.apf
.halted
= true;
10568 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
10569 record_steal_time(vcpu
);
10570 #ifdef CONFIG_KVM_SMM
10571 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
10574 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
10576 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
10577 kvm_pmu_handle_event(vcpu
);
10578 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
10579 kvm_pmu_deliver_pmi(vcpu
);
10580 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
10581 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
10582 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
10583 vcpu
->arch
.ioapic_handled_vectors
)) {
10584 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
10585 vcpu
->run
->eoi
.vector
=
10586 vcpu
->arch
.pending_ioapic_eoi
;
10591 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
10592 vcpu_scan_ioapic(vcpu
);
10593 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
10594 vcpu_load_eoi_exitmap(vcpu
);
10595 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
10596 kvm_vcpu_reload_apic_access_page(vcpu
);
10597 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
10598 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10599 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
10600 vcpu
->run
->system_event
.ndata
= 0;
10604 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
10605 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10606 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
10607 vcpu
->run
->system_event
.ndata
= 0;
10611 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
10612 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
10614 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
10615 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
10621 * KVM_REQ_HV_STIMER has to be processed after
10622 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10623 * depend on the guest clock being up-to-date
10625 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
10626 kvm_hv_process_stimers(vcpu
);
10627 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
10628 kvm_vcpu_update_apicv(vcpu
);
10629 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
10630 kvm_check_async_pf_completion(vcpu
);
10631 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
10632 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
10634 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
10635 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
10638 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
10639 kvm_xen_has_interrupt(vcpu
)) {
10640 ++vcpu
->stat
.req_event
;
10641 r
= kvm_apic_accept_events(vcpu
);
10646 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
10651 r
= kvm_check_and_inject_events(vcpu
, &req_immediate_exit
);
10657 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10659 if (kvm_lapic_enabled(vcpu
)) {
10660 update_cr8_intercept(vcpu
);
10661 kvm_lapic_sync_to_vapic(vcpu
);
10665 r
= kvm_mmu_reload(vcpu
);
10667 goto cancel_injection
;
10672 static_call(kvm_x86_prepare_switch_to_guest
)(vcpu
);
10675 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10676 * IPI are then delayed after guest entry, which ensures that they
10677 * result in virtual interrupt delivery.
10679 local_irq_disable();
10681 /* Store vcpu->apicv_active before vcpu->mode. */
10682 smp_store_release(&vcpu
->mode
, IN_GUEST_MODE
);
10684 kvm_vcpu_srcu_read_unlock(vcpu
);
10687 * 1) We should set ->mode before checking ->requests. Please see
10688 * the comment in kvm_vcpu_exiting_guest_mode().
10690 * 2) For APICv, we should set ->mode before checking PID.ON. This
10691 * pairs with the memory barrier implicit in pi_test_and_set_on
10692 * (see vmx_deliver_posted_interrupt).
10694 * 3) This also orders the write to mode from any reads to the page
10695 * tables done while the VCPU is running. Please see the comment
10696 * in kvm_flush_remote_tlbs.
10698 smp_mb__after_srcu_read_unlock();
10701 * Process pending posted interrupts to handle the case where the
10702 * notification IRQ arrived in the host, or was never sent (because the
10703 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10704 * status, KVM doesn't update assigned devices when APICv is inhibited,
10705 * i.e. they can post interrupts even if APICv is temporarily disabled.
10707 if (kvm_lapic_enabled(vcpu
))
10708 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10710 if (kvm_vcpu_exit_request(vcpu
)) {
10711 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10713 local_irq_enable();
10715 kvm_vcpu_srcu_read_lock(vcpu
);
10717 goto cancel_injection
;
10720 if (req_immediate_exit
) {
10721 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10722 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
10725 fpregs_assert_state_consistent();
10726 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10727 switch_fpu_return();
10729 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10730 wrmsrl(MSR_IA32_XFD_ERR
, vcpu
->arch
.guest_fpu
.xfd_err
);
10732 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
10733 set_debugreg(0, 7);
10734 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
10735 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
10736 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
10737 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
10738 } else if (unlikely(hw_breakpoint_active())) {
10739 set_debugreg(0, 7);
10742 guest_timing_enter_irqoff();
10746 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10747 * update must kick and wait for all vCPUs before toggling the
10748 * per-VM state, and responsing vCPUs must wait for the update
10749 * to complete before servicing KVM_REQ_APICV_UPDATE.
10751 WARN_ON_ONCE((kvm_vcpu_apicv_activated(vcpu
) != kvm_vcpu_apicv_active(vcpu
)) &&
10752 (kvm_get_apic_mode(vcpu
) != LAPIC_MODE_DISABLED
));
10754 exit_fastpath
= static_call(kvm_x86_vcpu_run
)(vcpu
);
10755 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
10758 if (kvm_lapic_enabled(vcpu
))
10759 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10761 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
10762 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
10766 /* Note, VM-Exits that go down the "slow" path are accounted below. */
10767 ++vcpu
->stat
.exits
;
10771 * Do this here before restoring debug registers on the host. And
10772 * since we do this before handling the vmexit, a DR access vmexit
10773 * can (a) read the correct value of the debug registers, (b) set
10774 * KVM_DEBUGREG_WONT_EXIT again.
10776 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
10777 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
10778 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
10779 kvm_update_dr0123(vcpu
);
10780 kvm_update_dr7(vcpu
);
10784 * If the guest has used debug registers, at least dr7
10785 * will be disabled while returning to the host.
10786 * If we don't have active breakpoints in the host, we don't
10787 * care about the messed up debug address registers. But if
10788 * we have some of them active, restore the old state.
10790 if (hw_breakpoint_active())
10791 hw_breakpoint_restore();
10793 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
10794 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
10796 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10800 * Sync xfd before calling handle_exit_irqoff() which may
10801 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10802 * in #NM irqoff handler).
10804 if (vcpu
->arch
.xfd_no_write_intercept
)
10805 fpu_sync_guest_vmexit_xfd_state();
10807 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
10809 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10810 wrmsrl(MSR_IA32_XFD_ERR
, 0);
10813 * Consume any pending interrupts, including the possible source of
10814 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10815 * An instruction is required after local_irq_enable() to fully unblock
10816 * interrupts on processors that implement an interrupt shadow, the
10817 * stat.exits increment will do nicely.
10819 kvm_before_interrupt(vcpu
, KVM_HANDLING_IRQ
);
10820 local_irq_enable();
10821 ++vcpu
->stat
.exits
;
10822 local_irq_disable();
10823 kvm_after_interrupt(vcpu
);
10826 * Wait until after servicing IRQs to account guest time so that any
10827 * ticks that occurred while running the guest are properly accounted
10828 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10829 * of accounting via context tracking, but the loss of accuracy is
10830 * acceptable for all known use cases.
10832 guest_timing_exit_irqoff();
10834 local_irq_enable();
10837 kvm_vcpu_srcu_read_lock(vcpu
);
10840 * Profile KVM exit RIPs:
10842 if (unlikely(prof_on
== KVM_PROFILING
)) {
10843 unsigned long rip
= kvm_rip_read(vcpu
);
10844 profile_hit(KVM_PROFILING
, (void *)rip
);
10847 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
10848 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10850 if (vcpu
->arch
.apic_attention
)
10851 kvm_lapic_sync_from_vapic(vcpu
);
10853 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
10857 if (req_immediate_exit
)
10858 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10859 static_call(kvm_x86_cancel_injection
)(vcpu
);
10860 if (unlikely(vcpu
->arch
.apic_attention
))
10861 kvm_lapic_sync_from_vapic(vcpu
);
10866 /* Called within kvm->srcu read side. */
10867 static inline int vcpu_block(struct kvm_vcpu
*vcpu
)
10871 if (!kvm_arch_vcpu_runnable(vcpu
)) {
10873 * Switch to the software timer before halt-polling/blocking as
10874 * the guest's timer may be a break event for the vCPU, and the
10875 * hypervisor timer runs only when the CPU is in guest mode.
10876 * Switch before halt-polling so that KVM recognizes an expired
10877 * timer before blocking.
10879 hv_timer
= kvm_lapic_hv_timer_in_use(vcpu
);
10881 kvm_lapic_switch_to_sw_timer(vcpu
);
10883 kvm_vcpu_srcu_read_unlock(vcpu
);
10884 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
)
10885 kvm_vcpu_halt(vcpu
);
10887 kvm_vcpu_block(vcpu
);
10888 kvm_vcpu_srcu_read_lock(vcpu
);
10891 kvm_lapic_switch_to_hv_timer(vcpu
);
10894 * If the vCPU is not runnable, a signal or another host event
10895 * of some kind is pending; service it without changing the
10896 * vCPU's activity state.
10898 if (!kvm_arch_vcpu_runnable(vcpu
))
10903 * Evaluate nested events before exiting the halted state. This allows
10904 * the halt state to be recorded properly in the VMCS12's activity
10905 * state field (AMD does not have a similar field and a VM-Exit always
10906 * causes a spurious wakeup from HLT).
10908 if (is_guest_mode(vcpu
)) {
10909 if (kvm_check_nested_events(vcpu
) < 0)
10913 if (kvm_apic_accept_events(vcpu
) < 0)
10915 switch(vcpu
->arch
.mp_state
) {
10916 case KVM_MP_STATE_HALTED
:
10917 case KVM_MP_STATE_AP_RESET_HOLD
:
10918 vcpu
->arch
.pv
.pv_unhalted
= false;
10919 vcpu
->arch
.mp_state
=
10920 KVM_MP_STATE_RUNNABLE
;
10922 case KVM_MP_STATE_RUNNABLE
:
10923 vcpu
->arch
.apf
.halted
= false;
10925 case KVM_MP_STATE_INIT_RECEIVED
:
10934 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
10936 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
10937 !vcpu
->arch
.apf
.halted
);
10940 /* Called within kvm->srcu read side. */
10941 static int vcpu_run(struct kvm_vcpu
*vcpu
)
10945 vcpu
->arch
.l1tf_flush_l1d
= true;
10949 * If another guest vCPU requests a PV TLB flush in the middle
10950 * of instruction emulation, the rest of the emulation could
10951 * use a stale page translation. Assume that any code after
10952 * this point can start executing an instruction.
10954 vcpu
->arch
.at_instruction_boundary
= false;
10955 if (kvm_vcpu_running(vcpu
)) {
10956 r
= vcpu_enter_guest(vcpu
);
10958 r
= vcpu_block(vcpu
);
10964 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
10965 if (kvm_xen_has_pending_events(vcpu
))
10966 kvm_xen_inject_pending_events(vcpu
);
10968 if (kvm_cpu_has_pending_timer(vcpu
))
10969 kvm_inject_pending_timer_irqs(vcpu
);
10971 if (dm_request_for_irq_injection(vcpu
) &&
10972 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
10974 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
10975 ++vcpu
->stat
.request_irq_exits
;
10979 if (__xfer_to_guest_mode_work_pending()) {
10980 kvm_vcpu_srcu_read_unlock(vcpu
);
10981 r
= xfer_to_guest_mode_handle_work(vcpu
);
10982 kvm_vcpu_srcu_read_lock(vcpu
);
10991 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
10993 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
10996 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
10998 BUG_ON(!vcpu
->arch
.pio
.count
);
11000 return complete_emulated_io(vcpu
);
11004 * Implements the following, as a state machine:
11007 * for each fragment
11008 * for each mmio piece in the fragment
11015 * for each fragment
11016 * for each mmio piece in the fragment
11021 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
11023 struct kvm_run
*run
= vcpu
->run
;
11024 struct kvm_mmio_fragment
*frag
;
11027 BUG_ON(!vcpu
->mmio_needed
);
11029 /* Complete previous fragment */
11030 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11031 len
= min(8u, frag
->len
);
11032 if (!vcpu
->mmio_is_write
)
11033 memcpy(frag
->data
, run
->mmio
.data
, len
);
11035 if (frag
->len
<= 8) {
11036 /* Switch to the next fragment. */
11038 vcpu
->mmio_cur_fragment
++;
11040 /* Go forward to the next mmio piece. */
11046 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11047 vcpu
->mmio_needed
= 0;
11049 /* FIXME: return into emulator if single-stepping. */
11050 if (vcpu
->mmio_is_write
)
11052 vcpu
->mmio_read_completed
= 1;
11053 return complete_emulated_io(vcpu
);
11056 run
->exit_reason
= KVM_EXIT_MMIO
;
11057 run
->mmio
.phys_addr
= frag
->gpa
;
11058 if (vcpu
->mmio_is_write
)
11059 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11060 run
->mmio
.len
= min(8u, frag
->len
);
11061 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11062 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
11066 /* Swap (qemu) user FPU context for the guest FPU context. */
11067 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
11069 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
11070 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, true);
11074 /* When vcpu_run ends, restore user space FPU context. */
11075 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
11077 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, false);
11078 ++vcpu
->stat
.fpu_reload
;
11082 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
11084 struct kvm_queued_exception
*ex
= &vcpu
->arch
.exception
;
11085 struct kvm_run
*kvm_run
= vcpu
->run
;
11089 kvm_sigset_activate(vcpu
);
11090 kvm_run
->flags
= 0;
11091 kvm_load_guest_fpu(vcpu
);
11093 kvm_vcpu_srcu_read_lock(vcpu
);
11094 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
11095 if (kvm_run
->immediate_exit
) {
11100 * It should be impossible for the hypervisor timer to be in
11101 * use before KVM has ever run the vCPU.
11103 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu
));
11105 kvm_vcpu_srcu_read_unlock(vcpu
);
11106 kvm_vcpu_block(vcpu
);
11107 kvm_vcpu_srcu_read_lock(vcpu
);
11109 if (kvm_apic_accept_events(vcpu
) < 0) {
11114 if (signal_pending(current
)) {
11116 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
11117 ++vcpu
->stat
.signal_exits
;
11122 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
11123 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
11128 if (kvm_run
->kvm_dirty_regs
) {
11129 r
= sync_regs(vcpu
);
11134 /* re-sync apic's tpr */
11135 if (!lapic_in_kernel(vcpu
)) {
11136 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
11143 * If userspace set a pending exception and L2 is active, convert it to
11144 * a pending VM-Exit if L1 wants to intercept the exception.
11146 if (vcpu
->arch
.exception_from_userspace
&& is_guest_mode(vcpu
) &&
11147 kvm_x86_ops
.nested_ops
->is_exception_vmexit(vcpu
, ex
->vector
,
11149 kvm_queue_exception_vmexit(vcpu
, ex
->vector
,
11150 ex
->has_error_code
, ex
->error_code
,
11151 ex
->has_payload
, ex
->payload
);
11152 ex
->injected
= false;
11153 ex
->pending
= false;
11155 vcpu
->arch
.exception_from_userspace
= false;
11157 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
11158 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
11159 vcpu
->arch
.complete_userspace_io
= NULL
;
11164 WARN_ON_ONCE(vcpu
->arch
.pio
.count
);
11165 WARN_ON_ONCE(vcpu
->mmio_needed
);
11168 if (kvm_run
->immediate_exit
) {
11173 r
= static_call(kvm_x86_vcpu_pre_run
)(vcpu
);
11177 r
= vcpu_run(vcpu
);
11180 kvm_put_guest_fpu(vcpu
);
11181 if (kvm_run
->kvm_valid_regs
)
11183 post_kvm_run_save(vcpu
);
11184 kvm_vcpu_srcu_read_unlock(vcpu
);
11186 kvm_sigset_deactivate(vcpu
);
11191 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11193 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
11195 * We are here if userspace calls get_regs() in the middle of
11196 * instruction emulation. Registers state needs to be copied
11197 * back from emulation context to vcpu. Userspace shouldn't do
11198 * that usually, but some bad designed PV devices (vmware
11199 * backdoor interface) need this to work
11201 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
11202 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
11204 regs
->rax
= kvm_rax_read(vcpu
);
11205 regs
->rbx
= kvm_rbx_read(vcpu
);
11206 regs
->rcx
= kvm_rcx_read(vcpu
);
11207 regs
->rdx
= kvm_rdx_read(vcpu
);
11208 regs
->rsi
= kvm_rsi_read(vcpu
);
11209 regs
->rdi
= kvm_rdi_read(vcpu
);
11210 regs
->rsp
= kvm_rsp_read(vcpu
);
11211 regs
->rbp
= kvm_rbp_read(vcpu
);
11212 #ifdef CONFIG_X86_64
11213 regs
->r8
= kvm_r8_read(vcpu
);
11214 regs
->r9
= kvm_r9_read(vcpu
);
11215 regs
->r10
= kvm_r10_read(vcpu
);
11216 regs
->r11
= kvm_r11_read(vcpu
);
11217 regs
->r12
= kvm_r12_read(vcpu
);
11218 regs
->r13
= kvm_r13_read(vcpu
);
11219 regs
->r14
= kvm_r14_read(vcpu
);
11220 regs
->r15
= kvm_r15_read(vcpu
);
11223 regs
->rip
= kvm_rip_read(vcpu
);
11224 regs
->rflags
= kvm_get_rflags(vcpu
);
11227 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11230 __get_regs(vcpu
, regs
);
11235 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11237 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
11238 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
11240 kvm_rax_write(vcpu
, regs
->rax
);
11241 kvm_rbx_write(vcpu
, regs
->rbx
);
11242 kvm_rcx_write(vcpu
, regs
->rcx
);
11243 kvm_rdx_write(vcpu
, regs
->rdx
);
11244 kvm_rsi_write(vcpu
, regs
->rsi
);
11245 kvm_rdi_write(vcpu
, regs
->rdi
);
11246 kvm_rsp_write(vcpu
, regs
->rsp
);
11247 kvm_rbp_write(vcpu
, regs
->rbp
);
11248 #ifdef CONFIG_X86_64
11249 kvm_r8_write(vcpu
, regs
->r8
);
11250 kvm_r9_write(vcpu
, regs
->r9
);
11251 kvm_r10_write(vcpu
, regs
->r10
);
11252 kvm_r11_write(vcpu
, regs
->r11
);
11253 kvm_r12_write(vcpu
, regs
->r12
);
11254 kvm_r13_write(vcpu
, regs
->r13
);
11255 kvm_r14_write(vcpu
, regs
->r14
);
11256 kvm_r15_write(vcpu
, regs
->r15
);
11259 kvm_rip_write(vcpu
, regs
->rip
);
11260 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
11262 vcpu
->arch
.exception
.pending
= false;
11263 vcpu
->arch
.exception_vmexit
.pending
= false;
11265 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11268 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11271 __set_regs(vcpu
, regs
);
11276 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11278 struct desc_ptr dt
;
11280 if (vcpu
->arch
.guest_state_protected
)
11281 goto skip_protected_regs
;
11283 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
11284 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
11285 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
11286 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
11287 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
11288 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
11290 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
11291 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11293 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
11294 sregs
->idt
.limit
= dt
.size
;
11295 sregs
->idt
.base
= dt
.address
;
11296 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
11297 sregs
->gdt
.limit
= dt
.size
;
11298 sregs
->gdt
.base
= dt
.address
;
11300 sregs
->cr2
= vcpu
->arch
.cr2
;
11301 sregs
->cr3
= kvm_read_cr3(vcpu
);
11303 skip_protected_regs
:
11304 sregs
->cr0
= kvm_read_cr0(vcpu
);
11305 sregs
->cr4
= kvm_read_cr4(vcpu
);
11306 sregs
->cr8
= kvm_get_cr8(vcpu
);
11307 sregs
->efer
= vcpu
->arch
.efer
;
11308 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
11311 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11313 __get_sregs_common(vcpu
, sregs
);
11315 if (vcpu
->arch
.guest_state_protected
)
11318 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
11319 set_bit(vcpu
->arch
.interrupt
.nr
,
11320 (unsigned long *)sregs
->interrupt_bitmap
);
11323 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11327 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
11329 if (vcpu
->arch
.guest_state_protected
)
11332 if (is_pae_paging(vcpu
)) {
11333 for (i
= 0 ; i
< 4 ; i
++)
11334 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
11335 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11339 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
11340 struct kvm_sregs
*sregs
)
11343 __get_sregs(vcpu
, sregs
);
11348 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
11349 struct kvm_mp_state
*mp_state
)
11354 if (kvm_mpx_supported())
11355 kvm_load_guest_fpu(vcpu
);
11357 r
= kvm_apic_accept_events(vcpu
);
11362 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
11363 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
11364 vcpu
->arch
.pv
.pv_unhalted
)
11365 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
11367 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
11370 if (kvm_mpx_supported())
11371 kvm_put_guest_fpu(vcpu
);
11376 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
11377 struct kvm_mp_state
*mp_state
)
11383 switch (mp_state
->mp_state
) {
11384 case KVM_MP_STATE_UNINITIALIZED
:
11385 case KVM_MP_STATE_HALTED
:
11386 case KVM_MP_STATE_AP_RESET_HOLD
:
11387 case KVM_MP_STATE_INIT_RECEIVED
:
11388 case KVM_MP_STATE_SIPI_RECEIVED
:
11389 if (!lapic_in_kernel(vcpu
))
11393 case KVM_MP_STATE_RUNNABLE
:
11401 * Pending INITs are reported using KVM_SET_VCPU_EVENTS, disallow
11402 * forcing the guest into INIT/SIPI if those events are supposed to be
11403 * blocked. KVM prioritizes SMI over INIT, so reject INIT/SIPI state
11404 * if an SMI is pending as well.
11406 if ((!kvm_apic_init_sipi_allowed(vcpu
) || vcpu
->arch
.smi_pending
) &&
11407 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
11408 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
11411 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
11412 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
11413 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
11415 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
11416 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11424 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
11425 int reason
, bool has_error_code
, u32 error_code
)
11427 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
11430 init_emulate_ctxt(vcpu
);
11432 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
11433 has_error_code
, error_code
);
11435 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11436 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11437 vcpu
->run
->internal
.ndata
= 0;
11441 kvm_rip_write(vcpu
, ctxt
->eip
);
11442 kvm_set_rflags(vcpu
, ctxt
->eflags
);
11445 EXPORT_SYMBOL_GPL(kvm_task_switch
);
11447 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11449 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
11451 * When EFER.LME and CR0.PG are set, the processor is in
11452 * 64-bit mode (though maybe in a 32-bit code segment).
11453 * CR4.PAE and EFER.LMA must be set.
11455 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
11457 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
11461 * Not in 64-bit mode: EFER.LMA is clear and the code
11462 * segment cannot be 64-bit.
11464 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
11468 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
11471 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
11472 int *mmu_reset_needed
, bool update_pdptrs
)
11474 struct msr_data apic_base_msr
;
11476 struct desc_ptr dt
;
11478 if (!kvm_is_valid_sregs(vcpu
, sregs
))
11481 apic_base_msr
.data
= sregs
->apic_base
;
11482 apic_base_msr
.host_initiated
= true;
11483 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
11486 if (vcpu
->arch
.guest_state_protected
)
11489 dt
.size
= sregs
->idt
.limit
;
11490 dt
.address
= sregs
->idt
.base
;
11491 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
11492 dt
.size
= sregs
->gdt
.limit
;
11493 dt
.address
= sregs
->gdt
.base
;
11494 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
11496 vcpu
->arch
.cr2
= sregs
->cr2
;
11497 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
11498 vcpu
->arch
.cr3
= sregs
->cr3
;
11499 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11500 static_call_cond(kvm_x86_post_set_cr3
)(vcpu
, sregs
->cr3
);
11502 kvm_set_cr8(vcpu
, sregs
->cr8
);
11504 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
11505 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
11507 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
11508 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
11509 vcpu
->arch
.cr0
= sregs
->cr0
;
11511 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
11512 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
11514 if (update_pdptrs
) {
11515 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11516 if (is_pae_paging(vcpu
)) {
11517 load_pdptrs(vcpu
, kvm_read_cr3(vcpu
));
11518 *mmu_reset_needed
= 1;
11520 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11523 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
11524 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
11525 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
11526 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
11527 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
11528 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
11530 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
11531 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11533 update_cr8_intercept(vcpu
);
11535 /* Older userspace won't unhalt the vcpu on reset. */
11536 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
11537 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
11538 !is_protmode(vcpu
))
11539 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11544 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11546 int pending_vec
, max_bits
;
11547 int mmu_reset_needed
= 0;
11548 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
11553 if (mmu_reset_needed
)
11554 kvm_mmu_reset_context(vcpu
);
11556 max_bits
= KVM_NR_INTERRUPTS
;
11557 pending_vec
= find_first_bit(
11558 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
11560 if (pending_vec
< max_bits
) {
11561 kvm_queue_interrupt(vcpu
, pending_vec
, false);
11562 pr_debug("Set back pending irq %d\n", pending_vec
);
11563 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11568 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11570 int mmu_reset_needed
= 0;
11571 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11572 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
11573 !(sregs2
->efer
& EFER_LMA
);
11576 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
11579 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
11582 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
11583 &mmu_reset_needed
, !valid_pdptrs
);
11587 if (valid_pdptrs
) {
11588 for (i
= 0; i
< 4 ; i
++)
11589 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
11591 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
11592 mmu_reset_needed
= 1;
11593 vcpu
->arch
.pdptrs_from_userspace
= true;
11595 if (mmu_reset_needed
)
11596 kvm_mmu_reset_context(vcpu
);
11600 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
11601 struct kvm_sregs
*sregs
)
11606 ret
= __set_sregs(vcpu
, sregs
);
11611 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm
*kvm
)
11614 struct kvm_vcpu
*vcpu
;
11620 down_write(&kvm
->arch
.apicv_update_lock
);
11622 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11623 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
) {
11628 __kvm_set_or_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_BLOCKIRQ
, set
);
11629 up_write(&kvm
->arch
.apicv_update_lock
);
11632 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
11633 struct kvm_guest_debug
*dbg
)
11635 unsigned long rflags
;
11638 if (vcpu
->arch
.guest_state_protected
)
11643 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
11645 if (kvm_is_exception_pending(vcpu
))
11647 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
11648 kvm_queue_exception(vcpu
, DB_VECTOR
);
11650 kvm_queue_exception(vcpu
, BP_VECTOR
);
11654 * Read rflags as long as potentially injected trace flags are still
11657 rflags
= kvm_get_rflags(vcpu
);
11659 vcpu
->guest_debug
= dbg
->control
;
11660 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
11661 vcpu
->guest_debug
= 0;
11663 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
11664 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
11665 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
11666 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
11668 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
11669 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
11671 kvm_update_dr7(vcpu
);
11673 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11674 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
11677 * Trigger an rflags update that will inject or remove the trace
11680 kvm_set_rflags(vcpu
, rflags
);
11682 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11684 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu
->kvm
);
11694 * Translate a guest virtual address to a guest physical address.
11696 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
11697 struct kvm_translation
*tr
)
11699 unsigned long vaddr
= tr
->linear_address
;
11705 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11706 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
11707 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11708 tr
->physical_address
= gpa
;
11709 tr
->valid
= gpa
!= INVALID_GPA
;
11717 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11719 struct fxregs_state
*fxsave
;
11721 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11726 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11727 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
11728 fpu
->fcw
= fxsave
->cwd
;
11729 fpu
->fsw
= fxsave
->swd
;
11730 fpu
->ftwx
= fxsave
->twd
;
11731 fpu
->last_opcode
= fxsave
->fop
;
11732 fpu
->last_ip
= fxsave
->rip
;
11733 fpu
->last_dp
= fxsave
->rdp
;
11734 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
11740 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11742 struct fxregs_state
*fxsave
;
11744 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11749 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11751 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
11752 fxsave
->cwd
= fpu
->fcw
;
11753 fxsave
->swd
= fpu
->fsw
;
11754 fxsave
->twd
= fpu
->ftwx
;
11755 fxsave
->fop
= fpu
->last_opcode
;
11756 fxsave
->rip
= fpu
->last_ip
;
11757 fxsave
->rdp
= fpu
->last_dp
;
11758 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
11764 static void store_regs(struct kvm_vcpu
*vcpu
)
11766 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
11768 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
11769 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11771 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
11772 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
11774 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
11775 kvm_vcpu_ioctl_x86_get_vcpu_events(
11776 vcpu
, &vcpu
->run
->s
.regs
.events
);
11779 static int sync_regs(struct kvm_vcpu
*vcpu
)
11781 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
11782 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11783 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
11785 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
11786 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
11788 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
11790 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
11791 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11792 vcpu
, &vcpu
->run
->s
.regs
.events
))
11794 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
11800 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
11802 if (kvm_check_tsc_unstable() && kvm
->created_vcpus
)
11803 pr_warn_once("SMP vm created on host with unstable TSC; "
11804 "guest TSC will not be reliable\n");
11806 if (!kvm
->arch
.max_vcpu_ids
)
11807 kvm
->arch
.max_vcpu_ids
= KVM_MAX_VCPU_IDS
;
11809 if (id
>= kvm
->arch
.max_vcpu_ids
)
11812 return static_call(kvm_x86_vcpu_precreate
)(kvm
);
11815 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
11820 vcpu
->arch
.last_vmentry_cpu
= -1;
11821 vcpu
->arch
.regs_avail
= ~0;
11822 vcpu
->arch
.regs_dirty
= ~0;
11824 kvm_gpc_init(&vcpu
->arch
.pv_time
, vcpu
->kvm
, vcpu
, KVM_HOST_USES_PFN
);
11826 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
11827 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11829 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
11831 r
= kvm_mmu_create(vcpu
);
11835 if (irqchip_in_kernel(vcpu
->kvm
)) {
11836 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
11838 goto fail_mmu_destroy
;
11841 * Defer evaluating inhibits until the vCPU is first run, as
11842 * this vCPU will not get notified of any changes until this
11843 * vCPU is visible to other vCPUs (marked online and added to
11844 * the set of vCPUs). Opportunistically mark APICv active as
11845 * VMX in particularly is highly unlikely to have inhibits.
11846 * Ignore the current per-VM APICv state so that vCPU creation
11847 * is guaranteed to run with a deterministic value, the request
11848 * will ensure the vCPU gets the correct state before VM-Entry.
11850 if (enable_apicv
) {
11851 vcpu
->arch
.apic
->apicv_active
= true;
11852 kvm_make_request(KVM_REQ_APICV_UPDATE
, vcpu
);
11855 static_branch_inc(&kvm_has_noapic_vcpu
);
11859 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
11861 goto fail_free_lapic
;
11862 vcpu
->arch
.pio_data
= page_address(page
);
11864 vcpu
->arch
.mce_banks
= kcalloc(KVM_MAX_MCE_BANKS
* 4, sizeof(u64
),
11865 GFP_KERNEL_ACCOUNT
);
11866 vcpu
->arch
.mci_ctl2_banks
= kcalloc(KVM_MAX_MCE_BANKS
, sizeof(u64
),
11867 GFP_KERNEL_ACCOUNT
);
11868 if (!vcpu
->arch
.mce_banks
|| !vcpu
->arch
.mci_ctl2_banks
)
11869 goto fail_free_mce_banks
;
11870 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
11872 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
11873 GFP_KERNEL_ACCOUNT
))
11874 goto fail_free_mce_banks
;
11876 if (!alloc_emulate_ctxt(vcpu
))
11877 goto free_wbinvd_dirty_mask
;
11879 if (!fpu_alloc_guest_fpstate(&vcpu
->arch
.guest_fpu
)) {
11880 pr_err("failed to allocate vcpu's fpu\n");
11881 goto free_emulate_ctxt
;
11884 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
11885 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
11887 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
11889 kvm_async_pf_hash_reset(vcpu
);
11891 vcpu
->arch
.perf_capabilities
= kvm_caps
.supported_perf_cap
;
11892 kvm_pmu_init(vcpu
);
11894 vcpu
->arch
.pending_external_vector
= -1;
11895 vcpu
->arch
.preempted_in_kernel
= false;
11897 #if IS_ENABLED(CONFIG_HYPERV)
11898 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
11901 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
11903 goto free_guest_fpu
;
11905 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
11906 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
11907 kvm_xen_init_vcpu(vcpu
);
11908 kvm_vcpu_mtrr_init(vcpu
);
11910 kvm_set_tsc_khz(vcpu
, vcpu
->kvm
->arch
.default_tsc_khz
);
11911 kvm_vcpu_reset(vcpu
, false);
11912 kvm_init_mmu(vcpu
);
11917 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
11919 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
11920 free_wbinvd_dirty_mask
:
11921 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
11922 fail_free_mce_banks
:
11923 kfree(vcpu
->arch
.mce_banks
);
11924 kfree(vcpu
->arch
.mci_ctl2_banks
);
11925 free_page((unsigned long)vcpu
->arch
.pio_data
);
11927 kvm_free_lapic(vcpu
);
11929 kvm_mmu_destroy(vcpu
);
11933 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
11935 struct kvm
*kvm
= vcpu
->kvm
;
11937 if (mutex_lock_killable(&vcpu
->mutex
))
11940 kvm_synchronize_tsc(vcpu
, 0);
11943 /* poll control enabled by default */
11944 vcpu
->arch
.msr_kvm_poll_control
= 1;
11946 mutex_unlock(&vcpu
->mutex
);
11948 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
11949 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
11950 KVMCLOCK_SYNC_PERIOD
);
11953 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
11957 kvmclock_reset(vcpu
);
11959 static_call(kvm_x86_vcpu_free
)(vcpu
);
11961 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
11962 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
11963 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
11965 kvm_xen_destroy_vcpu(vcpu
);
11966 kvm_hv_vcpu_uninit(vcpu
);
11967 kvm_pmu_destroy(vcpu
);
11968 kfree(vcpu
->arch
.mce_banks
);
11969 kfree(vcpu
->arch
.mci_ctl2_banks
);
11970 kvm_free_lapic(vcpu
);
11971 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11972 kvm_mmu_destroy(vcpu
);
11973 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11974 free_page((unsigned long)vcpu
->arch
.pio_data
);
11975 kvfree(vcpu
->arch
.cpuid_entries
);
11976 if (!lapic_in_kernel(vcpu
))
11977 static_branch_dec(&kvm_has_noapic_vcpu
);
11980 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
11982 struct kvm_cpuid_entry2
*cpuid_0x1
;
11983 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
11984 unsigned long new_cr0
;
11987 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11988 * to handle side effects. RESET emulation hits those flows and relies
11989 * on emulated/virtualized registers, including those that are loaded
11990 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11991 * to detect improper or missing initialization.
11993 WARN_ON_ONCE(!init_event
&&
11994 (old_cr0
|| kvm_read_cr3(vcpu
) || kvm_read_cr4(vcpu
)));
11997 * SVM doesn't unconditionally VM-Exit on INIT and SHUTDOWN, thus it's
11998 * possible to INIT the vCPU while L2 is active. Force the vCPU back
11999 * into L1 as EFER.SVME is cleared on INIT (along with all other EFER
12000 * bits), i.e. virtualization is disabled.
12002 if (is_guest_mode(vcpu
))
12003 kvm_leave_nested(vcpu
);
12005 kvm_lapic_reset(vcpu
, init_event
);
12007 WARN_ON_ONCE(is_guest_mode(vcpu
) || is_smm(vcpu
));
12008 vcpu
->arch
.hflags
= 0;
12010 vcpu
->arch
.smi_pending
= 0;
12011 vcpu
->arch
.smi_count
= 0;
12012 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
12013 vcpu
->arch
.nmi_pending
= 0;
12014 vcpu
->arch
.nmi_injected
= false;
12015 kvm_clear_interrupt_queue(vcpu
);
12016 kvm_clear_exception_queue(vcpu
);
12018 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
12019 kvm_update_dr0123(vcpu
);
12020 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
12021 vcpu
->arch
.dr7
= DR7_FIXED_1
;
12022 kvm_update_dr7(vcpu
);
12024 vcpu
->arch
.cr2
= 0;
12026 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
12027 vcpu
->arch
.apf
.msr_en_val
= 0;
12028 vcpu
->arch
.apf
.msr_int_val
= 0;
12029 vcpu
->arch
.st
.msr_val
= 0;
12031 kvmclock_reset(vcpu
);
12033 kvm_clear_async_pf_completion_queue(vcpu
);
12034 kvm_async_pf_hash_reset(vcpu
);
12035 vcpu
->arch
.apf
.halted
= false;
12037 if (vcpu
->arch
.guest_fpu
.fpstate
&& kvm_mpx_supported()) {
12038 struct fpstate
*fpstate
= vcpu
->arch
.guest_fpu
.fpstate
;
12041 * All paths that lead to INIT are required to load the guest's
12042 * FPU state (because most paths are buried in KVM_RUN).
12045 kvm_put_guest_fpu(vcpu
);
12047 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDREGS
);
12048 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDCSR
);
12051 kvm_load_guest_fpu(vcpu
);
12055 kvm_pmu_reset(vcpu
);
12056 vcpu
->arch
.smbase
= 0x30000;
12058 vcpu
->arch
.msr_misc_features_enables
= 0;
12059 vcpu
->arch
.ia32_misc_enable_msr
= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL
|
12060 MSR_IA32_MISC_ENABLE_BTS_UNAVAIL
;
12062 __kvm_set_xcr(vcpu
, 0, XFEATURE_MASK_FP
);
12063 __kvm_set_msr(vcpu
, MSR_IA32_XSS
, 0, true);
12066 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
12067 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
12068 kvm_register_mark_dirty(vcpu
, VCPU_REGS_RSP
);
12071 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
12072 * if no CPUID match is found. Note, it's impossible to get a match at
12073 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
12074 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
12075 * on RESET. But, go through the motions in case that's ever remedied.
12077 cpuid_0x1
= kvm_find_cpuid_entry(vcpu
, 1);
12078 kvm_rdx_write(vcpu
, cpuid_0x1
? cpuid_0x1
->eax
: 0x600);
12080 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
12082 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
12083 kvm_rip_write(vcpu
, 0xfff0);
12085 vcpu
->arch
.cr3
= 0;
12086 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
12089 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
12090 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
12091 * (or qualify) that with a footnote stating that CD/NW are preserved.
12093 new_cr0
= X86_CR0_ET
;
12095 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
12097 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
12099 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
12100 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
12101 static_call(kvm_x86_set_efer
)(vcpu
, 0);
12102 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
12105 * On the standard CR0/CR4/EFER modification paths, there are several
12106 * complex conditions determining whether the MMU has to be reset and/or
12107 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
12108 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
12109 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
12110 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
12112 if (old_cr0
& X86_CR0_PG
) {
12113 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12114 kvm_mmu_reset_context(vcpu
);
12118 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
12119 * APM states the TLBs are untouched by INIT, but it also states that
12120 * the TLBs are flushed on "External initialization of the processor."
12121 * Flush the guest TLB regardless of vendor, there is no meaningful
12122 * benefit in relying on the guest to flush the TLB immediately after
12123 * INIT. A spurious TLB flush is benign and likely negligible from a
12124 * performance perspective.
12127 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12129 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
12131 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
12133 struct kvm_segment cs
;
12135 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
12136 cs
.selector
= vector
<< 8;
12137 cs
.base
= vector
<< 12;
12138 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
12139 kvm_rip_write(vcpu
, 0);
12141 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
12143 int kvm_arch_hardware_enable(void)
12146 struct kvm_vcpu
*vcpu
;
12151 bool stable
, backwards_tsc
= false;
12153 kvm_user_return_msr_cpu_online();
12155 ret
= kvm_x86_check_processor_compatibility();
12159 ret
= static_call(kvm_x86_hardware_enable
)();
12163 local_tsc
= rdtsc();
12164 stable
= !kvm_check_tsc_unstable();
12165 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
12166 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12167 if (!stable
&& vcpu
->cpu
== smp_processor_id())
12168 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
12169 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
12170 backwards_tsc
= true;
12171 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
12172 max_tsc
= vcpu
->arch
.last_host_tsc
;
12178 * Sometimes, even reliable TSCs go backwards. This happens on
12179 * platforms that reset TSC during suspend or hibernate actions, but
12180 * maintain synchronization. We must compensate. Fortunately, we can
12181 * detect that condition here, which happens early in CPU bringup,
12182 * before any KVM threads can be running. Unfortunately, we can't
12183 * bring the TSCs fully up to date with real time, as we aren't yet far
12184 * enough into CPU bringup that we know how much real time has actually
12185 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
12186 * variables that haven't been updated yet.
12188 * So we simply find the maximum observed TSC above, then record the
12189 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
12190 * the adjustment will be applied. Note that we accumulate
12191 * adjustments, in case multiple suspend cycles happen before some VCPU
12192 * gets a chance to run again. In the event that no KVM threads get a
12193 * chance to run, we will miss the entire elapsed period, as we'll have
12194 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
12195 * loose cycle time. This isn't too big a deal, since the loss will be
12196 * uniform across all VCPUs (not to mention the scenario is extremely
12197 * unlikely). It is possible that a second hibernate recovery happens
12198 * much faster than a first, causing the observed TSC here to be
12199 * smaller; this would require additional padding adjustment, which is
12200 * why we set last_host_tsc to the local tsc observed here.
12202 * N.B. - this code below runs only on platforms with reliable TSC,
12203 * as that is the only way backwards_tsc is set above. Also note
12204 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
12205 * have the same delta_cyc adjustment applied if backwards_tsc
12206 * is detected. Note further, this adjustment is only done once,
12207 * as we reset last_host_tsc on all VCPUs to stop this from being
12208 * called multiple times (one for each physical CPU bringup).
12210 * Platforms with unreliable TSCs don't have to deal with this, they
12211 * will be compensated by the logic in vcpu_load, which sets the TSC to
12212 * catchup mode. This will catchup all VCPUs to real time, but cannot
12213 * guarantee that they stay in perfect synchronization.
12215 if (backwards_tsc
) {
12216 u64 delta_cyc
= max_tsc
- local_tsc
;
12217 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
12218 kvm
->arch
.backwards_tsc_observed
= true;
12219 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12220 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
12221 vcpu
->arch
.last_host_tsc
= local_tsc
;
12222 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
12226 * We have to disable TSC offset matching.. if you were
12227 * booting a VM while issuing an S4 host suspend....
12228 * you may have some problem. Solving this issue is
12229 * left as an exercise to the reader.
12231 kvm
->arch
.last_tsc_nsec
= 0;
12232 kvm
->arch
.last_tsc_write
= 0;
12239 void kvm_arch_hardware_disable(void)
12241 static_call(kvm_x86_hardware_disable
)();
12242 drop_user_return_notifiers();
12245 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
12247 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
12250 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
12252 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
12255 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
12256 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
12258 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
12260 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
12262 vcpu
->arch
.l1tf_flush_l1d
= true;
12263 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
12264 pmu
->need_cleanup
= true;
12265 kvm_make_request(KVM_REQ_PMU
, vcpu
);
12267 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
12270 void kvm_arch_free_vm(struct kvm
*kvm
)
12272 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
12273 __kvm_arch_free_vm(kvm
);
12277 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
12280 unsigned long flags
;
12285 ret
= kvm_page_track_init(kvm
);
12289 ret
= kvm_mmu_init_vm(kvm
);
12291 goto out_page_track
;
12293 ret
= static_call(kvm_x86_vm_init
)(kvm
);
12295 goto out_uninit_mmu
;
12297 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
12298 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
12299 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
12301 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
12302 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
12303 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
12304 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
12305 &kvm
->arch
.irq_sources_bitmap
);
12307 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
12308 mutex_init(&kvm
->arch
.apic_map_lock
);
12309 seqcount_raw_spinlock_init(&kvm
->arch
.pvclock_sc
, &kvm
->arch
.tsc_write_lock
);
12310 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
12312 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
12313 pvclock_update_vm_gtod_copy(kvm
);
12314 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
12316 kvm
->arch
.default_tsc_khz
= max_tsc_khz
? : tsc_khz
;
12317 kvm
->arch
.guest_can_read_msr_platform_info
= true;
12318 kvm
->arch
.enable_pmu
= enable_pmu
;
12320 #if IS_ENABLED(CONFIG_HYPERV)
12321 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
12322 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
12325 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
12326 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
12328 kvm_apicv_init(kvm
);
12329 kvm_hv_init_vm(kvm
);
12330 kvm_xen_init_vm(kvm
);
12335 kvm_mmu_uninit_vm(kvm
);
12337 kvm_page_track_cleanup(kvm
);
12342 int kvm_arch_post_init_vm(struct kvm
*kvm
)
12344 return kvm_mmu_post_init_vm(kvm
);
12347 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
12350 kvm_mmu_unload(vcpu
);
12354 static void kvm_unload_vcpu_mmus(struct kvm
*kvm
)
12357 struct kvm_vcpu
*vcpu
;
12359 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12360 kvm_clear_async_pf_completion_queue(vcpu
);
12361 kvm_unload_vcpu_mmu(vcpu
);
12365 void kvm_arch_sync_events(struct kvm
*kvm
)
12367 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
12368 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
12373 * __x86_set_memory_region: Setup KVM internal memory slot
12375 * @kvm: the kvm pointer to the VM.
12376 * @id: the slot ID to setup.
12377 * @gpa: the GPA to install the slot (unused when @size == 0).
12378 * @size: the size of the slot. Set to zero to uninstall a slot.
12380 * This function helps to setup a KVM internal memory slot. Specify
12381 * @size > 0 to install a new slot, while @size == 0 to uninstall a
12382 * slot. The return code can be one of the following:
12384 * HVA: on success (uninstall will return a bogus HVA)
12387 * The caller should always use IS_ERR() to check the return value
12388 * before use. Note, the KVM internal memory slots are guaranteed to
12389 * remain valid and unchanged until the VM is destroyed, i.e., the
12390 * GPA->HVA translation will not change. However, the HVA is a user
12391 * address, i.e. its accessibility is not guaranteed, and must be
12392 * accessed via __copy_{to,from}_user().
12394 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
12398 unsigned long hva
, old_npages
;
12399 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
12400 struct kvm_memory_slot
*slot
;
12402 /* Called with kvm->slots_lock held. */
12403 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
12404 return ERR_PTR_USR(-EINVAL
);
12406 slot
= id_to_memslot(slots
, id
);
12408 if (slot
&& slot
->npages
)
12409 return ERR_PTR_USR(-EEXIST
);
12412 * MAP_SHARED to prevent internal slot pages from being moved
12415 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
12416 MAP_SHARED
| MAP_ANONYMOUS
, 0);
12417 if (IS_ERR_VALUE(hva
))
12418 return (void __user
*)hva
;
12420 if (!slot
|| !slot
->npages
)
12423 old_npages
= slot
->npages
;
12424 hva
= slot
->userspace_addr
;
12427 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
12428 struct kvm_userspace_memory_region m
;
12430 m
.slot
= id
| (i
<< 16);
12432 m
.guest_phys_addr
= gpa
;
12433 m
.userspace_addr
= hva
;
12434 m
.memory_size
= size
;
12435 r
= __kvm_set_memory_region(kvm
, &m
);
12437 return ERR_PTR_USR(r
);
12441 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
12443 return (void __user
*)hva
;
12445 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
12447 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
12449 kvm_mmu_pre_destroy_vm(kvm
);
12452 void kvm_arch_destroy_vm(struct kvm
*kvm
)
12454 if (current
->mm
== kvm
->mm
) {
12456 * Free memory regions allocated on behalf of userspace,
12457 * unless the memory map has changed due to process exit
12460 mutex_lock(&kvm
->slots_lock
);
12461 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
12463 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
12465 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
12466 mutex_unlock(&kvm
->slots_lock
);
12468 kvm_unload_vcpu_mmus(kvm
);
12469 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
12470 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
12471 kvm_pic_destroy(kvm
);
12472 kvm_ioapic_destroy(kvm
);
12473 kvm_destroy_vcpus(kvm
);
12474 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
12475 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
12476 kvm_mmu_uninit_vm(kvm
);
12477 kvm_page_track_cleanup(kvm
);
12478 kvm_xen_destroy_vm(kvm
);
12479 kvm_hv_destroy_vm(kvm
);
12482 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
12486 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12487 kvfree(slot
->arch
.rmap
[i
]);
12488 slot
->arch
.rmap
[i
] = NULL
;
12492 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
12496 memslot_rmap_free(slot
);
12498 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12499 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12500 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12503 kvm_page_track_free_memslot(slot
);
12506 int memslot_rmap_alloc(struct kvm_memory_slot
*slot
, unsigned long npages
)
12508 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
12511 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12513 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12515 if (slot
->arch
.rmap
[i
])
12518 slot
->arch
.rmap
[i
] = __vcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
12519 if (!slot
->arch
.rmap
[i
]) {
12520 memslot_rmap_free(slot
);
12528 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
12529 struct kvm_memory_slot
*slot
)
12531 unsigned long npages
= slot
->npages
;
12535 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12536 * old arrays will be freed by __kvm_set_memory_region() if installing
12537 * the new memslot is successful.
12539 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
12541 if (kvm_memslots_have_rmaps(kvm
)) {
12542 r
= memslot_rmap_alloc(slot
, npages
);
12547 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12548 struct kvm_lpage_info
*linfo
;
12549 unsigned long ugfn
;
12553 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12555 linfo
= __vcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
12559 slot
->arch
.lpage_info
[i
- 1] = linfo
;
12561 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
12562 linfo
[0].disallow_lpage
= 1;
12563 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
12564 linfo
[lpages
- 1].disallow_lpage
= 1;
12565 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
12567 * If the gfn and userspace address are not aligned wrt each
12568 * other, disable large page support for this slot.
12570 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
12573 for (j
= 0; j
< lpages
; ++j
)
12574 linfo
[j
].disallow_lpage
= 1;
12578 if (kvm_page_track_create_memslot(kvm
, slot
, npages
))
12584 memslot_rmap_free(slot
);
12586 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12587 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12588 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12593 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
12595 struct kvm_vcpu
*vcpu
;
12599 * memslots->generation has been incremented.
12600 * mmio generation may have reached its maximum value.
12602 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
12604 /* Force re-initialization of steal_time cache */
12605 kvm_for_each_vcpu(i
, vcpu
, kvm
)
12606 kvm_vcpu_kick(vcpu
);
12609 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
12610 const struct kvm_memory_slot
*old
,
12611 struct kvm_memory_slot
*new,
12612 enum kvm_mr_change change
)
12614 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
) {
12615 if ((new->base_gfn
+ new->npages
- 1) > kvm_mmu_max_gfn())
12618 return kvm_alloc_memslot_metadata(kvm
, new);
12621 if (change
== KVM_MR_FLAGS_ONLY
)
12622 memcpy(&new->arch
, &old
->arch
, sizeof(old
->arch
));
12623 else if (WARN_ON_ONCE(change
!= KVM_MR_DELETE
))
12630 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
12634 if (!kvm_x86_ops
.cpu_dirty_log_size
)
12637 nr_slots
= atomic_read(&kvm
->nr_memslots_dirty_logging
);
12638 if ((enable
&& nr_slots
== 1) || !nr_slots
)
12639 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
12642 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
12643 struct kvm_memory_slot
*old
,
12644 const struct kvm_memory_slot
*new,
12645 enum kvm_mr_change change
)
12647 u32 old_flags
= old
? old
->flags
: 0;
12648 u32 new_flags
= new ? new->flags
: 0;
12649 bool log_dirty_pages
= new_flags
& KVM_MEM_LOG_DIRTY_PAGES
;
12652 * Update CPU dirty logging if dirty logging is being toggled. This
12653 * applies to all operations.
12655 if ((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
12656 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
12659 * Nothing more to do for RO slots (which can't be dirtied and can't be
12660 * made writable) or CREATE/MOVE/DELETE of a slot.
12662 * For a memslot with dirty logging disabled:
12663 * CREATE: No dirty mappings will already exist.
12664 * MOVE/DELETE: The old mappings will already have been cleaned up by
12665 * kvm_arch_flush_shadow_memslot()
12667 * For a memslot with dirty logging enabled:
12668 * CREATE: No shadow pages exist, thus nothing to write-protect
12669 * and no dirty bits to clear.
12670 * MOVE/DELETE: The old mappings will already have been cleaned up by
12671 * kvm_arch_flush_shadow_memslot().
12673 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new_flags
& KVM_MEM_READONLY
))
12677 * READONLY and non-flags changes were filtered out above, and the only
12678 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12679 * logging isn't being toggled on or off.
12681 if (WARN_ON_ONCE(!((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
12684 if (!log_dirty_pages
) {
12686 * Dirty logging tracks sptes in 4k granularity, meaning that
12687 * large sptes have to be split. If live migration succeeds,
12688 * the guest in the source machine will be destroyed and large
12689 * sptes will be created in the destination. However, if the
12690 * guest continues to run in the source machine (for example if
12691 * live migration fails), small sptes will remain around and
12692 * cause bad performance.
12694 * Scan sptes if dirty logging has been stopped, dropping those
12695 * which can be collapsed into a single large-page spte. Later
12696 * page faults will create the large-page sptes.
12698 kvm_mmu_zap_collapsible_sptes(kvm
, new);
12701 * Initially-all-set does not require write protecting any page,
12702 * because they're all assumed to be dirty.
12704 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
12707 if (READ_ONCE(eager_page_split
))
12708 kvm_mmu_slot_try_split_huge_pages(kvm
, new, PG_LEVEL_4K
);
12710 if (kvm_x86_ops
.cpu_dirty_log_size
) {
12711 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
12712 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
12714 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
12718 * Unconditionally flush the TLBs after enabling dirty logging.
12719 * A flush is almost always going to be necessary (see below),
12720 * and unconditionally flushing allows the helpers to omit
12721 * the subtly complex checks when removing write access.
12723 * Do the flush outside of mmu_lock to reduce the amount of
12724 * time mmu_lock is held. Flushing after dropping mmu_lock is
12725 * safe as KVM only needs to guarantee the slot is fully
12726 * write-protected before returning to userspace, i.e. before
12727 * userspace can consume the dirty status.
12729 * Flushing outside of mmu_lock requires KVM to be careful when
12730 * making decisions based on writable status of an SPTE, e.g. a
12731 * !writable SPTE doesn't guarantee a CPU can't perform writes.
12733 * Specifically, KVM also write-protects guest page tables to
12734 * monitor changes when using shadow paging, and must guarantee
12735 * no CPUs can write to those page before mmu_lock is dropped.
12736 * Because CPUs may have stale TLB entries at this point, a
12737 * !writable SPTE doesn't guarantee CPUs can't perform writes.
12739 * KVM also allows making SPTES writable outside of mmu_lock,
12740 * e.g. to allow dirty logging without taking mmu_lock.
12742 * To handle these scenarios, KVM uses a separate software-only
12743 * bit (MMU-writable) to track if a SPTE is !writable due to
12744 * a guest page table being write-protected (KVM clears the
12745 * MMU-writable flag when write-protecting for shadow paging).
12747 * The use of MMU-writable is also the primary motivation for
12748 * the unconditional flush. Because KVM must guarantee that a
12749 * CPU doesn't contain stale, writable TLB entries for a
12750 * !MMU-writable SPTE, KVM must flush if it encounters any
12751 * MMU-writable SPTE regardless of whether the actual hardware
12752 * writable bit was set. I.e. KVM is almost guaranteed to need
12753 * to flush, while unconditionally flushing allows the "remove
12754 * write access" helpers to ignore MMU-writable entirely.
12756 * See is_writable_pte() for more details (the case involving
12757 * access-tracked SPTEs is particularly relevant).
12759 kvm_arch_flush_remote_tlbs_memslot(kvm
, new);
12763 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
12764 struct kvm_memory_slot
*old
,
12765 const struct kvm_memory_slot
*new,
12766 enum kvm_mr_change change
)
12768 if (!kvm
->arch
.n_requested_mmu_pages
&&
12769 (change
== KVM_MR_CREATE
|| change
== KVM_MR_DELETE
)) {
12770 unsigned long nr_mmu_pages
;
12772 nr_mmu_pages
= kvm
->nr_memslot_pages
/ KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO
;
12773 nr_mmu_pages
= max(nr_mmu_pages
, KVM_MIN_ALLOC_MMU_PAGES
);
12774 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
12777 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
12779 /* Free the arrays associated with the old memslot. */
12780 if (change
== KVM_MR_MOVE
)
12781 kvm_arch_free_memslot(kvm
, old
);
12784 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
12786 kvm_mmu_zap_all(kvm
);
12789 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
12790 struct kvm_memory_slot
*slot
)
12792 kvm_page_track_flush_slot(kvm
, slot
);
12795 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
12797 return (is_guest_mode(vcpu
) &&
12798 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
12801 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
12803 if (!list_empty_careful(&vcpu
->async_pf
.done
))
12806 if (kvm_apic_has_pending_init_or_sipi(vcpu
) &&
12807 kvm_apic_init_sipi_allowed(vcpu
))
12810 if (vcpu
->arch
.pv
.pv_unhalted
)
12813 if (kvm_is_exception_pending(vcpu
))
12816 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
12817 (vcpu
->arch
.nmi_pending
&&
12818 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
12821 #ifdef CONFIG_KVM_SMM
12822 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
12823 (vcpu
->arch
.smi_pending
&&
12824 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
12828 if (kvm_arch_interrupt_allowed(vcpu
) &&
12829 (kvm_cpu_has_interrupt(vcpu
) ||
12830 kvm_guest_apic_has_interrupt(vcpu
)))
12833 if (kvm_hv_has_stimer_pending(vcpu
))
12836 if (is_guest_mode(vcpu
) &&
12837 kvm_x86_ops
.nested_ops
->has_events
&&
12838 kvm_x86_ops
.nested_ops
->has_events(vcpu
))
12841 if (kvm_xen_has_pending_events(vcpu
))
12847 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
12849 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
12852 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
12854 if (kvm_vcpu_apicv_active(vcpu
) &&
12855 static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
12861 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
12863 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
12866 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
12867 #ifdef CONFIG_KVM_SMM
12868 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
12870 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
12873 return kvm_arch_dy_has_pending_interrupt(vcpu
);
12876 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
12878 if (vcpu
->arch
.guest_state_protected
)
12881 return vcpu
->arch
.preempted_in_kernel
;
12884 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu
*vcpu
)
12886 return kvm_rip_read(vcpu
);
12889 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
12891 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
12894 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
12896 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
12899 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
12901 /* Can't read the RIP when guest state is protected, just return 0 */
12902 if (vcpu
->arch
.guest_state_protected
)
12905 if (is_64_bit_mode(vcpu
))
12906 return kvm_rip_read(vcpu
);
12907 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
12908 kvm_rip_read(vcpu
));
12910 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
12912 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
12914 return kvm_get_linear_rip(vcpu
) == linear_rip
;
12916 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
12918 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
12920 unsigned long rflags
;
12922 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
12923 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
12924 rflags
&= ~X86_EFLAGS_TF
;
12927 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
12929 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
12931 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
12932 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
12933 rflags
|= X86_EFLAGS_TF
;
12934 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
12937 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
12939 __kvm_set_rflags(vcpu
, rflags
);
12940 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
12942 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
12944 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
12946 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
12948 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
12951 static inline u32
kvm_async_pf_next_probe(u32 key
)
12953 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
12956 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12958 u32 key
= kvm_async_pf_hash_fn(gfn
);
12960 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
12961 key
= kvm_async_pf_next_probe(key
);
12963 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
12966 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12969 u32 key
= kvm_async_pf_hash_fn(gfn
);
12971 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
12972 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
12973 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
12974 key
= kvm_async_pf_next_probe(key
);
12979 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12981 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
12984 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12988 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
12990 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
12994 vcpu
->arch
.apf
.gfns
[i
] = ~0;
12996 j
= kvm_async_pf_next_probe(j
);
12997 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
12999 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
13001 * k lies cyclically in ]i,j]
13003 * |....j i.k.| or |.k..j i...|
13005 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
13006 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
13011 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
13013 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
13015 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
13019 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
13021 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
13023 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
13024 &token
, offset
, sizeof(token
));
13027 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
13029 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
13032 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
13033 &val
, offset
, sizeof(val
)))
13039 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
13042 if (!kvm_pv_async_pf_enabled(vcpu
))
13045 if (vcpu
->arch
.apf
.send_user_only
&&
13046 static_call(kvm_x86_get_cpl
)(vcpu
) == 0)
13049 if (is_guest_mode(vcpu
)) {
13051 * L1 needs to opt into the special #PF vmexits that are
13052 * used to deliver async page faults.
13054 return vcpu
->arch
.apf
.delivery_as_pf_vmexit
;
13057 * Play it safe in case the guest temporarily disables paging.
13058 * The real mode IDT in particular is unlikely to have a #PF
13061 return is_paging(vcpu
);
13065 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
13067 if (unlikely(!lapic_in_kernel(vcpu
) ||
13068 kvm_event_needs_reinjection(vcpu
) ||
13069 kvm_is_exception_pending(vcpu
)))
13072 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
13076 * If interrupts are off we cannot even use an artificial
13079 return kvm_arch_interrupt_allowed(vcpu
);
13082 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
13083 struct kvm_async_pf
*work
)
13085 struct x86_exception fault
;
13087 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
13088 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
13090 if (kvm_can_deliver_async_pf(vcpu
) &&
13091 !apf_put_user_notpresent(vcpu
)) {
13092 fault
.vector
= PF_VECTOR
;
13093 fault
.error_code_valid
= true;
13094 fault
.error_code
= 0;
13095 fault
.nested_page_fault
= false;
13096 fault
.address
= work
->arch
.token
;
13097 fault
.async_page_fault
= true;
13098 kvm_inject_page_fault(vcpu
, &fault
);
13102 * It is not possible to deliver a paravirtualized asynchronous
13103 * page fault, but putting the guest in an artificial halt state
13104 * can be beneficial nevertheless: if an interrupt arrives, we
13105 * can deliver it timely and perhaps the guest will schedule
13106 * another process. When the instruction that triggered a page
13107 * fault is retried, hopefully the page will be ready in the host.
13109 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
13114 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
13115 struct kvm_async_pf
*work
)
13117 struct kvm_lapic_irq irq
= {
13118 .delivery_mode
= APIC_DM_FIXED
,
13119 .vector
= vcpu
->arch
.apf
.vec
13122 if (work
->wakeup_all
)
13123 work
->arch
.token
= ~0; /* broadcast wakeup */
13125 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
13126 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
13128 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
13129 kvm_pv_async_pf_enabled(vcpu
) &&
13130 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
13131 vcpu
->arch
.apf
.pageready_pending
= true;
13132 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
13135 vcpu
->arch
.apf
.halted
= false;
13136 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
13139 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
13141 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
13142 if (!vcpu
->arch
.apf
.pageready_pending
)
13143 kvm_vcpu_kick(vcpu
);
13146 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
13148 if (!kvm_pv_async_pf_enabled(vcpu
))
13151 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
13154 void kvm_arch_start_assignment(struct kvm
*kvm
)
13156 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
13157 static_call_cond(kvm_x86_pi_start_assignment
)(kvm
);
13159 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
13161 void kvm_arch_end_assignment(struct kvm
*kvm
)
13163 atomic_dec(&kvm
->arch
.assigned_device_count
);
13165 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
13167 bool noinstr
kvm_arch_has_assigned_device(struct kvm
*kvm
)
13169 return arch_atomic_read(&kvm
->arch
.assigned_device_count
);
13171 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
13173 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
13175 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
13177 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
13179 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
13181 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
13183 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
13185 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
13187 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
13189 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
13191 bool kvm_arch_has_irq_bypass(void)
13196 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
13197 struct irq_bypass_producer
*prod
)
13199 struct kvm_kernel_irqfd
*irqfd
=
13200 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
13203 irqfd
->producer
= prod
;
13204 kvm_arch_start_assignment(irqfd
->kvm
);
13205 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
,
13206 prod
->irq
, irqfd
->gsi
, 1);
13209 kvm_arch_end_assignment(irqfd
->kvm
);
13214 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
13215 struct irq_bypass_producer
*prod
)
13218 struct kvm_kernel_irqfd
*irqfd
=
13219 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
13221 WARN_ON(irqfd
->producer
!= prod
);
13222 irqfd
->producer
= NULL
;
13225 * When producer of consumer is unregistered, we change back to
13226 * remapped mode, so we can re-use the current implementation
13227 * when the irq is masked/disabled or the consumer side (KVM
13228 * int this case doesn't want to receive the interrupts.
13230 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
13232 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
13233 " fails: %d\n", irqfd
->consumer
.token
, ret
);
13235 kvm_arch_end_assignment(irqfd
->kvm
);
13238 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
13239 uint32_t guest_irq
, bool set
)
13241 return static_call(kvm_x86_pi_update_irte
)(kvm
, host_irq
, guest_irq
, set
);
13244 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry
*old
,
13245 struct kvm_kernel_irq_routing_entry
*new)
13247 if (new->type
!= KVM_IRQ_ROUTING_MSI
)
13250 return !!memcmp(&old
->msi
, &new->msi
, sizeof(new->msi
));
13253 bool kvm_vector_hashing_enabled(void)
13255 return vector_hashing
;
13258 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
13260 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
13262 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
13265 int kvm_spec_ctrl_test_value(u64 value
)
13268 * test that setting IA32_SPEC_CTRL to given value
13269 * is allowed by the host processor
13273 unsigned long flags
;
13276 local_irq_save(flags
);
13278 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
13280 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
13283 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
13285 local_irq_restore(flags
);
13289 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
13291 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
13293 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
13294 struct x86_exception fault
;
13295 u64 access
= error_code
&
13296 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
13298 if (!(error_code
& PFERR_PRESENT_MASK
) ||
13299 mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, &fault
) != INVALID_GPA
) {
13301 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
13302 * tables probably do not match the TLB. Just proceed
13303 * with the error code that the processor gave.
13305 fault
.vector
= PF_VECTOR
;
13306 fault
.error_code_valid
= true;
13307 fault
.error_code
= error_code
;
13308 fault
.nested_page_fault
= false;
13309 fault
.address
= gva
;
13310 fault
.async_page_fault
= false;
13312 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
13314 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
13317 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
13318 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
13319 * indicates whether exit to userspace is needed.
13321 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
13322 struct x86_exception
*e
)
13324 if (r
== X86EMUL_PROPAGATE_FAULT
) {
13325 if (KVM_BUG_ON(!e
, vcpu
->kvm
))
13328 kvm_inject_emulated_page_fault(vcpu
, e
);
13333 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
13334 * while handling a VMX instruction KVM could've handled the request
13335 * correctly by exiting to userspace and performing I/O but there
13336 * doesn't seem to be a real use-case behind such requests, just return
13337 * KVM_EXIT_INTERNAL_ERROR for now.
13339 kvm_prepare_emulation_failure_exit(vcpu
);
13343 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
13345 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
13348 struct x86_exception e
;
13355 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
13356 if (r
!= X86EMUL_CONTINUE
)
13357 return kvm_handle_memory_failure(vcpu
, r
, &e
);
13359 if (operand
.pcid
>> 12 != 0) {
13360 kvm_inject_gp(vcpu
, 0);
13364 pcid_enabled
= kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
);
13367 case INVPCID_TYPE_INDIV_ADDR
:
13368 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
13369 is_noncanonical_address(operand
.gla
, vcpu
)) {
13370 kvm_inject_gp(vcpu
, 0);
13373 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
13374 return kvm_skip_emulated_instruction(vcpu
);
13376 case INVPCID_TYPE_SINGLE_CTXT
:
13377 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
13378 kvm_inject_gp(vcpu
, 0);
13382 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
13383 return kvm_skip_emulated_instruction(vcpu
);
13385 case INVPCID_TYPE_ALL_NON_GLOBAL
:
13387 * Currently, KVM doesn't mark global entries in the shadow
13388 * page tables, so a non-global flush just degenerates to a
13389 * global flush. If needed, we could optimize this later by
13390 * keeping track of global entries in shadow page tables.
13394 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
13395 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
13396 return kvm_skip_emulated_instruction(vcpu
);
13399 kvm_inject_gp(vcpu
, 0);
13403 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
13405 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
13407 struct kvm_run
*run
= vcpu
->run
;
13408 struct kvm_mmio_fragment
*frag
;
13411 BUG_ON(!vcpu
->mmio_needed
);
13413 /* Complete previous fragment */
13414 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
13415 len
= min(8u, frag
->len
);
13416 if (!vcpu
->mmio_is_write
)
13417 memcpy(frag
->data
, run
->mmio
.data
, len
);
13419 if (frag
->len
<= 8) {
13420 /* Switch to the next fragment. */
13422 vcpu
->mmio_cur_fragment
++;
13424 /* Go forward to the next mmio piece. */
13430 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
13431 vcpu
->mmio_needed
= 0;
13433 // VMG change, at this point, we're always done
13434 // RIP has already been advanced
13438 // More MMIO is needed
13439 run
->mmio
.phys_addr
= frag
->gpa
;
13440 run
->mmio
.len
= min(8u, frag
->len
);
13441 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
13442 if (run
->mmio
.is_write
)
13443 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
13444 run
->exit_reason
= KVM_EXIT_MMIO
;
13446 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13451 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
13455 struct kvm_mmio_fragment
*frag
;
13460 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
13461 if (handled
== bytes
)
13468 /*TODO: Check if need to increment number of frags */
13469 frag
= vcpu
->mmio_fragments
;
13470 vcpu
->mmio_nr_fragments
= 1;
13475 vcpu
->mmio_needed
= 1;
13476 vcpu
->mmio_cur_fragment
= 0;
13478 vcpu
->run
->mmio
.phys_addr
= gpa
;
13479 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
13480 vcpu
->run
->mmio
.is_write
= 1;
13481 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
13482 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
13484 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13488 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
13490 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
13494 struct kvm_mmio_fragment
*frag
;
13499 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
13500 if (handled
== bytes
)
13507 /*TODO: Check if need to increment number of frags */
13508 frag
= vcpu
->mmio_fragments
;
13509 vcpu
->mmio_nr_fragments
= 1;
13514 vcpu
->mmio_needed
= 1;
13515 vcpu
->mmio_cur_fragment
= 0;
13517 vcpu
->run
->mmio
.phys_addr
= gpa
;
13518 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
13519 vcpu
->run
->mmio
.is_write
= 0;
13520 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
13522 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13526 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
13528 static void advance_sev_es_emulated_pio(struct kvm_vcpu
*vcpu
, unsigned count
, int size
)
13530 vcpu
->arch
.sev_pio_count
-= count
;
13531 vcpu
->arch
.sev_pio_data
+= count
* size
;
13534 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13535 unsigned int port
);
13537 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
13539 int size
= vcpu
->arch
.pio
.size
;
13540 int port
= vcpu
->arch
.pio
.port
;
13542 vcpu
->arch
.pio
.count
= 0;
13543 if (vcpu
->arch
.sev_pio_count
)
13544 return kvm_sev_es_outs(vcpu
, size
, port
);
13548 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13552 unsigned int count
=
13553 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13554 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
13556 /* memcpy done already by emulator_pio_out. */
13557 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13561 /* Emulation done by the kernel. */
13562 if (!vcpu
->arch
.sev_pio_count
)
13566 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
13570 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13571 unsigned int port
);
13573 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
13575 unsigned count
= vcpu
->arch
.pio
.count
;
13576 int size
= vcpu
->arch
.pio
.size
;
13577 int port
= vcpu
->arch
.pio
.port
;
13579 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
13580 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13581 if (vcpu
->arch
.sev_pio_count
)
13582 return kvm_sev_es_ins(vcpu
, size
, port
);
13586 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13590 unsigned int count
=
13591 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13592 if (!emulator_pio_in(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
))
13595 /* Emulation done by the kernel. */
13596 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13597 if (!vcpu
->arch
.sev_pio_count
)
13601 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
13605 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
13606 unsigned int port
, void *data
, unsigned int count
,
13609 vcpu
->arch
.sev_pio_data
= data
;
13610 vcpu
->arch
.sev_pio_count
= count
;
13611 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
13612 : kvm_sev_es_outs(vcpu
, size
, port
);
13614 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
13616 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
13617 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
13618 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
13619 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
13620 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
13621 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
13622 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
13623 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter
);
13624 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
13625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
13626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
13627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
13628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
13629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
13630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
13631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
13632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
13633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
13634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
13635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
13636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
13637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
13638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath
);
13639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_doorbell
);
13640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq
);
13641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
13642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
13643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
13644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);
13646 static int __init
kvm_x86_init(void)
13648 kvm_mmu_x86_module_init();
13649 mitigate_smt_rsb
&= boot_cpu_has_bug(X86_BUG_SMT_RSB
) && cpu_smt_possible();
13652 module_init(kvm_x86_init
);
13654 static void __exit
kvm_x86_exit(void)
13657 * If module_init() is implemented, module_exit() must also be
13658 * implemented to allow module unload.
13661 module_exit(kvm_x86_exit
);