1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/api.h>
72 #include <asm/fpu/xcr.h>
73 #include <asm/fpu/xstate.h>
74 #include <asm/pvclock.h>
75 #include <asm/div64.h>
76 #include <asm/irq_remapping.h>
77 #include <asm/mshyperv.h>
78 #include <asm/hypervisor.h>
79 #include <asm/tlbflush.h>
80 #include <asm/intel_pt.h>
81 #include <asm/emulate_prefix.h>
83 #include <clocksource/hyperv_timer.h>
85 #define CREATE_TRACE_POINTS
88 #define MAX_IO_MSRS 256
89 #define KVM_MAX_MCE_BANKS 32
90 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
93 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
95 #define emul_to_vcpu(ctxt) \
96 ((struct kvm_vcpu *)(ctxt)->vcpu)
99 * - enable syscall per default because its emulated by KVM
100 * - enable LME and LMA per default on 64 bit KVM
104 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
106 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
109 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
113 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
115 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
116 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
118 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
119 static void process_nmi(struct kvm_vcpu
*vcpu
);
120 static void process_smi(struct kvm_vcpu
*vcpu
);
121 static void enter_smm(struct kvm_vcpu
*vcpu
);
122 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
123 static void store_regs(struct kvm_vcpu
*vcpu
);
124 static int sync_regs(struct kvm_vcpu
*vcpu
);
125 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
);
127 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
128 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
130 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
132 #define KVM_X86_OP(func) \
133 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
134 *(((struct kvm_x86_ops *)0)->func));
135 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
136 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
137 #include <asm/kvm-x86-ops.h>
138 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
139 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
141 static bool __read_mostly ignore_msrs
= 0;
142 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
144 bool __read_mostly report_ignored_msrs
= true;
145 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
146 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
148 unsigned int min_timer_period_us
= 200;
149 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
151 static bool __read_mostly kvmclock_periodic_sync
= true;
152 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
154 bool __read_mostly kvm_has_tsc_control
;
155 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
156 u32 __read_mostly kvm_max_guest_tsc_khz
;
157 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
158 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
159 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
160 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
161 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
162 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
163 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
164 bool __read_mostly kvm_has_bus_lock_exit
;
165 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
167 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
168 static u32 __read_mostly tsc_tolerance_ppm
= 250;
169 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
172 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
173 * adaptive tuning starting from default advancement of 1000ns. '0' disables
174 * advancement entirely. Any other value is used as-is and disables adaptive
175 * tuning, i.e. allows privileged userspace to set an exact advancement time.
177 static int __read_mostly lapic_timer_advance_ns
= -1;
178 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
180 static bool __read_mostly vector_hashing
= true;
181 module_param(vector_hashing
, bool, S_IRUGO
);
183 bool __read_mostly enable_vmware_backdoor
= false;
184 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
185 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
187 static bool __read_mostly force_emulation_prefix
= false;
188 module_param(force_emulation_prefix
, bool, S_IRUGO
);
190 int __read_mostly pi_inject_timer
= -1;
191 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
193 /* Enable/disable PMU virtualization */
194 bool __read_mostly enable_pmu
= true;
195 EXPORT_SYMBOL_GPL(enable_pmu
);
196 module_param(enable_pmu
, bool, 0444);
198 bool __read_mostly eager_page_split
= true;
199 module_param(eager_page_split
, bool, 0644);
202 * Restoring the host value for MSRs that are only consumed when running in
203 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
204 * returns to userspace, i.e. the kernel can run with the guest's value.
206 #define KVM_MAX_NR_USER_RETURN_MSRS 16
208 struct kvm_user_return_msrs
{
209 struct user_return_notifier urn
;
211 struct kvm_user_return_msr_values
{
214 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
217 u32 __read_mostly kvm_nr_uret_msrs
;
218 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
219 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
220 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
222 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
223 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
224 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
225 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
227 u64 __read_mostly host_efer
;
228 EXPORT_SYMBOL_GPL(host_efer
);
230 bool __read_mostly allow_smaller_maxphyaddr
= 0;
231 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
233 bool __read_mostly enable_apicv
= true;
234 EXPORT_SYMBOL_GPL(enable_apicv
);
236 u64 __read_mostly host_xss
;
237 EXPORT_SYMBOL_GPL(host_xss
);
238 u64 __read_mostly supported_xss
;
239 EXPORT_SYMBOL_GPL(supported_xss
);
241 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
242 KVM_GENERIC_VM_STATS(),
243 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
244 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
245 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
246 STATS_DESC_COUNTER(VM
, mmu_flooded
),
247 STATS_DESC_COUNTER(VM
, mmu_recycled
),
248 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
249 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
250 STATS_DESC_ICOUNTER(VM
, pages_4k
),
251 STATS_DESC_ICOUNTER(VM
, pages_2m
),
252 STATS_DESC_ICOUNTER(VM
, pages_1g
),
253 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
254 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
255 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
258 const struct kvm_stats_header kvm_vm_stats_header
= {
259 .name_size
= KVM_STATS_NAME_SIZE
,
260 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
261 .id_offset
= sizeof(struct kvm_stats_header
),
262 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
263 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
264 sizeof(kvm_vm_stats_desc
),
267 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
268 KVM_GENERIC_VCPU_STATS(),
269 STATS_DESC_COUNTER(VCPU
, pf_taken
),
270 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
271 STATS_DESC_COUNTER(VCPU
, pf_emulate
),
272 STATS_DESC_COUNTER(VCPU
, pf_spurious
),
273 STATS_DESC_COUNTER(VCPU
, pf_fast
),
274 STATS_DESC_COUNTER(VCPU
, pf_mmio_spte_created
),
275 STATS_DESC_COUNTER(VCPU
, pf_guest
),
276 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
277 STATS_DESC_COUNTER(VCPU
, invlpg
),
278 STATS_DESC_COUNTER(VCPU
, exits
),
279 STATS_DESC_COUNTER(VCPU
, io_exits
),
280 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
281 STATS_DESC_COUNTER(VCPU
, signal_exits
),
282 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
283 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
284 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
285 STATS_DESC_COUNTER(VCPU
, halt_exits
),
286 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
287 STATS_DESC_COUNTER(VCPU
, irq_exits
),
288 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
289 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
290 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
291 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
292 STATS_DESC_COUNTER(VCPU
, hypercalls
),
293 STATS_DESC_COUNTER(VCPU
, irq_injections
),
294 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
295 STATS_DESC_COUNTER(VCPU
, req_event
),
296 STATS_DESC_COUNTER(VCPU
, nested_run
),
297 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
298 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
299 STATS_DESC_COUNTER(VCPU
, preemption_reported
),
300 STATS_DESC_COUNTER(VCPU
, preemption_other
),
301 STATS_DESC_ICOUNTER(VCPU
, guest_mode
)
304 const struct kvm_stats_header kvm_vcpu_stats_header
= {
305 .name_size
= KVM_STATS_NAME_SIZE
,
306 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
307 .id_offset
= sizeof(struct kvm_stats_header
),
308 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
309 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
310 sizeof(kvm_vcpu_stats_desc
),
313 u64 __read_mostly host_xcr0
;
314 u64 __read_mostly supported_xcr0
;
315 EXPORT_SYMBOL_GPL(supported_xcr0
);
317 static struct kmem_cache
*x86_emulator_cache
;
320 * When called, it means the previous get/set msr reached an invalid msr.
321 * Return true if we want to ignore/silent this failed msr access.
323 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
325 const char *op
= write
? "wrmsr" : "rdmsr";
328 if (report_ignored_msrs
)
329 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
334 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
340 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
342 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
343 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
345 return kmem_cache_create_usercopy("x86_emulator", size
,
346 __alignof__(struct x86_emulate_ctxt
),
347 SLAB_ACCOUNT
, useroffset
,
348 size
- useroffset
, NULL
);
351 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
353 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
356 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
357 vcpu
->arch
.apf
.gfns
[i
] = ~0;
360 static void kvm_on_user_return(struct user_return_notifier
*urn
)
363 struct kvm_user_return_msrs
*msrs
364 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
365 struct kvm_user_return_msr_values
*values
;
369 * Disabling irqs at this point since the following code could be
370 * interrupted and executed through kvm_arch_hardware_disable()
372 local_irq_save(flags
);
373 if (msrs
->registered
) {
374 msrs
->registered
= false;
375 user_return_notifier_unregister(urn
);
377 local_irq_restore(flags
);
378 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
379 values
= &msrs
->values
[slot
];
380 if (values
->host
!= values
->curr
) {
381 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
382 values
->curr
= values
->host
;
387 static int kvm_probe_user_return_msr(u32 msr
)
393 ret
= rdmsrl_safe(msr
, &val
);
396 ret
= wrmsrl_safe(msr
, val
);
402 int kvm_add_user_return_msr(u32 msr
)
404 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
406 if (kvm_probe_user_return_msr(msr
))
409 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
410 return kvm_nr_uret_msrs
++;
412 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
414 int kvm_find_user_return_msr(u32 msr
)
418 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
419 if (kvm_uret_msrs_list
[i
] == msr
)
424 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
426 static void kvm_user_return_msr_cpu_online(void)
428 unsigned int cpu
= smp_processor_id();
429 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
433 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
434 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
435 msrs
->values
[i
].host
= value
;
436 msrs
->values
[i
].curr
= value
;
440 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
442 unsigned int cpu
= smp_processor_id();
443 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
446 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
447 if (value
== msrs
->values
[slot
].curr
)
449 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
453 msrs
->values
[slot
].curr
= value
;
454 if (!msrs
->registered
) {
455 msrs
->urn
.on_user_return
= kvm_on_user_return
;
456 user_return_notifier_register(&msrs
->urn
);
457 msrs
->registered
= true;
461 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
463 static void drop_user_return_notifiers(void)
465 unsigned int cpu
= smp_processor_id();
466 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
468 if (msrs
->registered
)
469 kvm_on_user_return(&msrs
->urn
);
472 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
474 return vcpu
->arch
.apic_base
;
476 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
478 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
480 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
482 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
484 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
486 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
487 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
488 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
489 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
491 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
493 if (!msr_info
->host_initiated
) {
494 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
496 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
500 kvm_lapic_set_base(vcpu
, msr_info
->data
);
501 kvm_recalculate_apic_map(vcpu
->kvm
);
504 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
507 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
509 * Hardware virtualization extension instructions may fault if a reboot turns
510 * off virtualization while processes are running. Usually after catching the
511 * fault we just panic; during reboot instead the instruction is ignored.
513 noinstr
void kvm_spurious_fault(void)
515 /* Fault while not rebooting. We want the trace. */
516 BUG_ON(!kvm_rebooting
);
518 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
520 #define EXCPT_BENIGN 0
521 #define EXCPT_CONTRIBUTORY 1
524 static int exception_class(int vector
)
534 return EXCPT_CONTRIBUTORY
;
541 #define EXCPT_FAULT 0
543 #define EXCPT_ABORT 2
544 #define EXCPT_INTERRUPT 3
546 static int exception_type(int vector
)
550 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
551 return EXCPT_INTERRUPT
;
555 /* #DB is trap, as instruction watchpoints are handled elsewhere */
556 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
559 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
562 /* Reserved exceptions will result in fault */
566 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
568 unsigned nr
= vcpu
->arch
.exception
.nr
;
569 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
570 unsigned long payload
= vcpu
->arch
.exception
.payload
;
578 * "Certain debug exceptions may clear bit 0-3. The
579 * remaining contents of the DR6 register are never
580 * cleared by the processor".
582 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
584 * In order to reflect the #DB exception payload in guest
585 * dr6, three components need to be considered: active low
586 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
588 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
589 * In the target guest dr6:
590 * FIXED_1 bits should always be set.
591 * Active low bits should be cleared if 1-setting in payload.
592 * Active high bits should be set if 1-setting in payload.
594 * Note, the payload is compatible with the pending debug
595 * exceptions/exit qualification under VMX, that active_low bits
596 * are active high in payload.
597 * So they need to be flipped for DR6.
599 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
600 vcpu
->arch
.dr6
|= payload
;
601 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
604 * The #DB payload is defined as compatible with the 'pending
605 * debug exceptions' field under VMX, not DR6. While bit 12 is
606 * defined in the 'pending debug exceptions' field (enabled
607 * breakpoint), it is reserved and must be zero in DR6.
609 vcpu
->arch
.dr6
&= ~BIT(12);
612 vcpu
->arch
.cr2
= payload
;
616 vcpu
->arch
.exception
.has_payload
= false;
617 vcpu
->arch
.exception
.payload
= 0;
619 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
621 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
622 unsigned nr
, bool has_error
, u32 error_code
,
623 bool has_payload
, unsigned long payload
, bool reinject
)
628 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
630 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
634 * On vmentry, vcpu->arch.exception.pending is only
635 * true if an event injection was blocked by
636 * nested_run_pending. In that case, however,
637 * vcpu_enter_guest requests an immediate exit,
638 * and the guest shouldn't proceed far enough to
641 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
642 vcpu
->arch
.exception
.injected
= true;
643 if (WARN_ON_ONCE(has_payload
)) {
645 * A reinjected event has already
646 * delivered its payload.
652 vcpu
->arch
.exception
.pending
= true;
653 vcpu
->arch
.exception
.injected
= false;
655 vcpu
->arch
.exception
.has_error_code
= has_error
;
656 vcpu
->arch
.exception
.nr
= nr
;
657 vcpu
->arch
.exception
.error_code
= error_code
;
658 vcpu
->arch
.exception
.has_payload
= has_payload
;
659 vcpu
->arch
.exception
.payload
= payload
;
660 if (!is_guest_mode(vcpu
))
661 kvm_deliver_exception_payload(vcpu
);
665 /* to check exception */
666 prev_nr
= vcpu
->arch
.exception
.nr
;
667 if (prev_nr
== DF_VECTOR
) {
668 /* triple fault -> shutdown */
669 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
672 class1
= exception_class(prev_nr
);
673 class2
= exception_class(nr
);
674 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
675 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
677 * Generate double fault per SDM Table 5-5. Set
678 * exception.pending = true so that the double fault
679 * can trigger a nested vmexit.
681 vcpu
->arch
.exception
.pending
= true;
682 vcpu
->arch
.exception
.injected
= false;
683 vcpu
->arch
.exception
.has_error_code
= true;
684 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
685 vcpu
->arch
.exception
.error_code
= 0;
686 vcpu
->arch
.exception
.has_payload
= false;
687 vcpu
->arch
.exception
.payload
= 0;
689 /* replace previous exception with a new one in a hope
690 that instruction re-execution will regenerate lost
695 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
697 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
699 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
701 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
703 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
705 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
707 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
708 unsigned long payload
)
710 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
712 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
714 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
715 u32 error_code
, unsigned long payload
)
717 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
718 true, payload
, false);
721 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
724 kvm_inject_gp(vcpu
, 0);
726 return kvm_skip_emulated_instruction(vcpu
);
730 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
732 static int complete_emulated_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
735 kvm_inject_gp(vcpu
, 0);
739 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
740 EMULTYPE_COMPLETE_USER_EXIT
);
743 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
745 ++vcpu
->stat
.pf_guest
;
746 vcpu
->arch
.exception
.nested_apf
=
747 is_guest_mode(vcpu
) && fault
->async_page_fault
;
748 if (vcpu
->arch
.exception
.nested_apf
) {
749 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
750 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
752 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
756 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
758 /* Returns true if the page fault was immediately morphed into a VM-Exit. */
759 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
760 struct x86_exception
*fault
)
762 struct kvm_mmu
*fault_mmu
;
763 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
765 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
769 * Invalidate the TLB entry for the faulting address, if it exists,
770 * else the access will fault indefinitely (and to emulate hardware).
772 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
773 !(fault
->error_code
& PFERR_RSVD_MASK
))
774 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
775 fault_mmu
->root
.hpa
);
778 * A workaround for KVM's bad exception handling. If KVM injected an
779 * exception into L2, and L2 encountered a #PF while vectoring the
780 * injected exception, manually check to see if L1 wants to intercept
781 * #PF, otherwise queuing the #PF will lead to #DF or a lost exception.
782 * In all other cases, defer the check to nested_ops->check_events(),
783 * which will correctly handle priority (this does not). Note, other
784 * exceptions, e.g. #GP, are theoretically affected, #PF is simply the
785 * most problematic, e.g. when L0 and L1 are both intercepting #PF for
788 * TODO: Rewrite exception handling to track injected and pending
789 * (VM-Exit) exceptions separately.
791 if (unlikely(vcpu
->arch
.exception
.injected
&& is_guest_mode(vcpu
)) &&
792 kvm_x86_ops
.nested_ops
->handle_page_fault_workaround(vcpu
, fault
))
795 fault_mmu
->inject_page_fault(vcpu
, fault
);
798 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
800 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
802 atomic_inc(&vcpu
->arch
.nmi_queued
);
803 kvm_make_request(KVM_REQ_NMI
, vcpu
);
805 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
807 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
809 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
811 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
813 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
815 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
817 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
820 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
821 * a #GP and return false.
823 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
825 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
827 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
830 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
832 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
834 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
837 kvm_queue_exception(vcpu
, UD_VECTOR
);
840 EXPORT_SYMBOL_GPL(kvm_require_dr
);
842 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
844 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
848 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
850 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
852 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
853 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
857 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
860 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
863 real_gpa
= kvm_translate_gpa(vcpu
, mmu
, gfn_to_gpa(pdpt_gfn
),
864 PFERR_USER_MASK
| PFERR_WRITE_MASK
, NULL
);
865 if (real_gpa
== UNMAPPED_GVA
)
868 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
869 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa_to_gfn(real_gpa
), pdpte
,
870 cr3
& GENMASK(11, 5), sizeof(pdpte
));
874 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
875 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
876 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
882 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
883 * Shadow page roots need to be reconstructed instead.
885 if (!tdp_enabled
&& memcmp(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
)))
886 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, KVM_MMU_ROOT_CURRENT
);
888 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
889 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
890 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
891 vcpu
->arch
.pdptrs_from_userspace
= false;
895 EXPORT_SYMBOL_GPL(load_pdptrs
);
897 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
899 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
900 kvm_clear_async_pf_completion_queue(vcpu
);
901 kvm_async_pf_hash_reset(vcpu
);
904 * Clearing CR0.PG is defined to flush the TLB from the guest's
907 if (!(cr0
& X86_CR0_PG
))
908 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
911 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
912 kvm_mmu_reset_context(vcpu
);
914 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
915 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
916 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
917 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
919 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
921 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
923 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
928 if (cr0
& 0xffffffff00000000UL
)
932 cr0
&= ~CR0_RESERVED_BITS
;
934 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
937 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
941 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
942 (cr0
& X86_CR0_PG
)) {
947 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
952 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
953 is_pae(vcpu
) && ((cr0
^ old_cr0
) & X86_CR0_PDPTR_BITS
) &&
954 !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
957 if (!(cr0
& X86_CR0_PG
) &&
958 (is_64_bit_mode(vcpu
) || kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)))
961 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
963 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
967 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
969 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
971 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
973 EXPORT_SYMBOL_GPL(kvm_lmsw
);
975 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
977 if (vcpu
->arch
.guest_state_protected
)
980 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
982 if (vcpu
->arch
.xcr0
!= host_xcr0
)
983 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
985 if (vcpu
->arch
.xsaves_enabled
&&
986 vcpu
->arch
.ia32_xss
!= host_xss
)
987 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
990 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
991 if (static_cpu_has(X86_FEATURE_PKU
) &&
992 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
&&
993 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
994 kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
)))
995 write_pkru(vcpu
->arch
.pkru
);
996 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
998 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
1000 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
1002 if (vcpu
->arch
.guest_state_protected
)
1005 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1006 if (static_cpu_has(X86_FEATURE_PKU
) &&
1007 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1008 kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
))) {
1009 vcpu
->arch
.pkru
= rdpkru();
1010 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
1011 write_pkru(vcpu
->arch
.host_pkru
);
1013 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1015 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
1017 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1018 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
1020 if (vcpu
->arch
.xsaves_enabled
&&
1021 vcpu
->arch
.ia32_xss
!= host_xss
)
1022 wrmsrl(MSR_IA32_XSS
, host_xss
);
1026 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
1028 static inline u64
kvm_guest_supported_xcr0(struct kvm_vcpu
*vcpu
)
1030 return vcpu
->arch
.guest_fpu
.fpstate
->user_xfeatures
;
1033 #ifdef CONFIG_X86_64
1034 static inline u64
kvm_guest_supported_xfd(struct kvm_vcpu
*vcpu
)
1036 return kvm_guest_supported_xcr0(vcpu
) & XFEATURE_MASK_USER_DYNAMIC
;
1040 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
1043 u64 old_xcr0
= vcpu
->arch
.xcr0
;
1046 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1047 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
1049 if (!(xcr0
& XFEATURE_MASK_FP
))
1051 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
1055 * Do not allow the guest to set bits that we do not support
1056 * saving. However, xcr0 bit 0 is always set, even if the
1057 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1059 valid_bits
= kvm_guest_supported_xcr0(vcpu
) | XFEATURE_MASK_FP
;
1060 if (xcr0
& ~valid_bits
)
1063 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1064 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1067 if (xcr0
& XFEATURE_MASK_AVX512
) {
1068 if (!(xcr0
& XFEATURE_MASK_YMM
))
1070 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1074 if ((xcr0
& XFEATURE_MASK_XTILE
) &&
1075 ((xcr0
& XFEATURE_MASK_XTILE
) != XFEATURE_MASK_XTILE
))
1078 vcpu
->arch
.xcr0
= xcr0
;
1080 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1081 kvm_update_cpuid_runtime(vcpu
);
1085 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1087 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1088 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1089 kvm_inject_gp(vcpu
, 0);
1093 return kvm_skip_emulated_instruction(vcpu
);
1095 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1097 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1099 if (cr4
& cr4_reserved_bits
)
1102 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1105 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1107 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1109 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1111 if ((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
)
1112 kvm_mmu_reset_context(vcpu
);
1115 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1116 * according to the SDM; however, stale prev_roots could be reused
1117 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1118 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1119 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1123 (cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
))
1124 kvm_mmu_unload(vcpu
);
1127 * The TLB has to be flushed for all PCIDs if any of the following
1128 * (architecturally required) changes happen:
1129 * - CR4.PCIDE is changed from 1 to 0
1130 * - CR4.PGE is toggled
1132 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1134 if (((cr4
^ old_cr4
) & X86_CR4_PGE
) ||
1135 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1136 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1139 * The TLB has to be flushed for the current PCID if any of the
1140 * following (architecturally required) changes happen:
1141 * - CR4.SMEP is changed from 0 to 1
1142 * - CR4.PAE is toggled
1144 else if (((cr4
^ old_cr4
) & X86_CR4_PAE
) ||
1145 ((cr4
& X86_CR4_SMEP
) && !(old_cr4
& X86_CR4_SMEP
)))
1146 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1149 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1151 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1153 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1155 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1158 if (is_long_mode(vcpu
)) {
1159 if (!(cr4
& X86_CR4_PAE
))
1161 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1163 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1164 && ((cr4
^ old_cr4
) & X86_CR4_PDPTR_BITS
)
1165 && !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
1168 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1169 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1172 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1173 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1177 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1179 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1183 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1185 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1187 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1188 unsigned long roots_to_free
= 0;
1192 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1193 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1194 * also via the emulator. KVM's TDP page tables are not in the scope of
1195 * the invalidation, but the guest's TLB entries need to be flushed as
1196 * the CPU may have cached entries in its TLB for the target PCID.
1198 if (unlikely(tdp_enabled
)) {
1199 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1204 * If neither the current CR3 nor any of the prev_roots use the given
1205 * PCID, then nothing needs to be done here because a resync will
1206 * happen anyway before switching to any other CR3.
1208 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1209 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1210 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1214 * If PCID is disabled, there is no need to free prev_roots even if the
1215 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1218 if (!kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
1221 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1222 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1223 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1225 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, roots_to_free
);
1228 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1230 bool skip_tlb_flush
= false;
1231 unsigned long pcid
= 0;
1232 #ifdef CONFIG_X86_64
1233 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1236 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1237 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1238 pcid
= cr3
& X86_CR3_PCID_MASK
;
1242 /* PDPTRs are always reloaded for PAE paging. */
1243 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1244 goto handle_tlb_flush
;
1247 * Do not condition the GPA check on long mode, this helper is used to
1248 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1249 * the current vCPU mode is accurate.
1251 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1254 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
))
1257 if (cr3
!= kvm_read_cr3(vcpu
))
1258 kvm_mmu_new_pgd(vcpu
, cr3
);
1260 vcpu
->arch
.cr3
= cr3
;
1261 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
1262 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1266 * A load of CR3 that flushes the TLB flushes only the current PCID,
1267 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1268 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1269 * and it's impossible to use a non-zero PCID when PCID is disabled,
1270 * i.e. only PCID=0 can be relevant.
1272 if (!skip_tlb_flush
)
1273 kvm_invalidate_pcid(vcpu
, pcid
);
1277 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1279 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1281 if (cr8
& CR8_RESERVED_BITS
)
1283 if (lapic_in_kernel(vcpu
))
1284 kvm_lapic_set_tpr(vcpu
, cr8
);
1286 vcpu
->arch
.cr8
= cr8
;
1289 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1291 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1293 if (lapic_in_kernel(vcpu
))
1294 return kvm_lapic_get_cr8(vcpu
);
1296 return vcpu
->arch
.cr8
;
1298 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1300 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1304 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1305 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1306 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1310 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1314 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1315 dr7
= vcpu
->arch
.guest_debug_dr7
;
1317 dr7
= vcpu
->arch
.dr7
;
1318 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1319 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1320 if (dr7
& DR7_BP_EN_MASK
)
1321 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1323 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1325 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1327 u64 fixed
= DR6_FIXED_1
;
1329 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1332 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1333 fixed
|= DR6_BUS_LOCK
;
1337 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1339 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1343 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1344 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1345 vcpu
->arch
.eff_db
[dr
] = val
;
1349 if (!kvm_dr6_valid(val
))
1351 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1355 if (!kvm_dr7_valid(val
))
1357 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1358 kvm_update_dr7(vcpu
);
1364 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1366 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1368 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1372 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1376 *val
= vcpu
->arch
.dr6
;
1380 *val
= vcpu
->arch
.dr7
;
1384 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1386 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1388 u32 ecx
= kvm_rcx_read(vcpu
);
1391 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1392 kvm_inject_gp(vcpu
, 0);
1396 kvm_rax_write(vcpu
, (u32
)data
);
1397 kvm_rdx_write(vcpu
, data
>> 32);
1398 return kvm_skip_emulated_instruction(vcpu
);
1400 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1403 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1404 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1406 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1407 * extract the supported MSRs from the related const lists.
1408 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1409 * capabilities of the host cpu. This capabilities test skips MSRs that are
1410 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1411 * may depend on host virtualization features rather than host cpu features.
1414 static const u32 msrs_to_save_all
[] = {
1415 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1417 #ifdef CONFIG_X86_64
1418 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1420 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1421 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1423 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1424 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1425 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1426 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1427 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1428 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1429 MSR_IA32_UMWAIT_CONTROL
,
1431 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1432 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1433 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1434 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1435 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1436 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1437 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1438 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1439 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1440 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1441 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1442 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1443 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1444 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1445 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1446 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1447 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1448 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1449 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1450 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1451 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1452 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1454 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1455 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1456 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1457 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1458 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1459 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1460 MSR_IA32_XFD
, MSR_IA32_XFD_ERR
,
1463 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1464 static unsigned num_msrs_to_save
;
1466 static const u32 emulated_msrs_all
[] = {
1467 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1468 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1469 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1470 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1471 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1472 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1473 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1475 HV_X64_MSR_VP_INDEX
,
1476 HV_X64_MSR_VP_RUNTIME
,
1477 HV_X64_MSR_SCONTROL
,
1478 HV_X64_MSR_STIMER0_CONFIG
,
1479 HV_X64_MSR_VP_ASSIST_PAGE
,
1480 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1481 HV_X64_MSR_TSC_EMULATION_STATUS
,
1482 HV_X64_MSR_SYNDBG_OPTIONS
,
1483 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1484 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1485 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1487 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1488 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1490 MSR_IA32_TSC_ADJUST
,
1491 MSR_IA32_TSC_DEADLINE
,
1492 MSR_IA32_ARCH_CAPABILITIES
,
1493 MSR_IA32_PERF_CAPABILITIES
,
1494 MSR_IA32_MISC_ENABLE
,
1495 MSR_IA32_MCG_STATUS
,
1497 MSR_IA32_MCG_EXT_CTL
,
1501 MSR_MISC_FEATURES_ENABLES
,
1502 MSR_AMD64_VIRT_SPEC_CTRL
,
1503 MSR_AMD64_TSC_RATIO
,
1508 * The following list leaves out MSRs whose values are determined
1509 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1510 * We always support the "true" VMX control MSRs, even if the host
1511 * processor does not, so I am putting these registers here rather
1512 * than in msrs_to_save_all.
1515 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1516 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1517 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1518 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1520 MSR_IA32_VMX_CR0_FIXED0
,
1521 MSR_IA32_VMX_CR4_FIXED0
,
1522 MSR_IA32_VMX_VMCS_ENUM
,
1523 MSR_IA32_VMX_PROCBASED_CTLS2
,
1524 MSR_IA32_VMX_EPT_VPID_CAP
,
1525 MSR_IA32_VMX_VMFUNC
,
1528 MSR_KVM_POLL_CONTROL
,
1531 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1532 static unsigned num_emulated_msrs
;
1535 * List of msr numbers which are used to expose MSR-based features that
1536 * can be used by a hypervisor to validate requested CPU features.
1538 static const u32 msr_based_features_all
[] = {
1540 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1541 MSR_IA32_VMX_PINBASED_CTLS
,
1542 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1543 MSR_IA32_VMX_PROCBASED_CTLS
,
1544 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1545 MSR_IA32_VMX_EXIT_CTLS
,
1546 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1547 MSR_IA32_VMX_ENTRY_CTLS
,
1549 MSR_IA32_VMX_CR0_FIXED0
,
1550 MSR_IA32_VMX_CR0_FIXED1
,
1551 MSR_IA32_VMX_CR4_FIXED0
,
1552 MSR_IA32_VMX_CR4_FIXED1
,
1553 MSR_IA32_VMX_VMCS_ENUM
,
1554 MSR_IA32_VMX_PROCBASED_CTLS2
,
1555 MSR_IA32_VMX_EPT_VPID_CAP
,
1556 MSR_IA32_VMX_VMFUNC
,
1560 MSR_IA32_ARCH_CAPABILITIES
,
1561 MSR_IA32_PERF_CAPABILITIES
,
1564 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1565 static unsigned int num_msr_based_features
;
1567 static u64
kvm_get_arch_capabilities(void)
1571 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1572 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1575 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1576 * the nested hypervisor runs with NX huge pages. If it is not,
1577 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1578 * L1 guests, so it need not worry about its own (L2) guests.
1580 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1583 * If we're doing cache flushes (either "always" or "cond")
1584 * we will do one whenever the guest does a vmlaunch/vmresume.
1585 * If an outer hypervisor is doing the cache flush for us
1586 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1587 * capability to the guest too, and if EPT is disabled we're not
1588 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1589 * require a nested hypervisor to do a flush of its own.
1591 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1592 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1594 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1595 data
|= ARCH_CAP_RDCL_NO
;
1596 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1597 data
|= ARCH_CAP_SSB_NO
;
1598 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1599 data
|= ARCH_CAP_MDS_NO
;
1601 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1603 * If RTM=0 because the kernel has disabled TSX, the host might
1604 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1605 * and therefore knows that there cannot be TAA) but keep
1606 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1607 * and we want to allow migrating those guests to tsx=off hosts.
1609 data
&= ~ARCH_CAP_TAA_NO
;
1610 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1611 data
|= ARCH_CAP_TAA_NO
;
1614 * Nothing to do here; we emulate TSX_CTRL if present on the
1615 * host so the guest can choose between disabling TSX or
1616 * using VERW to clear CPU buffers.
1620 /* Guests don't need to know "Fill buffer clear control" exists */
1621 data
&= ~ARCH_CAP_FB_CLEAR_CTRL
;
1626 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1628 switch (msr
->index
) {
1629 case MSR_IA32_ARCH_CAPABILITIES
:
1630 msr
->data
= kvm_get_arch_capabilities();
1632 case MSR_IA32_UCODE_REV
:
1633 rdmsrl_safe(msr
->index
, &msr
->data
);
1636 return static_call(kvm_x86_get_msr_feature
)(msr
);
1641 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1643 struct kvm_msr_entry msr
;
1647 r
= kvm_get_msr_feature(&msr
);
1649 if (r
== KVM_MSR_RET_INVALID
) {
1650 /* Unconditionally clear the output for simplicity */
1652 if (kvm_msr_ignored_check(index
, 0, false))
1664 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1666 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1669 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1672 if (efer
& (EFER_LME
| EFER_LMA
) &&
1673 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1676 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1682 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1684 if (efer
& efer_reserved_bits
)
1687 return __kvm_valid_efer(vcpu
, efer
);
1689 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1691 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1693 u64 old_efer
= vcpu
->arch
.efer
;
1694 u64 efer
= msr_info
->data
;
1697 if (efer
& efer_reserved_bits
)
1700 if (!msr_info
->host_initiated
) {
1701 if (!__kvm_valid_efer(vcpu
, efer
))
1704 if (is_paging(vcpu
) &&
1705 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1710 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1712 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1718 if ((efer
^ old_efer
) & KVM_MMU_EFER_ROLE_BITS
)
1719 kvm_mmu_reset_context(vcpu
);
1724 void kvm_enable_efer_bits(u64 mask
)
1726 efer_reserved_bits
&= ~mask
;
1728 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1730 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1732 struct kvm_x86_msr_filter
*msr_filter
;
1733 struct msr_bitmap_range
*ranges
;
1734 struct kvm
*kvm
= vcpu
->kvm
;
1739 /* x2APIC MSRs do not support filtering. */
1740 if (index
>= 0x800 && index
<= 0x8ff)
1743 idx
= srcu_read_lock(&kvm
->srcu
);
1745 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1751 allowed
= msr_filter
->default_allow
;
1752 ranges
= msr_filter
->ranges
;
1754 for (i
= 0; i
< msr_filter
->count
; i
++) {
1755 u32 start
= ranges
[i
].base
;
1756 u32 end
= start
+ ranges
[i
].nmsrs
;
1757 u32 flags
= ranges
[i
].flags
;
1758 unsigned long *bitmap
= ranges
[i
].bitmap
;
1760 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1761 allowed
= !!test_bit(index
- start
, bitmap
);
1767 srcu_read_unlock(&kvm
->srcu
, idx
);
1771 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1774 * Write @data into the MSR specified by @index. Select MSR specific fault
1775 * checks are bypassed if @host_initiated is %true.
1776 * Returns 0 on success, non-0 otherwise.
1777 * Assumes vcpu_load() was already called.
1779 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1780 bool host_initiated
)
1782 struct msr_data msr
;
1787 case MSR_KERNEL_GS_BASE
:
1790 if (is_noncanonical_address(data
, vcpu
))
1793 case MSR_IA32_SYSENTER_EIP
:
1794 case MSR_IA32_SYSENTER_ESP
:
1796 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1797 * non-canonical address is written on Intel but not on
1798 * AMD (which ignores the top 32-bits, because it does
1799 * not implement 64-bit SYSENTER).
1801 * 64-bit code should hence be able to write a non-canonical
1802 * value on AMD. Making the address canonical ensures that
1803 * vmentry does not fail on Intel after writing a non-canonical
1804 * value, and that something deterministic happens if the guest
1805 * invokes 64-bit SYSENTER.
1807 data
= __canonical_address(data
, vcpu_virt_addr_bits(vcpu
));
1810 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1813 if (!host_initiated
&&
1814 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1815 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1819 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1820 * incomplete and conflicting architectural behavior. Current
1821 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1822 * reserved and always read as zeros. Enforce Intel's reserved
1823 * bits check if and only if the guest CPU is Intel, and clear
1824 * the bits in all other cases. This ensures cross-vendor
1825 * migration will provide consistent behavior for the guest.
1827 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1836 msr
.host_initiated
= host_initiated
;
1838 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1841 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1842 u32 index
, u64 data
, bool host_initiated
)
1844 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1846 if (ret
== KVM_MSR_RET_INVALID
)
1847 if (kvm_msr_ignored_check(index
, data
, true))
1854 * Read the MSR specified by @index into @data. Select MSR specific fault
1855 * checks are bypassed if @host_initiated is %true.
1856 * Returns 0 on success, non-0 otherwise.
1857 * Assumes vcpu_load() was already called.
1859 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1860 bool host_initiated
)
1862 struct msr_data msr
;
1867 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1870 if (!host_initiated
&&
1871 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1872 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1878 msr
.host_initiated
= host_initiated
;
1880 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1886 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1887 u32 index
, u64
*data
, bool host_initiated
)
1889 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1891 if (ret
== KVM_MSR_RET_INVALID
) {
1892 /* Unconditionally clear *data for simplicity */
1894 if (kvm_msr_ignored_check(index
, 0, false))
1901 static int kvm_get_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1903 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1904 return KVM_MSR_RET_FILTERED
;
1905 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1908 static int kvm_set_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1910 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1911 return KVM_MSR_RET_FILTERED
;
1912 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1915 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1917 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1919 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1921 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1923 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1925 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1927 static void complete_userspace_rdmsr(struct kvm_vcpu
*vcpu
)
1929 if (!vcpu
->run
->msr
.error
) {
1930 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1931 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1935 static int complete_emulated_msr_access(struct kvm_vcpu
*vcpu
)
1937 return complete_emulated_insn_gp(vcpu
, vcpu
->run
->msr
.error
);
1940 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1942 complete_userspace_rdmsr(vcpu
);
1943 return complete_emulated_msr_access(vcpu
);
1946 static int complete_fast_msr_access(struct kvm_vcpu
*vcpu
)
1948 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1951 static int complete_fast_rdmsr(struct kvm_vcpu
*vcpu
)
1953 complete_userspace_rdmsr(vcpu
);
1954 return complete_fast_msr_access(vcpu
);
1957 static u64
kvm_msr_reason(int r
)
1960 case KVM_MSR_RET_INVALID
:
1961 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1962 case KVM_MSR_RET_FILTERED
:
1963 return KVM_MSR_EXIT_REASON_FILTER
;
1965 return KVM_MSR_EXIT_REASON_INVAL
;
1969 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1970 u32 exit_reason
, u64 data
,
1971 int (*completion
)(struct kvm_vcpu
*vcpu
),
1974 u64 msr_reason
= kvm_msr_reason(r
);
1976 /* Check if the user wanted to know about this MSR fault */
1977 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1980 vcpu
->run
->exit_reason
= exit_reason
;
1981 vcpu
->run
->msr
.error
= 0;
1982 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1983 vcpu
->run
->msr
.reason
= msr_reason
;
1984 vcpu
->run
->msr
.index
= index
;
1985 vcpu
->run
->msr
.data
= data
;
1986 vcpu
->arch
.complete_userspace_io
= completion
;
1991 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1993 u32 ecx
= kvm_rcx_read(vcpu
);
1997 r
= kvm_get_msr_with_filter(vcpu
, ecx
, &data
);
2000 trace_kvm_msr_read(ecx
, data
);
2002 kvm_rax_write(vcpu
, data
& -1u);
2003 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
2005 /* MSR read failed? See if we should ask user space */
2006 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_RDMSR
, 0,
2007 complete_fast_rdmsr
, r
))
2009 trace_kvm_msr_read_ex(ecx
);
2012 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2014 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
2016 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
2018 u32 ecx
= kvm_rcx_read(vcpu
);
2019 u64 data
= kvm_read_edx_eax(vcpu
);
2022 r
= kvm_set_msr_with_filter(vcpu
, ecx
, data
);
2025 trace_kvm_msr_write(ecx
, data
);
2027 /* MSR write failed? See if we should ask user space */
2028 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_WRMSR
, data
,
2029 complete_fast_msr_access
, r
))
2031 /* Signal all other negative errors to userspace */
2034 trace_kvm_msr_write_ex(ecx
, data
);
2037 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2039 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
2041 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
2043 return kvm_skip_emulated_instruction(vcpu
);
2045 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
2047 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
2049 /* Treat an INVD instruction as a NOP and just skip it. */
2050 return kvm_emulate_as_nop(vcpu
);
2052 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
2054 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
2056 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
2057 return kvm_emulate_as_nop(vcpu
);
2059 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
2061 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
2063 kvm_queue_exception(vcpu
, UD_VECTOR
);
2066 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
2068 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
2070 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2071 return kvm_emulate_as_nop(vcpu
);
2073 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
2075 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
2077 xfer_to_guest_mode_prepare();
2078 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
2079 xfer_to_guest_mode_work_pending();
2083 * The fast path for frequent and performance sensitive wrmsr emulation,
2084 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2085 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2086 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2087 * other cases which must be called after interrupts are enabled on the host.
2089 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
2091 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
2094 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
2095 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
2096 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
2097 ((u32
)(data
>> 32) != X2APIC_BROADCAST
))
2098 return kvm_x2apic_icr_write(vcpu
->arch
.apic
, data
);
2103 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
2105 if (!kvm_can_use_hv_timer(vcpu
))
2108 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2112 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2114 u32 msr
= kvm_rcx_read(vcpu
);
2116 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2119 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2120 data
= kvm_read_edx_eax(vcpu
);
2121 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2122 kvm_skip_emulated_instruction(vcpu
);
2123 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2126 case MSR_IA32_TSC_DEADLINE
:
2127 data
= kvm_read_edx_eax(vcpu
);
2128 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2129 kvm_skip_emulated_instruction(vcpu
);
2130 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2137 if (ret
!= EXIT_FASTPATH_NONE
)
2138 trace_kvm_msr_write(msr
, data
);
2142 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2145 * Adapt set_msr() to msr_io()'s calling convention
2147 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2149 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2152 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2154 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2157 #ifdef CONFIG_X86_64
2158 struct pvclock_clock
{
2168 struct pvclock_gtod_data
{
2171 struct pvclock_clock clock
; /* extract of a clocksource struct */
2172 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2178 static struct pvclock_gtod_data pvclock_gtod_data
;
2180 static void update_pvclock_gtod(struct timekeeper
*tk
)
2182 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2184 write_seqcount_begin(&vdata
->seq
);
2186 /* copy pvclock gtod data */
2187 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2188 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2189 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2190 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2191 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2192 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2193 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2195 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2196 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2197 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2198 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2199 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2200 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2201 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2203 vdata
->wall_time_sec
= tk
->xtime_sec
;
2205 vdata
->offs_boot
= tk
->offs_boot
;
2207 write_seqcount_end(&vdata
->seq
);
2210 static s64
get_kvmclock_base_ns(void)
2212 /* Count up from boot time, but with the frequency of the raw clock. */
2213 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2216 static s64
get_kvmclock_base_ns(void)
2218 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2219 return ktime_get_boottime_ns();
2223 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2227 struct pvclock_wall_clock wc
;
2234 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2239 ++version
; /* first time write, random junk */
2243 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2247 * The guest calculates current wall clock time by adding
2248 * system time (updated by kvm_guest_time_update below) to the
2249 * wall clock specified here. We do the reverse here.
2251 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2253 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2254 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2255 wc
.version
= version
;
2257 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2260 wc_sec_hi
= wall_nsec
>> 32;
2261 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2262 &wc_sec_hi
, sizeof(wc_sec_hi
));
2266 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2269 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2270 bool old_msr
, bool host_initiated
)
2272 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2274 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2275 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2276 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2278 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2281 vcpu
->arch
.time
= system_time
;
2282 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2284 /* we verify if the enable bit is set... */
2285 if (system_time
& 1) {
2286 kvm_gfn_to_pfn_cache_init(vcpu
->kvm
, &vcpu
->arch
.pv_time
, vcpu
,
2287 KVM_HOST_USES_PFN
, system_time
& ~1ULL,
2288 sizeof(struct pvclock_vcpu_time_info
));
2290 kvm_gfn_to_pfn_cache_destroy(vcpu
->kvm
, &vcpu
->arch
.pv_time
);
2296 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2298 do_shl32_div32(dividend
, divisor
);
2302 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2303 s8
*pshift
, u32
*pmultiplier
)
2311 scaled64
= scaled_hz
;
2312 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2317 tps32
= (uint32_t)tps64
;
2318 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2319 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2327 *pmultiplier
= div_frac(scaled64
, tps32
);
2330 #ifdef CONFIG_X86_64
2331 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2334 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2335 static unsigned long max_tsc_khz
;
2337 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2339 u64 v
= (u64
)khz
* (1000000 + ppm
);
2344 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2346 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2350 /* Guest TSC same frequency as host TSC? */
2352 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2356 /* TSC scaling supported? */
2357 if (!kvm_has_tsc_control
) {
2358 if (user_tsc_khz
> tsc_khz
) {
2359 vcpu
->arch
.tsc_catchup
= 1;
2360 vcpu
->arch
.tsc_always_catchup
= 1;
2363 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2368 /* TSC scaling required - calculate ratio */
2369 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2370 user_tsc_khz
, tsc_khz
);
2372 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2373 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2378 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2382 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2384 u32 thresh_lo
, thresh_hi
;
2385 int use_scaling
= 0;
2387 /* tsc_khz can be zero if TSC calibration fails */
2388 if (user_tsc_khz
== 0) {
2389 /* set tsc_scaling_ratio to a safe value */
2390 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_default_tsc_scaling_ratio
);
2394 /* Compute a scale to convert nanoseconds in TSC cycles */
2395 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2396 &vcpu
->arch
.virtual_tsc_shift
,
2397 &vcpu
->arch
.virtual_tsc_mult
);
2398 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2401 * Compute the variation in TSC rate which is acceptable
2402 * within the range of tolerance and decide if the
2403 * rate being applied is within that bounds of the hardware
2404 * rate. If so, no scaling or compensation need be done.
2406 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2407 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2408 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2409 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2412 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2415 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2417 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2418 vcpu
->arch
.virtual_tsc_mult
,
2419 vcpu
->arch
.virtual_tsc_shift
);
2420 tsc
+= vcpu
->arch
.this_tsc_write
;
2424 #ifdef CONFIG_X86_64
2425 static inline int gtod_is_based_on_tsc(int mode
)
2427 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2431 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2433 #ifdef CONFIG_X86_64
2435 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2436 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2438 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2439 atomic_read(&vcpu
->kvm
->online_vcpus
));
2442 * Once the masterclock is enabled, always perform request in
2443 * order to update it.
2445 * In order to enable masterclock, the host clocksource must be TSC
2446 * and the vcpus need to have matched TSCs. When that happens,
2447 * perform request to enable masterclock.
2449 if (ka
->use_master_clock
||
2450 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2451 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2453 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2454 atomic_read(&vcpu
->kvm
->online_vcpus
),
2455 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2460 * Multiply tsc by a fixed point number represented by ratio.
2462 * The most significant 64-N bits (mult) of ratio represent the
2463 * integral part of the fixed point number; the remaining N bits
2464 * (frac) represent the fractional part, ie. ratio represents a fixed
2465 * point number (mult + frac * 2^(-N)).
2467 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2469 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2471 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2474 u64
kvm_scale_tsc(u64 tsc
, u64 ratio
)
2478 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2479 _tsc
= __scale_tsc(ratio
, tsc
);
2483 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2485 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2489 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2491 return target_tsc
- tsc
;
2494 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2496 return vcpu
->arch
.l1_tsc_offset
+
2497 kvm_scale_tsc(host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2499 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2501 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2505 if (l2_multiplier
== kvm_default_tsc_scaling_ratio
)
2506 nested_offset
= l1_offset
;
2508 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2509 kvm_tsc_scaling_ratio_frac_bits
);
2511 nested_offset
+= l2_offset
;
2512 return nested_offset
;
2514 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2516 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2518 if (l2_multiplier
!= kvm_default_tsc_scaling_ratio
)
2519 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2520 kvm_tsc_scaling_ratio_frac_bits
);
2522 return l1_multiplier
;
2524 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2526 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2528 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2529 vcpu
->arch
.l1_tsc_offset
,
2532 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2535 * If we are here because L1 chose not to trap WRMSR to TSC then
2536 * according to the spec this should set L1's TSC (as opposed to
2537 * setting L1's offset for L2).
2539 if (is_guest_mode(vcpu
))
2540 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2542 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2543 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2545 vcpu
->arch
.tsc_offset
= l1_offset
;
2547 static_call(kvm_x86_write_tsc_offset
)(vcpu
, vcpu
->arch
.tsc_offset
);
2550 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2552 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2554 /* Userspace is changing the multiplier while L2 is active */
2555 if (is_guest_mode(vcpu
))
2556 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2558 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2560 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2562 if (kvm_has_tsc_control
)
2563 static_call(kvm_x86_write_tsc_multiplier
)(
2564 vcpu
, vcpu
->arch
.tsc_scaling_ratio
);
2567 static inline bool kvm_check_tsc_unstable(void)
2569 #ifdef CONFIG_X86_64
2571 * TSC is marked unstable when we're running on Hyper-V,
2572 * 'TSC page' clocksource is good.
2574 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2577 return check_tsc_unstable();
2581 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2582 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2585 static void __kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 offset
, u64 tsc
,
2586 u64 ns
, bool matched
)
2588 struct kvm
*kvm
= vcpu
->kvm
;
2590 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2593 * We also track th most recent recorded KHZ, write and time to
2594 * allow the matching interval to be extended at each write.
2596 kvm
->arch
.last_tsc_nsec
= ns
;
2597 kvm
->arch
.last_tsc_write
= tsc
;
2598 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2599 kvm
->arch
.last_tsc_offset
= offset
;
2601 vcpu
->arch
.last_guest_tsc
= tsc
;
2603 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2607 * We split periods of matched TSC writes into generations.
2608 * For each generation, we track the original measured
2609 * nanosecond time, offset, and write, so if TSCs are in
2610 * sync, we can match exact offset, and if not, we can match
2611 * exact software computation in compute_guest_tsc()
2613 * These values are tracked in kvm->arch.cur_xxx variables.
2615 kvm
->arch
.cur_tsc_generation
++;
2616 kvm
->arch
.cur_tsc_nsec
= ns
;
2617 kvm
->arch
.cur_tsc_write
= tsc
;
2618 kvm
->arch
.cur_tsc_offset
= offset
;
2619 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2620 } else if (vcpu
->arch
.this_tsc_generation
!= kvm
->arch
.cur_tsc_generation
) {
2621 kvm
->arch
.nr_vcpus_matched_tsc
++;
2624 /* Keep track of which generation this VCPU has synchronized to */
2625 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2626 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2627 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2629 kvm_track_tsc_matching(vcpu
);
2632 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2634 struct kvm
*kvm
= vcpu
->kvm
;
2635 u64 offset
, ns
, elapsed
;
2636 unsigned long flags
;
2637 bool matched
= false;
2638 bool synchronizing
= false;
2640 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2641 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2642 ns
= get_kvmclock_base_ns();
2643 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2645 if (vcpu
->arch
.virtual_tsc_khz
) {
2648 * detection of vcpu initialization -- need to sync
2649 * with other vCPUs. This particularly helps to keep
2650 * kvm_clock stable after CPU hotplug
2652 synchronizing
= true;
2654 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2655 nsec_to_cycles(vcpu
, elapsed
);
2656 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2658 * Special case: TSC write with a small delta (1 second)
2659 * of virtual cycle time against real time is
2660 * interpreted as an attempt to synchronize the CPU.
2662 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2663 data
+ tsc_hz
> tsc_exp
;
2668 * For a reliable TSC, we can match TSC offsets, and for an unstable
2669 * TSC, we add elapsed time in this computation. We could let the
2670 * compensation code attempt to catch up if we fall behind, but
2671 * it's better to try to match offsets from the beginning.
2673 if (synchronizing
&&
2674 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2675 if (!kvm_check_tsc_unstable()) {
2676 offset
= kvm
->arch
.cur_tsc_offset
;
2678 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2680 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2685 __kvm_synchronize_tsc(vcpu
, offset
, data
, ns
, matched
);
2686 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2689 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2692 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2693 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2696 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2698 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2699 WARN_ON(adjustment
< 0);
2700 adjustment
= kvm_scale_tsc((u64
) adjustment
,
2701 vcpu
->arch
.l1_tsc_scaling_ratio
);
2702 adjust_tsc_offset_guest(vcpu
, adjustment
);
2705 #ifdef CONFIG_X86_64
2707 static u64
read_tsc(void)
2709 u64 ret
= (u64
)rdtsc_ordered();
2710 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2712 if (likely(ret
>= last
))
2716 * GCC likes to generate cmov here, but this branch is extremely
2717 * predictable (it's just a function of time and the likely is
2718 * very likely) and there's a data dependence, so force GCC
2719 * to generate a branch instead. I don't barrier() because
2720 * we don't actually need a barrier, and if this function
2721 * ever gets inlined it will generate worse code.
2727 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2733 switch (clock
->vclock_mode
) {
2734 case VDSO_CLOCKMODE_HVCLOCK
:
2735 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2737 if (tsc_pg_val
!= U64_MAX
) {
2738 /* TSC page valid */
2739 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2740 v
= (tsc_pg_val
- clock
->cycle_last
) &
2743 /* TSC page invalid */
2744 *mode
= VDSO_CLOCKMODE_NONE
;
2747 case VDSO_CLOCKMODE_TSC
:
2748 *mode
= VDSO_CLOCKMODE_TSC
;
2749 *tsc_timestamp
= read_tsc();
2750 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2754 *mode
= VDSO_CLOCKMODE_NONE
;
2757 if (*mode
== VDSO_CLOCKMODE_NONE
)
2758 *tsc_timestamp
= v
= 0;
2760 return v
* clock
->mult
;
2763 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2765 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2771 seq
= read_seqcount_begin(>od
->seq
);
2772 ns
= gtod
->raw_clock
.base_cycles
;
2773 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2774 ns
>>= gtod
->raw_clock
.shift
;
2775 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2776 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2782 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2784 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2790 seq
= read_seqcount_begin(>od
->seq
);
2791 ts
->tv_sec
= gtod
->wall_time_sec
;
2792 ns
= gtod
->clock
.base_cycles
;
2793 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2794 ns
>>= gtod
->clock
.shift
;
2795 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2797 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2803 /* returns true if host is using TSC based clocksource */
2804 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2806 /* checked again under seqlock below */
2807 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2810 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2814 /* returns true if host is using TSC based clocksource */
2815 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2818 /* checked again under seqlock below */
2819 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2822 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2828 * Assuming a stable TSC across physical CPUS, and a stable TSC
2829 * across virtual CPUs, the following condition is possible.
2830 * Each numbered line represents an event visible to both
2831 * CPUs at the next numbered event.
2833 * "timespecX" represents host monotonic time. "tscX" represents
2836 * VCPU0 on CPU0 | VCPU1 on CPU1
2838 * 1. read timespec0,tsc0
2839 * 2. | timespec1 = timespec0 + N
2841 * 3. transition to guest | transition to guest
2842 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2843 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2844 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2846 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2849 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2851 * - 0 < N - M => M < N
2853 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2854 * always the case (the difference between two distinct xtime instances
2855 * might be smaller then the difference between corresponding TSC reads,
2856 * when updating guest vcpus pvclock areas).
2858 * To avoid that problem, do not allow visibility of distinct
2859 * system_timestamp/tsc_timestamp values simultaneously: use a master
2860 * copy of host monotonic time values. Update that master copy
2863 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2867 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2869 #ifdef CONFIG_X86_64
2870 struct kvm_arch
*ka
= &kvm
->arch
;
2872 bool host_tsc_clocksource
, vcpus_matched
;
2874 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2875 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2876 atomic_read(&kvm
->online_vcpus
));
2879 * If the host uses TSC clock, then passthrough TSC as stable
2882 host_tsc_clocksource
= kvm_get_time_and_clockread(
2883 &ka
->master_kernel_ns
,
2884 &ka
->master_cycle_now
);
2886 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2887 && !ka
->backwards_tsc_observed
2888 && !ka
->boot_vcpu_runs_old_kvmclock
;
2890 if (ka
->use_master_clock
)
2891 atomic_set(&kvm_guest_has_master_clock
, 1);
2893 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2894 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2899 static void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2901 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2904 static void __kvm_start_pvclock_update(struct kvm
*kvm
)
2906 raw_spin_lock_irq(&kvm
->arch
.tsc_write_lock
);
2907 write_seqcount_begin(&kvm
->arch
.pvclock_sc
);
2910 static void kvm_start_pvclock_update(struct kvm
*kvm
)
2912 kvm_make_mclock_inprogress_request(kvm
);
2914 /* no guest entries from this point */
2915 __kvm_start_pvclock_update(kvm
);
2918 static void kvm_end_pvclock_update(struct kvm
*kvm
)
2920 struct kvm_arch
*ka
= &kvm
->arch
;
2921 struct kvm_vcpu
*vcpu
;
2924 write_seqcount_end(&ka
->pvclock_sc
);
2925 raw_spin_unlock_irq(&ka
->tsc_write_lock
);
2926 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2927 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2929 /* guest entries allowed */
2930 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2931 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2934 static void kvm_update_masterclock(struct kvm
*kvm
)
2936 kvm_hv_request_tsc_page_update(kvm
);
2937 kvm_start_pvclock_update(kvm
);
2938 pvclock_update_vm_gtod_copy(kvm
);
2939 kvm_end_pvclock_update(kvm
);
2942 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
2943 static void __get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
2945 struct kvm_arch
*ka
= &kvm
->arch
;
2946 struct pvclock_vcpu_time_info hv_clock
;
2948 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2952 if (ka
->use_master_clock
&& __this_cpu_read(cpu_tsc_khz
)) {
2953 #ifdef CONFIG_X86_64
2954 struct timespec64 ts
;
2956 if (kvm_get_walltime_and_clockread(&ts
, &data
->host_tsc
)) {
2957 data
->realtime
= ts
.tv_nsec
+ NSEC_PER_SEC
* ts
.tv_sec
;
2958 data
->flags
|= KVM_CLOCK_REALTIME
| KVM_CLOCK_HOST_TSC
;
2961 data
->host_tsc
= rdtsc();
2963 data
->flags
|= KVM_CLOCK_TSC_STABLE
;
2964 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2965 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2966 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2967 &hv_clock
.tsc_shift
,
2968 &hv_clock
.tsc_to_system_mul
);
2969 data
->clock
= __pvclock_read_cycles(&hv_clock
, data
->host_tsc
);
2971 data
->clock
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2977 static void get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
2979 struct kvm_arch
*ka
= &kvm
->arch
;
2983 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
2984 __get_kvmclock(kvm
, data
);
2985 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
2988 u64
get_kvmclock_ns(struct kvm
*kvm
)
2990 struct kvm_clock_data data
;
2992 get_kvmclock(kvm
, &data
);
2996 static void kvm_setup_guest_pvclock(struct kvm_vcpu
*v
,
2997 struct gfn_to_pfn_cache
*gpc
,
2998 unsigned int offset
)
3000 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3001 struct pvclock_vcpu_time_info
*guest_hv_clock
;
3002 unsigned long flags
;
3004 read_lock_irqsave(&gpc
->lock
, flags
);
3005 while (!kvm_gfn_to_pfn_cache_check(v
->kvm
, gpc
, gpc
->gpa
,
3006 offset
+ sizeof(*guest_hv_clock
))) {
3007 read_unlock_irqrestore(&gpc
->lock
, flags
);
3009 if (kvm_gfn_to_pfn_cache_refresh(v
->kvm
, gpc
, gpc
->gpa
,
3010 offset
+ sizeof(*guest_hv_clock
)))
3013 read_lock_irqsave(&gpc
->lock
, flags
);
3016 guest_hv_clock
= (void *)(gpc
->khva
+ offset
);
3019 * This VCPU is paused, but it's legal for a guest to read another
3020 * VCPU's kvmclock, so we really have to follow the specification where
3021 * it says that version is odd if data is being modified, and even after
3025 guest_hv_clock
->version
= vcpu
->hv_clock
.version
= (guest_hv_clock
->version
+ 1) | 1;
3028 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3029 vcpu
->hv_clock
.flags
|= (guest_hv_clock
->flags
& PVCLOCK_GUEST_STOPPED
);
3031 if (vcpu
->pvclock_set_guest_stopped_request
) {
3032 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
3033 vcpu
->pvclock_set_guest_stopped_request
= false;
3036 memcpy(guest_hv_clock
, &vcpu
->hv_clock
, sizeof(*guest_hv_clock
));
3039 guest_hv_clock
->version
= ++vcpu
->hv_clock
.version
;
3041 mark_page_dirty_in_slot(v
->kvm
, gpc
->memslot
, gpc
->gpa
>> PAGE_SHIFT
);
3042 read_unlock_irqrestore(&gpc
->lock
, flags
);
3044 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
3047 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
3049 unsigned long flags
, tgt_tsc_khz
;
3051 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3052 struct kvm_arch
*ka
= &v
->kvm
->arch
;
3054 u64 tsc_timestamp
, host_tsc
;
3056 bool use_master_clock
;
3062 * If the host uses TSC clock, then passthrough TSC as stable
3066 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3067 use_master_clock
= ka
->use_master_clock
;
3068 if (use_master_clock
) {
3069 host_tsc
= ka
->master_cycle_now
;
3070 kernel_ns
= ka
->master_kernel_ns
;
3072 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3074 /* Keep irq disabled to prevent changes to the clock */
3075 local_irq_save(flags
);
3076 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
3077 if (unlikely(tgt_tsc_khz
== 0)) {
3078 local_irq_restore(flags
);
3079 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3082 if (!use_master_clock
) {
3084 kernel_ns
= get_kvmclock_base_ns();
3087 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
3090 * We may have to catch up the TSC to match elapsed wall clock
3091 * time for two reasons, even if kvmclock is used.
3092 * 1) CPU could have been running below the maximum TSC rate
3093 * 2) Broken TSC compensation resets the base at each VCPU
3094 * entry to avoid unknown leaps of TSC even when running
3095 * again on the same CPU. This may cause apparent elapsed
3096 * time to disappear, and the guest to stand still or run
3099 if (vcpu
->tsc_catchup
) {
3100 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
3101 if (tsc
> tsc_timestamp
) {
3102 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
3103 tsc_timestamp
= tsc
;
3107 local_irq_restore(flags
);
3109 /* With all the info we got, fill in the values */
3111 if (kvm_has_tsc_control
)
3112 tgt_tsc_khz
= kvm_scale_tsc(tgt_tsc_khz
,
3113 v
->arch
.l1_tsc_scaling_ratio
);
3115 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
3116 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
3117 &vcpu
->hv_clock
.tsc_shift
,
3118 &vcpu
->hv_clock
.tsc_to_system_mul
);
3119 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
3122 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
3123 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
3124 vcpu
->last_guest_tsc
= tsc_timestamp
;
3126 /* If the host uses TSC clocksource, then it is stable */
3128 if (use_master_clock
)
3129 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
3131 vcpu
->hv_clock
.flags
= pvclock_flags
;
3133 if (vcpu
->pv_time
.active
)
3134 kvm_setup_guest_pvclock(v
, &vcpu
->pv_time
, 0);
3135 if (vcpu
->xen
.vcpu_info_cache
.active
)
3136 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_info_cache
,
3137 offsetof(struct compat_vcpu_info
, time
));
3138 if (vcpu
->xen
.vcpu_time_info_cache
.active
)
3139 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
3140 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
3145 * kvmclock updates which are isolated to a given vcpu, such as
3146 * vcpu->cpu migration, should not allow system_timestamp from
3147 * the rest of the vcpus to remain static. Otherwise ntp frequency
3148 * correction applies to one vcpu's system_timestamp but not
3151 * So in those cases, request a kvmclock update for all vcpus.
3152 * We need to rate-limit these requests though, as they can
3153 * considerably slow guests that have a large number of vcpus.
3154 * The time for a remote vcpu to update its kvmclock is bound
3155 * by the delay we use to rate-limit the updates.
3158 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3160 static void kvmclock_update_fn(struct work_struct
*work
)
3163 struct delayed_work
*dwork
= to_delayed_work(work
);
3164 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3165 kvmclock_update_work
);
3166 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3167 struct kvm_vcpu
*vcpu
;
3169 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3170 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3171 kvm_vcpu_kick(vcpu
);
3175 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3177 struct kvm
*kvm
= v
->kvm
;
3179 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3180 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3181 KVMCLOCK_UPDATE_DELAY
);
3184 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3186 static void kvmclock_sync_fn(struct work_struct
*work
)
3188 struct delayed_work
*dwork
= to_delayed_work(work
);
3189 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3190 kvmclock_sync_work
);
3191 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3193 if (!kvmclock_periodic_sync
)
3196 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3197 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3198 KVMCLOCK_SYNC_PERIOD
);
3202 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3204 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3206 /* McStatusWrEn enabled? */
3207 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3208 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3213 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3215 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3216 unsigned bank_num
= mcg_cap
& 0xff;
3217 u32 msr
= msr_info
->index
;
3218 u64 data
= msr_info
->data
;
3221 case MSR_IA32_MCG_STATUS
:
3222 vcpu
->arch
.mcg_status
= data
;
3224 case MSR_IA32_MCG_CTL
:
3225 if (!(mcg_cap
& MCG_CTL_P
) &&
3226 (data
|| !msr_info
->host_initiated
))
3228 if (data
!= 0 && data
!= ~(u64
)0)
3230 vcpu
->arch
.mcg_ctl
= data
;
3233 if (msr
>= MSR_IA32_MC0_CTL
&&
3234 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3235 u32 offset
= array_index_nospec(
3236 msr
- MSR_IA32_MC0_CTL
,
3237 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3239 /* only 0 or all 1s can be written to IA32_MCi_CTL
3240 * some Linux kernels though clear bit 10 in bank 4 to
3241 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3242 * this to avoid an uncatched #GP in the guest
3244 if ((offset
& 0x3) == 0 &&
3245 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
3249 if (!msr_info
->host_initiated
&&
3250 (offset
& 0x3) == 1 && data
!= 0) {
3251 if (!can_set_mci_status(vcpu
))
3255 vcpu
->arch
.mce_banks
[offset
] = data
;
3263 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3265 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3267 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3270 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3272 gpa_t gpa
= data
& ~0x3f;
3274 /* Bits 4:5 are reserved, Should be zero */
3278 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3279 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3282 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3283 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3286 if (!lapic_in_kernel(vcpu
))
3287 return data
? 1 : 0;
3289 vcpu
->arch
.apf
.msr_en_val
= data
;
3291 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3292 kvm_clear_async_pf_completion_queue(vcpu
);
3293 kvm_async_pf_hash_reset(vcpu
);
3297 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3301 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3302 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3304 kvm_async_pf_wakeup_all(vcpu
);
3309 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3311 /* Bits 8-63 are reserved */
3315 if (!lapic_in_kernel(vcpu
))
3318 vcpu
->arch
.apf
.msr_int_val
= data
;
3320 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3325 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3327 kvm_gfn_to_pfn_cache_destroy(vcpu
->kvm
, &vcpu
->arch
.pv_time
);
3328 vcpu
->arch
.time
= 0;
3331 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3333 ++vcpu
->stat
.tlb_flush
;
3334 static_call(kvm_x86_flush_tlb_all
)(vcpu
);
3337 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3339 ++vcpu
->stat
.tlb_flush
;
3343 * A TLB flush on behalf of the guest is equivalent to
3344 * INVPCID(all), toggling CR4.PGE, etc., which requires
3345 * a forced sync of the shadow page tables. Ensure all the
3346 * roots are synced and the guest TLB in hardware is clean.
3348 kvm_mmu_sync_roots(vcpu
);
3349 kvm_mmu_sync_prev_roots(vcpu
);
3352 static_call(kvm_x86_flush_tlb_guest
)(vcpu
);
3356 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3358 ++vcpu
->stat
.tlb_flush
;
3359 static_call(kvm_x86_flush_tlb_current
)(vcpu
);
3363 * Service "local" TLB flush requests, which are specific to the current MMU
3364 * context. In addition to the generic event handling in vcpu_enter_guest(),
3365 * TLB flushes that are targeted at an MMU context also need to be serviced
3366 * prior before nested VM-Enter/VM-Exit.
3368 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3370 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3371 kvm_vcpu_flush_tlb_current(vcpu
);
3373 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3374 kvm_vcpu_flush_tlb_guest(vcpu
);
3376 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3378 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3380 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3381 struct kvm_steal_time __user
*st
;
3382 struct kvm_memslots
*slots
;
3386 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3387 kvm_xen_runstate_set_running(vcpu
);
3391 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3394 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3397 slots
= kvm_memslots(vcpu
->kvm
);
3399 if (unlikely(slots
->generation
!= ghc
->generation
||
3400 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3401 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3403 /* We rely on the fact that it fits in a single page. */
3404 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3406 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3407 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3411 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3413 * Doing a TLB flush here, on the guest's behalf, can avoid
3416 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3417 u8 st_preempted
= 0;
3420 if (!user_access_begin(st
, sizeof(*st
)))
3423 asm volatile("1: xchgb %0, %2\n"
3426 _ASM_EXTABLE_UA(1b
, 2b
)
3427 : "+q" (st_preempted
),
3429 "+m" (st
->preempted
));
3435 vcpu
->arch
.st
.preempted
= 0;
3437 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3438 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3439 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3440 kvm_vcpu_flush_tlb_guest(vcpu
);
3442 if (!user_access_begin(st
, sizeof(*st
)))
3445 if (!user_access_begin(st
, sizeof(*st
)))
3448 unsafe_put_user(0, &st
->preempted
, out
);
3449 vcpu
->arch
.st
.preempted
= 0;
3452 unsafe_get_user(version
, &st
->version
, out
);
3454 version
+= 1; /* first time write, random junk */
3457 unsafe_put_user(version
, &st
->version
, out
);
3461 unsafe_get_user(steal
, &st
->steal
, out
);
3462 steal
+= current
->sched_info
.run_delay
-
3463 vcpu
->arch
.st
.last_steal
;
3464 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3465 unsafe_put_user(steal
, &st
->steal
, out
);
3468 unsafe_put_user(version
, &st
->version
, out
);
3473 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3476 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3479 u32 msr
= msr_info
->index
;
3480 u64 data
= msr_info
->data
;
3482 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3483 return kvm_xen_write_hypercall_page(vcpu
, data
);
3486 case MSR_AMD64_NB_CFG
:
3487 case MSR_IA32_UCODE_WRITE
:
3488 case MSR_VM_HSAVE_PA
:
3489 case MSR_AMD64_PATCH_LOADER
:
3490 case MSR_AMD64_BU_CFG2
:
3491 case MSR_AMD64_DC_CFG
:
3492 case MSR_F15H_EX_CFG
:
3495 case MSR_IA32_UCODE_REV
:
3496 if (msr_info
->host_initiated
)
3497 vcpu
->arch
.microcode_version
= data
;
3499 case MSR_IA32_ARCH_CAPABILITIES
:
3500 if (!msr_info
->host_initiated
)
3502 vcpu
->arch
.arch_capabilities
= data
;
3504 case MSR_IA32_PERF_CAPABILITIES
: {
3505 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3507 if (!msr_info
->host_initiated
)
3509 if (kvm_get_msr_feature(&msr_ent
))
3511 if (data
& ~msr_ent
.data
)
3514 vcpu
->arch
.perf_capabilities
= data
;
3519 return set_efer(vcpu
, msr_info
);
3521 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3522 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3523 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3525 /* Handle McStatusWrEn */
3526 if (data
== BIT_ULL(18)) {
3527 vcpu
->arch
.msr_hwcr
= data
;
3528 } else if (data
!= 0) {
3529 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3534 case MSR_FAM10H_MMIO_CONF_BASE
:
3536 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3541 case 0x200 ... 0x2ff:
3542 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3543 case MSR_IA32_APICBASE
:
3544 return kvm_set_apic_base(vcpu
, msr_info
);
3545 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3546 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3547 case MSR_IA32_TSC_DEADLINE
:
3548 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3550 case MSR_IA32_TSC_ADJUST
:
3551 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3552 if (!msr_info
->host_initiated
) {
3553 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3554 adjust_tsc_offset_guest(vcpu
, adj
);
3555 /* Before back to guest, tsc_timestamp must be adjusted
3556 * as well, otherwise guest's percpu pvclock time could jump.
3558 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3560 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3563 case MSR_IA32_MISC_ENABLE
:
3564 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3565 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3566 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3568 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3569 kvm_update_cpuid_runtime(vcpu
);
3571 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3574 case MSR_IA32_SMBASE
:
3575 if (!msr_info
->host_initiated
)
3577 vcpu
->arch
.smbase
= data
;
3579 case MSR_IA32_POWER_CTL
:
3580 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3583 if (msr_info
->host_initiated
) {
3584 kvm_synchronize_tsc(vcpu
, data
);
3586 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3587 adjust_tsc_offset_guest(vcpu
, adj
);
3588 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3592 if (!msr_info
->host_initiated
&&
3593 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3596 * KVM supports exposing PT to the guest, but does not support
3597 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3598 * XSAVES/XRSTORS to save/restore PT MSRs.
3600 if (data
& ~supported_xss
)
3602 vcpu
->arch
.ia32_xss
= data
;
3603 kvm_update_cpuid_runtime(vcpu
);
3606 if (!msr_info
->host_initiated
)
3608 vcpu
->arch
.smi_count
= data
;
3610 case MSR_KVM_WALL_CLOCK_NEW
:
3611 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3614 vcpu
->kvm
->arch
.wall_clock
= data
;
3615 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3617 case MSR_KVM_WALL_CLOCK
:
3618 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3621 vcpu
->kvm
->arch
.wall_clock
= data
;
3622 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3624 case MSR_KVM_SYSTEM_TIME_NEW
:
3625 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3628 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3630 case MSR_KVM_SYSTEM_TIME
:
3631 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3634 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3636 case MSR_KVM_ASYNC_PF_EN
:
3637 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3640 if (kvm_pv_enable_async_pf(vcpu
, data
))
3643 case MSR_KVM_ASYNC_PF_INT
:
3644 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3647 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3650 case MSR_KVM_ASYNC_PF_ACK
:
3651 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3654 vcpu
->arch
.apf
.pageready_pending
= false;
3655 kvm_check_async_pf_completion(vcpu
);
3658 case MSR_KVM_STEAL_TIME
:
3659 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3662 if (unlikely(!sched_info_on()))
3665 if (data
& KVM_STEAL_RESERVED_MASK
)
3668 vcpu
->arch
.st
.msr_val
= data
;
3670 if (!(data
& KVM_MSR_ENABLED
))
3673 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3676 case MSR_KVM_PV_EOI_EN
:
3677 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3680 if (kvm_lapic_set_pv_eoi(vcpu
, data
, sizeof(u8
)))
3684 case MSR_KVM_POLL_CONTROL
:
3685 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3688 /* only enable bit supported */
3689 if (data
& (-1ULL << 1))
3692 vcpu
->arch
.msr_kvm_poll_control
= data
;
3695 case MSR_IA32_MCG_CTL
:
3696 case MSR_IA32_MCG_STATUS
:
3697 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3698 return set_msr_mce(vcpu
, msr_info
);
3700 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3701 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3704 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3705 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3706 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3707 return kvm_pmu_set_msr(vcpu
, msr_info
);
3709 if (pr
|| data
!= 0)
3710 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3711 "0x%x data 0x%llx\n", msr
, data
);
3713 case MSR_K7_CLK_CTL
:
3715 * Ignore all writes to this no longer documented MSR.
3716 * Writes are only relevant for old K7 processors,
3717 * all pre-dating SVM, but a recommended workaround from
3718 * AMD for these chips. It is possible to specify the
3719 * affected processor models on the command line, hence
3720 * the need to ignore the workaround.
3723 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3724 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3725 case HV_X64_MSR_SYNDBG_OPTIONS
:
3726 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3727 case HV_X64_MSR_CRASH_CTL
:
3728 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3729 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3730 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3731 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3732 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3733 msr_info
->host_initiated
);
3734 case MSR_IA32_BBL_CR_CTL3
:
3735 /* Drop writes to this legacy MSR -- see rdmsr
3736 * counterpart for further detail.
3738 if (report_ignored_msrs
)
3739 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3742 case MSR_AMD64_OSVW_ID_LENGTH
:
3743 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3745 vcpu
->arch
.osvw
.length
= data
;
3747 case MSR_AMD64_OSVW_STATUS
:
3748 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3750 vcpu
->arch
.osvw
.status
= data
;
3752 case MSR_PLATFORM_INFO
:
3753 if (!msr_info
->host_initiated
||
3754 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3755 cpuid_fault_enabled(vcpu
)))
3757 vcpu
->arch
.msr_platform_info
= data
;
3759 case MSR_MISC_FEATURES_ENABLES
:
3760 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3761 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3762 !supports_cpuid_fault(vcpu
)))
3764 vcpu
->arch
.msr_misc_features_enables
= data
;
3766 #ifdef CONFIG_X86_64
3768 if (!msr_info
->host_initiated
&&
3769 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
3772 if (data
& ~kvm_guest_supported_xfd(vcpu
))
3775 fpu_update_guest_xfd(&vcpu
->arch
.guest_fpu
, data
);
3777 case MSR_IA32_XFD_ERR
:
3778 if (!msr_info
->host_initiated
&&
3779 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
3782 if (data
& ~kvm_guest_supported_xfd(vcpu
))
3785 vcpu
->arch
.guest_fpu
.xfd_err
= data
;
3789 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3790 return kvm_pmu_set_msr(vcpu
, msr_info
);
3791 return KVM_MSR_RET_INVALID
;
3795 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3797 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3800 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3801 unsigned bank_num
= mcg_cap
& 0xff;
3804 case MSR_IA32_P5_MC_ADDR
:
3805 case MSR_IA32_P5_MC_TYPE
:
3808 case MSR_IA32_MCG_CAP
:
3809 data
= vcpu
->arch
.mcg_cap
;
3811 case MSR_IA32_MCG_CTL
:
3812 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3814 data
= vcpu
->arch
.mcg_ctl
;
3816 case MSR_IA32_MCG_STATUS
:
3817 data
= vcpu
->arch
.mcg_status
;
3820 if (msr
>= MSR_IA32_MC0_CTL
&&
3821 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3822 u32 offset
= array_index_nospec(
3823 msr
- MSR_IA32_MC0_CTL
,
3824 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3826 data
= vcpu
->arch
.mce_banks
[offset
];
3835 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3837 switch (msr_info
->index
) {
3838 case MSR_IA32_PLATFORM_ID
:
3839 case MSR_IA32_EBL_CR_POWERON
:
3840 case MSR_IA32_LASTBRANCHFROMIP
:
3841 case MSR_IA32_LASTBRANCHTOIP
:
3842 case MSR_IA32_LASTINTFROMIP
:
3843 case MSR_IA32_LASTINTTOIP
:
3844 case MSR_AMD64_SYSCFG
:
3845 case MSR_K8_TSEG_ADDR
:
3846 case MSR_K8_TSEG_MASK
:
3847 case MSR_VM_HSAVE_PA
:
3848 case MSR_K8_INT_PENDING_MSG
:
3849 case MSR_AMD64_NB_CFG
:
3850 case MSR_FAM10H_MMIO_CONF_BASE
:
3851 case MSR_AMD64_BU_CFG2
:
3852 case MSR_IA32_PERF_CTL
:
3853 case MSR_AMD64_DC_CFG
:
3854 case MSR_F15H_EX_CFG
:
3856 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3857 * limit) MSRs. Just return 0, as we do not want to expose the host
3858 * data here. Do not conditionalize this on CPUID, as KVM does not do
3859 * so for existing CPU-specific MSRs.
3861 case MSR_RAPL_POWER_UNIT
:
3862 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3863 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3864 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3865 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3868 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3869 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3870 return kvm_pmu_get_msr(vcpu
, msr_info
);
3871 if (!msr_info
->host_initiated
)
3875 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3876 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3877 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3878 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3879 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3880 return kvm_pmu_get_msr(vcpu
, msr_info
);
3883 case MSR_IA32_UCODE_REV
:
3884 msr_info
->data
= vcpu
->arch
.microcode_version
;
3886 case MSR_IA32_ARCH_CAPABILITIES
:
3887 if (!msr_info
->host_initiated
&&
3888 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3890 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3892 case MSR_IA32_PERF_CAPABILITIES
:
3893 if (!msr_info
->host_initiated
&&
3894 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3896 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3898 case MSR_IA32_POWER_CTL
:
3899 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3901 case MSR_IA32_TSC
: {
3903 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3904 * even when not intercepted. AMD manual doesn't explicitly
3905 * state this but appears to behave the same.
3907 * On userspace reads and writes, however, we unconditionally
3908 * return L1's TSC value to ensure backwards-compatible
3909 * behavior for migration.
3913 if (msr_info
->host_initiated
) {
3914 offset
= vcpu
->arch
.l1_tsc_offset
;
3915 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
3917 offset
= vcpu
->arch
.tsc_offset
;
3918 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
3921 msr_info
->data
= kvm_scale_tsc(rdtsc(), ratio
) + offset
;
3925 case 0x200 ... 0x2ff:
3926 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3927 case 0xcd: /* fsb frequency */
3931 * MSR_EBC_FREQUENCY_ID
3932 * Conservative value valid for even the basic CPU models.
3933 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3934 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3935 * and 266MHz for model 3, or 4. Set Core Clock
3936 * Frequency to System Bus Frequency Ratio to 1 (bits
3937 * 31:24) even though these are only valid for CPU
3938 * models > 2, however guests may end up dividing or
3939 * multiplying by zero otherwise.
3941 case MSR_EBC_FREQUENCY_ID
:
3942 msr_info
->data
= 1 << 24;
3944 case MSR_IA32_APICBASE
:
3945 msr_info
->data
= kvm_get_apic_base(vcpu
);
3947 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3948 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3949 case MSR_IA32_TSC_DEADLINE
:
3950 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3952 case MSR_IA32_TSC_ADJUST
:
3953 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3955 case MSR_IA32_MISC_ENABLE
:
3956 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3958 case MSR_IA32_SMBASE
:
3959 if (!msr_info
->host_initiated
)
3961 msr_info
->data
= vcpu
->arch
.smbase
;
3964 msr_info
->data
= vcpu
->arch
.smi_count
;
3966 case MSR_IA32_PERF_STATUS
:
3967 /* TSC increment by tick */
3968 msr_info
->data
= 1000ULL;
3969 /* CPU multiplier */
3970 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3973 msr_info
->data
= vcpu
->arch
.efer
;
3975 case MSR_KVM_WALL_CLOCK
:
3976 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3979 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3981 case MSR_KVM_WALL_CLOCK_NEW
:
3982 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3985 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3987 case MSR_KVM_SYSTEM_TIME
:
3988 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3991 msr_info
->data
= vcpu
->arch
.time
;
3993 case MSR_KVM_SYSTEM_TIME_NEW
:
3994 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3997 msr_info
->data
= vcpu
->arch
.time
;
3999 case MSR_KVM_ASYNC_PF_EN
:
4000 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
4003 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
4005 case MSR_KVM_ASYNC_PF_INT
:
4006 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4009 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
4011 case MSR_KVM_ASYNC_PF_ACK
:
4012 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4017 case MSR_KVM_STEAL_TIME
:
4018 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
4021 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
4023 case MSR_KVM_PV_EOI_EN
:
4024 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
4027 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
4029 case MSR_KVM_POLL_CONTROL
:
4030 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
4033 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
4035 case MSR_IA32_P5_MC_ADDR
:
4036 case MSR_IA32_P5_MC_TYPE
:
4037 case MSR_IA32_MCG_CAP
:
4038 case MSR_IA32_MCG_CTL
:
4039 case MSR_IA32_MCG_STATUS
:
4040 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4041 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
4042 msr_info
->host_initiated
);
4044 if (!msr_info
->host_initiated
&&
4045 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
4047 msr_info
->data
= vcpu
->arch
.ia32_xss
;
4049 case MSR_K7_CLK_CTL
:
4051 * Provide expected ramp-up count for K7. All other
4052 * are set to zero, indicating minimum divisors for
4055 * This prevents guest kernels on AMD host with CPU
4056 * type 6, model 8 and higher from exploding due to
4057 * the rdmsr failing.
4059 msr_info
->data
= 0x20000000;
4061 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
4062 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
4063 case HV_X64_MSR_SYNDBG_OPTIONS
:
4064 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
4065 case HV_X64_MSR_CRASH_CTL
:
4066 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
4067 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
4068 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
4069 case HV_X64_MSR_TSC_EMULATION_STATUS
:
4070 return kvm_hv_get_msr_common(vcpu
,
4071 msr_info
->index
, &msr_info
->data
,
4072 msr_info
->host_initiated
);
4073 case MSR_IA32_BBL_CR_CTL3
:
4074 /* This legacy MSR exists but isn't fully documented in current
4075 * silicon. It is however accessed by winxp in very narrow
4076 * scenarios where it sets bit #19, itself documented as
4077 * a "reserved" bit. Best effort attempt to source coherent
4078 * read data here should the balance of the register be
4079 * interpreted by the guest:
4081 * L2 cache control register 3: 64GB range, 256KB size,
4082 * enabled, latency 0x1, configured
4084 msr_info
->data
= 0xbe702111;
4086 case MSR_AMD64_OSVW_ID_LENGTH
:
4087 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4089 msr_info
->data
= vcpu
->arch
.osvw
.length
;
4091 case MSR_AMD64_OSVW_STATUS
:
4092 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4094 msr_info
->data
= vcpu
->arch
.osvw
.status
;
4096 case MSR_PLATFORM_INFO
:
4097 if (!msr_info
->host_initiated
&&
4098 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
4100 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
4102 case MSR_MISC_FEATURES_ENABLES
:
4103 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
4106 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
4108 #ifdef CONFIG_X86_64
4110 if (!msr_info
->host_initiated
&&
4111 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4114 msr_info
->data
= vcpu
->arch
.guest_fpu
.fpstate
->xfd
;
4116 case MSR_IA32_XFD_ERR
:
4117 if (!msr_info
->host_initiated
&&
4118 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4121 msr_info
->data
= vcpu
->arch
.guest_fpu
.xfd_err
;
4125 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4126 return kvm_pmu_get_msr(vcpu
, msr_info
);
4127 return KVM_MSR_RET_INVALID
;
4131 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
4134 * Read or write a bunch of msrs. All parameters are kernel addresses.
4136 * @return number of msrs set successfully.
4138 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
4139 struct kvm_msr_entry
*entries
,
4140 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4141 unsigned index
, u64
*data
))
4145 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
4146 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
4153 * Read or write a bunch of msrs. Parameters are user addresses.
4155 * @return number of msrs set successfully.
4157 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
4158 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4159 unsigned index
, u64
*data
),
4162 struct kvm_msrs msrs
;
4163 struct kvm_msr_entry
*entries
;
4168 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
4172 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
4175 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
4176 entries
= memdup_user(user_msrs
->entries
, size
);
4177 if (IS_ERR(entries
)) {
4178 r
= PTR_ERR(entries
);
4182 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4187 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4198 static inline bool kvm_can_mwait_in_guest(void)
4200 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4201 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4202 boot_cpu_has(X86_FEATURE_ARAT
);
4205 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4206 struct kvm_cpuid2 __user
*cpuid_arg
)
4208 struct kvm_cpuid2 cpuid
;
4212 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4215 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4220 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4226 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4231 case KVM_CAP_IRQCHIP
:
4233 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4234 case KVM_CAP_SET_TSS_ADDR
:
4235 case KVM_CAP_EXT_CPUID
:
4236 case KVM_CAP_EXT_EMUL_CPUID
:
4237 case KVM_CAP_CLOCKSOURCE
:
4239 case KVM_CAP_NOP_IO_DELAY
:
4240 case KVM_CAP_MP_STATE
:
4241 case KVM_CAP_SYNC_MMU
:
4242 case KVM_CAP_USER_NMI
:
4243 case KVM_CAP_REINJECT_CONTROL
:
4244 case KVM_CAP_IRQ_INJECT_STATUS
:
4245 case KVM_CAP_IOEVENTFD
:
4246 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4248 case KVM_CAP_PIT_STATE2
:
4249 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4250 case KVM_CAP_VCPU_EVENTS
:
4251 case KVM_CAP_HYPERV
:
4252 case KVM_CAP_HYPERV_VAPIC
:
4253 case KVM_CAP_HYPERV_SPIN
:
4254 case KVM_CAP_HYPERV_SYNIC
:
4255 case KVM_CAP_HYPERV_SYNIC2
:
4256 case KVM_CAP_HYPERV_VP_INDEX
:
4257 case KVM_CAP_HYPERV_EVENTFD
:
4258 case KVM_CAP_HYPERV_TLBFLUSH
:
4259 case KVM_CAP_HYPERV_SEND_IPI
:
4260 case KVM_CAP_HYPERV_CPUID
:
4261 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4262 case KVM_CAP_SYS_HYPERV_CPUID
:
4263 case KVM_CAP_PCI_SEGMENT
:
4264 case KVM_CAP_DEBUGREGS
:
4265 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4267 case KVM_CAP_ASYNC_PF
:
4268 case KVM_CAP_ASYNC_PF_INT
:
4269 case KVM_CAP_GET_TSC_KHZ
:
4270 case KVM_CAP_KVMCLOCK_CTRL
:
4271 case KVM_CAP_READONLY_MEM
:
4272 case KVM_CAP_HYPERV_TIME
:
4273 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4274 case KVM_CAP_TSC_DEADLINE_TIMER
:
4275 case KVM_CAP_DISABLE_QUIRKS
:
4276 case KVM_CAP_SET_BOOT_CPU_ID
:
4277 case KVM_CAP_SPLIT_IRQCHIP
:
4278 case KVM_CAP_IMMEDIATE_EXIT
:
4279 case KVM_CAP_PMU_EVENT_FILTER
:
4280 case KVM_CAP_GET_MSR_FEATURES
:
4281 case KVM_CAP_MSR_PLATFORM_INFO
:
4282 case KVM_CAP_EXCEPTION_PAYLOAD
:
4283 case KVM_CAP_SET_GUEST_DEBUG
:
4284 case KVM_CAP_LAST_CPU
:
4285 case KVM_CAP_X86_USER_SPACE_MSR
:
4286 case KVM_CAP_X86_MSR_FILTER
:
4287 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4288 #ifdef CONFIG_X86_SGX_KVM
4289 case KVM_CAP_SGX_ATTRIBUTE
:
4291 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4292 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
4293 case KVM_CAP_SREGS2
:
4294 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4295 case KVM_CAP_VCPU_ATTRIBUTES
:
4296 case KVM_CAP_SYS_ATTRIBUTES
:
4298 case KVM_CAP_ENABLE_CAP
:
4301 case KVM_CAP_EXIT_HYPERCALL
:
4302 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4304 case KVM_CAP_SET_GUEST_DEBUG2
:
4305 return KVM_GUESTDBG_VALID_MASK
;
4306 #ifdef CONFIG_KVM_XEN
4307 case KVM_CAP_XEN_HVM
:
4308 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4309 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4310 KVM_XEN_HVM_CONFIG_SHARED_INFO
|
4311 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL
|
4312 KVM_XEN_HVM_CONFIG_EVTCHN_SEND
;
4313 if (sched_info_on())
4314 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4317 case KVM_CAP_SYNC_REGS
:
4318 r
= KVM_SYNC_X86_VALID_FIELDS
;
4320 case KVM_CAP_ADJUST_CLOCK
:
4321 r
= KVM_CLOCK_VALID_FLAGS
;
4323 case KVM_CAP_X86_DISABLE_EXITS
:
4324 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4325 KVM_X86_DISABLE_EXITS_CSTATE
;
4326 if(kvm_can_mwait_in_guest())
4327 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4329 case KVM_CAP_X86_SMM
:
4330 /* SMBASE is usually relocated above 1M on modern chipsets,
4331 * and SMM handlers might indeed rely on 4G segment limits,
4332 * so do not report SMM to be available if real mode is
4333 * emulated via vm86 mode. Still, do not go to great lengths
4334 * to avoid userspace's usage of the feature, because it is a
4335 * fringe case that is not enabled except via specific settings
4336 * of the module parameters.
4338 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4340 case KVM_CAP_NR_VCPUS
:
4341 r
= min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS
);
4343 case KVM_CAP_MAX_VCPUS
:
4346 case KVM_CAP_MAX_VCPU_ID
:
4347 r
= KVM_MAX_VCPU_IDS
;
4349 case KVM_CAP_PV_MMU
: /* obsolete */
4353 r
= KVM_MAX_MCE_BANKS
;
4356 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4358 case KVM_CAP_TSC_CONTROL
:
4359 case KVM_CAP_VM_TSC_CONTROL
:
4360 r
= kvm_has_tsc_control
;
4362 case KVM_CAP_X2APIC_API
:
4363 r
= KVM_X2APIC_API_VALID_FLAGS
;
4365 case KVM_CAP_NESTED_STATE
:
4366 r
= kvm_x86_ops
.nested_ops
->get_state
?
4367 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4369 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4370 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4372 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4373 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4375 case KVM_CAP_SMALLER_MAXPHYADDR
:
4376 r
= (int) allow_smaller_maxphyaddr
;
4378 case KVM_CAP_STEAL_TIME
:
4379 r
= sched_info_on();
4381 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4382 if (kvm_has_bus_lock_exit
)
4383 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4384 KVM_BUS_LOCK_DETECTION_EXIT
;
4388 case KVM_CAP_XSAVE2
: {
4389 u64 guest_perm
= xstate_get_guest_group_perm();
4391 r
= xstate_required_size(supported_xcr0
& guest_perm
, false);
4392 if (r
< sizeof(struct kvm_xsave
))
4393 r
= sizeof(struct kvm_xsave
);
4395 case KVM_CAP_PMU_CAPABILITY
:
4396 r
= enable_pmu
? KVM_CAP_PMU_VALID_MASK
: 0;
4399 case KVM_CAP_DISABLE_QUIRKS2
:
4400 r
= KVM_X86_VALID_QUIRKS
;
4408 static inline void __user
*kvm_get_attr_addr(struct kvm_device_attr
*attr
)
4410 void __user
*uaddr
= (void __user
*)(unsigned long)attr
->addr
;
4412 if ((u64
)(unsigned long)uaddr
!= attr
->addr
)
4413 return ERR_PTR_USR(-EFAULT
);
4417 static int kvm_x86_dev_get_attr(struct kvm_device_attr
*attr
)
4419 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
4425 return PTR_ERR(uaddr
);
4427 switch (attr
->attr
) {
4428 case KVM_X86_XCOMP_GUEST_SUPP
:
4429 if (put_user(supported_xcr0
, uaddr
))
4438 static int kvm_x86_dev_has_attr(struct kvm_device_attr
*attr
)
4443 switch (attr
->attr
) {
4444 case KVM_X86_XCOMP_GUEST_SUPP
:
4451 long kvm_arch_dev_ioctl(struct file
*filp
,
4452 unsigned int ioctl
, unsigned long arg
)
4454 void __user
*argp
= (void __user
*)arg
;
4458 case KVM_GET_MSR_INDEX_LIST
: {
4459 struct kvm_msr_list __user
*user_msr_list
= argp
;
4460 struct kvm_msr_list msr_list
;
4464 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4467 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4468 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4471 if (n
< msr_list
.nmsrs
)
4474 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4475 num_msrs_to_save
* sizeof(u32
)))
4477 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4479 num_emulated_msrs
* sizeof(u32
)))
4484 case KVM_GET_SUPPORTED_CPUID
:
4485 case KVM_GET_EMULATED_CPUID
: {
4486 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4487 struct kvm_cpuid2 cpuid
;
4490 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4493 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4499 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4504 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4506 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4507 sizeof(kvm_mce_cap_supported
)))
4511 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4512 struct kvm_msr_list __user
*user_msr_list
= argp
;
4513 struct kvm_msr_list msr_list
;
4517 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4520 msr_list
.nmsrs
= num_msr_based_features
;
4521 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4524 if (n
< msr_list
.nmsrs
)
4527 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4528 num_msr_based_features
* sizeof(u32
)))
4534 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4536 case KVM_GET_SUPPORTED_HV_CPUID
:
4537 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4539 case KVM_GET_DEVICE_ATTR
: {
4540 struct kvm_device_attr attr
;
4542 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4544 r
= kvm_x86_dev_get_attr(&attr
);
4547 case KVM_HAS_DEVICE_ATTR
: {
4548 struct kvm_device_attr attr
;
4550 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4552 r
= kvm_x86_dev_has_attr(&attr
);
4563 static void wbinvd_ipi(void *garbage
)
4568 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4570 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4573 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4575 /* Address WBINVD may be executed by guest */
4576 if (need_emulate_wbinvd(vcpu
)) {
4577 if (static_call(kvm_x86_has_wbinvd_exit
)())
4578 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4579 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4580 smp_call_function_single(vcpu
->cpu
,
4581 wbinvd_ipi
, NULL
, 1);
4584 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4586 /* Save host pkru register if supported */
4587 vcpu
->arch
.host_pkru
= read_pkru();
4589 /* Apply any externally detected TSC adjustments (due to suspend) */
4590 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4591 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4592 vcpu
->arch
.tsc_offset_adjustment
= 0;
4593 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4596 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4597 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4598 rdtsc() - vcpu
->arch
.last_host_tsc
;
4600 mark_tsc_unstable("KVM discovered backwards TSC");
4602 if (kvm_check_tsc_unstable()) {
4603 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4604 vcpu
->arch
.last_guest_tsc
);
4605 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4606 vcpu
->arch
.tsc_catchup
= 1;
4609 if (kvm_lapic_hv_timer_in_use(vcpu
))
4610 kvm_lapic_restart_hv_timer(vcpu
);
4613 * On a host with synchronized TSC, there is no need to update
4614 * kvmclock on vcpu->cpu migration
4616 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4617 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4618 if (vcpu
->cpu
!= cpu
)
4619 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4623 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4626 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4628 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4629 struct kvm_steal_time __user
*st
;
4630 struct kvm_memslots
*slots
;
4631 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4634 * The vCPU can be marked preempted if and only if the VM-Exit was on
4635 * an instruction boundary and will not trigger guest emulation of any
4636 * kind (see vcpu_run). Vendor specific code controls (conservatively)
4637 * when this is true, for example allowing the vCPU to be marked
4638 * preempted if and only if the VM-Exit was due to a host interrupt.
4640 if (!vcpu
->arch
.at_instruction_boundary
) {
4641 vcpu
->stat
.preemption_other
++;
4645 vcpu
->stat
.preemption_reported
++;
4646 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4649 if (vcpu
->arch
.st
.preempted
)
4652 /* This happens on process exit */
4653 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4656 slots
= kvm_memslots(vcpu
->kvm
);
4658 if (unlikely(slots
->generation
!= ghc
->generation
||
4659 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4662 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4663 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4665 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4666 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4668 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4671 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4675 if (vcpu
->preempted
) {
4676 if (!vcpu
->arch
.guest_state_protected
)
4677 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4680 * Take the srcu lock as memslots will be accessed to check the gfn
4681 * cache generation against the memslots generation.
4683 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4684 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4685 kvm_xen_runstate_set_preempted(vcpu
);
4687 kvm_steal_time_set_preempted(vcpu
);
4688 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4691 static_call(kvm_x86_vcpu_put
)(vcpu
);
4692 vcpu
->arch
.last_host_tsc
= rdtsc();
4695 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4696 struct kvm_lapic_state
*s
)
4698 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
4700 return kvm_apic_get_state(vcpu
, s
);
4703 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4704 struct kvm_lapic_state
*s
)
4708 r
= kvm_apic_set_state(vcpu
, s
);
4711 update_cr8_intercept(vcpu
);
4716 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4719 * We can accept userspace's request for interrupt injection
4720 * as long as we have a place to store the interrupt number.
4721 * The actual injection will happen when the CPU is able to
4722 * deliver the interrupt.
4724 if (kvm_cpu_has_extint(vcpu
))
4727 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4728 return (!lapic_in_kernel(vcpu
) ||
4729 kvm_apic_accept_pic_intr(vcpu
));
4732 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4735 * Do not cause an interrupt window exit if an exception
4736 * is pending or an event needs reinjection; userspace
4737 * might want to inject the interrupt manually using KVM_SET_REGS
4738 * or KVM_SET_SREGS. For that to work, we must be at an
4739 * instruction boundary and with no events half-injected.
4741 return (kvm_arch_interrupt_allowed(vcpu
) &&
4742 kvm_cpu_accept_dm_intr(vcpu
) &&
4743 !kvm_event_needs_reinjection(vcpu
) &&
4744 !vcpu
->arch
.exception
.pending
);
4747 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4748 struct kvm_interrupt
*irq
)
4750 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4753 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4754 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4755 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4760 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4761 * fail for in-kernel 8259.
4763 if (pic_in_kernel(vcpu
->kvm
))
4766 if (vcpu
->arch
.pending_external_vector
!= -1)
4769 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4770 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4774 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4776 kvm_inject_nmi(vcpu
);
4781 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4783 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4788 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4789 struct kvm_tpr_access_ctl
*tac
)
4793 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4797 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4801 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4804 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4806 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4809 vcpu
->arch
.mcg_cap
= mcg_cap
;
4810 /* Init IA32_MCG_CTL to all 1s */
4811 if (mcg_cap
& MCG_CTL_P
)
4812 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4813 /* Init IA32_MCi_CTL to all 1s */
4814 for (bank
= 0; bank
< bank_num
; bank
++)
4815 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4817 static_call(kvm_x86_setup_mce
)(vcpu
);
4822 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4823 struct kvm_x86_mce
*mce
)
4825 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4826 unsigned bank_num
= mcg_cap
& 0xff;
4827 u64
*banks
= vcpu
->arch
.mce_banks
;
4829 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4832 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4833 * reporting is disabled
4835 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4836 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4838 banks
+= 4 * mce
->bank
;
4840 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4841 * reporting is disabled for the bank
4843 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4845 if (mce
->status
& MCI_STATUS_UC
) {
4846 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4847 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4848 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4851 if (banks
[1] & MCI_STATUS_VAL
)
4852 mce
->status
|= MCI_STATUS_OVER
;
4853 banks
[2] = mce
->addr
;
4854 banks
[3] = mce
->misc
;
4855 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4856 banks
[1] = mce
->status
;
4857 kvm_queue_exception(vcpu
, MC_VECTOR
);
4858 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4859 || !(banks
[1] & MCI_STATUS_UC
)) {
4860 if (banks
[1] & MCI_STATUS_VAL
)
4861 mce
->status
|= MCI_STATUS_OVER
;
4862 banks
[2] = mce
->addr
;
4863 banks
[3] = mce
->misc
;
4864 banks
[1] = mce
->status
;
4866 banks
[1] |= MCI_STATUS_OVER
;
4870 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4871 struct kvm_vcpu_events
*events
)
4875 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4879 * In guest mode, payload delivery should be deferred,
4880 * so that the L1 hypervisor can intercept #PF before
4881 * CR2 is modified (or intercept #DB before DR6 is
4882 * modified under nVMX). Unless the per-VM capability,
4883 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4884 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4885 * opportunistically defer the exception payload, deliver it if the
4886 * capability hasn't been requested before processing a
4887 * KVM_GET_VCPU_EVENTS.
4889 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4890 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4891 kvm_deliver_exception_payload(vcpu
);
4894 * The API doesn't provide the instruction length for software
4895 * exceptions, so don't report them. As long as the guest RIP
4896 * isn't advanced, we should expect to encounter the exception
4899 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4900 events
->exception
.injected
= 0;
4901 events
->exception
.pending
= 0;
4903 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4904 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4906 * For ABI compatibility, deliberately conflate
4907 * pending and injected exceptions when
4908 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4910 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4911 events
->exception
.injected
|=
4912 vcpu
->arch
.exception
.pending
;
4914 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4915 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4916 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4917 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4918 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4920 events
->interrupt
.injected
=
4921 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4922 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4923 events
->interrupt
.soft
= 0;
4924 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4926 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4927 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4928 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4929 events
->nmi
.pad
= 0;
4931 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4933 events
->smi
.smm
= is_smm(vcpu
);
4934 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4935 events
->smi
.smm_inside_nmi
=
4936 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4937 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4939 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4940 | KVM_VCPUEVENT_VALID_SHADOW
4941 | KVM_VCPUEVENT_VALID_SMM
);
4942 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4943 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4945 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4948 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
);
4950 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4951 struct kvm_vcpu_events
*events
)
4953 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4954 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4955 | KVM_VCPUEVENT_VALID_SHADOW
4956 | KVM_VCPUEVENT_VALID_SMM
4957 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4960 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4961 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4963 if (events
->exception
.pending
)
4964 events
->exception
.injected
= 0;
4966 events
->exception_has_payload
= 0;
4968 events
->exception
.pending
= 0;
4969 events
->exception_has_payload
= 0;
4972 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4973 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4976 /* INITs are latched while in SMM */
4977 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4978 (events
->smi
.smm
|| events
->smi
.pending
) &&
4979 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4983 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4984 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4985 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4986 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4987 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4988 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4989 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4991 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4992 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4993 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4994 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4995 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4996 events
->interrupt
.shadow
);
4998 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4999 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
5000 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
5001 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
5003 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
5004 lapic_in_kernel(vcpu
))
5005 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
5007 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
5008 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
5009 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
5010 kvm_smm_changed(vcpu
, events
->smi
.smm
);
5013 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
5015 if (events
->smi
.smm
) {
5016 if (events
->smi
.smm_inside_nmi
)
5017 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
5019 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
5022 if (lapic_in_kernel(vcpu
)) {
5023 if (events
->smi
.latched_init
)
5024 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5026 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5030 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5035 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
5036 struct kvm_debugregs
*dbgregs
)
5040 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
5041 kvm_get_dr(vcpu
, 6, &val
);
5043 dbgregs
->dr7
= vcpu
->arch
.dr7
;
5045 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
5048 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
5049 struct kvm_debugregs
*dbgregs
)
5054 if (!kvm_dr6_valid(dbgregs
->dr6
))
5056 if (!kvm_dr7_valid(dbgregs
->dr7
))
5059 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
5060 kvm_update_dr0123(vcpu
);
5061 vcpu
->arch
.dr6
= dbgregs
->dr6
;
5062 vcpu
->arch
.dr7
= dbgregs
->dr7
;
5063 kvm_update_dr7(vcpu
);
5068 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
5069 struct kvm_xsave
*guest_xsave
)
5071 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5074 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
,
5075 guest_xsave
->region
,
5076 sizeof(guest_xsave
->region
),
5080 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu
*vcpu
,
5081 u8
*state
, unsigned int size
)
5083 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5086 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
,
5087 state
, size
, vcpu
->arch
.pkru
);
5090 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
5091 struct kvm_xsave
*guest_xsave
)
5093 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5096 return fpu_copy_uabi_to_guest_fpstate(&vcpu
->arch
.guest_fpu
,
5097 guest_xsave
->region
,
5098 supported_xcr0
, &vcpu
->arch
.pkru
);
5101 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
5102 struct kvm_xcrs
*guest_xcrs
)
5104 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
5105 guest_xcrs
->nr_xcrs
= 0;
5109 guest_xcrs
->nr_xcrs
= 1;
5110 guest_xcrs
->flags
= 0;
5111 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
5112 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
5115 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
5116 struct kvm_xcrs
*guest_xcrs
)
5120 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
5123 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
5126 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
5127 /* Only support XCR0 currently */
5128 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
5129 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
5130 guest_xcrs
->xcrs
[i
].value
);
5139 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5140 * stopped by the hypervisor. This function will be called from the host only.
5141 * EINVAL is returned when the host attempts to set the flag for a guest that
5142 * does not support pv clocks.
5144 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
5146 if (!vcpu
->arch
.pv_time
.active
)
5148 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
5149 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5153 static int kvm_arch_tsc_has_attr(struct kvm_vcpu
*vcpu
,
5154 struct kvm_device_attr
*attr
)
5158 switch (attr
->attr
) {
5159 case KVM_VCPU_TSC_OFFSET
:
5169 static int kvm_arch_tsc_get_attr(struct kvm_vcpu
*vcpu
,
5170 struct kvm_device_attr
*attr
)
5172 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5176 return PTR_ERR(uaddr
);
5178 switch (attr
->attr
) {
5179 case KVM_VCPU_TSC_OFFSET
:
5181 if (put_user(vcpu
->arch
.l1_tsc_offset
, uaddr
))
5192 static int kvm_arch_tsc_set_attr(struct kvm_vcpu
*vcpu
,
5193 struct kvm_device_attr
*attr
)
5195 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5196 struct kvm
*kvm
= vcpu
->kvm
;
5200 return PTR_ERR(uaddr
);
5202 switch (attr
->attr
) {
5203 case KVM_VCPU_TSC_OFFSET
: {
5204 u64 offset
, tsc
, ns
;
5205 unsigned long flags
;
5209 if (get_user(offset
, uaddr
))
5212 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
5214 matched
= (vcpu
->arch
.virtual_tsc_khz
&&
5215 kvm
->arch
.last_tsc_khz
== vcpu
->arch
.virtual_tsc_khz
&&
5216 kvm
->arch
.last_tsc_offset
== offset
);
5218 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
) + offset
;
5219 ns
= get_kvmclock_base_ns();
5221 __kvm_synchronize_tsc(vcpu
, offset
, tsc
, ns
, matched
);
5222 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
5234 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu
*vcpu
,
5238 struct kvm_device_attr attr
;
5241 if (copy_from_user(&attr
, argp
, sizeof(attr
)))
5244 if (attr
.group
!= KVM_VCPU_TSC_CTRL
)
5248 case KVM_HAS_DEVICE_ATTR
:
5249 r
= kvm_arch_tsc_has_attr(vcpu
, &attr
);
5251 case KVM_GET_DEVICE_ATTR
:
5252 r
= kvm_arch_tsc_get_attr(vcpu
, &attr
);
5254 case KVM_SET_DEVICE_ATTR
:
5255 r
= kvm_arch_tsc_set_attr(vcpu
, &attr
);
5262 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
5263 struct kvm_enable_cap
*cap
)
5266 uint16_t vmcs_version
;
5267 void __user
*user_ptr
;
5273 case KVM_CAP_HYPERV_SYNIC2
:
5278 case KVM_CAP_HYPERV_SYNIC
:
5279 if (!irqchip_in_kernel(vcpu
->kvm
))
5281 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
5282 KVM_CAP_HYPERV_SYNIC2
);
5283 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
5284 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
5286 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
5288 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
5289 if (copy_to_user(user_ptr
, &vmcs_version
,
5290 sizeof(vmcs_version
)))
5294 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5295 if (!kvm_x86_ops
.enable_direct_tlbflush
)
5298 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
5300 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5301 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5303 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5304 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5305 if (vcpu
->arch
.pv_cpuid
.enforce
)
5306 kvm_update_pv_runtime(vcpu
);
5314 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5315 unsigned int ioctl
, unsigned long arg
)
5317 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5318 void __user
*argp
= (void __user
*)arg
;
5321 struct kvm_sregs2
*sregs2
;
5322 struct kvm_lapic_state
*lapic
;
5323 struct kvm_xsave
*xsave
;
5324 struct kvm_xcrs
*xcrs
;
5332 case KVM_GET_LAPIC
: {
5334 if (!lapic_in_kernel(vcpu
))
5336 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5337 GFP_KERNEL_ACCOUNT
);
5342 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5346 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5351 case KVM_SET_LAPIC
: {
5353 if (!lapic_in_kernel(vcpu
))
5355 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5356 if (IS_ERR(u
.lapic
)) {
5357 r
= PTR_ERR(u
.lapic
);
5361 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5364 case KVM_INTERRUPT
: {
5365 struct kvm_interrupt irq
;
5368 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5370 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5374 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5378 r
= kvm_vcpu_ioctl_smi(vcpu
);
5381 case KVM_SET_CPUID
: {
5382 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5383 struct kvm_cpuid cpuid
;
5386 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5388 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5391 case KVM_SET_CPUID2
: {
5392 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5393 struct kvm_cpuid2 cpuid
;
5396 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5398 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5399 cpuid_arg
->entries
);
5402 case KVM_GET_CPUID2
: {
5403 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5404 struct kvm_cpuid2 cpuid
;
5407 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5409 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5410 cpuid_arg
->entries
);
5414 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5419 case KVM_GET_MSRS
: {
5420 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5421 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5422 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5425 case KVM_SET_MSRS
: {
5426 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5427 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5428 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5431 case KVM_TPR_ACCESS_REPORTING
: {
5432 struct kvm_tpr_access_ctl tac
;
5435 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5437 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5441 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5446 case KVM_SET_VAPIC_ADDR
: {
5447 struct kvm_vapic_addr va
;
5451 if (!lapic_in_kernel(vcpu
))
5454 if (copy_from_user(&va
, argp
, sizeof(va
)))
5456 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5457 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5458 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5461 case KVM_X86_SETUP_MCE
: {
5465 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5467 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5470 case KVM_X86_SET_MCE
: {
5471 struct kvm_x86_mce mce
;
5474 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5476 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5479 case KVM_GET_VCPU_EVENTS
: {
5480 struct kvm_vcpu_events events
;
5482 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5485 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5490 case KVM_SET_VCPU_EVENTS
: {
5491 struct kvm_vcpu_events events
;
5494 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5497 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5500 case KVM_GET_DEBUGREGS
: {
5501 struct kvm_debugregs dbgregs
;
5503 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5506 if (copy_to_user(argp
, &dbgregs
,
5507 sizeof(struct kvm_debugregs
)))
5512 case KVM_SET_DEBUGREGS
: {
5513 struct kvm_debugregs dbgregs
;
5516 if (copy_from_user(&dbgregs
, argp
,
5517 sizeof(struct kvm_debugregs
)))
5520 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5523 case KVM_GET_XSAVE
: {
5525 if (vcpu
->arch
.guest_fpu
.uabi_size
> sizeof(struct kvm_xsave
))
5528 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5533 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5536 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5541 case KVM_SET_XSAVE
: {
5542 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
5544 u
.xsave
= memdup_user(argp
, size
);
5545 if (IS_ERR(u
.xsave
)) {
5546 r
= PTR_ERR(u
.xsave
);
5550 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5554 case KVM_GET_XSAVE2
: {
5555 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
5557 u
.xsave
= kzalloc(size
, GFP_KERNEL_ACCOUNT
);
5562 kvm_vcpu_ioctl_x86_get_xsave2(vcpu
, u
.buffer
, size
);
5565 if (copy_to_user(argp
, u
.xsave
, size
))
5572 case KVM_GET_XCRS
: {
5573 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5578 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5581 if (copy_to_user(argp
, u
.xcrs
,
5582 sizeof(struct kvm_xcrs
)))
5587 case KVM_SET_XCRS
: {
5588 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5589 if (IS_ERR(u
.xcrs
)) {
5590 r
= PTR_ERR(u
.xcrs
);
5594 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5597 case KVM_SET_TSC_KHZ
: {
5601 user_tsc_khz
= (u32
)arg
;
5603 if (kvm_has_tsc_control
&&
5604 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5607 if (user_tsc_khz
== 0)
5608 user_tsc_khz
= tsc_khz
;
5610 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5615 case KVM_GET_TSC_KHZ
: {
5616 r
= vcpu
->arch
.virtual_tsc_khz
;
5619 case KVM_KVMCLOCK_CTRL
: {
5620 r
= kvm_set_guest_paused(vcpu
);
5623 case KVM_ENABLE_CAP
: {
5624 struct kvm_enable_cap cap
;
5627 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5629 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5632 case KVM_GET_NESTED_STATE
: {
5633 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5637 if (!kvm_x86_ops
.nested_ops
->get_state
)
5640 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5642 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5645 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5650 if (r
> user_data_size
) {
5651 if (put_user(r
, &user_kvm_nested_state
->size
))
5661 case KVM_SET_NESTED_STATE
: {
5662 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5663 struct kvm_nested_state kvm_state
;
5667 if (!kvm_x86_ops
.nested_ops
->set_state
)
5671 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5675 if (kvm_state
.size
< sizeof(kvm_state
))
5678 if (kvm_state
.flags
&
5679 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5680 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5681 | KVM_STATE_NESTED_GIF_SET
))
5684 /* nested_run_pending implies guest_mode. */
5685 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5686 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5689 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5690 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5691 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5694 case KVM_GET_SUPPORTED_HV_CPUID
:
5695 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5697 #ifdef CONFIG_KVM_XEN
5698 case KVM_XEN_VCPU_GET_ATTR
: {
5699 struct kvm_xen_vcpu_attr xva
;
5702 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5704 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5705 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5709 case KVM_XEN_VCPU_SET_ATTR
: {
5710 struct kvm_xen_vcpu_attr xva
;
5713 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5715 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5719 case KVM_GET_SREGS2
: {
5720 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
5724 __get_sregs2(vcpu
, u
.sregs2
);
5726 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
5731 case KVM_SET_SREGS2
: {
5732 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
5733 if (IS_ERR(u
.sregs2
)) {
5734 r
= PTR_ERR(u
.sregs2
);
5738 r
= __set_sregs2(vcpu
, u
.sregs2
);
5741 case KVM_HAS_DEVICE_ATTR
:
5742 case KVM_GET_DEVICE_ATTR
:
5743 case KVM_SET_DEVICE_ATTR
:
5744 r
= kvm_vcpu_ioctl_device_attr(vcpu
, ioctl
, argp
);
5756 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5758 return VM_FAULT_SIGBUS
;
5761 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5765 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5767 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5771 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5774 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5777 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5778 unsigned long kvm_nr_mmu_pages
)
5780 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5783 mutex_lock(&kvm
->slots_lock
);
5785 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5786 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5788 mutex_unlock(&kvm
->slots_lock
);
5792 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5794 return kvm
->arch
.n_max_mmu_pages
;
5797 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5799 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5803 switch (chip
->chip_id
) {
5804 case KVM_IRQCHIP_PIC_MASTER
:
5805 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5806 sizeof(struct kvm_pic_state
));
5808 case KVM_IRQCHIP_PIC_SLAVE
:
5809 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5810 sizeof(struct kvm_pic_state
));
5812 case KVM_IRQCHIP_IOAPIC
:
5813 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5822 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5824 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5828 switch (chip
->chip_id
) {
5829 case KVM_IRQCHIP_PIC_MASTER
:
5830 spin_lock(&pic
->lock
);
5831 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5832 sizeof(struct kvm_pic_state
));
5833 spin_unlock(&pic
->lock
);
5835 case KVM_IRQCHIP_PIC_SLAVE
:
5836 spin_lock(&pic
->lock
);
5837 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5838 sizeof(struct kvm_pic_state
));
5839 spin_unlock(&pic
->lock
);
5841 case KVM_IRQCHIP_IOAPIC
:
5842 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5848 kvm_pic_update_irq(pic
);
5852 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5854 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5856 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5858 mutex_lock(&kps
->lock
);
5859 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5860 mutex_unlock(&kps
->lock
);
5864 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5867 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5869 mutex_lock(&pit
->pit_state
.lock
);
5870 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5871 for (i
= 0; i
< 3; i
++)
5872 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5873 mutex_unlock(&pit
->pit_state
.lock
);
5877 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5879 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5880 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5881 sizeof(ps
->channels
));
5882 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5883 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5884 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5888 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5892 u32 prev_legacy
, cur_legacy
;
5893 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5895 mutex_lock(&pit
->pit_state
.lock
);
5896 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5897 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5898 if (!prev_legacy
&& cur_legacy
)
5900 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5901 sizeof(pit
->pit_state
.channels
));
5902 pit
->pit_state
.flags
= ps
->flags
;
5903 for (i
= 0; i
< 3; i
++)
5904 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5906 mutex_unlock(&pit
->pit_state
.lock
);
5910 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5911 struct kvm_reinject_control
*control
)
5913 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5915 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5916 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5917 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5919 mutex_lock(&pit
->pit_state
.lock
);
5920 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5921 mutex_unlock(&pit
->pit_state
.lock
);
5926 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5930 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5931 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5932 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5935 struct kvm_vcpu
*vcpu
;
5938 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5939 kvm_vcpu_kick(vcpu
);
5942 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5945 if (!irqchip_in_kernel(kvm
))
5948 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5949 irq_event
->irq
, irq_event
->level
,
5954 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5955 struct kvm_enable_cap
*cap
)
5963 case KVM_CAP_DISABLE_QUIRKS2
:
5965 if (cap
->args
[0] & ~KVM_X86_VALID_QUIRKS
)
5968 case KVM_CAP_DISABLE_QUIRKS
:
5969 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5972 case KVM_CAP_SPLIT_IRQCHIP
: {
5973 mutex_lock(&kvm
->lock
);
5975 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5976 goto split_irqchip_unlock
;
5978 if (irqchip_in_kernel(kvm
))
5979 goto split_irqchip_unlock
;
5980 if (kvm
->created_vcpus
)
5981 goto split_irqchip_unlock
;
5982 r
= kvm_setup_empty_irq_routing(kvm
);
5984 goto split_irqchip_unlock
;
5985 /* Pairs with irqchip_in_kernel. */
5987 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5988 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5989 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
5991 split_irqchip_unlock
:
5992 mutex_unlock(&kvm
->lock
);
5995 case KVM_CAP_X2APIC_API
:
5997 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
6000 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
6001 kvm
->arch
.x2apic_format
= true;
6002 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
6003 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
6007 case KVM_CAP_X86_DISABLE_EXITS
:
6009 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
6012 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
6013 kvm_can_mwait_in_guest())
6014 kvm
->arch
.mwait_in_guest
= true;
6015 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
6016 kvm
->arch
.hlt_in_guest
= true;
6017 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
6018 kvm
->arch
.pause_in_guest
= true;
6019 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
6020 kvm
->arch
.cstate_in_guest
= true;
6023 case KVM_CAP_MSR_PLATFORM_INFO
:
6024 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
6027 case KVM_CAP_EXCEPTION_PAYLOAD
:
6028 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
6031 case KVM_CAP_X86_USER_SPACE_MSR
:
6032 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
6035 case KVM_CAP_X86_BUS_LOCK_EXIT
:
6037 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
6040 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
6041 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
6044 if (kvm_has_bus_lock_exit
&&
6045 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
6046 kvm
->arch
.bus_lock_detection_enabled
= true;
6049 #ifdef CONFIG_X86_SGX_KVM
6050 case KVM_CAP_SGX_ATTRIBUTE
: {
6051 unsigned long allowed_attributes
= 0;
6053 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
6057 /* KVM only supports the PROVISIONKEY privileged attribute. */
6058 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
6059 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
6060 kvm
->arch
.sgx_provisioning_allowed
= true;
6066 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
6068 if (!kvm_x86_ops
.vm_copy_enc_context_from
)
6071 r
= static_call(kvm_x86_vm_copy_enc_context_from
)(kvm
, cap
->args
[0]);
6073 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
6075 if (!kvm_x86_ops
.vm_move_enc_context_from
)
6078 r
= static_call(kvm_x86_vm_move_enc_context_from
)(kvm
, cap
->args
[0]);
6080 case KVM_CAP_EXIT_HYPERCALL
:
6081 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
6085 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
6088 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
6090 if (cap
->args
[0] & ~1)
6092 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
6095 case KVM_CAP_PMU_CAPABILITY
:
6097 if (!enable_pmu
|| (cap
->args
[0] & ~KVM_CAP_PMU_VALID_MASK
))
6100 mutex_lock(&kvm
->lock
);
6101 if (!kvm
->created_vcpus
) {
6102 kvm
->arch
.enable_pmu
= !(cap
->args
[0] & KVM_PMU_CAP_DISABLE
);
6105 mutex_unlock(&kvm
->lock
);
6114 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
6116 struct kvm_x86_msr_filter
*msr_filter
;
6118 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
6122 msr_filter
->default_allow
= default_allow
;
6126 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
6133 for (i
= 0; i
< msr_filter
->count
; i
++)
6134 kfree(msr_filter
->ranges
[i
].bitmap
);
6139 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
6140 struct kvm_msr_filter_range
*user_range
)
6142 unsigned long *bitmap
= NULL
;
6145 if (!user_range
->nmsrs
)
6148 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
6151 if (!user_range
->flags
)
6154 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
6155 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
6158 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
6160 return PTR_ERR(bitmap
);
6162 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
6163 .flags
= user_range
->flags
,
6164 .base
= user_range
->base
,
6165 .nmsrs
= user_range
->nmsrs
,
6169 msr_filter
->count
++;
6173 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
6175 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
6176 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
6177 struct kvm_msr_filter filter
;
6183 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
6186 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
6187 empty
&= !filter
.ranges
[i
].nmsrs
;
6189 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
6190 if (empty
&& !default_allow
)
6193 new_filter
= kvm_alloc_msr_filter(default_allow
);
6197 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
6198 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
6200 kvm_free_msr_filter(new_filter
);
6205 mutex_lock(&kvm
->lock
);
6207 /* The per-VM filter is protected by kvm->lock... */
6208 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
6210 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
6211 synchronize_srcu(&kvm
->srcu
);
6213 kvm_free_msr_filter(old_filter
);
6215 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
6216 mutex_unlock(&kvm
->lock
);
6221 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6222 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
6224 struct kvm_vcpu
*vcpu
;
6228 mutex_lock(&kvm
->lock
);
6229 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6230 if (!vcpu
->arch
.pv_time
.active
)
6233 ret
= kvm_set_guest_paused(vcpu
);
6235 kvm_err("Failed to pause guest VCPU%d: %d\n",
6236 vcpu
->vcpu_id
, ret
);
6240 mutex_unlock(&kvm
->lock
);
6242 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
6245 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
6248 case PM_HIBERNATION_PREPARE
:
6249 case PM_SUSPEND_PREPARE
:
6250 return kvm_arch_suspend_notifier(kvm
);
6255 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6257 static int kvm_vm_ioctl_get_clock(struct kvm
*kvm
, void __user
*argp
)
6259 struct kvm_clock_data data
= { 0 };
6261 get_kvmclock(kvm
, &data
);
6262 if (copy_to_user(argp
, &data
, sizeof(data
)))
6268 static int kvm_vm_ioctl_set_clock(struct kvm
*kvm
, void __user
*argp
)
6270 struct kvm_arch
*ka
= &kvm
->arch
;
6271 struct kvm_clock_data data
;
6274 if (copy_from_user(&data
, argp
, sizeof(data
)))
6278 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6279 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6281 if (data
.flags
& ~KVM_CLOCK_VALID_FLAGS
)
6284 kvm_hv_request_tsc_page_update(kvm
);
6285 kvm_start_pvclock_update(kvm
);
6286 pvclock_update_vm_gtod_copy(kvm
);
6289 * This pairs with kvm_guest_time_update(): when masterclock is
6290 * in use, we use master_kernel_ns + kvmclock_offset to set
6291 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6292 * is slightly ahead) here we risk going negative on unsigned
6293 * 'system_time' when 'data.clock' is very small.
6295 if (data
.flags
& KVM_CLOCK_REALTIME
) {
6296 u64 now_real_ns
= ktime_get_real_ns();
6299 * Avoid stepping the kvmclock backwards.
6301 if (now_real_ns
> data
.realtime
)
6302 data
.clock
+= now_real_ns
- data
.realtime
;
6305 if (ka
->use_master_clock
)
6306 now_raw_ns
= ka
->master_kernel_ns
;
6308 now_raw_ns
= get_kvmclock_base_ns();
6309 ka
->kvmclock_offset
= data
.clock
- now_raw_ns
;
6310 kvm_end_pvclock_update(kvm
);
6314 long kvm_arch_vm_ioctl(struct file
*filp
,
6315 unsigned int ioctl
, unsigned long arg
)
6317 struct kvm
*kvm
= filp
->private_data
;
6318 void __user
*argp
= (void __user
*)arg
;
6321 * This union makes it completely explicit to gcc-3.x
6322 * that these two variables' stack usage should be
6323 * combined, not added together.
6326 struct kvm_pit_state ps
;
6327 struct kvm_pit_state2 ps2
;
6328 struct kvm_pit_config pit_config
;
6332 case KVM_SET_TSS_ADDR
:
6333 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
6335 case KVM_SET_IDENTITY_MAP_ADDR
: {
6338 mutex_lock(&kvm
->lock
);
6340 if (kvm
->created_vcpus
)
6341 goto set_identity_unlock
;
6343 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
6344 goto set_identity_unlock
;
6345 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
6346 set_identity_unlock
:
6347 mutex_unlock(&kvm
->lock
);
6350 case KVM_SET_NR_MMU_PAGES
:
6351 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
6353 case KVM_GET_NR_MMU_PAGES
:
6354 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
6356 case KVM_CREATE_IRQCHIP
: {
6357 mutex_lock(&kvm
->lock
);
6360 if (irqchip_in_kernel(kvm
))
6361 goto create_irqchip_unlock
;
6364 if (kvm
->created_vcpus
)
6365 goto create_irqchip_unlock
;
6367 r
= kvm_pic_init(kvm
);
6369 goto create_irqchip_unlock
;
6371 r
= kvm_ioapic_init(kvm
);
6373 kvm_pic_destroy(kvm
);
6374 goto create_irqchip_unlock
;
6377 r
= kvm_setup_default_irq_routing(kvm
);
6379 kvm_ioapic_destroy(kvm
);
6380 kvm_pic_destroy(kvm
);
6381 goto create_irqchip_unlock
;
6383 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6385 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
6386 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
6387 create_irqchip_unlock
:
6388 mutex_unlock(&kvm
->lock
);
6391 case KVM_CREATE_PIT
:
6392 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
6394 case KVM_CREATE_PIT2
:
6396 if (copy_from_user(&u
.pit_config
, argp
,
6397 sizeof(struct kvm_pit_config
)))
6400 mutex_lock(&kvm
->lock
);
6403 goto create_pit_unlock
;
6405 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
6409 mutex_unlock(&kvm
->lock
);
6411 case KVM_GET_IRQCHIP
: {
6412 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6413 struct kvm_irqchip
*chip
;
6415 chip
= memdup_user(argp
, sizeof(*chip
));
6422 if (!irqchip_kernel(kvm
))
6423 goto get_irqchip_out
;
6424 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
6426 goto get_irqchip_out
;
6428 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
6429 goto get_irqchip_out
;
6435 case KVM_SET_IRQCHIP
: {
6436 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6437 struct kvm_irqchip
*chip
;
6439 chip
= memdup_user(argp
, sizeof(*chip
));
6446 if (!irqchip_kernel(kvm
))
6447 goto set_irqchip_out
;
6448 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
6455 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
6458 if (!kvm
->arch
.vpit
)
6460 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
6464 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
6471 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
6473 mutex_lock(&kvm
->lock
);
6475 if (!kvm
->arch
.vpit
)
6477 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
6479 mutex_unlock(&kvm
->lock
);
6482 case KVM_GET_PIT2
: {
6484 if (!kvm
->arch
.vpit
)
6486 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
6490 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
6495 case KVM_SET_PIT2
: {
6497 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
6499 mutex_lock(&kvm
->lock
);
6501 if (!kvm
->arch
.vpit
)
6503 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
6505 mutex_unlock(&kvm
->lock
);
6508 case KVM_REINJECT_CONTROL
: {
6509 struct kvm_reinject_control control
;
6511 if (copy_from_user(&control
, argp
, sizeof(control
)))
6514 if (!kvm
->arch
.vpit
)
6516 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
6519 case KVM_SET_BOOT_CPU_ID
:
6521 mutex_lock(&kvm
->lock
);
6522 if (kvm
->created_vcpus
)
6525 kvm
->arch
.bsp_vcpu_id
= arg
;
6526 mutex_unlock(&kvm
->lock
);
6528 #ifdef CONFIG_KVM_XEN
6529 case KVM_XEN_HVM_CONFIG
: {
6530 struct kvm_xen_hvm_config xhc
;
6532 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
6534 r
= kvm_xen_hvm_config(kvm
, &xhc
);
6537 case KVM_XEN_HVM_GET_ATTR
: {
6538 struct kvm_xen_hvm_attr xha
;
6541 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6543 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
6544 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
6548 case KVM_XEN_HVM_SET_ATTR
: {
6549 struct kvm_xen_hvm_attr xha
;
6552 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
6554 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
6557 case KVM_XEN_HVM_EVTCHN_SEND
: {
6558 struct kvm_irq_routing_xen_evtchn uxe
;
6561 if (copy_from_user(&uxe
, argp
, sizeof(uxe
)))
6563 r
= kvm_xen_hvm_evtchn_send(kvm
, &uxe
);
6568 r
= kvm_vm_ioctl_set_clock(kvm
, argp
);
6571 r
= kvm_vm_ioctl_get_clock(kvm
, argp
);
6573 case KVM_SET_TSC_KHZ
: {
6577 user_tsc_khz
= (u32
)arg
;
6579 if (kvm_has_tsc_control
&&
6580 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
6583 if (user_tsc_khz
== 0)
6584 user_tsc_khz
= tsc_khz
;
6586 WRITE_ONCE(kvm
->arch
.default_tsc_khz
, user_tsc_khz
);
6591 case KVM_GET_TSC_KHZ
: {
6592 r
= READ_ONCE(kvm
->arch
.default_tsc_khz
);
6595 case KVM_MEMORY_ENCRYPT_OP
: {
6597 if (!kvm_x86_ops
.mem_enc_ioctl
)
6600 r
= static_call(kvm_x86_mem_enc_ioctl
)(kvm
, argp
);
6603 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6604 struct kvm_enc_region region
;
6607 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6611 if (!kvm_x86_ops
.mem_enc_register_region
)
6614 r
= static_call(kvm_x86_mem_enc_register_region
)(kvm
, ®ion
);
6617 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6618 struct kvm_enc_region region
;
6621 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6625 if (!kvm_x86_ops
.mem_enc_unregister_region
)
6628 r
= static_call(kvm_x86_mem_enc_unregister_region
)(kvm
, ®ion
);
6631 case KVM_HYPERV_EVENTFD
: {
6632 struct kvm_hyperv_eventfd hvevfd
;
6635 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6637 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6640 case KVM_SET_PMU_EVENT_FILTER
:
6641 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6643 case KVM_X86_SET_MSR_FILTER
:
6644 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6653 static void kvm_init_msr_list(void)
6655 struct x86_pmu_capability x86_pmu
;
6659 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED
!= 3,
6660 "Please update the fixed PMCs in msrs_to_saved_all[]");
6662 perf_get_x86_pmu_capability(&x86_pmu
);
6664 num_msrs_to_save
= 0;
6665 num_emulated_msrs
= 0;
6666 num_msr_based_features
= 0;
6668 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6669 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6673 * Even MSRs that are valid in the host may not be exposed
6674 * to the guests in some cases.
6676 switch (msrs_to_save_all
[i
]) {
6677 case MSR_IA32_BNDCFGS
:
6678 if (!kvm_mpx_supported())
6682 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6683 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6686 case MSR_IA32_UMWAIT_CONTROL
:
6687 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6690 case MSR_IA32_RTIT_CTL
:
6691 case MSR_IA32_RTIT_STATUS
:
6692 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6695 case MSR_IA32_RTIT_CR3_MATCH
:
6696 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6697 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6700 case MSR_IA32_RTIT_OUTPUT_BASE
:
6701 case MSR_IA32_RTIT_OUTPUT_MASK
:
6702 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6703 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6704 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6707 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6708 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6709 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6710 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6713 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6714 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6715 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6718 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6719 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6720 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6724 case MSR_IA32_XFD_ERR
:
6725 if (!kvm_cpu_cap_has(X86_FEATURE_XFD
))
6732 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6735 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6736 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6739 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6742 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6743 struct kvm_msr_entry msr
;
6745 msr
.index
= msr_based_features_all
[i
];
6746 if (kvm_get_msr_feature(&msr
))
6749 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6753 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6761 if (!(lapic_in_kernel(vcpu
) &&
6762 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6763 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6774 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6781 if (!(lapic_in_kernel(vcpu
) &&
6782 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6784 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6786 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6796 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6797 struct kvm_segment
*var
, int seg
)
6799 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6802 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6803 struct kvm_segment
*var
, int seg
)
6805 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6808 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u64 access
,
6809 struct x86_exception
*exception
)
6811 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
6814 BUG_ON(!mmu_is_nested(vcpu
));
6816 /* NPT walks are always user-walks */
6817 access
|= PFERR_USER_MASK
;
6818 t_gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gpa
, access
, exception
);
6823 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6824 struct x86_exception
*exception
)
6826 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6828 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6829 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
6831 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6833 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6834 struct x86_exception
*exception
)
6836 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6838 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6839 access
|= PFERR_FETCH_MASK
;
6840 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
6843 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6844 struct x86_exception
*exception
)
6846 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6848 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6849 access
|= PFERR_WRITE_MASK
;
6850 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
6852 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6854 /* uses this to access any guest's mapped memory without checking CPL */
6855 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6856 struct x86_exception
*exception
)
6858 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6860 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, 0, exception
);
6863 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6864 struct kvm_vcpu
*vcpu
, u64 access
,
6865 struct x86_exception
*exception
)
6867 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6869 int r
= X86EMUL_CONTINUE
;
6872 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
6873 unsigned offset
= addr
& (PAGE_SIZE
-1);
6874 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6877 if (gpa
== UNMAPPED_GVA
)
6878 return X86EMUL_PROPAGATE_FAULT
;
6879 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6882 r
= X86EMUL_IO_NEEDED
;
6894 /* used for instruction fetching */
6895 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6896 gva_t addr
, void *val
, unsigned int bytes
,
6897 struct x86_exception
*exception
)
6899 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6900 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6901 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6905 /* Inline kvm_read_guest_virt_helper for speed. */
6906 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
|PFERR_FETCH_MASK
,
6908 if (unlikely(gpa
== UNMAPPED_GVA
))
6909 return X86EMUL_PROPAGATE_FAULT
;
6911 offset
= addr
& (PAGE_SIZE
-1);
6912 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6913 bytes
= (unsigned)PAGE_SIZE
- offset
;
6914 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6916 if (unlikely(ret
< 0))
6917 return X86EMUL_IO_NEEDED
;
6919 return X86EMUL_CONTINUE
;
6922 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6923 gva_t addr
, void *val
, unsigned int bytes
,
6924 struct x86_exception
*exception
)
6926 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6929 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6930 * is returned, but our callers are not ready for that and they blindly
6931 * call kvm_inject_page_fault. Ensure that they at least do not leak
6932 * uninitialized kernel stack memory into cr2 and error code.
6934 memset(exception
, 0, sizeof(*exception
));
6935 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6938 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6940 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6941 gva_t addr
, void *val
, unsigned int bytes
,
6942 struct x86_exception
*exception
, bool system
)
6944 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6948 access
|= PFERR_IMPLICIT_ACCESS
;
6949 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6950 access
|= PFERR_USER_MASK
;
6952 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6955 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6956 unsigned long addr
, void *val
, unsigned int bytes
)
6958 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6959 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6961 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6964 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6965 struct kvm_vcpu
*vcpu
, u64 access
,
6966 struct x86_exception
*exception
)
6968 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
6970 int r
= X86EMUL_CONTINUE
;
6973 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
6974 unsigned offset
= addr
& (PAGE_SIZE
-1);
6975 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6978 if (gpa
== UNMAPPED_GVA
)
6979 return X86EMUL_PROPAGATE_FAULT
;
6980 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6982 r
= X86EMUL_IO_NEEDED
;
6994 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6995 unsigned int bytes
, struct x86_exception
*exception
,
6998 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6999 u64 access
= PFERR_WRITE_MASK
;
7002 access
|= PFERR_IMPLICIT_ACCESS
;
7003 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7004 access
|= PFERR_USER_MASK
;
7006 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7010 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
7011 unsigned int bytes
, struct x86_exception
*exception
)
7013 /* kvm_write_guest_virt_system can pull in tons of pages. */
7014 vcpu
->arch
.l1tf_flush_l1d
= true;
7016 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7017 PFERR_WRITE_MASK
, exception
);
7019 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
7021 static int kvm_can_emulate_insn(struct kvm_vcpu
*vcpu
, int emul_type
,
7022 void *insn
, int insn_len
)
7024 return static_call(kvm_x86_can_emulate_instruction
)(vcpu
, emul_type
,
7028 int handle_ud(struct kvm_vcpu
*vcpu
)
7030 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
7031 int emul_type
= EMULTYPE_TRAP_UD
;
7032 char sig
[5]; /* ud2; .ascii "kvm" */
7033 struct x86_exception e
;
7035 if (unlikely(!kvm_can_emulate_insn(vcpu
, emul_type
, NULL
, 0)))
7038 if (force_emulation_prefix
&&
7039 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
7040 sig
, sizeof(sig
), &e
) == 0 &&
7041 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
7042 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
7043 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
7046 return kvm_emulate_instruction(vcpu
, emul_type
);
7048 EXPORT_SYMBOL_GPL(handle_ud
);
7050 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7051 gpa_t gpa
, bool write
)
7053 /* For APIC access vmexit */
7054 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7057 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
7058 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
7065 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7066 gpa_t
*gpa
, struct x86_exception
*exception
,
7069 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7070 u64 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
7071 | (write
? PFERR_WRITE_MASK
: 0);
7074 * currently PKRU is only applied to ept enabled guest so
7075 * there is no pkey in EPT page table for L1 guest or EPT
7076 * shadow page table for L2 guest.
7078 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
7079 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
7080 vcpu
->arch
.mmio_access
, 0, access
))) {
7081 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
7082 (gva
& (PAGE_SIZE
- 1));
7083 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
7087 *gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7089 if (*gpa
== UNMAPPED_GVA
)
7092 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
7095 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7096 const void *val
, int bytes
)
7100 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
7103 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
7107 struct read_write_emulator_ops
{
7108 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
7110 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7111 void *val
, int bytes
);
7112 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7113 int bytes
, void *val
);
7114 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7115 void *val
, int bytes
);
7119 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
7121 if (vcpu
->mmio_read_completed
) {
7122 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
7123 vcpu
->mmio_fragments
[0].gpa
, val
);
7124 vcpu
->mmio_read_completed
= 0;
7131 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7132 void *val
, int bytes
)
7134 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
7137 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7138 void *val
, int bytes
)
7140 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
7143 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
7145 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
7146 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
7149 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7150 void *val
, int bytes
)
7152 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
7153 return X86EMUL_IO_NEEDED
;
7156 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7157 void *val
, int bytes
)
7159 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
7161 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7162 return X86EMUL_CONTINUE
;
7165 static const struct read_write_emulator_ops read_emultor
= {
7166 .read_write_prepare
= read_prepare
,
7167 .read_write_emulate
= read_emulate
,
7168 .read_write_mmio
= vcpu_mmio_read
,
7169 .read_write_exit_mmio
= read_exit_mmio
,
7172 static const struct read_write_emulator_ops write_emultor
= {
7173 .read_write_emulate
= write_emulate
,
7174 .read_write_mmio
= write_mmio
,
7175 .read_write_exit_mmio
= write_exit_mmio
,
7179 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
7181 struct x86_exception
*exception
,
7182 struct kvm_vcpu
*vcpu
,
7183 const struct read_write_emulator_ops
*ops
)
7187 bool write
= ops
->write
;
7188 struct kvm_mmio_fragment
*frag
;
7189 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7192 * If the exit was due to a NPF we may already have a GPA.
7193 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7194 * Note, this cannot be used on string operations since string
7195 * operation using rep will only have the initial GPA from the NPF
7198 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
7199 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
7200 gpa
= ctxt
->gpa_val
;
7201 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
7203 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
7205 return X86EMUL_PROPAGATE_FAULT
;
7208 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
7209 return X86EMUL_CONTINUE
;
7212 * Is this MMIO handled locally?
7214 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
7215 if (handled
== bytes
)
7216 return X86EMUL_CONTINUE
;
7222 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
7223 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
7227 return X86EMUL_CONTINUE
;
7230 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
7232 void *val
, unsigned int bytes
,
7233 struct x86_exception
*exception
,
7234 const struct read_write_emulator_ops
*ops
)
7236 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7240 if (ops
->read_write_prepare
&&
7241 ops
->read_write_prepare(vcpu
, val
, bytes
))
7242 return X86EMUL_CONTINUE
;
7244 vcpu
->mmio_nr_fragments
= 0;
7246 /* Crossing a page boundary? */
7247 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
7250 now
= -addr
& ~PAGE_MASK
;
7251 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
7254 if (rc
!= X86EMUL_CONTINUE
)
7257 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
7263 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
7265 if (rc
!= X86EMUL_CONTINUE
)
7268 if (!vcpu
->mmio_nr_fragments
)
7271 gpa
= vcpu
->mmio_fragments
[0].gpa
;
7273 vcpu
->mmio_needed
= 1;
7274 vcpu
->mmio_cur_fragment
= 0;
7276 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
7277 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
7278 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
7279 vcpu
->run
->mmio
.phys_addr
= gpa
;
7281 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
7284 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
7288 struct x86_exception
*exception
)
7290 return emulator_read_write(ctxt
, addr
, val
, bytes
,
7291 exception
, &read_emultor
);
7294 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
7298 struct x86_exception
*exception
)
7300 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
7301 exception
, &write_emultor
);
7304 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7305 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7307 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
7312 struct x86_exception
*exception
)
7314 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7320 /* guests cmpxchg8b have to be emulated atomically */
7321 if (bytes
> 8 || (bytes
& (bytes
- 1)))
7324 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
7326 if (gpa
== UNMAPPED_GVA
||
7327 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7331 * Emulate the atomic as a straight write to avoid #AC if SLD is
7332 * enabled in the host and the access splits a cache line.
7334 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
7335 page_line_mask
= ~(cache_line_size() - 1);
7337 page_line_mask
= PAGE_MASK
;
7339 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
7342 hva
= kvm_vcpu_gfn_to_hva(vcpu
, gpa_to_gfn(gpa
));
7343 if (kvm_is_error_hva(hva
))
7346 hva
+= offset_in_page(gpa
);
7350 r
= emulator_try_cmpxchg_user(u8
, hva
, old
, new);
7353 r
= emulator_try_cmpxchg_user(u16
, hva
, old
, new);
7356 r
= emulator_try_cmpxchg_user(u32
, hva
, old
, new);
7359 r
= emulator_try_cmpxchg_user(u64
, hva
, old
, new);
7366 return X86EMUL_UNHANDLEABLE
;
7368 return X86EMUL_CMPXCHG_FAILED
;
7370 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
7372 return X86EMUL_CONTINUE
;
7375 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
7377 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
7380 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
7384 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
7385 if (vcpu
->arch
.pio
.in
)
7386 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
7387 vcpu
->arch
.pio
.size
, pd
);
7389 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
7390 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
7394 pd
+= vcpu
->arch
.pio
.size
;
7399 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
7400 unsigned short port
,
7401 unsigned int count
, bool in
)
7403 vcpu
->arch
.pio
.port
= port
;
7404 vcpu
->arch
.pio
.in
= in
;
7405 vcpu
->arch
.pio
.count
= count
;
7406 vcpu
->arch
.pio
.size
= size
;
7408 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
7411 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
7412 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
7413 vcpu
->run
->io
.size
= size
;
7414 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
7415 vcpu
->run
->io
.count
= count
;
7416 vcpu
->run
->io
.port
= port
;
7421 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7422 unsigned short port
, unsigned int count
)
7424 WARN_ON(vcpu
->arch
.pio
.count
);
7425 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
7426 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
7429 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
7431 int size
= vcpu
->arch
.pio
.size
;
7432 unsigned count
= vcpu
->arch
.pio
.count
;
7433 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
7434 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
7435 vcpu
->arch
.pio
.count
= 0;
7438 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7439 unsigned short port
, void *val
, unsigned int count
)
7441 if (vcpu
->arch
.pio
.count
) {
7443 * Complete a previous iteration that required userspace I/O.
7444 * Note, @count isn't guaranteed to match pio.count as userspace
7445 * can modify ECX before rerunning the vCPU. Ignore any such
7446 * shenanigans as KVM doesn't support modifying the rep count,
7447 * and the emulator ensures @count doesn't overflow the buffer.
7450 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
7454 /* Results already available, fall through. */
7457 complete_emulator_pio_in(vcpu
, val
);
7461 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
7462 int size
, unsigned short port
, void *val
,
7465 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7469 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7470 unsigned short port
, const void *val
,
7475 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
7476 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
7477 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
7479 vcpu
->arch
.pio
.count
= 0;
7484 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
7485 int size
, unsigned short port
,
7486 const void *val
, unsigned int count
)
7488 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
7491 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
7493 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
7496 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
7498 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
7501 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
7503 if (!need_emulate_wbinvd(vcpu
))
7504 return X86EMUL_CONTINUE
;
7506 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
7507 int cpu
= get_cpu();
7509 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
7510 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
7511 wbinvd_ipi
, NULL
, 1);
7513 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
7516 return X86EMUL_CONTINUE
;
7519 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
7521 kvm_emulate_wbinvd_noskip(vcpu
);
7522 return kvm_skip_emulated_instruction(vcpu
);
7524 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
7528 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
7530 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
7533 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7534 unsigned long *dest
)
7536 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
7539 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
7540 unsigned long value
)
7543 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
7546 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
7548 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
7551 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
7553 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7554 unsigned long value
;
7558 value
= kvm_read_cr0(vcpu
);
7561 value
= vcpu
->arch
.cr2
;
7564 value
= kvm_read_cr3(vcpu
);
7567 value
= kvm_read_cr4(vcpu
);
7570 value
= kvm_get_cr8(vcpu
);
7573 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7580 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
7582 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7587 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
7590 vcpu
->arch
.cr2
= val
;
7593 res
= kvm_set_cr3(vcpu
, val
);
7596 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
7599 res
= kvm_set_cr8(vcpu
, val
);
7602 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7609 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7611 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7614 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7616 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7619 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7621 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7624 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7626 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7629 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7631 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7634 static unsigned long emulator_get_cached_segment_base(
7635 struct x86_emulate_ctxt
*ctxt
, int seg
)
7637 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7640 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7641 struct desc_struct
*desc
, u32
*base3
,
7644 struct kvm_segment var
;
7646 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7647 *selector
= var
.selector
;
7650 memset(desc
, 0, sizeof(*desc
));
7658 set_desc_limit(desc
, var
.limit
);
7659 set_desc_base(desc
, (unsigned long)var
.base
);
7660 #ifdef CONFIG_X86_64
7662 *base3
= var
.base
>> 32;
7664 desc
->type
= var
.type
;
7666 desc
->dpl
= var
.dpl
;
7667 desc
->p
= var
.present
;
7668 desc
->avl
= var
.avl
;
7676 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7677 struct desc_struct
*desc
, u32 base3
,
7680 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7681 struct kvm_segment var
;
7683 var
.selector
= selector
;
7684 var
.base
= get_desc_base(desc
);
7685 #ifdef CONFIG_X86_64
7686 var
.base
|= ((u64
)base3
) << 32;
7688 var
.limit
= get_desc_limit(desc
);
7690 var
.limit
= (var
.limit
<< 12) | 0xfff;
7691 var
.type
= desc
->type
;
7692 var
.dpl
= desc
->dpl
;
7697 var
.avl
= desc
->avl
;
7698 var
.present
= desc
->p
;
7699 var
.unusable
= !var
.present
;
7702 kvm_set_segment(vcpu
, &var
, seg
);
7706 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
7707 u32 msr_index
, u64
*pdata
)
7709 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7712 r
= kvm_get_msr_with_filter(vcpu
, msr_index
, pdata
);
7714 if (r
&& kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_RDMSR
, 0,
7715 complete_emulated_rdmsr
, r
)) {
7716 /* Bounce to user space */
7717 return X86EMUL_IO_NEEDED
;
7723 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
7724 u32 msr_index
, u64 data
)
7726 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7729 r
= kvm_set_msr_with_filter(vcpu
, msr_index
, data
);
7731 if (r
&& kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_WRMSR
, data
,
7732 complete_emulated_msr_access
, r
)) {
7733 /* Bounce to user space */
7734 return X86EMUL_IO_NEEDED
;
7740 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7741 u32 msr_index
, u64
*pdata
)
7743 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
7746 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7747 u32 msr_index
, u64 data
)
7749 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
7752 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7754 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7756 return vcpu
->arch
.smbase
;
7759 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7761 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7763 vcpu
->arch
.smbase
= smbase
;
7766 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7769 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
))
7774 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7775 u32 pmc
, u64
*pdata
)
7777 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7780 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7782 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7785 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7786 struct x86_instruction_info
*info
,
7787 enum x86_intercept_stage stage
)
7789 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7793 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7794 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7797 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7800 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7802 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7805 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7807 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7810 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7812 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7815 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt
*ctxt
)
7817 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_RDPID
);
7820 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7822 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7825 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7827 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7830 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7832 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7835 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7837 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7840 static void emulator_exiting_smm(struct x86_emulate_ctxt
*ctxt
)
7842 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7844 kvm_smm_changed(vcpu
, false);
7847 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7848 const char *smstate
)
7850 return static_call(kvm_x86_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7853 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
7855 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
7858 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7860 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7863 static const struct x86_emulate_ops emulate_ops
= {
7864 .read_gpr
= emulator_read_gpr
,
7865 .write_gpr
= emulator_write_gpr
,
7866 .read_std
= emulator_read_std
,
7867 .write_std
= emulator_write_std
,
7868 .read_phys
= kvm_read_guest_phys_system
,
7869 .fetch
= kvm_fetch_guest_virt
,
7870 .read_emulated
= emulator_read_emulated
,
7871 .write_emulated
= emulator_write_emulated
,
7872 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7873 .invlpg
= emulator_invlpg
,
7874 .pio_in_emulated
= emulator_pio_in_emulated
,
7875 .pio_out_emulated
= emulator_pio_out_emulated
,
7876 .get_segment
= emulator_get_segment
,
7877 .set_segment
= emulator_set_segment
,
7878 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7879 .get_gdt
= emulator_get_gdt
,
7880 .get_idt
= emulator_get_idt
,
7881 .set_gdt
= emulator_set_gdt
,
7882 .set_idt
= emulator_set_idt
,
7883 .get_cr
= emulator_get_cr
,
7884 .set_cr
= emulator_set_cr
,
7885 .cpl
= emulator_get_cpl
,
7886 .get_dr
= emulator_get_dr
,
7887 .set_dr
= emulator_set_dr
,
7888 .get_smbase
= emulator_get_smbase
,
7889 .set_smbase
= emulator_set_smbase
,
7890 .set_msr_with_filter
= emulator_set_msr_with_filter
,
7891 .get_msr_with_filter
= emulator_get_msr_with_filter
,
7892 .set_msr
= emulator_set_msr
,
7893 .get_msr
= emulator_get_msr
,
7894 .check_pmc
= emulator_check_pmc
,
7895 .read_pmc
= emulator_read_pmc
,
7896 .halt
= emulator_halt
,
7897 .wbinvd
= emulator_wbinvd
,
7898 .fix_hypercall
= emulator_fix_hypercall
,
7899 .intercept
= emulator_intercept
,
7900 .get_cpuid
= emulator_get_cpuid
,
7901 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7902 .guest_has_movbe
= emulator_guest_has_movbe
,
7903 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7904 .guest_has_rdpid
= emulator_guest_has_rdpid
,
7905 .set_nmi_mask
= emulator_set_nmi_mask
,
7906 .get_hflags
= emulator_get_hflags
,
7907 .exiting_smm
= emulator_exiting_smm
,
7908 .leave_smm
= emulator_leave_smm
,
7909 .triple_fault
= emulator_triple_fault
,
7910 .set_xcr
= emulator_set_xcr
,
7913 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7915 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7917 * an sti; sti; sequence only disable interrupts for the first
7918 * instruction. So, if the last instruction, be it emulated or
7919 * not, left the system with the INT_STI flag enabled, it
7920 * means that the last instruction is an sti. We should not
7921 * leave the flag on in this case. The same goes for mov ss
7923 if (int_shadow
& mask
)
7925 if (unlikely(int_shadow
|| mask
)) {
7926 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7928 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7932 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7934 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7935 if (ctxt
->exception
.vector
== PF_VECTOR
)
7936 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7938 if (ctxt
->exception
.error_code_valid
)
7939 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7940 ctxt
->exception
.error_code
);
7942 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7946 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7948 struct x86_emulate_ctxt
*ctxt
;
7950 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7952 pr_err("kvm: failed to allocate vcpu's emulator\n");
7957 ctxt
->ops
= &emulate_ops
;
7958 vcpu
->arch
.emulate_ctxt
= ctxt
;
7963 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7965 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7968 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7970 ctxt
->gpa_available
= false;
7971 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7972 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7974 ctxt
->eip
= kvm_rip_read(vcpu
);
7975 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7976 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7977 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7978 cs_db
? X86EMUL_MODE_PROT32
:
7979 X86EMUL_MODE_PROT16
;
7980 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7981 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7982 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7984 ctxt
->interruptibility
= 0;
7985 ctxt
->have_exception
= false;
7986 ctxt
->exception
.vector
= -1;
7987 ctxt
->perm_ok
= false;
7989 init_decode_cache(ctxt
);
7990 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7993 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7995 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7998 init_emulate_ctxt(vcpu
);
8002 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
8003 ret
= emulate_int_real(ctxt
, irq
);
8005 if (ret
!= X86EMUL_CONTINUE
) {
8006 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
8008 ctxt
->eip
= ctxt
->_eip
;
8009 kvm_rip_write(vcpu
, ctxt
->eip
);
8010 kvm_set_rflags(vcpu
, ctxt
->eflags
);
8013 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
8015 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8016 u8 ndata
, u8
*insn_bytes
, u8 insn_size
)
8018 struct kvm_run
*run
= vcpu
->run
;
8023 * Zero the whole array used to retrieve the exit info, as casting to
8024 * u32 for select entries will leave some chunks uninitialized.
8026 memset(&info
, 0, sizeof(info
));
8028 static_call(kvm_x86_get_exit_info
)(vcpu
, (u32
*)&info
[0], &info
[1],
8029 &info
[2], (u32
*)&info
[3],
8032 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
8033 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
8036 * There's currently space for 13 entries, but 5 are used for the exit
8037 * reason and info. Restrict to 4 to reduce the maintenance burden
8038 * when expanding kvm_run.emulation_failure in the future.
8040 if (WARN_ON_ONCE(ndata
> 4))
8043 /* Always include the flags as a 'data' entry. */
8045 run
->emulation_failure
.flags
= 0;
8048 BUILD_BUG_ON((sizeof(run
->emulation_failure
.insn_size
) +
8049 sizeof(run
->emulation_failure
.insn_bytes
) != 16));
8051 run
->emulation_failure
.flags
|=
8052 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
8053 run
->emulation_failure
.insn_size
= insn_size
;
8054 memset(run
->emulation_failure
.insn_bytes
, 0x90,
8055 sizeof(run
->emulation_failure
.insn_bytes
));
8056 memcpy(run
->emulation_failure
.insn_bytes
, insn_bytes
, insn_size
);
8059 memcpy(&run
->internal
.data
[info_start
], info
, sizeof(info
));
8060 memcpy(&run
->internal
.data
[info_start
+ ARRAY_SIZE(info
)], data
,
8061 ndata
* sizeof(data
[0]));
8063 run
->emulation_failure
.ndata
= info_start
+ ARRAY_SIZE(info
) + ndata
;
8066 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu
*vcpu
)
8068 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8070 prepare_emulation_failure_exit(vcpu
, NULL
, 0, ctxt
->fetch
.data
,
8071 ctxt
->fetch
.end
- ctxt
->fetch
.data
);
8074 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8077 prepare_emulation_failure_exit(vcpu
, data
, ndata
, NULL
, 0);
8079 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit
);
8081 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
8083 __kvm_prepare_emulation_failure_exit(vcpu
, NULL
, 0);
8085 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit
);
8087 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
8089 struct kvm
*kvm
= vcpu
->kvm
;
8091 ++vcpu
->stat
.insn_emulation_fail
;
8092 trace_kvm_emulate_insn_failed(vcpu
);
8094 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
8095 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
8099 if (kvm
->arch
.exit_on_emulation_error
||
8100 (emulation_type
& EMULTYPE_SKIP
)) {
8101 prepare_emulation_ctxt_failure_exit(vcpu
);
8105 kvm_queue_exception(vcpu
, UD_VECTOR
);
8107 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
8108 prepare_emulation_ctxt_failure_exit(vcpu
);
8115 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
8116 bool write_fault_to_shadow_pgtable
,
8119 gpa_t gpa
= cr2_or_gpa
;
8122 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8125 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8126 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8129 if (!vcpu
->arch
.mmu
->root_role
.direct
) {
8131 * Write permission should be allowed since only
8132 * write access need to be emulated.
8134 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8137 * If the mapping is invalid in guest, let cpu retry
8138 * it to generate fault.
8140 if (gpa
== UNMAPPED_GVA
)
8145 * Do not retry the unhandleable instruction if it faults on the
8146 * readonly host memory, otherwise it will goto a infinite loop:
8147 * retry instruction -> write #PF -> emulation fail -> retry
8148 * instruction -> ...
8150 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
8153 * If the instruction failed on the error pfn, it can not be fixed,
8154 * report the error to userspace.
8156 if (is_error_noslot_pfn(pfn
))
8159 kvm_release_pfn_clean(pfn
);
8161 /* The instructions are well-emulated on direct mmu. */
8162 if (vcpu
->arch
.mmu
->root_role
.direct
) {
8163 unsigned int indirect_shadow_pages
;
8165 write_lock(&vcpu
->kvm
->mmu_lock
);
8166 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
8167 write_unlock(&vcpu
->kvm
->mmu_lock
);
8169 if (indirect_shadow_pages
)
8170 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8176 * if emulation was due to access to shadowed page table
8177 * and it failed try to unshadow page and re-enter the
8178 * guest to let CPU execute the instruction.
8180 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8183 * If the access faults on its page table, it can not
8184 * be fixed by unprotecting shadow page and it should
8185 * be reported to userspace.
8187 return !write_fault_to_shadow_pgtable
;
8190 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
8191 gpa_t cr2_or_gpa
, int emulation_type
)
8193 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8194 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
8196 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
8197 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
8200 * If the emulation is caused by #PF and it is non-page_table
8201 * writing instruction, it means the VM-EXIT is caused by shadow
8202 * page protected, we can zap the shadow page and retry this
8203 * instruction directly.
8205 * Note: if the guest uses a non-page-table modifying instruction
8206 * on the PDE that points to the instruction, then we will unmap
8207 * the instruction and go to an infinite loop. So, we cache the
8208 * last retried eip and the last fault address, if we meet the eip
8209 * and the address again, we can break out of the potential infinite
8212 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
8214 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8217 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8218 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8221 if (x86_page_table_writing_insn(ctxt
))
8224 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
8227 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
8228 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
8230 if (!vcpu
->arch
.mmu
->root_role
.direct
)
8231 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8233 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8238 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
8239 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
8241 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
, bool entering_smm
)
8243 trace_kvm_smm_transition(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, entering_smm
);
8246 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
8248 vcpu
->arch
.hflags
&= ~(HF_SMM_MASK
| HF_SMM_INSIDE_NMI_MASK
);
8250 /* Process a latched INIT or SMI, if any. */
8251 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8254 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8255 * on SMM exit we still need to reload them from
8258 vcpu
->arch
.pdptrs_from_userspace
= false;
8261 kvm_mmu_reset_context(vcpu
);
8264 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
8273 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
8274 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
8279 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
8281 struct kvm_run
*kvm_run
= vcpu
->run
;
8283 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
8284 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
8285 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
8286 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8287 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8290 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
8294 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
8296 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8299 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
8303 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
8306 * rflags is the old, "raw" value of the flags. The new value has
8307 * not been saved yet.
8309 * This is correct even for TF set by the guest, because "the
8310 * processor will not generate this exception after the instruction
8311 * that sets the TF flag".
8313 if (unlikely(rflags
& X86_EFLAGS_TF
))
8314 r
= kvm_vcpu_do_singlestep(vcpu
);
8317 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
8319 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
8321 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
8322 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
8323 struct kvm_run
*kvm_run
= vcpu
->run
;
8324 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8325 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8326 vcpu
->arch
.guest_debug_dr7
,
8330 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
8331 kvm_run
->debug
.arch
.pc
= eip
;
8332 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8333 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8339 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
8340 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
8341 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8342 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8347 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
8356 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
8358 switch (ctxt
->opcode_len
) {
8365 case 0xe6: /* OUT */
8369 case 0x6c: /* INS */
8371 case 0x6e: /* OUTS */
8378 case 0x33: /* RDPMC */
8388 * Decode an instruction for emulation. The caller is responsible for handling
8389 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8390 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8391 * code breakpoints have higher priority and thus have already been done by
8394 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8395 * response to a machine check.
8397 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
8398 void *insn
, int insn_len
)
8400 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8403 init_emulate_ctxt(vcpu
);
8405 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
8407 trace_kvm_emulate_insn_start(vcpu
);
8408 ++vcpu
->stat
.insn_emulation
;
8412 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
8414 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
8415 int emulation_type
, void *insn
, int insn_len
)
8418 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8419 bool writeback
= true;
8420 bool write_fault_to_spt
;
8422 if (unlikely(!kvm_can_emulate_insn(vcpu
, emulation_type
, insn
, insn_len
)))
8425 vcpu
->arch
.l1tf_flush_l1d
= true;
8428 * Clear write_fault_to_shadow_pgtable here to ensure it is
8431 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
8432 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
8434 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
8435 kvm_clear_exception_queue(vcpu
);
8438 * Return immediately if RIP hits a code breakpoint, such #DBs
8439 * are fault-like and are higher priority than any faults on
8440 * the code fetch itself.
8442 if (!(emulation_type
& EMULTYPE_SKIP
) &&
8443 kvm_vcpu_check_code_breakpoint(vcpu
, &r
))
8446 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
8448 if (r
!= EMULATION_OK
) {
8449 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
8450 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
8451 kvm_queue_exception(vcpu
, UD_VECTOR
);
8454 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
8458 if (ctxt
->have_exception
) {
8460 * #UD should result in just EMULATION_FAILED, and trap-like
8461 * exception should not be encountered during decode.
8463 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
8464 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
8465 inject_emulated_exception(vcpu
);
8468 return handle_emulation_failure(vcpu
, emulation_type
);
8472 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
8473 !is_vmware_backdoor_opcode(ctxt
)) {
8474 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
8479 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8480 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8481 * The caller is responsible for updating interruptibility state and
8482 * injecting single-step #DBs.
8484 if (emulation_type
& EMULTYPE_SKIP
) {
8485 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
8486 ctxt
->eip
= (u32
)ctxt
->_eip
;
8488 ctxt
->eip
= ctxt
->_eip
;
8490 if (emulation_type
& EMULTYPE_COMPLETE_USER_EXIT
) {
8495 kvm_rip_write(vcpu
, ctxt
->eip
);
8496 if (ctxt
->eflags
& X86_EFLAGS_RF
)
8497 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
8501 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
8504 /* this is needed for vmware backdoor interface to work since it
8505 changes registers values during IO operation */
8506 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
8507 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8508 emulator_invalidate_register_cache(ctxt
);
8512 if (emulation_type
& EMULTYPE_PF
) {
8513 /* Save the faulting GPA (cr2) in the address field */
8514 ctxt
->exception
.address
= cr2_or_gpa
;
8516 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8517 if (vcpu
->arch
.mmu
->root_role
.direct
) {
8518 ctxt
->gpa_available
= true;
8519 ctxt
->gpa_val
= cr2_or_gpa
;
8522 /* Sanitize the address out of an abundance of paranoia. */
8523 ctxt
->exception
.address
= 0;
8526 r
= x86_emulate_insn(ctxt
);
8528 if (r
== EMULATION_INTERCEPTED
)
8531 if (r
== EMULATION_FAILED
) {
8532 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
8536 return handle_emulation_failure(vcpu
, emulation_type
);
8539 if (ctxt
->have_exception
) {
8541 if (inject_emulated_exception(vcpu
))
8543 } else if (vcpu
->arch
.pio
.count
) {
8544 if (!vcpu
->arch
.pio
.in
) {
8545 /* FIXME: return into emulator if single-stepping. */
8546 vcpu
->arch
.pio
.count
= 0;
8549 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
8552 } else if (vcpu
->mmio_needed
) {
8553 ++vcpu
->stat
.mmio_exits
;
8555 if (!vcpu
->mmio_is_write
)
8558 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8559 } else if (vcpu
->arch
.complete_userspace_io
) {
8562 } else if (r
== EMULATION_RESTART
)
8569 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8570 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
8571 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8572 if (!ctxt
->have_exception
||
8573 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
8574 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
8575 if (ctxt
->is_branch
)
8576 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_BRANCH_INSTRUCTIONS
);
8577 kvm_rip_write(vcpu
, ctxt
->eip
);
8578 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
8579 r
= kvm_vcpu_do_singlestep(vcpu
);
8580 static_call_cond(kvm_x86_update_emulated_instruction
)(vcpu
);
8581 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
8585 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8586 * do nothing, and it will be requested again as soon as
8587 * the shadow expires. But we still need to check here,
8588 * because POPF has no interrupt shadow.
8590 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
8591 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8593 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
8598 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
8600 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
8602 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
8604 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
8605 void *insn
, int insn_len
)
8607 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
8609 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
8611 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
8613 vcpu
->arch
.pio
.count
= 0;
8617 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
8619 vcpu
->arch
.pio
.count
= 0;
8621 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
8624 return kvm_skip_emulated_instruction(vcpu
);
8627 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8628 unsigned short port
)
8630 unsigned long val
= kvm_rax_read(vcpu
);
8631 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
8637 * Workaround userspace that relies on old KVM behavior of %rip being
8638 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8641 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
8642 vcpu
->arch
.complete_userspace_io
=
8643 complete_fast_pio_out_port_0x7e
;
8644 kvm_skip_emulated_instruction(vcpu
);
8646 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8647 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
8652 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
8656 /* We should only ever be called with arch.pio.count equal to 1 */
8657 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
8659 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
8660 vcpu
->arch
.pio
.count
= 0;
8664 /* For size less than 4 we merge, else we zero extend */
8665 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
8668 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8669 * the copy and tracing
8671 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
8672 kvm_rax_write(vcpu
, val
);
8674 return kvm_skip_emulated_instruction(vcpu
);
8677 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8678 unsigned short port
)
8683 /* For size less than 4 we merge, else we zero extend */
8684 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
8686 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
8688 kvm_rax_write(vcpu
, val
);
8692 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
8693 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
8698 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
8703 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
8705 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
8706 return ret
&& kvm_skip_emulated_instruction(vcpu
);
8708 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
8710 static int kvmclock_cpu_down_prep(unsigned int cpu
)
8712 __this_cpu_write(cpu_tsc_khz
, 0);
8716 static void tsc_khz_changed(void *data
)
8718 struct cpufreq_freqs
*freq
= data
;
8719 unsigned long khz
= 0;
8723 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8724 khz
= cpufreq_quick_get(raw_smp_processor_id());
8727 __this_cpu_write(cpu_tsc_khz
, khz
);
8730 #ifdef CONFIG_X86_64
8731 static void kvm_hyperv_tsc_notifier(void)
8736 mutex_lock(&kvm_lock
);
8737 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8738 kvm_make_mclock_inprogress_request(kvm
);
8740 /* no guest entries from this point */
8741 hyperv_stop_tsc_emulation();
8743 /* TSC frequency always matches when on Hyper-V */
8744 for_each_present_cpu(cpu
)
8745 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8746 kvm_max_guest_tsc_khz
= tsc_khz
;
8748 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8749 __kvm_start_pvclock_update(kvm
);
8750 pvclock_update_vm_gtod_copy(kvm
);
8751 kvm_end_pvclock_update(kvm
);
8754 mutex_unlock(&kvm_lock
);
8758 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8761 struct kvm_vcpu
*vcpu
;
8766 * We allow guests to temporarily run on slowing clocks,
8767 * provided we notify them after, or to run on accelerating
8768 * clocks, provided we notify them before. Thus time never
8771 * However, we have a problem. We can't atomically update
8772 * the frequency of a given CPU from this function; it is
8773 * merely a notifier, which can be called from any CPU.
8774 * Changing the TSC frequency at arbitrary points in time
8775 * requires a recomputation of local variables related to
8776 * the TSC for each VCPU. We must flag these local variables
8777 * to be updated and be sure the update takes place with the
8778 * new frequency before any guests proceed.
8780 * Unfortunately, the combination of hotplug CPU and frequency
8781 * change creates an intractable locking scenario; the order
8782 * of when these callouts happen is undefined with respect to
8783 * CPU hotplug, and they can race with each other. As such,
8784 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8785 * undefined; you can actually have a CPU frequency change take
8786 * place in between the computation of X and the setting of the
8787 * variable. To protect against this problem, all updates of
8788 * the per_cpu tsc_khz variable are done in an interrupt
8789 * protected IPI, and all callers wishing to update the value
8790 * must wait for a synchronous IPI to complete (which is trivial
8791 * if the caller is on the CPU already). This establishes the
8792 * necessary total order on variable updates.
8794 * Note that because a guest time update may take place
8795 * anytime after the setting of the VCPU's request bit, the
8796 * correct TSC value must be set before the request. However,
8797 * to ensure the update actually makes it to any guest which
8798 * starts running in hardware virtualization between the set
8799 * and the acquisition of the spinlock, we must also ping the
8800 * CPU after setting the request bit.
8804 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8806 mutex_lock(&kvm_lock
);
8807 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8808 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8809 if (vcpu
->cpu
!= cpu
)
8811 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8812 if (vcpu
->cpu
!= raw_smp_processor_id())
8816 mutex_unlock(&kvm_lock
);
8818 if (freq
->old
< freq
->new && send_ipi
) {
8820 * We upscale the frequency. Must make the guest
8821 * doesn't see old kvmclock values while running with
8822 * the new frequency, otherwise we risk the guest sees
8823 * time go backwards.
8825 * In case we update the frequency for another cpu
8826 * (which might be in guest context) send an interrupt
8827 * to kick the cpu out of guest context. Next time
8828 * guest context is entered kvmclock will be updated,
8829 * so the guest will not see stale values.
8831 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8835 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8838 struct cpufreq_freqs
*freq
= data
;
8841 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8843 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8846 for_each_cpu(cpu
, freq
->policy
->cpus
)
8847 __kvmclock_cpufreq_notifier(freq
, cpu
);
8852 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8853 .notifier_call
= kvmclock_cpufreq_notifier
8856 static int kvmclock_cpu_online(unsigned int cpu
)
8858 tsc_khz_changed(NULL
);
8862 static void kvm_timer_init(void)
8864 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8865 max_tsc_khz
= tsc_khz
;
8867 if (IS_ENABLED(CONFIG_CPU_FREQ
)) {
8868 struct cpufreq_policy
*policy
;
8872 policy
= cpufreq_cpu_get(cpu
);
8874 if (policy
->cpuinfo
.max_freq
)
8875 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8876 cpufreq_cpu_put(policy
);
8880 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8881 CPUFREQ_TRANSITION_NOTIFIER
);
8884 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8885 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8888 #ifdef CONFIG_X86_64
8889 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8892 struct kvm_vcpu
*vcpu
;
8895 mutex_lock(&kvm_lock
);
8896 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8897 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8898 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8899 atomic_set(&kvm_guest_has_master_clock
, 0);
8900 mutex_unlock(&kvm_lock
);
8903 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8906 * Indirection to move queue_work() out of the tk_core.seq write held
8907 * region to prevent possible deadlocks against time accessors which
8908 * are invoked with work related locks held.
8910 static void pvclock_irq_work_fn(struct irq_work
*w
)
8912 queue_work(system_long_wq
, &pvclock_gtod_work
);
8915 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8918 * Notification about pvclock gtod data update.
8920 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8923 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8924 struct timekeeper
*tk
= priv
;
8926 update_pvclock_gtod(tk
);
8929 * Disable master clock if host does not trust, or does not use,
8930 * TSC based clocksource. Delegate queue_work() to irq_work as
8931 * this is invoked with tk_core.seq write held.
8933 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8934 atomic_read(&kvm_guest_has_master_clock
) != 0)
8935 irq_work_queue(&pvclock_irq_work
);
8939 static struct notifier_block pvclock_gtod_notifier
= {
8940 .notifier_call
= pvclock_gtod_notify
,
8944 int kvm_arch_init(void *opaque
)
8946 struct kvm_x86_init_ops
*ops
= opaque
;
8949 if (kvm_x86_ops
.hardware_enable
) {
8950 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops
.name
);
8955 if (!ops
->cpu_has_kvm_support()) {
8956 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8957 ops
->runtime_ops
->name
);
8961 if (ops
->disabled_by_bios()) {
8962 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8963 ops
->runtime_ops
->name
);
8969 * KVM explicitly assumes that the guest has an FPU and
8970 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8971 * vCPU's FPU state as a fxregs_state struct.
8973 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8974 printk(KERN_ERR
"kvm: inadequate fpu\n");
8979 if (IS_ENABLED(CONFIG_PREEMPT_RT
) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8980 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
8987 x86_emulator_cache
= kvm_alloc_emulator_cache();
8988 if (!x86_emulator_cache
) {
8989 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8993 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8994 if (!user_return_msrs
) {
8995 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8996 goto out_free_x86_emulator_cache
;
8998 kvm_nr_uret_msrs
= 0;
9000 r
= kvm_mmu_vendor_module_init();
9002 goto out_free_percpu
;
9006 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
9007 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
9008 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
9011 if (pi_inject_timer
== -1)
9012 pi_inject_timer
= housekeeping_enabled(HK_TYPE_TIMER
);
9013 #ifdef CONFIG_X86_64
9014 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
9016 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9017 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
9023 free_percpu(user_return_msrs
);
9024 out_free_x86_emulator_cache
:
9025 kmem_cache_destroy(x86_emulator_cache
);
9030 void kvm_arch_exit(void)
9032 #ifdef CONFIG_X86_64
9033 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9034 clear_hv_tscchange_cb();
9038 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
9039 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
9040 CPUFREQ_TRANSITION_NOTIFIER
);
9041 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
9042 #ifdef CONFIG_X86_64
9043 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
9044 irq_work_sync(&pvclock_irq_work
);
9045 cancel_work_sync(&pvclock_gtod_work
);
9047 kvm_x86_ops
.hardware_enable
= NULL
;
9048 kvm_mmu_vendor_module_exit();
9049 free_percpu(user_return_msrs
);
9050 kmem_cache_destroy(x86_emulator_cache
);
9051 #ifdef CONFIG_KVM_XEN
9052 static_key_deferred_flush(&kvm_xen_enabled
);
9053 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
9057 static int __kvm_emulate_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
9060 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9061 * local APIC is in-kernel, the run loop will detect the non-runnable
9062 * state and halt the vCPU. Exit to userspace if the local APIC is
9063 * managed by userspace, in which case userspace is responsible for
9064 * handling wake events.
9066 ++vcpu
->stat
.halt_exits
;
9067 if (lapic_in_kernel(vcpu
)) {
9068 vcpu
->arch
.mp_state
= state
;
9071 vcpu
->run
->exit_reason
= reason
;
9076 int kvm_emulate_halt_noskip(struct kvm_vcpu
*vcpu
)
9078 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
9080 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip
);
9082 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
9084 int ret
= kvm_skip_emulated_instruction(vcpu
);
9086 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9087 * KVM_EXIT_DEBUG here.
9089 return kvm_emulate_halt_noskip(vcpu
) && ret
;
9091 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
9093 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
9095 int ret
= kvm_skip_emulated_instruction(vcpu
);
9097 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
,
9098 KVM_EXIT_AP_RESET_HOLD
) && ret
;
9100 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
9102 #ifdef CONFIG_X86_64
9103 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
9104 unsigned long clock_type
)
9106 struct kvm_clock_pairing clock_pairing
;
9107 struct timespec64 ts
;
9111 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
9112 return -KVM_EOPNOTSUPP
;
9115 * When tsc is in permanent catchup mode guests won't be able to use
9116 * pvclock_read_retry loop to get consistent view of pvclock
9118 if (vcpu
->arch
.tsc_always_catchup
)
9119 return -KVM_EOPNOTSUPP
;
9121 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
9122 return -KVM_EOPNOTSUPP
;
9124 clock_pairing
.sec
= ts
.tv_sec
;
9125 clock_pairing
.nsec
= ts
.tv_nsec
;
9126 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
9127 clock_pairing
.flags
= 0;
9128 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
9131 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
9132 sizeof(struct kvm_clock_pairing
)))
9140 * kvm_pv_kick_cpu_op: Kick a vcpu.
9142 * @apicid - apicid of vcpu to be kicked.
9144 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, int apicid
)
9146 struct kvm_lapic_irq lapic_irq
;
9148 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
9149 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
9150 lapic_irq
.level
= 0;
9151 lapic_irq
.dest_id
= apicid
;
9152 lapic_irq
.msi_redir_hint
= false;
9154 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
9155 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
9158 bool kvm_apicv_activated(struct kvm
*kvm
)
9160 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
9162 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
9164 bool kvm_vcpu_apicv_activated(struct kvm_vcpu
*vcpu
)
9166 ulong vm_reasons
= READ_ONCE(vcpu
->kvm
->arch
.apicv_inhibit_reasons
);
9167 ulong vcpu_reasons
= static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons
)(vcpu
);
9169 return (vm_reasons
| vcpu_reasons
) == 0;
9171 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated
);
9173 static void set_or_clear_apicv_inhibit(unsigned long *inhibits
,
9174 enum kvm_apicv_inhibit reason
, bool set
)
9177 __set_bit(reason
, inhibits
);
9179 __clear_bit(reason
, inhibits
);
9181 trace_kvm_apicv_inhibit_changed(reason
, set
, *inhibits
);
9184 static void kvm_apicv_init(struct kvm
*kvm
)
9186 unsigned long *inhibits
= &kvm
->arch
.apicv_inhibit_reasons
;
9188 init_rwsem(&kvm
->arch
.apicv_update_lock
);
9190 set_or_clear_apicv_inhibit(inhibits
, APICV_INHIBIT_REASON_ABSENT
, true);
9193 set_or_clear_apicv_inhibit(inhibits
,
9194 APICV_INHIBIT_REASON_DISABLE
, true);
9197 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
9199 struct kvm_vcpu
*target
= NULL
;
9200 struct kvm_apic_map
*map
;
9202 vcpu
->stat
.directed_yield_attempted
++;
9204 if (single_task_running())
9208 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
9210 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
9211 target
= map
->phys_map
[dest_id
]->vcpu
;
9215 if (!target
|| !READ_ONCE(target
->ready
))
9218 /* Ignore requests to yield to self */
9222 if (kvm_vcpu_yield_to(target
) <= 0)
9225 vcpu
->stat
.directed_yield_successful
++;
9231 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
9233 u64 ret
= vcpu
->run
->hypercall
.ret
;
9235 if (!is_64_bit_mode(vcpu
))
9237 kvm_rax_write(vcpu
, ret
);
9238 ++vcpu
->stat
.hypercalls
;
9239 return kvm_skip_emulated_instruction(vcpu
);
9242 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
9244 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
9247 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
9248 return kvm_xen_hypercall(vcpu
);
9250 if (kvm_hv_hypercall_enabled(vcpu
))
9251 return kvm_hv_hypercall(vcpu
);
9253 nr
= kvm_rax_read(vcpu
);
9254 a0
= kvm_rbx_read(vcpu
);
9255 a1
= kvm_rcx_read(vcpu
);
9256 a2
= kvm_rdx_read(vcpu
);
9257 a3
= kvm_rsi_read(vcpu
);
9259 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
9261 op_64_bit
= is_64_bit_hypercall(vcpu
);
9270 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
9278 case KVM_HC_VAPIC_POLL_IRQ
:
9281 case KVM_HC_KICK_CPU
:
9282 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
9285 kvm_pv_kick_cpu_op(vcpu
->kvm
, a1
);
9286 kvm_sched_yield(vcpu
, a1
);
9289 #ifdef CONFIG_X86_64
9290 case KVM_HC_CLOCK_PAIRING
:
9291 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
9294 case KVM_HC_SEND_IPI
:
9295 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
9298 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
9300 case KVM_HC_SCHED_YIELD
:
9301 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
9304 kvm_sched_yield(vcpu
, a0
);
9307 case KVM_HC_MAP_GPA_RANGE
: {
9308 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
9311 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
9314 if (!PAGE_ALIGNED(gpa
) || !npages
||
9315 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
9320 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
9321 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
9322 vcpu
->run
->hypercall
.args
[0] = gpa
;
9323 vcpu
->run
->hypercall
.args
[1] = npages
;
9324 vcpu
->run
->hypercall
.args
[2] = attrs
;
9325 vcpu
->run
->hypercall
.longmode
= op_64_bit
;
9326 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
9336 kvm_rax_write(vcpu
, ret
);
9338 ++vcpu
->stat
.hypercalls
;
9339 return kvm_skip_emulated_instruction(vcpu
);
9341 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
9343 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
9345 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
9346 char instruction
[3];
9347 unsigned long rip
= kvm_rip_read(vcpu
);
9350 * If the quirk is disabled, synthesize a #UD and let the guest pick up
9353 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_FIX_HYPERCALL_INSN
)) {
9354 ctxt
->exception
.error_code_valid
= false;
9355 ctxt
->exception
.vector
= UD_VECTOR
;
9356 ctxt
->have_exception
= true;
9357 return X86EMUL_PROPAGATE_FAULT
;
9360 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
9362 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
9366 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
9368 return vcpu
->run
->request_interrupt_window
&&
9369 likely(!pic_in_kernel(vcpu
->kvm
));
9372 /* Called within kvm->srcu read side. */
9373 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
9375 struct kvm_run
*kvm_run
= vcpu
->run
;
9377 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
9378 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
9379 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
9381 kvm_run
->ready_for_interrupt_injection
=
9382 pic_in_kernel(vcpu
->kvm
) ||
9383 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
9386 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
9389 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
9393 if (!kvm_x86_ops
.update_cr8_intercept
)
9396 if (!lapic_in_kernel(vcpu
))
9399 if (vcpu
->arch
.apicv_active
)
9402 if (!vcpu
->arch
.apic
->vapic_addr
)
9403 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
9410 tpr
= kvm_lapic_get_cr8(vcpu
);
9412 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
9416 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
9418 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9419 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9423 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
9426 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
9428 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
9429 vcpu
->arch
.exception
.error_code
= false;
9430 static_call(kvm_x86_queue_exception
)(vcpu
);
9433 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
9436 bool can_inject
= true;
9438 /* try to reinject previous events if any */
9440 if (vcpu
->arch
.exception
.injected
) {
9441 kvm_inject_exception(vcpu
);
9445 * Do not inject an NMI or interrupt if there is a pending
9446 * exception. Exceptions and interrupts are recognized at
9447 * instruction boundaries, i.e. the start of an instruction.
9448 * Trap-like exceptions, e.g. #DB, have higher priority than
9449 * NMIs and interrupts, i.e. traps are recognized before an
9450 * NMI/interrupt that's pending on the same instruction.
9451 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9452 * priority, but are only generated (pended) during instruction
9453 * execution, i.e. a pending fault-like exception means the
9454 * fault occurred on the *previous* instruction and must be
9455 * serviced prior to recognizing any new events in order to
9456 * fully complete the previous instruction.
9458 else if (!vcpu
->arch
.exception
.pending
) {
9459 if (vcpu
->arch
.nmi_injected
) {
9460 static_call(kvm_x86_inject_nmi
)(vcpu
);
9462 } else if (vcpu
->arch
.interrupt
.injected
) {
9463 static_call(kvm_x86_inject_irq
)(vcpu
);
9468 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
9469 vcpu
->arch
.exception
.pending
);
9472 * Call check_nested_events() even if we reinjected a previous event
9473 * in order for caller to determine if it should require immediate-exit
9474 * from L2 to L1 due to pending L1 events which require exit
9477 if (is_guest_mode(vcpu
)) {
9478 r
= kvm_check_nested_events(vcpu
);
9483 /* try to inject new event if pending */
9484 if (vcpu
->arch
.exception
.pending
) {
9485 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
9486 vcpu
->arch
.exception
.has_error_code
,
9487 vcpu
->arch
.exception
.error_code
);
9489 vcpu
->arch
.exception
.pending
= false;
9490 vcpu
->arch
.exception
.injected
= true;
9492 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
9493 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
9496 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
9497 kvm_deliver_exception_payload(vcpu
);
9498 if (vcpu
->arch
.dr7
& DR7_GD
) {
9499 vcpu
->arch
.dr7
&= ~DR7_GD
;
9500 kvm_update_dr7(vcpu
);
9504 kvm_inject_exception(vcpu
);
9508 /* Don't inject interrupts if the user asked to avoid doing so */
9509 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
9513 * Finally, inject interrupt events. If an event cannot be injected
9514 * due to architectural conditions (e.g. IF=0) a window-open exit
9515 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9516 * and can architecturally be injected, but we cannot do it right now:
9517 * an interrupt could have arrived just now and we have to inject it
9518 * as a vmexit, or there could already an event in the queue, which is
9519 * indicated by can_inject. In that case we request an immediate exit
9520 * in order to make progress and get back here for another iteration.
9521 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9523 if (vcpu
->arch
.smi_pending
) {
9524 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
9528 vcpu
->arch
.smi_pending
= false;
9529 ++vcpu
->arch
.smi_count
;
9533 static_call(kvm_x86_enable_smi_window
)(vcpu
);
9536 if (vcpu
->arch
.nmi_pending
) {
9537 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
9541 --vcpu
->arch
.nmi_pending
;
9542 vcpu
->arch
.nmi_injected
= true;
9543 static_call(kvm_x86_inject_nmi
)(vcpu
);
9545 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
9547 if (vcpu
->arch
.nmi_pending
)
9548 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
9551 if (kvm_cpu_has_injectable_intr(vcpu
)) {
9552 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
9556 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
9557 static_call(kvm_x86_inject_irq
)(vcpu
);
9558 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
9560 if (kvm_cpu_has_injectable_intr(vcpu
))
9561 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9564 if (is_guest_mode(vcpu
) &&
9565 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
9566 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
9567 *req_immediate_exit
= true;
9569 WARN_ON(vcpu
->arch
.exception
.pending
);
9574 *req_immediate_exit
= true;
9580 static void process_nmi(struct kvm_vcpu
*vcpu
)
9585 * x86 is limited to one NMI running, and one NMI pending after it.
9586 * If an NMI is already in progress, limit further NMIs to just one.
9587 * Otherwise, allow two (and we'll inject the first one immediately).
9589 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
9592 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
9593 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
9594 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9597 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
9600 flags
|= seg
->g
<< 23;
9601 flags
|= seg
->db
<< 22;
9602 flags
|= seg
->l
<< 21;
9603 flags
|= seg
->avl
<< 20;
9604 flags
|= seg
->present
<< 15;
9605 flags
|= seg
->dpl
<< 13;
9606 flags
|= seg
->s
<< 12;
9607 flags
|= seg
->type
<< 8;
9611 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9613 struct kvm_segment seg
;
9616 kvm_get_segment(vcpu
, &seg
, n
);
9617 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
9620 offset
= 0x7f84 + n
* 12;
9622 offset
= 0x7f2c + (n
- 3) * 12;
9624 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
9625 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9626 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
9629 #ifdef CONFIG_X86_64
9630 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
9632 struct kvm_segment seg
;
9636 kvm_get_segment(vcpu
, &seg
, n
);
9637 offset
= 0x7e00 + n
* 16;
9639 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
9640 put_smstate(u16
, buf
, offset
, seg
.selector
);
9641 put_smstate(u16
, buf
, offset
+ 2, flags
);
9642 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
9643 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
9647 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
9650 struct kvm_segment seg
;
9654 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
9655 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
9656 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
9657 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
9659 for (i
= 0; i
< 8; i
++)
9660 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
9662 kvm_get_dr(vcpu
, 6, &val
);
9663 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
9664 kvm_get_dr(vcpu
, 7, &val
);
9665 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
9667 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9668 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
9669 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
9670 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
9671 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
9673 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9674 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
9675 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
9676 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
9677 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
9679 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9680 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
9681 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
9683 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9684 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
9685 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
9687 for (i
= 0; i
< 6; i
++)
9688 enter_smm_save_seg_32(vcpu
, buf
, i
);
9690 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
9693 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
9694 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
9697 #ifdef CONFIG_X86_64
9698 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
9701 struct kvm_segment seg
;
9705 for (i
= 0; i
< 16; i
++)
9706 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
9708 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
9709 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
9711 kvm_get_dr(vcpu
, 6, &val
);
9712 put_smstate(u64
, buf
, 0x7f68, val
);
9713 kvm_get_dr(vcpu
, 7, &val
);
9714 put_smstate(u64
, buf
, 0x7f60, val
);
9716 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
9717 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
9718 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
9720 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
9723 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
9725 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
9727 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
9728 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
9729 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
9730 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
9731 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
9733 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9734 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
9735 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
9737 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
9738 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
9739 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
9740 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
9741 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
9743 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9744 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
9745 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9747 for (i
= 0; i
< 6; i
++)
9748 enter_smm_save_seg_64(vcpu
, buf
, i
);
9752 static void enter_smm(struct kvm_vcpu
*vcpu
)
9754 struct kvm_segment cs
, ds
;
9759 memset(buf
, 0, 512);
9760 #ifdef CONFIG_X86_64
9761 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9762 enter_smm_save_state_64(vcpu
, buf
);
9765 enter_smm_save_state_32(vcpu
, buf
);
9768 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9769 * state (e.g. leave guest mode) after we've saved the state into the
9770 * SMM state-save area.
9772 static_call(kvm_x86_enter_smm
)(vcpu
, buf
);
9774 kvm_smm_changed(vcpu
, true);
9775 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9777 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9778 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9780 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9782 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9783 kvm_rip_write(vcpu
, 0x8000);
9785 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9786 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9787 vcpu
->arch
.cr0
= cr0
;
9789 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9791 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9792 dt
.address
= dt
.size
= 0;
9793 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9795 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9797 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9798 cs
.base
= vcpu
->arch
.smbase
;
9803 cs
.limit
= ds
.limit
= 0xffffffff;
9804 cs
.type
= ds
.type
= 0x3;
9805 cs
.dpl
= ds
.dpl
= 0;
9810 cs
.avl
= ds
.avl
= 0;
9811 cs
.present
= ds
.present
= 1;
9812 cs
.unusable
= ds
.unusable
= 0;
9813 cs
.padding
= ds
.padding
= 0;
9815 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9816 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9817 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9818 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9819 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9820 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9822 #ifdef CONFIG_X86_64
9823 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9824 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9827 kvm_update_cpuid_runtime(vcpu
);
9828 kvm_mmu_reset_context(vcpu
);
9831 static void process_smi(struct kvm_vcpu
*vcpu
)
9833 vcpu
->arch
.smi_pending
= true;
9834 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9837 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9838 unsigned long *vcpu_bitmap
)
9840 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
, vcpu_bitmap
);
9843 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9845 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9848 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9852 if (!lapic_in_kernel(vcpu
))
9855 down_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
9858 activate
= kvm_vcpu_apicv_activated(vcpu
);
9860 if (vcpu
->arch
.apicv_active
== activate
)
9863 vcpu
->arch
.apicv_active
= activate
;
9864 kvm_apic_update_apicv(vcpu
);
9865 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9868 * When APICv gets disabled, we may still have injected interrupts
9869 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9870 * still active when the interrupt got accepted. Make sure
9871 * inject_pending_event() is called to check for that.
9873 if (!vcpu
->arch
.apicv_active
)
9874 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9878 up_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
9880 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9882 void __kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
9883 enum kvm_apicv_inhibit reason
, bool set
)
9885 unsigned long old
, new;
9887 lockdep_assert_held_write(&kvm
->arch
.apicv_update_lock
);
9889 if (!static_call(kvm_x86_check_apicv_inhibit_reasons
)(reason
))
9892 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
9894 set_or_clear_apicv_inhibit(&new, reason
, set
);
9896 if (!!old
!= !!new) {
9898 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9899 * false positives in the sanity check WARN in svm_vcpu_run().
9900 * This task will wait for all vCPUs to ack the kick IRQ before
9901 * updating apicv_inhibit_reasons, and all other vCPUs will
9902 * block on acquiring apicv_update_lock so that vCPUs can't
9903 * redo svm_vcpu_run() without seeing the new inhibit state.
9905 * Note, holding apicv_update_lock and taking it in the read
9906 * side (handling the request) also prevents other vCPUs from
9907 * servicing the request with a stale apicv_inhibit_reasons.
9909 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
9910 kvm
->arch
.apicv_inhibit_reasons
= new;
9912 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
9913 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
9916 kvm
->arch
.apicv_inhibit_reasons
= new;
9920 void kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
9921 enum kvm_apicv_inhibit reason
, bool set
)
9926 down_write(&kvm
->arch
.apicv_update_lock
);
9927 __kvm_set_or_clear_apicv_inhibit(kvm
, reason
, set
);
9928 up_write(&kvm
->arch
.apicv_update_lock
);
9930 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit
);
9932 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9934 if (!kvm_apic_present(vcpu
))
9937 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9939 if (irqchip_split(vcpu
->kvm
))
9940 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9942 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
9943 if (ioapic_in_kernel(vcpu
->kvm
))
9944 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9947 if (is_guest_mode(vcpu
))
9948 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9950 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9953 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9955 u64 eoi_exit_bitmap
[4];
9957 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9960 if (to_hv_vcpu(vcpu
)) {
9961 bitmap_or((ulong
*)eoi_exit_bitmap
,
9962 vcpu
->arch
.ioapic_handled_vectors
,
9963 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9964 static_call_cond(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9968 static_call_cond(kvm_x86_load_eoi_exitmap
)(
9969 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
9972 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9973 unsigned long start
, unsigned long end
)
9975 unsigned long apic_address
;
9978 * The physical address of apic access page is stored in the VMCS.
9979 * Update it when it becomes invalid.
9981 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9982 if (start
<= apic_address
&& apic_address
< end
)
9983 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9986 void kvm_arch_guest_memory_reclaimed(struct kvm
*kvm
)
9988 static_call_cond(kvm_x86_guest_memory_reclaimed
)(kvm
);
9991 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9993 if (!lapic_in_kernel(vcpu
))
9996 static_call_cond(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9999 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
10001 smp_send_reschedule(vcpu
->cpu
);
10003 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
10006 * Called within kvm->srcu read side.
10007 * Returns 1 to let vcpu_run() continue the guest execution loop without
10008 * exiting to the userspace. Otherwise, the value will be returned to the
10011 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
10015 dm_request_for_irq_injection(vcpu
) &&
10016 kvm_cpu_accept_dm_intr(vcpu
);
10017 fastpath_t exit_fastpath
;
10019 bool req_immediate_exit
= false;
10021 /* Forbid vmenter if vcpu dirty ring is soft-full */
10022 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
10023 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
10024 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
10025 trace_kvm_dirty_ring_exit(vcpu
);
10030 if (kvm_request_pending(vcpu
)) {
10031 if (kvm_check_request(KVM_REQ_VM_DEAD
, vcpu
)) {
10035 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
10036 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
10041 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS
, vcpu
))
10042 kvm_mmu_free_obsolete_roots(vcpu
);
10043 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
10044 __kvm_migrate_timers(vcpu
);
10045 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
10046 kvm_update_masterclock(vcpu
->kvm
);
10047 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
10048 kvm_gen_kvmclock_update(vcpu
);
10049 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
10050 r
= kvm_guest_time_update(vcpu
);
10054 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
10055 kvm_mmu_sync_roots(vcpu
);
10056 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
10057 kvm_mmu_load_pgd(vcpu
);
10058 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
10059 kvm_vcpu_flush_tlb_all(vcpu
);
10061 /* Flushing all ASIDs flushes the current ASID... */
10062 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
10064 kvm_service_local_tlb_flush_requests(vcpu
);
10066 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
10067 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
10071 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10072 if (is_guest_mode(vcpu
)) {
10073 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
10075 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
10076 vcpu
->mmio_needed
= 0;
10081 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
10082 /* Page is swapped out. Do synthetic halt */
10083 vcpu
->arch
.apf
.halted
= true;
10087 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
10088 record_steal_time(vcpu
);
10089 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
10091 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
10093 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
10094 kvm_pmu_handle_event(vcpu
);
10095 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
10096 kvm_pmu_deliver_pmi(vcpu
);
10097 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
10098 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
10099 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
10100 vcpu
->arch
.ioapic_handled_vectors
)) {
10101 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
10102 vcpu
->run
->eoi
.vector
=
10103 vcpu
->arch
.pending_ioapic_eoi
;
10108 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
10109 vcpu_scan_ioapic(vcpu
);
10110 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
10111 vcpu_load_eoi_exitmap(vcpu
);
10112 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
10113 kvm_vcpu_reload_apic_access_page(vcpu
);
10114 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
10115 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10116 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
10117 vcpu
->run
->system_event
.ndata
= 0;
10121 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
10122 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10123 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
10124 vcpu
->run
->system_event
.ndata
= 0;
10128 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
10129 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
10131 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
10132 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
10138 * KVM_REQ_HV_STIMER has to be processed after
10139 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10140 * depend on the guest clock being up-to-date
10142 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
10143 kvm_hv_process_stimers(vcpu
);
10144 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
10145 kvm_vcpu_update_apicv(vcpu
);
10146 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
10147 kvm_check_async_pf_completion(vcpu
);
10148 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
10149 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
10151 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
10152 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
10155 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
10156 kvm_xen_has_interrupt(vcpu
)) {
10157 ++vcpu
->stat
.req_event
;
10158 r
= kvm_apic_accept_events(vcpu
);
10163 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
10168 r
= inject_pending_event(vcpu
, &req_immediate_exit
);
10174 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10176 if (kvm_lapic_enabled(vcpu
)) {
10177 update_cr8_intercept(vcpu
);
10178 kvm_lapic_sync_to_vapic(vcpu
);
10182 r
= kvm_mmu_reload(vcpu
);
10184 goto cancel_injection
;
10189 static_call(kvm_x86_prepare_switch_to_guest
)(vcpu
);
10192 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10193 * IPI are then delayed after guest entry, which ensures that they
10194 * result in virtual interrupt delivery.
10196 local_irq_disable();
10198 /* Store vcpu->apicv_active before vcpu->mode. */
10199 smp_store_release(&vcpu
->mode
, IN_GUEST_MODE
);
10201 kvm_vcpu_srcu_read_unlock(vcpu
);
10204 * 1) We should set ->mode before checking ->requests. Please see
10205 * the comment in kvm_vcpu_exiting_guest_mode().
10207 * 2) For APICv, we should set ->mode before checking PID.ON. This
10208 * pairs with the memory barrier implicit in pi_test_and_set_on
10209 * (see vmx_deliver_posted_interrupt).
10211 * 3) This also orders the write to mode from any reads to the page
10212 * tables done while the VCPU is running. Please see the comment
10213 * in kvm_flush_remote_tlbs.
10215 smp_mb__after_srcu_read_unlock();
10218 * Process pending posted interrupts to handle the case where the
10219 * notification IRQ arrived in the host, or was never sent (because the
10220 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10221 * status, KVM doesn't update assigned devices when APICv is inhibited,
10222 * i.e. they can post interrupts even if APICv is temporarily disabled.
10224 if (kvm_lapic_enabled(vcpu
))
10225 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10227 if (kvm_vcpu_exit_request(vcpu
)) {
10228 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10230 local_irq_enable();
10232 kvm_vcpu_srcu_read_lock(vcpu
);
10234 goto cancel_injection
;
10237 if (req_immediate_exit
) {
10238 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10239 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
10242 fpregs_assert_state_consistent();
10243 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10244 switch_fpu_return();
10246 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10247 wrmsrl(MSR_IA32_XFD_ERR
, vcpu
->arch
.guest_fpu
.xfd_err
);
10249 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
10250 set_debugreg(0, 7);
10251 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
10252 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
10253 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
10254 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
10255 } else if (unlikely(hw_breakpoint_active())) {
10256 set_debugreg(0, 7);
10259 guest_timing_enter_irqoff();
10263 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10264 * update must kick and wait for all vCPUs before toggling the
10265 * per-VM state, and responsing vCPUs must wait for the update
10266 * to complete before servicing KVM_REQ_APICV_UPDATE.
10268 WARN_ON_ONCE(kvm_vcpu_apicv_activated(vcpu
) != kvm_vcpu_apicv_active(vcpu
));
10270 exit_fastpath
= static_call(kvm_x86_vcpu_run
)(vcpu
);
10271 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
10274 if (kvm_lapic_enabled(vcpu
))
10275 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10277 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
10278 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
10284 * Do this here before restoring debug registers on the host. And
10285 * since we do this before handling the vmexit, a DR access vmexit
10286 * can (a) read the correct value of the debug registers, (b) set
10287 * KVM_DEBUGREG_WONT_EXIT again.
10289 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
10290 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
10291 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
10292 kvm_update_dr0123(vcpu
);
10293 kvm_update_dr7(vcpu
);
10297 * If the guest has used debug registers, at least dr7
10298 * will be disabled while returning to the host.
10299 * If we don't have active breakpoints in the host, we don't
10300 * care about the messed up debug address registers. But if
10301 * we have some of them active, restore the old state.
10303 if (hw_breakpoint_active())
10304 hw_breakpoint_restore();
10306 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
10307 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
10309 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10313 * Sync xfd before calling handle_exit_irqoff() which may
10314 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10315 * in #NM irqoff handler).
10317 if (vcpu
->arch
.xfd_no_write_intercept
)
10318 fpu_sync_guest_vmexit_xfd_state();
10320 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
10322 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10323 wrmsrl(MSR_IA32_XFD_ERR
, 0);
10326 * Consume any pending interrupts, including the possible source of
10327 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10328 * An instruction is required after local_irq_enable() to fully unblock
10329 * interrupts on processors that implement an interrupt shadow, the
10330 * stat.exits increment will do nicely.
10332 kvm_before_interrupt(vcpu
, KVM_HANDLING_IRQ
);
10333 local_irq_enable();
10334 ++vcpu
->stat
.exits
;
10335 local_irq_disable();
10336 kvm_after_interrupt(vcpu
);
10339 * Wait until after servicing IRQs to account guest time so that any
10340 * ticks that occurred while running the guest are properly accounted
10341 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10342 * of accounting via context tracking, but the loss of accuracy is
10343 * acceptable for all known use cases.
10345 guest_timing_exit_irqoff();
10347 local_irq_enable();
10350 kvm_vcpu_srcu_read_lock(vcpu
);
10353 * Profile KVM exit RIPs:
10355 if (unlikely(prof_on
== KVM_PROFILING
)) {
10356 unsigned long rip
= kvm_rip_read(vcpu
);
10357 profile_hit(KVM_PROFILING
, (void *)rip
);
10360 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
10361 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10363 if (vcpu
->arch
.apic_attention
)
10364 kvm_lapic_sync_from_vapic(vcpu
);
10366 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
10370 if (req_immediate_exit
)
10371 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10372 static_call(kvm_x86_cancel_injection
)(vcpu
);
10373 if (unlikely(vcpu
->arch
.apic_attention
))
10374 kvm_lapic_sync_from_vapic(vcpu
);
10379 /* Called within kvm->srcu read side. */
10380 static inline int vcpu_block(struct kvm_vcpu
*vcpu
)
10384 if (!kvm_arch_vcpu_runnable(vcpu
)) {
10386 * Switch to the software timer before halt-polling/blocking as
10387 * the guest's timer may be a break event for the vCPU, and the
10388 * hypervisor timer runs only when the CPU is in guest mode.
10389 * Switch before halt-polling so that KVM recognizes an expired
10390 * timer before blocking.
10392 hv_timer
= kvm_lapic_hv_timer_in_use(vcpu
);
10394 kvm_lapic_switch_to_sw_timer(vcpu
);
10396 kvm_vcpu_srcu_read_unlock(vcpu
);
10397 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
)
10398 kvm_vcpu_halt(vcpu
);
10400 kvm_vcpu_block(vcpu
);
10401 kvm_vcpu_srcu_read_lock(vcpu
);
10404 kvm_lapic_switch_to_hv_timer(vcpu
);
10406 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
10410 if (kvm_apic_accept_events(vcpu
) < 0)
10412 switch(vcpu
->arch
.mp_state
) {
10413 case KVM_MP_STATE_HALTED
:
10414 case KVM_MP_STATE_AP_RESET_HOLD
:
10415 vcpu
->arch
.pv
.pv_unhalted
= false;
10416 vcpu
->arch
.mp_state
=
10417 KVM_MP_STATE_RUNNABLE
;
10419 case KVM_MP_STATE_RUNNABLE
:
10420 vcpu
->arch
.apf
.halted
= false;
10422 case KVM_MP_STATE_INIT_RECEIVED
:
10430 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
10432 if (is_guest_mode(vcpu
))
10433 kvm_check_nested_events(vcpu
);
10435 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
10436 !vcpu
->arch
.apf
.halted
);
10439 /* Called within kvm->srcu read side. */
10440 static int vcpu_run(struct kvm_vcpu
*vcpu
)
10444 vcpu
->arch
.l1tf_flush_l1d
= true;
10448 * If another guest vCPU requests a PV TLB flush in the middle
10449 * of instruction emulation, the rest of the emulation could
10450 * use a stale page translation. Assume that any code after
10451 * this point can start executing an instruction.
10453 vcpu
->arch
.at_instruction_boundary
= false;
10454 if (kvm_vcpu_running(vcpu
)) {
10455 r
= vcpu_enter_guest(vcpu
);
10457 r
= vcpu_block(vcpu
);
10463 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
10464 if (kvm_xen_has_pending_events(vcpu
))
10465 kvm_xen_inject_pending_events(vcpu
);
10467 if (kvm_cpu_has_pending_timer(vcpu
))
10468 kvm_inject_pending_timer_irqs(vcpu
);
10470 if (dm_request_for_irq_injection(vcpu
) &&
10471 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
10473 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
10474 ++vcpu
->stat
.request_irq_exits
;
10478 if (__xfer_to_guest_mode_work_pending()) {
10479 kvm_vcpu_srcu_read_unlock(vcpu
);
10480 r
= xfer_to_guest_mode_handle_work(vcpu
);
10481 kvm_vcpu_srcu_read_lock(vcpu
);
10490 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
10492 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
10495 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
10497 BUG_ON(!vcpu
->arch
.pio
.count
);
10499 return complete_emulated_io(vcpu
);
10503 * Implements the following, as a state machine:
10506 * for each fragment
10507 * for each mmio piece in the fragment
10514 * for each fragment
10515 * for each mmio piece in the fragment
10520 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
10522 struct kvm_run
*run
= vcpu
->run
;
10523 struct kvm_mmio_fragment
*frag
;
10526 BUG_ON(!vcpu
->mmio_needed
);
10528 /* Complete previous fragment */
10529 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
10530 len
= min(8u, frag
->len
);
10531 if (!vcpu
->mmio_is_write
)
10532 memcpy(frag
->data
, run
->mmio
.data
, len
);
10534 if (frag
->len
<= 8) {
10535 /* Switch to the next fragment. */
10537 vcpu
->mmio_cur_fragment
++;
10539 /* Go forward to the next mmio piece. */
10545 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
10546 vcpu
->mmio_needed
= 0;
10548 /* FIXME: return into emulator if single-stepping. */
10549 if (vcpu
->mmio_is_write
)
10551 vcpu
->mmio_read_completed
= 1;
10552 return complete_emulated_io(vcpu
);
10555 run
->exit_reason
= KVM_EXIT_MMIO
;
10556 run
->mmio
.phys_addr
= frag
->gpa
;
10557 if (vcpu
->mmio_is_write
)
10558 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
10559 run
->mmio
.len
= min(8u, frag
->len
);
10560 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
10561 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
10565 /* Swap (qemu) user FPU context for the guest FPU context. */
10566 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
10568 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10569 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, true);
10573 /* When vcpu_run ends, restore user space FPU context. */
10574 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
10576 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, false);
10577 ++vcpu
->stat
.fpu_reload
;
10581 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
10583 struct kvm_run
*kvm_run
= vcpu
->run
;
10587 kvm_sigset_activate(vcpu
);
10588 kvm_run
->flags
= 0;
10589 kvm_load_guest_fpu(vcpu
);
10591 kvm_vcpu_srcu_read_lock(vcpu
);
10592 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
10593 if (kvm_run
->immediate_exit
) {
10598 * It should be impossible for the hypervisor timer to be in
10599 * use before KVM has ever run the vCPU.
10601 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu
));
10603 kvm_vcpu_srcu_read_unlock(vcpu
);
10604 kvm_vcpu_block(vcpu
);
10605 kvm_vcpu_srcu_read_lock(vcpu
);
10607 if (kvm_apic_accept_events(vcpu
) < 0) {
10611 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
10613 if (signal_pending(current
)) {
10615 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
10616 ++vcpu
->stat
.signal_exits
;
10621 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
10622 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
10627 if (kvm_run
->kvm_dirty_regs
) {
10628 r
= sync_regs(vcpu
);
10633 /* re-sync apic's tpr */
10634 if (!lapic_in_kernel(vcpu
)) {
10635 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
10641 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
10642 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
10643 vcpu
->arch
.complete_userspace_io
= NULL
;
10648 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
10650 if (kvm_run
->immediate_exit
) {
10655 r
= static_call(kvm_x86_vcpu_pre_run
)(vcpu
);
10659 r
= vcpu_run(vcpu
);
10662 kvm_put_guest_fpu(vcpu
);
10663 if (kvm_run
->kvm_valid_regs
)
10665 post_kvm_run_save(vcpu
);
10666 kvm_vcpu_srcu_read_unlock(vcpu
);
10668 kvm_sigset_deactivate(vcpu
);
10673 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10675 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
10677 * We are here if userspace calls get_regs() in the middle of
10678 * instruction emulation. Registers state needs to be copied
10679 * back from emulation context to vcpu. Userspace shouldn't do
10680 * that usually, but some bad designed PV devices (vmware
10681 * backdoor interface) need this to work
10683 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
10684 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10686 regs
->rax
= kvm_rax_read(vcpu
);
10687 regs
->rbx
= kvm_rbx_read(vcpu
);
10688 regs
->rcx
= kvm_rcx_read(vcpu
);
10689 regs
->rdx
= kvm_rdx_read(vcpu
);
10690 regs
->rsi
= kvm_rsi_read(vcpu
);
10691 regs
->rdi
= kvm_rdi_read(vcpu
);
10692 regs
->rsp
= kvm_rsp_read(vcpu
);
10693 regs
->rbp
= kvm_rbp_read(vcpu
);
10694 #ifdef CONFIG_X86_64
10695 regs
->r8
= kvm_r8_read(vcpu
);
10696 regs
->r9
= kvm_r9_read(vcpu
);
10697 regs
->r10
= kvm_r10_read(vcpu
);
10698 regs
->r11
= kvm_r11_read(vcpu
);
10699 regs
->r12
= kvm_r12_read(vcpu
);
10700 regs
->r13
= kvm_r13_read(vcpu
);
10701 regs
->r14
= kvm_r14_read(vcpu
);
10702 regs
->r15
= kvm_r15_read(vcpu
);
10705 regs
->rip
= kvm_rip_read(vcpu
);
10706 regs
->rflags
= kvm_get_rflags(vcpu
);
10709 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10712 __get_regs(vcpu
, regs
);
10717 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10719 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
10720 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
10722 kvm_rax_write(vcpu
, regs
->rax
);
10723 kvm_rbx_write(vcpu
, regs
->rbx
);
10724 kvm_rcx_write(vcpu
, regs
->rcx
);
10725 kvm_rdx_write(vcpu
, regs
->rdx
);
10726 kvm_rsi_write(vcpu
, regs
->rsi
);
10727 kvm_rdi_write(vcpu
, regs
->rdi
);
10728 kvm_rsp_write(vcpu
, regs
->rsp
);
10729 kvm_rbp_write(vcpu
, regs
->rbp
);
10730 #ifdef CONFIG_X86_64
10731 kvm_r8_write(vcpu
, regs
->r8
);
10732 kvm_r9_write(vcpu
, regs
->r9
);
10733 kvm_r10_write(vcpu
, regs
->r10
);
10734 kvm_r11_write(vcpu
, regs
->r11
);
10735 kvm_r12_write(vcpu
, regs
->r12
);
10736 kvm_r13_write(vcpu
, regs
->r13
);
10737 kvm_r14_write(vcpu
, regs
->r14
);
10738 kvm_r15_write(vcpu
, regs
->r15
);
10741 kvm_rip_write(vcpu
, regs
->rip
);
10742 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
10744 vcpu
->arch
.exception
.pending
= false;
10746 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10749 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
10752 __set_regs(vcpu
, regs
);
10757 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10759 struct desc_ptr dt
;
10761 if (vcpu
->arch
.guest_state_protected
)
10762 goto skip_protected_regs
;
10764 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10765 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10766 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10767 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10768 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10769 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10771 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10772 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10774 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
10775 sregs
->idt
.limit
= dt
.size
;
10776 sregs
->idt
.base
= dt
.address
;
10777 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
10778 sregs
->gdt
.limit
= dt
.size
;
10779 sregs
->gdt
.base
= dt
.address
;
10781 sregs
->cr2
= vcpu
->arch
.cr2
;
10782 sregs
->cr3
= kvm_read_cr3(vcpu
);
10784 skip_protected_regs
:
10785 sregs
->cr0
= kvm_read_cr0(vcpu
);
10786 sregs
->cr4
= kvm_read_cr4(vcpu
);
10787 sregs
->cr8
= kvm_get_cr8(vcpu
);
10788 sregs
->efer
= vcpu
->arch
.efer
;
10789 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10792 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10794 __get_sregs_common(vcpu
, sregs
);
10796 if (vcpu
->arch
.guest_state_protected
)
10799 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10800 set_bit(vcpu
->arch
.interrupt
.nr
,
10801 (unsigned long *)sregs
->interrupt_bitmap
);
10804 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
10808 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
10810 if (vcpu
->arch
.guest_state_protected
)
10813 if (is_pae_paging(vcpu
)) {
10814 for (i
= 0 ; i
< 4 ; i
++)
10815 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
10816 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
10820 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10821 struct kvm_sregs
*sregs
)
10824 __get_sregs(vcpu
, sregs
);
10829 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10830 struct kvm_mp_state
*mp_state
)
10835 if (kvm_mpx_supported())
10836 kvm_load_guest_fpu(vcpu
);
10838 r
= kvm_apic_accept_events(vcpu
);
10843 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10844 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10845 vcpu
->arch
.pv
.pv_unhalted
)
10846 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10848 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10851 if (kvm_mpx_supported())
10852 kvm_put_guest_fpu(vcpu
);
10857 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10858 struct kvm_mp_state
*mp_state
)
10864 if (!lapic_in_kernel(vcpu
) &&
10865 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10869 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10870 * INIT state; latched init should be reported using
10871 * KVM_SET_VCPU_EVENTS, so reject it here.
10873 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10874 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10875 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10878 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10879 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10880 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10882 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10883 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10891 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10892 int reason
, bool has_error_code
, u32 error_code
)
10894 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10897 init_emulate_ctxt(vcpu
);
10899 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10900 has_error_code
, error_code
);
10902 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10903 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10904 vcpu
->run
->internal
.ndata
= 0;
10908 kvm_rip_write(vcpu
, ctxt
->eip
);
10909 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10912 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10914 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10916 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10918 * When EFER.LME and CR0.PG are set, the processor is in
10919 * 64-bit mode (though maybe in a 32-bit code segment).
10920 * CR4.PAE and EFER.LMA must be set.
10922 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10924 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10928 * Not in 64-bit mode: EFER.LMA is clear and the code
10929 * segment cannot be 64-bit.
10931 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10935 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10938 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
10939 int *mmu_reset_needed
, bool update_pdptrs
)
10941 struct msr_data apic_base_msr
;
10943 struct desc_ptr dt
;
10945 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10948 apic_base_msr
.data
= sregs
->apic_base
;
10949 apic_base_msr
.host_initiated
= true;
10950 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10953 if (vcpu
->arch
.guest_state_protected
)
10956 dt
.size
= sregs
->idt
.limit
;
10957 dt
.address
= sregs
->idt
.base
;
10958 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10959 dt
.size
= sregs
->gdt
.limit
;
10960 dt
.address
= sregs
->gdt
.base
;
10961 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10963 vcpu
->arch
.cr2
= sregs
->cr2
;
10964 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10965 vcpu
->arch
.cr3
= sregs
->cr3
;
10966 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
10967 static_call_cond(kvm_x86_post_set_cr3
)(vcpu
, sregs
->cr3
);
10969 kvm_set_cr8(vcpu
, sregs
->cr8
);
10971 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10972 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10974 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10975 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10976 vcpu
->arch
.cr0
= sregs
->cr0
;
10978 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10979 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10981 if (update_pdptrs
) {
10982 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10983 if (is_pae_paging(vcpu
)) {
10984 load_pdptrs(vcpu
, kvm_read_cr3(vcpu
));
10985 *mmu_reset_needed
= 1;
10987 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10990 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10991 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10992 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10993 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10994 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10995 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10997 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10998 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11000 update_cr8_intercept(vcpu
);
11002 /* Older userspace won't unhalt the vcpu on reset. */
11003 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
11004 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
11005 !is_protmode(vcpu
))
11006 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11011 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11013 int pending_vec
, max_bits
;
11014 int mmu_reset_needed
= 0;
11015 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
11020 if (mmu_reset_needed
)
11021 kvm_mmu_reset_context(vcpu
);
11023 max_bits
= KVM_NR_INTERRUPTS
;
11024 pending_vec
= find_first_bit(
11025 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
11027 if (pending_vec
< max_bits
) {
11028 kvm_queue_interrupt(vcpu
, pending_vec
, false);
11029 pr_debug("Set back pending irq %d\n", pending_vec
);
11030 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11035 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11037 int mmu_reset_needed
= 0;
11038 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11039 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
11040 !(sregs2
->efer
& EFER_LMA
);
11043 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
11046 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
11049 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
11050 &mmu_reset_needed
, !valid_pdptrs
);
11054 if (valid_pdptrs
) {
11055 for (i
= 0; i
< 4 ; i
++)
11056 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
11058 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
11059 mmu_reset_needed
= 1;
11060 vcpu
->arch
.pdptrs_from_userspace
= true;
11062 if (mmu_reset_needed
)
11063 kvm_mmu_reset_context(vcpu
);
11067 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
11068 struct kvm_sregs
*sregs
)
11073 ret
= __set_sregs(vcpu
, sregs
);
11078 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm
*kvm
)
11081 struct kvm_vcpu
*vcpu
;
11087 down_write(&kvm
->arch
.apicv_update_lock
);
11089 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11090 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
) {
11095 __kvm_set_or_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_BLOCKIRQ
, set
);
11096 up_write(&kvm
->arch
.apicv_update_lock
);
11099 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
11100 struct kvm_guest_debug
*dbg
)
11102 unsigned long rflags
;
11105 if (vcpu
->arch
.guest_state_protected
)
11110 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
11112 if (vcpu
->arch
.exception
.pending
)
11114 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
11115 kvm_queue_exception(vcpu
, DB_VECTOR
);
11117 kvm_queue_exception(vcpu
, BP_VECTOR
);
11121 * Read rflags as long as potentially injected trace flags are still
11124 rflags
= kvm_get_rflags(vcpu
);
11126 vcpu
->guest_debug
= dbg
->control
;
11127 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
11128 vcpu
->guest_debug
= 0;
11130 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
11131 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
11132 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
11133 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
11135 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
11136 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
11138 kvm_update_dr7(vcpu
);
11140 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11141 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
11144 * Trigger an rflags update that will inject or remove the trace
11147 kvm_set_rflags(vcpu
, rflags
);
11149 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11151 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu
->kvm
);
11161 * Translate a guest virtual address to a guest physical address.
11163 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
11164 struct kvm_translation
*tr
)
11166 unsigned long vaddr
= tr
->linear_address
;
11172 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11173 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
11174 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11175 tr
->physical_address
= gpa
;
11176 tr
->valid
= gpa
!= UNMAPPED_GVA
;
11184 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11186 struct fxregs_state
*fxsave
;
11188 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11193 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11194 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
11195 fpu
->fcw
= fxsave
->cwd
;
11196 fpu
->fsw
= fxsave
->swd
;
11197 fpu
->ftwx
= fxsave
->twd
;
11198 fpu
->last_opcode
= fxsave
->fop
;
11199 fpu
->last_ip
= fxsave
->rip
;
11200 fpu
->last_dp
= fxsave
->rdp
;
11201 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
11207 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11209 struct fxregs_state
*fxsave
;
11211 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11216 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11218 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
11219 fxsave
->cwd
= fpu
->fcw
;
11220 fxsave
->swd
= fpu
->fsw
;
11221 fxsave
->twd
= fpu
->ftwx
;
11222 fxsave
->fop
= fpu
->last_opcode
;
11223 fxsave
->rip
= fpu
->last_ip
;
11224 fxsave
->rdp
= fpu
->last_dp
;
11225 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
11231 static void store_regs(struct kvm_vcpu
*vcpu
)
11233 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
11235 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
11236 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11238 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
11239 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
11241 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
11242 kvm_vcpu_ioctl_x86_get_vcpu_events(
11243 vcpu
, &vcpu
->run
->s
.regs
.events
);
11246 static int sync_regs(struct kvm_vcpu
*vcpu
)
11248 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
11249 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11250 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
11252 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
11253 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
11255 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
11257 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
11258 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11259 vcpu
, &vcpu
->run
->s
.regs
.events
))
11261 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
11267 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
11269 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
11270 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11271 "guest TSC will not be reliable\n");
11276 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
11281 vcpu
->arch
.last_vmentry_cpu
= -1;
11282 vcpu
->arch
.regs_avail
= ~0;
11283 vcpu
->arch
.regs_dirty
= ~0;
11285 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
11286 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11288 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
11290 r
= kvm_mmu_create(vcpu
);
11294 if (irqchip_in_kernel(vcpu
->kvm
)) {
11295 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
11297 goto fail_mmu_destroy
;
11300 * Defer evaluating inhibits until the vCPU is first run, as
11301 * this vCPU will not get notified of any changes until this
11302 * vCPU is visible to other vCPUs (marked online and added to
11303 * the set of vCPUs). Opportunistically mark APICv active as
11304 * VMX in particularly is highly unlikely to have inhibits.
11305 * Ignore the current per-VM APICv state so that vCPU creation
11306 * is guaranteed to run with a deterministic value, the request
11307 * will ensure the vCPU gets the correct state before VM-Entry.
11309 if (enable_apicv
) {
11310 vcpu
->arch
.apicv_active
= true;
11311 kvm_make_request(KVM_REQ_APICV_UPDATE
, vcpu
);
11314 static_branch_inc(&kvm_has_noapic_vcpu
);
11318 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
11320 goto fail_free_lapic
;
11321 vcpu
->arch
.pio_data
= page_address(page
);
11323 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
11324 GFP_KERNEL_ACCOUNT
);
11325 if (!vcpu
->arch
.mce_banks
)
11326 goto fail_free_pio_data
;
11327 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
11329 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
11330 GFP_KERNEL_ACCOUNT
))
11331 goto fail_free_mce_banks
;
11333 if (!alloc_emulate_ctxt(vcpu
))
11334 goto free_wbinvd_dirty_mask
;
11336 if (!fpu_alloc_guest_fpstate(&vcpu
->arch
.guest_fpu
)) {
11337 pr_err("kvm: failed to allocate vcpu's fpu\n");
11338 goto free_emulate_ctxt
;
11341 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
11342 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
11344 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
11346 kvm_async_pf_hash_reset(vcpu
);
11347 kvm_pmu_init(vcpu
);
11349 vcpu
->arch
.pending_external_vector
= -1;
11350 vcpu
->arch
.preempted_in_kernel
= false;
11352 #if IS_ENABLED(CONFIG_HYPERV)
11353 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
11356 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
11358 goto free_guest_fpu
;
11360 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
11361 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
11362 kvm_xen_init_vcpu(vcpu
);
11363 kvm_vcpu_mtrr_init(vcpu
);
11365 kvm_set_tsc_khz(vcpu
, vcpu
->kvm
->arch
.default_tsc_khz
);
11366 kvm_vcpu_reset(vcpu
, false);
11367 kvm_init_mmu(vcpu
);
11372 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
11374 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
11375 free_wbinvd_dirty_mask
:
11376 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
11377 fail_free_mce_banks
:
11378 kfree(vcpu
->arch
.mce_banks
);
11379 fail_free_pio_data
:
11380 free_page((unsigned long)vcpu
->arch
.pio_data
);
11382 kvm_free_lapic(vcpu
);
11384 kvm_mmu_destroy(vcpu
);
11388 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
11390 struct kvm
*kvm
= vcpu
->kvm
;
11392 if (mutex_lock_killable(&vcpu
->mutex
))
11395 kvm_synchronize_tsc(vcpu
, 0);
11398 /* poll control enabled by default */
11399 vcpu
->arch
.msr_kvm_poll_control
= 1;
11401 mutex_unlock(&vcpu
->mutex
);
11403 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
11404 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
11405 KVMCLOCK_SYNC_PERIOD
);
11408 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
11412 kvmclock_reset(vcpu
);
11414 static_call(kvm_x86_vcpu_free
)(vcpu
);
11416 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
11417 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
11418 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
11420 kvm_xen_destroy_vcpu(vcpu
);
11421 kvm_hv_vcpu_uninit(vcpu
);
11422 kvm_pmu_destroy(vcpu
);
11423 kfree(vcpu
->arch
.mce_banks
);
11424 kvm_free_lapic(vcpu
);
11425 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11426 kvm_mmu_destroy(vcpu
);
11427 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11428 free_page((unsigned long)vcpu
->arch
.pio_data
);
11429 kvfree(vcpu
->arch
.cpuid_entries
);
11430 if (!lapic_in_kernel(vcpu
))
11431 static_branch_dec(&kvm_has_noapic_vcpu
);
11434 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
11436 struct kvm_cpuid_entry2
*cpuid_0x1
;
11437 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
11438 unsigned long new_cr0
;
11441 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11442 * to handle side effects. RESET emulation hits those flows and relies
11443 * on emulated/virtualized registers, including those that are loaded
11444 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11445 * to detect improper or missing initialization.
11447 WARN_ON_ONCE(!init_event
&&
11448 (old_cr0
|| kvm_read_cr3(vcpu
) || kvm_read_cr4(vcpu
)));
11450 kvm_lapic_reset(vcpu
, init_event
);
11452 vcpu
->arch
.hflags
= 0;
11454 vcpu
->arch
.smi_pending
= 0;
11455 vcpu
->arch
.smi_count
= 0;
11456 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
11457 vcpu
->arch
.nmi_pending
= 0;
11458 vcpu
->arch
.nmi_injected
= false;
11459 kvm_clear_interrupt_queue(vcpu
);
11460 kvm_clear_exception_queue(vcpu
);
11462 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
11463 kvm_update_dr0123(vcpu
);
11464 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
11465 vcpu
->arch
.dr7
= DR7_FIXED_1
;
11466 kvm_update_dr7(vcpu
);
11468 vcpu
->arch
.cr2
= 0;
11470 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11471 vcpu
->arch
.apf
.msr_en_val
= 0;
11472 vcpu
->arch
.apf
.msr_int_val
= 0;
11473 vcpu
->arch
.st
.msr_val
= 0;
11475 kvmclock_reset(vcpu
);
11477 kvm_clear_async_pf_completion_queue(vcpu
);
11478 kvm_async_pf_hash_reset(vcpu
);
11479 vcpu
->arch
.apf
.halted
= false;
11481 if (vcpu
->arch
.guest_fpu
.fpstate
&& kvm_mpx_supported()) {
11482 struct fpstate
*fpstate
= vcpu
->arch
.guest_fpu
.fpstate
;
11485 * To avoid have the INIT path from kvm_apic_has_events() that be
11486 * called with loaded FPU and does not let userspace fix the state.
11489 kvm_put_guest_fpu(vcpu
);
11491 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDREGS
);
11492 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDCSR
);
11495 kvm_load_guest_fpu(vcpu
);
11499 kvm_pmu_reset(vcpu
);
11500 vcpu
->arch
.smbase
= 0x30000;
11502 vcpu
->arch
.msr_misc_features_enables
= 0;
11504 __kvm_set_xcr(vcpu
, 0, XFEATURE_MASK_FP
);
11505 __kvm_set_msr(vcpu
, MSR_IA32_XSS
, 0, true);
11508 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11509 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
11510 kvm_register_mark_dirty(vcpu
, VCPU_REGS_RSP
);
11513 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11514 * if no CPUID match is found. Note, it's impossible to get a match at
11515 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11516 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11517 * on RESET. But, go through the motions in case that's ever remedied.
11519 cpuid_0x1
= kvm_find_cpuid_entry(vcpu
, 1, 0);
11520 kvm_rdx_write(vcpu
, cpuid_0x1
? cpuid_0x1
->eax
: 0x600);
11522 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
11524 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
11525 kvm_rip_write(vcpu
, 0xfff0);
11527 vcpu
->arch
.cr3
= 0;
11528 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11531 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11532 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11533 * (or qualify) that with a footnote stating that CD/NW are preserved.
11535 new_cr0
= X86_CR0_ET
;
11537 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
11539 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
11541 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
11542 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
11543 static_call(kvm_x86_set_efer
)(vcpu
, 0);
11544 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11547 * On the standard CR0/CR4/EFER modification paths, there are several
11548 * complex conditions determining whether the MMU has to be reset and/or
11549 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
11550 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11551 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11552 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
11554 if (old_cr0
& X86_CR0_PG
) {
11555 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11556 kvm_mmu_reset_context(vcpu
);
11560 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11561 * APM states the TLBs are untouched by INIT, but it also states that
11562 * the TLBs are flushed on "External initialization of the processor."
11563 * Flush the guest TLB regardless of vendor, there is no meaningful
11564 * benefit in relying on the guest to flush the TLB immediately after
11565 * INIT. A spurious TLB flush is benign and likely negligible from a
11566 * performance perspective.
11569 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11571 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
11573 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
11575 struct kvm_segment cs
;
11577 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11578 cs
.selector
= vector
<< 8;
11579 cs
.base
= vector
<< 12;
11580 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
11581 kvm_rip_write(vcpu
, 0);
11583 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
11585 int kvm_arch_hardware_enable(void)
11588 struct kvm_vcpu
*vcpu
;
11593 bool stable
, backwards_tsc
= false;
11595 kvm_user_return_msr_cpu_online();
11596 ret
= static_call(kvm_x86_hardware_enable
)();
11600 local_tsc
= rdtsc();
11601 stable
= !kvm_check_tsc_unstable();
11602 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11603 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11604 if (!stable
&& vcpu
->cpu
== smp_processor_id())
11605 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11606 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
11607 backwards_tsc
= true;
11608 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
11609 max_tsc
= vcpu
->arch
.last_host_tsc
;
11615 * Sometimes, even reliable TSCs go backwards. This happens on
11616 * platforms that reset TSC during suspend or hibernate actions, but
11617 * maintain synchronization. We must compensate. Fortunately, we can
11618 * detect that condition here, which happens early in CPU bringup,
11619 * before any KVM threads can be running. Unfortunately, we can't
11620 * bring the TSCs fully up to date with real time, as we aren't yet far
11621 * enough into CPU bringup that we know how much real time has actually
11622 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11623 * variables that haven't been updated yet.
11625 * So we simply find the maximum observed TSC above, then record the
11626 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11627 * the adjustment will be applied. Note that we accumulate
11628 * adjustments, in case multiple suspend cycles happen before some VCPU
11629 * gets a chance to run again. In the event that no KVM threads get a
11630 * chance to run, we will miss the entire elapsed period, as we'll have
11631 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11632 * loose cycle time. This isn't too big a deal, since the loss will be
11633 * uniform across all VCPUs (not to mention the scenario is extremely
11634 * unlikely). It is possible that a second hibernate recovery happens
11635 * much faster than a first, causing the observed TSC here to be
11636 * smaller; this would require additional padding adjustment, which is
11637 * why we set last_host_tsc to the local tsc observed here.
11639 * N.B. - this code below runs only on platforms with reliable TSC,
11640 * as that is the only way backwards_tsc is set above. Also note
11641 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11642 * have the same delta_cyc adjustment applied if backwards_tsc
11643 * is detected. Note further, this adjustment is only done once,
11644 * as we reset last_host_tsc on all VCPUs to stop this from being
11645 * called multiple times (one for each physical CPU bringup).
11647 * Platforms with unreliable TSCs don't have to deal with this, they
11648 * will be compensated by the logic in vcpu_load, which sets the TSC to
11649 * catchup mode. This will catchup all VCPUs to real time, but cannot
11650 * guarantee that they stay in perfect synchronization.
11652 if (backwards_tsc
) {
11653 u64 delta_cyc
= max_tsc
- local_tsc
;
11654 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
11655 kvm
->arch
.backwards_tsc_observed
= true;
11656 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11657 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
11658 vcpu
->arch
.last_host_tsc
= local_tsc
;
11659 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
11663 * We have to disable TSC offset matching.. if you were
11664 * booting a VM while issuing an S4 host suspend....
11665 * you may have some problem. Solving this issue is
11666 * left as an exercise to the reader.
11668 kvm
->arch
.last_tsc_nsec
= 0;
11669 kvm
->arch
.last_tsc_write
= 0;
11676 void kvm_arch_hardware_disable(void)
11678 static_call(kvm_x86_hardware_disable
)();
11679 drop_user_return_notifiers();
11682 static inline void kvm_ops_update(struct kvm_x86_init_ops
*ops
)
11684 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
11686 #define __KVM_X86_OP(func) \
11687 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
11688 #define KVM_X86_OP(func) \
11689 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
11690 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
11691 #define KVM_X86_OP_OPTIONAL_RET0(func) \
11692 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
11693 (void *)__static_call_return0);
11694 #include <asm/kvm-x86-ops.h>
11695 #undef __KVM_X86_OP
11697 kvm_pmu_ops_update(ops
->pmu_ops
);
11700 int kvm_arch_hardware_setup(void *opaque
)
11702 struct kvm_x86_init_ops
*ops
= opaque
;
11705 rdmsrl_safe(MSR_EFER
, &host_efer
);
11707 if (boot_cpu_has(X86_FEATURE_XSAVES
))
11708 rdmsrl(MSR_IA32_XSS
, host_xss
);
11710 r
= ops
->hardware_setup();
11714 kvm_ops_update(ops
);
11716 kvm_register_perf_callbacks(ops
->handle_intel_pt_intr
);
11718 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
11721 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11722 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
11723 #undef __kvm_cpu_cap_has
11725 if (kvm_has_tsc_control
) {
11727 * Make sure the user can only configure tsc_khz values that
11728 * fit into a signed integer.
11729 * A min value is not calculated because it will always
11730 * be 1 on all machines.
11732 u64 max
= min(0x7fffffffULL
,
11733 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
11734 kvm_max_guest_tsc_khz
= max
;
11736 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
11737 kvm_init_msr_list();
11741 void kvm_arch_hardware_unsetup(void)
11743 kvm_unregister_perf_callbacks();
11745 static_call(kvm_x86_hardware_unsetup
)();
11748 int kvm_arch_check_processor_compat(void *opaque
)
11750 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
11751 struct kvm_x86_init_ops
*ops
= opaque
;
11753 WARN_ON(!irqs_disabled());
11755 if (__cr4_reserved_bits(cpu_has
, c
) !=
11756 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
11759 return ops
->check_processor_compatibility();
11762 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
11764 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
11766 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
11768 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
11770 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
11773 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
11774 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
11776 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
11778 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
11780 vcpu
->arch
.l1tf_flush_l1d
= true;
11781 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
11782 pmu
->need_cleanup
= true;
11783 kvm_make_request(KVM_REQ_PMU
, vcpu
);
11785 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
11788 void kvm_arch_free_vm(struct kvm
*kvm
)
11790 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
11791 __kvm_arch_free_vm(kvm
);
11795 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
11798 unsigned long flags
;
11803 ret
= kvm_page_track_init(kvm
);
11807 ret
= kvm_mmu_init_vm(kvm
);
11809 goto out_page_track
;
11811 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
11812 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
11813 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
11815 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11816 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
11817 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11818 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
11819 &kvm
->arch
.irq_sources_bitmap
);
11821 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
11822 mutex_init(&kvm
->arch
.apic_map_lock
);
11823 seqcount_raw_spinlock_init(&kvm
->arch
.pvclock_sc
, &kvm
->arch
.tsc_write_lock
);
11824 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
11826 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
11827 pvclock_update_vm_gtod_copy(kvm
);
11828 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
11830 kvm
->arch
.default_tsc_khz
= max_tsc_khz
? : tsc_khz
;
11831 kvm
->arch
.guest_can_read_msr_platform_info
= true;
11832 kvm
->arch
.enable_pmu
= enable_pmu
;
11834 #if IS_ENABLED(CONFIG_HYPERV)
11835 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
11836 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
11839 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
11840 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
11842 kvm_apicv_init(kvm
);
11843 kvm_hv_init_vm(kvm
);
11844 kvm_xen_init_vm(kvm
);
11846 return static_call(kvm_x86_vm_init
)(kvm
);
11849 kvm_page_track_cleanup(kvm
);
11854 int kvm_arch_post_init_vm(struct kvm
*kvm
)
11856 return kvm_mmu_post_init_vm(kvm
);
11859 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
11862 kvm_mmu_unload(vcpu
);
11866 static void kvm_unload_vcpu_mmus(struct kvm
*kvm
)
11869 struct kvm_vcpu
*vcpu
;
11871 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11872 kvm_clear_async_pf_completion_queue(vcpu
);
11873 kvm_unload_vcpu_mmu(vcpu
);
11877 void kvm_arch_sync_events(struct kvm
*kvm
)
11879 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
11880 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
11885 * __x86_set_memory_region: Setup KVM internal memory slot
11887 * @kvm: the kvm pointer to the VM.
11888 * @id: the slot ID to setup.
11889 * @gpa: the GPA to install the slot (unused when @size == 0).
11890 * @size: the size of the slot. Set to zero to uninstall a slot.
11892 * This function helps to setup a KVM internal memory slot. Specify
11893 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11894 * slot. The return code can be one of the following:
11896 * HVA: on success (uninstall will return a bogus HVA)
11899 * The caller should always use IS_ERR() to check the return value
11900 * before use. Note, the KVM internal memory slots are guaranteed to
11901 * remain valid and unchanged until the VM is destroyed, i.e., the
11902 * GPA->HVA translation will not change. However, the HVA is a user
11903 * address, i.e. its accessibility is not guaranteed, and must be
11904 * accessed via __copy_{to,from}_user().
11906 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
11910 unsigned long hva
, old_npages
;
11911 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
11912 struct kvm_memory_slot
*slot
;
11914 /* Called with kvm->slots_lock held. */
11915 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
11916 return ERR_PTR_USR(-EINVAL
);
11918 slot
= id_to_memslot(slots
, id
);
11920 if (slot
&& slot
->npages
)
11921 return ERR_PTR_USR(-EEXIST
);
11924 * MAP_SHARED to prevent internal slot pages from being moved
11927 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
11928 MAP_SHARED
| MAP_ANONYMOUS
, 0);
11929 if (IS_ERR((void *)hva
))
11930 return (void __user
*)hva
;
11932 if (!slot
|| !slot
->npages
)
11935 old_npages
= slot
->npages
;
11936 hva
= slot
->userspace_addr
;
11939 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11940 struct kvm_userspace_memory_region m
;
11942 m
.slot
= id
| (i
<< 16);
11944 m
.guest_phys_addr
= gpa
;
11945 m
.userspace_addr
= hva
;
11946 m
.memory_size
= size
;
11947 r
= __kvm_set_memory_region(kvm
, &m
);
11949 return ERR_PTR_USR(r
);
11953 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11955 return (void __user
*)hva
;
11957 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11959 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11961 kvm_mmu_pre_destroy_vm(kvm
);
11964 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11966 if (current
->mm
== kvm
->mm
) {
11968 * Free memory regions allocated on behalf of userspace,
11969 * unless the memory map has changed due to process exit
11972 mutex_lock(&kvm
->slots_lock
);
11973 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11975 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11977 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11978 mutex_unlock(&kvm
->slots_lock
);
11980 kvm_unload_vcpu_mmus(kvm
);
11981 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11982 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11983 kvm_pic_destroy(kvm
);
11984 kvm_ioapic_destroy(kvm
);
11985 kvm_destroy_vcpus(kvm
);
11986 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11987 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11988 kvm_mmu_uninit_vm(kvm
);
11989 kvm_page_track_cleanup(kvm
);
11990 kvm_xen_destroy_vm(kvm
);
11991 kvm_hv_destroy_vm(kvm
);
11994 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
11998 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11999 kvfree(slot
->arch
.rmap
[i
]);
12000 slot
->arch
.rmap
[i
] = NULL
;
12004 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
12008 memslot_rmap_free(slot
);
12010 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12011 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12012 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12015 kvm_page_track_free_memslot(slot
);
12018 int memslot_rmap_alloc(struct kvm_memory_slot
*slot
, unsigned long npages
)
12020 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
12023 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12025 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12027 if (slot
->arch
.rmap
[i
])
12030 slot
->arch
.rmap
[i
] = __vcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
12031 if (!slot
->arch
.rmap
[i
]) {
12032 memslot_rmap_free(slot
);
12040 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
12041 struct kvm_memory_slot
*slot
)
12043 unsigned long npages
= slot
->npages
;
12047 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12048 * old arrays will be freed by __kvm_set_memory_region() if installing
12049 * the new memslot is successful.
12051 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
12053 if (kvm_memslots_have_rmaps(kvm
)) {
12054 r
= memslot_rmap_alloc(slot
, npages
);
12059 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12060 struct kvm_lpage_info
*linfo
;
12061 unsigned long ugfn
;
12065 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12067 linfo
= __vcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
12071 slot
->arch
.lpage_info
[i
- 1] = linfo
;
12073 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
12074 linfo
[0].disallow_lpage
= 1;
12075 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
12076 linfo
[lpages
- 1].disallow_lpage
= 1;
12077 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
12079 * If the gfn and userspace address are not aligned wrt each
12080 * other, disable large page support for this slot.
12082 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
12085 for (j
= 0; j
< lpages
; ++j
)
12086 linfo
[j
].disallow_lpage
= 1;
12090 if (kvm_page_track_create_memslot(kvm
, slot
, npages
))
12096 memslot_rmap_free(slot
);
12098 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12099 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12100 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12105 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
12107 struct kvm_vcpu
*vcpu
;
12111 * memslots->generation has been incremented.
12112 * mmio generation may have reached its maximum value.
12114 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
12116 /* Force re-initialization of steal_time cache */
12117 kvm_for_each_vcpu(i
, vcpu
, kvm
)
12118 kvm_vcpu_kick(vcpu
);
12121 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
12122 const struct kvm_memory_slot
*old
,
12123 struct kvm_memory_slot
*new,
12124 enum kvm_mr_change change
)
12126 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
) {
12127 if ((new->base_gfn
+ new->npages
- 1) > kvm_mmu_max_gfn())
12130 return kvm_alloc_memslot_metadata(kvm
, new);
12133 if (change
== KVM_MR_FLAGS_ONLY
)
12134 memcpy(&new->arch
, &old
->arch
, sizeof(old
->arch
));
12135 else if (WARN_ON_ONCE(change
!= KVM_MR_DELETE
))
12142 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
12144 struct kvm_arch
*ka
= &kvm
->arch
;
12146 if (!kvm_x86_ops
.cpu_dirty_log_size
)
12149 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
12150 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
12151 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
12153 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
12156 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
12157 struct kvm_memory_slot
*old
,
12158 const struct kvm_memory_slot
*new,
12159 enum kvm_mr_change change
)
12161 u32 old_flags
= old
? old
->flags
: 0;
12162 u32 new_flags
= new ? new->flags
: 0;
12163 bool log_dirty_pages
= new_flags
& KVM_MEM_LOG_DIRTY_PAGES
;
12166 * Update CPU dirty logging if dirty logging is being toggled. This
12167 * applies to all operations.
12169 if ((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
12170 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
12173 * Nothing more to do for RO slots (which can't be dirtied and can't be
12174 * made writable) or CREATE/MOVE/DELETE of a slot.
12176 * For a memslot with dirty logging disabled:
12177 * CREATE: No dirty mappings will already exist.
12178 * MOVE/DELETE: The old mappings will already have been cleaned up by
12179 * kvm_arch_flush_shadow_memslot()
12181 * For a memslot with dirty logging enabled:
12182 * CREATE: No shadow pages exist, thus nothing to write-protect
12183 * and no dirty bits to clear.
12184 * MOVE/DELETE: The old mappings will already have been cleaned up by
12185 * kvm_arch_flush_shadow_memslot().
12187 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new_flags
& KVM_MEM_READONLY
))
12191 * READONLY and non-flags changes were filtered out above, and the only
12192 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12193 * logging isn't being toggled on or off.
12195 if (WARN_ON_ONCE(!((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
12198 if (!log_dirty_pages
) {
12200 * Dirty logging tracks sptes in 4k granularity, meaning that
12201 * large sptes have to be split. If live migration succeeds,
12202 * the guest in the source machine will be destroyed and large
12203 * sptes will be created in the destination. However, if the
12204 * guest continues to run in the source machine (for example if
12205 * live migration fails), small sptes will remain around and
12206 * cause bad performance.
12208 * Scan sptes if dirty logging has been stopped, dropping those
12209 * which can be collapsed into a single large-page spte. Later
12210 * page faults will create the large-page sptes.
12212 kvm_mmu_zap_collapsible_sptes(kvm
, new);
12215 * Initially-all-set does not require write protecting any page,
12216 * because they're all assumed to be dirty.
12218 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
12221 if (READ_ONCE(eager_page_split
))
12222 kvm_mmu_slot_try_split_huge_pages(kvm
, new, PG_LEVEL_4K
);
12224 if (kvm_x86_ops
.cpu_dirty_log_size
) {
12225 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
12226 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
12228 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
12233 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
12234 struct kvm_memory_slot
*old
,
12235 const struct kvm_memory_slot
*new,
12236 enum kvm_mr_change change
)
12238 if (!kvm
->arch
.n_requested_mmu_pages
&&
12239 (change
== KVM_MR_CREATE
|| change
== KVM_MR_DELETE
)) {
12240 unsigned long nr_mmu_pages
;
12242 nr_mmu_pages
= kvm
->nr_memslot_pages
/ KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO
;
12243 nr_mmu_pages
= max(nr_mmu_pages
, KVM_MIN_ALLOC_MMU_PAGES
);
12244 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
12247 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
12249 /* Free the arrays associated with the old memslot. */
12250 if (change
== KVM_MR_MOVE
)
12251 kvm_arch_free_memslot(kvm
, old
);
12254 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
12256 kvm_mmu_zap_all(kvm
);
12259 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
12260 struct kvm_memory_slot
*slot
)
12262 kvm_page_track_flush_slot(kvm
, slot
);
12265 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
12267 return (is_guest_mode(vcpu
) &&
12268 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
12271 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
12273 if (!list_empty_careful(&vcpu
->async_pf
.done
))
12276 if (kvm_apic_has_events(vcpu
))
12279 if (vcpu
->arch
.pv
.pv_unhalted
)
12282 if (vcpu
->arch
.exception
.pending
)
12285 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
12286 (vcpu
->arch
.nmi_pending
&&
12287 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
12290 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
12291 (vcpu
->arch
.smi_pending
&&
12292 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
12295 if (kvm_arch_interrupt_allowed(vcpu
) &&
12296 (kvm_cpu_has_interrupt(vcpu
) ||
12297 kvm_guest_apic_has_interrupt(vcpu
)))
12300 if (kvm_hv_has_stimer_pending(vcpu
))
12303 if (is_guest_mode(vcpu
) &&
12304 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
12305 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
12308 if (kvm_xen_has_pending_events(vcpu
))
12311 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
))
12317 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
12319 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
12322 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
12324 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
12330 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
12332 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
12335 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
12336 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
12337 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
12340 return kvm_arch_dy_has_pending_interrupt(vcpu
);
12343 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
12345 if (vcpu
->arch
.guest_state_protected
)
12348 return vcpu
->arch
.preempted_in_kernel
;
12351 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu
*vcpu
)
12353 return kvm_rip_read(vcpu
);
12356 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
12358 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
12361 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
12363 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
12366 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
12368 /* Can't read the RIP when guest state is protected, just return 0 */
12369 if (vcpu
->arch
.guest_state_protected
)
12372 if (is_64_bit_mode(vcpu
))
12373 return kvm_rip_read(vcpu
);
12374 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
12375 kvm_rip_read(vcpu
));
12377 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
12379 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
12381 return kvm_get_linear_rip(vcpu
) == linear_rip
;
12383 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
12385 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
12387 unsigned long rflags
;
12389 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
12390 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
12391 rflags
&= ~X86_EFLAGS_TF
;
12394 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
12396 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
12398 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
12399 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
12400 rflags
|= X86_EFLAGS_TF
;
12401 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
12404 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
12406 __kvm_set_rflags(vcpu
, rflags
);
12407 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
12409 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
12411 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
12413 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
12415 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
12418 static inline u32
kvm_async_pf_next_probe(u32 key
)
12420 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
12423 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12425 u32 key
= kvm_async_pf_hash_fn(gfn
);
12427 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
12428 key
= kvm_async_pf_next_probe(key
);
12430 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
12433 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12436 u32 key
= kvm_async_pf_hash_fn(gfn
);
12438 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
12439 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
12440 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
12441 key
= kvm_async_pf_next_probe(key
);
12446 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12448 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
12451 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
12455 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
12457 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
12461 vcpu
->arch
.apf
.gfns
[i
] = ~0;
12463 j
= kvm_async_pf_next_probe(j
);
12464 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
12466 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
12468 * k lies cyclically in ]i,j]
12470 * |....j i.k.| or |.k..j i...|
12472 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
12473 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
12478 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
12480 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
12482 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
12486 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
12488 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
12490 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12491 &token
, offset
, sizeof(token
));
12494 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
12496 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
12499 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
12500 &val
, offset
, sizeof(val
)))
12506 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
12509 if (!kvm_pv_async_pf_enabled(vcpu
))
12512 if (vcpu
->arch
.apf
.send_user_only
&&
12513 static_call(kvm_x86_get_cpl
)(vcpu
) == 0)
12516 if (is_guest_mode(vcpu
)) {
12518 * L1 needs to opt into the special #PF vmexits that are
12519 * used to deliver async page faults.
12521 return vcpu
->arch
.apf
.delivery_as_pf_vmexit
;
12524 * Play it safe in case the guest temporarily disables paging.
12525 * The real mode IDT in particular is unlikely to have a #PF
12528 return is_paging(vcpu
);
12532 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
12534 if (unlikely(!lapic_in_kernel(vcpu
) ||
12535 kvm_event_needs_reinjection(vcpu
) ||
12536 vcpu
->arch
.exception
.pending
))
12539 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
12543 * If interrupts are off we cannot even use an artificial
12546 return kvm_arch_interrupt_allowed(vcpu
);
12549 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
12550 struct kvm_async_pf
*work
)
12552 struct x86_exception fault
;
12554 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
12555 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12557 if (kvm_can_deliver_async_pf(vcpu
) &&
12558 !apf_put_user_notpresent(vcpu
)) {
12559 fault
.vector
= PF_VECTOR
;
12560 fault
.error_code_valid
= true;
12561 fault
.error_code
= 0;
12562 fault
.nested_page_fault
= false;
12563 fault
.address
= work
->arch
.token
;
12564 fault
.async_page_fault
= true;
12565 kvm_inject_page_fault(vcpu
, &fault
);
12569 * It is not possible to deliver a paravirtualized asynchronous
12570 * page fault, but putting the guest in an artificial halt state
12571 * can be beneficial nevertheless: if an interrupt arrives, we
12572 * can deliver it timely and perhaps the guest will schedule
12573 * another process. When the instruction that triggered a page
12574 * fault is retried, hopefully the page will be ready in the host.
12576 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
12581 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
12582 struct kvm_async_pf
*work
)
12584 struct kvm_lapic_irq irq
= {
12585 .delivery_mode
= APIC_DM_FIXED
,
12586 .vector
= vcpu
->arch
.apf
.vec
12589 if (work
->wakeup_all
)
12590 work
->arch
.token
= ~0; /* broadcast wakeup */
12592 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
12593 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
12595 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
12596 kvm_pv_async_pf_enabled(vcpu
) &&
12597 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
12598 vcpu
->arch
.apf
.pageready_pending
= true;
12599 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
12602 vcpu
->arch
.apf
.halted
= false;
12603 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12606 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
12608 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
12609 if (!vcpu
->arch
.apf
.pageready_pending
)
12610 kvm_vcpu_kick(vcpu
);
12613 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
12615 if (!kvm_pv_async_pf_enabled(vcpu
))
12618 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
12621 void kvm_arch_start_assignment(struct kvm
*kvm
)
12623 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
12624 static_call_cond(kvm_x86_pi_start_assignment
)(kvm
);
12626 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
12628 void kvm_arch_end_assignment(struct kvm
*kvm
)
12630 atomic_dec(&kvm
->arch
.assigned_device_count
);
12632 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
12634 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
12636 return atomic_read(&kvm
->arch
.assigned_device_count
);
12638 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
12640 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
12642 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
12644 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
12646 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
12648 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
12650 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
12652 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
12654 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
12656 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
12658 bool kvm_arch_has_irq_bypass(void)
12663 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
12664 struct irq_bypass_producer
*prod
)
12666 struct kvm_kernel_irqfd
*irqfd
=
12667 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12670 irqfd
->producer
= prod
;
12671 kvm_arch_start_assignment(irqfd
->kvm
);
12672 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
,
12673 prod
->irq
, irqfd
->gsi
, 1);
12676 kvm_arch_end_assignment(irqfd
->kvm
);
12681 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
12682 struct irq_bypass_producer
*prod
)
12685 struct kvm_kernel_irqfd
*irqfd
=
12686 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
12688 WARN_ON(irqfd
->producer
!= prod
);
12689 irqfd
->producer
= NULL
;
12692 * When producer of consumer is unregistered, we change back to
12693 * remapped mode, so we can re-use the current implementation
12694 * when the irq is masked/disabled or the consumer side (KVM
12695 * int this case doesn't want to receive the interrupts.
12697 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
12699 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
12700 " fails: %d\n", irqfd
->consumer
.token
, ret
);
12702 kvm_arch_end_assignment(irqfd
->kvm
);
12705 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
12706 uint32_t guest_irq
, bool set
)
12708 return static_call(kvm_x86_pi_update_irte
)(kvm
, host_irq
, guest_irq
, set
);
12711 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry
*old
,
12712 struct kvm_kernel_irq_routing_entry
*new)
12714 if (new->type
!= KVM_IRQ_ROUTING_MSI
)
12717 return !!memcmp(&old
->msi
, &new->msi
, sizeof(new->msi
));
12720 bool kvm_vector_hashing_enabled(void)
12722 return vector_hashing
;
12725 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
12727 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
12729 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
12732 int kvm_spec_ctrl_test_value(u64 value
)
12735 * test that setting IA32_SPEC_CTRL to given value
12736 * is allowed by the host processor
12740 unsigned long flags
;
12743 local_irq_save(flags
);
12745 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
12747 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
12750 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
12752 local_irq_restore(flags
);
12756 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
12758 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
12760 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
12761 struct x86_exception fault
;
12762 u64 access
= error_code
&
12763 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
12765 if (!(error_code
& PFERR_PRESENT_MASK
) ||
12766 mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
12768 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12769 * tables probably do not match the TLB. Just proceed
12770 * with the error code that the processor gave.
12772 fault
.vector
= PF_VECTOR
;
12773 fault
.error_code_valid
= true;
12774 fault
.error_code
= error_code
;
12775 fault
.nested_page_fault
= false;
12776 fault
.address
= gva
;
12778 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
12780 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
12783 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12784 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12785 * indicates whether exit to userspace is needed.
12787 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
12788 struct x86_exception
*e
)
12790 if (r
== X86EMUL_PROPAGATE_FAULT
) {
12791 kvm_inject_emulated_page_fault(vcpu
, e
);
12796 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12797 * while handling a VMX instruction KVM could've handled the request
12798 * correctly by exiting to userspace and performing I/O but there
12799 * doesn't seem to be a real use-case behind such requests, just return
12800 * KVM_EXIT_INTERNAL_ERROR for now.
12802 kvm_prepare_emulation_failure_exit(vcpu
);
12806 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
12808 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
12811 struct x86_exception e
;
12818 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
12819 if (r
!= X86EMUL_CONTINUE
)
12820 return kvm_handle_memory_failure(vcpu
, r
, &e
);
12822 if (operand
.pcid
>> 12 != 0) {
12823 kvm_inject_gp(vcpu
, 0);
12827 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
12830 case INVPCID_TYPE_INDIV_ADDR
:
12831 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
12832 is_noncanonical_address(operand
.gla
, vcpu
)) {
12833 kvm_inject_gp(vcpu
, 0);
12836 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
12837 return kvm_skip_emulated_instruction(vcpu
);
12839 case INVPCID_TYPE_SINGLE_CTXT
:
12840 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
12841 kvm_inject_gp(vcpu
, 0);
12845 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
12846 return kvm_skip_emulated_instruction(vcpu
);
12848 case INVPCID_TYPE_ALL_NON_GLOBAL
:
12850 * Currently, KVM doesn't mark global entries in the shadow
12851 * page tables, so a non-global flush just degenerates to a
12852 * global flush. If needed, we could optimize this later by
12853 * keeping track of global entries in shadow page tables.
12857 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
12858 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12859 return kvm_skip_emulated_instruction(vcpu
);
12862 kvm_inject_gp(vcpu
, 0);
12866 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
12868 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
12870 struct kvm_run
*run
= vcpu
->run
;
12871 struct kvm_mmio_fragment
*frag
;
12874 BUG_ON(!vcpu
->mmio_needed
);
12876 /* Complete previous fragment */
12877 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
12878 len
= min(8u, frag
->len
);
12879 if (!vcpu
->mmio_is_write
)
12880 memcpy(frag
->data
, run
->mmio
.data
, len
);
12882 if (frag
->len
<= 8) {
12883 /* Switch to the next fragment. */
12885 vcpu
->mmio_cur_fragment
++;
12887 /* Go forward to the next mmio piece. */
12893 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
12894 vcpu
->mmio_needed
= 0;
12896 // VMG change, at this point, we're always done
12897 // RIP has already been advanced
12901 // More MMIO is needed
12902 run
->mmio
.phys_addr
= frag
->gpa
;
12903 run
->mmio
.len
= min(8u, frag
->len
);
12904 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
12905 if (run
->mmio
.is_write
)
12906 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12907 run
->exit_reason
= KVM_EXIT_MMIO
;
12909 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12914 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12918 struct kvm_mmio_fragment
*frag
;
12923 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12924 if (handled
== bytes
)
12931 /*TODO: Check if need to increment number of frags */
12932 frag
= vcpu
->mmio_fragments
;
12933 vcpu
->mmio_nr_fragments
= 1;
12938 vcpu
->mmio_needed
= 1;
12939 vcpu
->mmio_cur_fragment
= 0;
12941 vcpu
->run
->mmio
.phys_addr
= gpa
;
12942 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12943 vcpu
->run
->mmio
.is_write
= 1;
12944 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
12945 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12947 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12951 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12953 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12957 struct kvm_mmio_fragment
*frag
;
12962 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12963 if (handled
== bytes
)
12970 /*TODO: Check if need to increment number of frags */
12971 frag
= vcpu
->mmio_fragments
;
12972 vcpu
->mmio_nr_fragments
= 1;
12977 vcpu
->mmio_needed
= 1;
12978 vcpu
->mmio_cur_fragment
= 0;
12980 vcpu
->run
->mmio
.phys_addr
= gpa
;
12981 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12982 vcpu
->run
->mmio
.is_write
= 0;
12983 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12985 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12989 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12991 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12992 unsigned int port
);
12994 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12996 int size
= vcpu
->arch
.pio
.size
;
12997 int port
= vcpu
->arch
.pio
.port
;
12999 vcpu
->arch
.pio
.count
= 0;
13000 if (vcpu
->arch
.sev_pio_count
)
13001 return kvm_sev_es_outs(vcpu
, size
, port
);
13005 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13009 unsigned int count
=
13010 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13011 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
13013 /* memcpy done already by emulator_pio_out. */
13014 vcpu
->arch
.sev_pio_count
-= count
;
13015 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
13019 /* Emulation done by the kernel. */
13020 if (!vcpu
->arch
.sev_pio_count
)
13024 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
13028 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13029 unsigned int port
);
13031 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
13033 unsigned count
= vcpu
->arch
.pio
.count
;
13034 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
13035 vcpu
->arch
.sev_pio_count
-= count
;
13036 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
13039 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
13041 int size
= vcpu
->arch
.pio
.size
;
13042 int port
= vcpu
->arch
.pio
.port
;
13044 advance_sev_es_emulated_ins(vcpu
);
13045 if (vcpu
->arch
.sev_pio_count
)
13046 return kvm_sev_es_ins(vcpu
, size
, port
);
13050 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13054 unsigned int count
=
13055 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13056 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
13059 /* Emulation done by the kernel. */
13060 advance_sev_es_emulated_ins(vcpu
);
13061 if (!vcpu
->arch
.sev_pio_count
)
13065 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
13069 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
13070 unsigned int port
, void *data
, unsigned int count
,
13073 vcpu
->arch
.sev_pio_data
= data
;
13074 vcpu
->arch
.sev_pio_count
= count
;
13075 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
13076 : kvm_sev_es_outs(vcpu
, size
, port
);
13078 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
13080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
13081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
13082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
13083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
13084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
13085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
13086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
13087 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
13088 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
13089 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
13090 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
13091 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
13092 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
13093 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
13094 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
13095 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
13096 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
13097 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
13098 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
13099 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
13100 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
13101 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
13102 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath
);
13103 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq
);
13104 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
13105 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
13106 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
13107 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);
13109 static int __init
kvm_x86_init(void)
13111 kvm_mmu_x86_module_init();
13114 module_init(kvm_x86_init
);
13116 static void __exit
kvm_x86_exit(void)
13119 * If module_init() is implemented, module_exit() must also be
13120 * implemented to allow module unload.
13123 module_exit(kvm_x86_exit
);