2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 unsigned int min_timer_period_us
= 500;
111 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
113 static bool __read_mostly kvmclock_periodic_sync
= true;
114 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
116 bool __read_mostly kvm_has_tsc_control
;
117 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
118 u32 __read_mostly kvm_max_guest_tsc_khz
;
119 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
120 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
121 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
122 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
123 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
124 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
125 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
127 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
128 static u32 __read_mostly tsc_tolerance_ppm
= 250;
129 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
131 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
132 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
133 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
135 static bool __read_mostly vector_hashing
= true;
136 module_param(vector_hashing
, bool, S_IRUGO
);
138 #define KVM_NR_SHARED_MSRS 16
140 struct kvm_shared_msrs_global
{
142 u32 msrs
[KVM_NR_SHARED_MSRS
];
145 struct kvm_shared_msrs
{
146 struct user_return_notifier urn
;
148 struct kvm_shared_msr_values
{
151 } values
[KVM_NR_SHARED_MSRS
];
154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
155 static struct kvm_shared_msrs __percpu
*shared_msrs
;
157 struct kvm_stats_debugfs_item debugfs_entries
[] = {
158 { "pf_fixed", VCPU_STAT(pf_fixed
) },
159 { "pf_guest", VCPU_STAT(pf_guest
) },
160 { "tlb_flush", VCPU_STAT(tlb_flush
) },
161 { "invlpg", VCPU_STAT(invlpg
) },
162 { "exits", VCPU_STAT(exits
) },
163 { "io_exits", VCPU_STAT(io_exits
) },
164 { "mmio_exits", VCPU_STAT(mmio_exits
) },
165 { "signal_exits", VCPU_STAT(signal_exits
) },
166 { "irq_window", VCPU_STAT(irq_window_exits
) },
167 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
168 { "halt_exits", VCPU_STAT(halt_exits
) },
169 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
170 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
171 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
172 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
173 { "hypercalls", VCPU_STAT(hypercalls
) },
174 { "request_irq", VCPU_STAT(request_irq_exits
) },
175 { "irq_exits", VCPU_STAT(irq_exits
) },
176 { "host_state_reload", VCPU_STAT(host_state_reload
) },
177 { "efer_reload", VCPU_STAT(efer_reload
) },
178 { "fpu_reload", VCPU_STAT(fpu_reload
) },
179 { "insn_emulation", VCPU_STAT(insn_emulation
) },
180 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
181 { "irq_injections", VCPU_STAT(irq_injections
) },
182 { "nmi_injections", VCPU_STAT(nmi_injections
) },
183 { "req_event", VCPU_STAT(req_event
) },
184 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
185 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
186 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
187 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
188 { "mmu_flooded", VM_STAT(mmu_flooded
) },
189 { "mmu_recycled", VM_STAT(mmu_recycled
) },
190 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
191 { "mmu_unsync", VM_STAT(mmu_unsync
) },
192 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
193 { "largepages", VM_STAT(lpages
) },
194 { "max_mmu_page_hash_collisions",
195 VM_STAT(max_mmu_page_hash_collisions
) },
199 u64 __read_mostly host_xcr0
;
201 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
203 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
206 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
207 vcpu
->arch
.apf
.gfns
[i
] = ~0;
210 static void kvm_on_user_return(struct user_return_notifier
*urn
)
213 struct kvm_shared_msrs
*locals
214 = container_of(urn
, struct kvm_shared_msrs
, urn
);
215 struct kvm_shared_msr_values
*values
;
219 * Disabling irqs at this point since the following code could be
220 * interrupted and executed through kvm_arch_hardware_disable()
222 local_irq_save(flags
);
223 if (locals
->registered
) {
224 locals
->registered
= false;
225 user_return_notifier_unregister(urn
);
227 local_irq_restore(flags
);
228 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
229 values
= &locals
->values
[slot
];
230 if (values
->host
!= values
->curr
) {
231 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
232 values
->curr
= values
->host
;
237 static void shared_msr_update(unsigned slot
, u32 msr
)
240 unsigned int cpu
= smp_processor_id();
241 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
243 /* only read, and nobody should modify it at this time,
244 * so don't need lock */
245 if (slot
>= shared_msrs_global
.nr
) {
246 printk(KERN_ERR
"kvm: invalid MSR slot!");
249 rdmsrl_safe(msr
, &value
);
250 smsr
->values
[slot
].host
= value
;
251 smsr
->values
[slot
].curr
= value
;
254 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
256 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
257 shared_msrs_global
.msrs
[slot
] = msr
;
258 if (slot
>= shared_msrs_global
.nr
)
259 shared_msrs_global
.nr
= slot
+ 1;
261 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
263 static void kvm_shared_msr_cpu_online(void)
267 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
268 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
271 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
273 unsigned int cpu
= smp_processor_id();
274 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
277 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
279 smsr
->values
[slot
].curr
= value
;
280 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
284 if (!smsr
->registered
) {
285 smsr
->urn
.on_user_return
= kvm_on_user_return
;
286 user_return_notifier_register(&smsr
->urn
);
287 smsr
->registered
= true;
291 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
293 static void drop_user_return_notifiers(void)
295 unsigned int cpu
= smp_processor_id();
296 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
298 if (smsr
->registered
)
299 kvm_on_user_return(&smsr
->urn
);
302 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
304 return vcpu
->arch
.apic_base
;
306 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
308 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
310 u64 old_state
= vcpu
->arch
.apic_base
&
311 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
312 u64 new_state
= msr_info
->data
&
313 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
314 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
315 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
317 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
319 if (!msr_info
->host_initiated
&&
320 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
321 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
322 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
326 kvm_lapic_set_base(vcpu
, msr_info
->data
);
329 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
331 asmlinkage __visible
void kvm_spurious_fault(void)
333 /* Fault while not rebooting. We want the trace. */
336 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
338 #define EXCPT_BENIGN 0
339 #define EXCPT_CONTRIBUTORY 1
342 static int exception_class(int vector
)
352 return EXCPT_CONTRIBUTORY
;
359 #define EXCPT_FAULT 0
361 #define EXCPT_ABORT 2
362 #define EXCPT_INTERRUPT 3
364 static int exception_type(int vector
)
368 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
369 return EXCPT_INTERRUPT
;
373 /* #DB is trap, as instruction watchpoints are handled elsewhere */
374 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
377 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
380 /* Reserved exceptions will result in fault */
384 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
385 unsigned nr
, bool has_error
, u32 error_code
,
391 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
393 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
395 if (has_error
&& !is_protmode(vcpu
))
399 * On vmentry, vcpu->arch.exception.pending is only
400 * true if an event injection was blocked by
401 * nested_run_pending. In that case, however,
402 * vcpu_enter_guest requests an immediate exit,
403 * and the guest shouldn't proceed far enough to
406 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
407 vcpu
->arch
.exception
.injected
= true;
409 vcpu
->arch
.exception
.pending
= true;
410 vcpu
->arch
.exception
.injected
= false;
412 vcpu
->arch
.exception
.has_error_code
= has_error
;
413 vcpu
->arch
.exception
.nr
= nr
;
414 vcpu
->arch
.exception
.error_code
= error_code
;
418 /* to check exception */
419 prev_nr
= vcpu
->arch
.exception
.nr
;
420 if (prev_nr
== DF_VECTOR
) {
421 /* triple fault -> shutdown */
422 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
425 class1
= exception_class(prev_nr
);
426 class2
= exception_class(nr
);
427 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
428 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
430 * Generate double fault per SDM Table 5-5. Set
431 * exception.pending = true so that the double fault
432 * can trigger a nested vmexit.
434 vcpu
->arch
.exception
.pending
= true;
435 vcpu
->arch
.exception
.injected
= false;
436 vcpu
->arch
.exception
.has_error_code
= true;
437 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
438 vcpu
->arch
.exception
.error_code
= 0;
440 /* replace previous exception with a new one in a hope
441 that instruction re-execution will regenerate lost
446 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
448 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
450 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
452 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
454 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
456 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
458 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
461 kvm_inject_gp(vcpu
, 0);
463 return kvm_skip_emulated_instruction(vcpu
);
467 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
469 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
471 ++vcpu
->stat
.pf_guest
;
472 vcpu
->arch
.exception
.nested_apf
=
473 is_guest_mode(vcpu
) && fault
->async_page_fault
;
474 if (vcpu
->arch
.exception
.nested_apf
)
475 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
477 vcpu
->arch
.cr2
= fault
->address
;
478 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
480 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
482 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
484 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
485 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
487 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
489 return fault
->nested_page_fault
;
492 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
494 atomic_inc(&vcpu
->arch
.nmi_queued
);
495 kvm_make_request(KVM_REQ_NMI
, vcpu
);
497 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
499 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
501 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
503 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
505 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
507 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
509 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
512 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
513 * a #GP and return false.
515 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
517 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
519 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
522 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
524 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
526 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
529 kvm_queue_exception(vcpu
, UD_VECTOR
);
532 EXPORT_SYMBOL_GPL(kvm_require_dr
);
535 * This function will be used to read from the physical memory of the currently
536 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
537 * can read from guest physical or from the guest's guest physical memory.
539 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
540 gfn_t ngfn
, void *data
, int offset
, int len
,
543 struct x86_exception exception
;
547 ngpa
= gfn_to_gpa(ngfn
);
548 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
549 if (real_gfn
== UNMAPPED_GVA
)
552 real_gfn
= gpa_to_gfn(real_gfn
);
554 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
556 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
558 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
559 void *data
, int offset
, int len
, u32 access
)
561 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
562 data
, offset
, len
, access
);
566 * Load the pae pdptrs. Return true is they are all valid.
568 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
570 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
571 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
574 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
576 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
577 offset
* sizeof(u64
), sizeof(pdpte
),
578 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
583 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
584 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
586 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
593 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
594 __set_bit(VCPU_EXREG_PDPTR
,
595 (unsigned long *)&vcpu
->arch
.regs_avail
);
596 __set_bit(VCPU_EXREG_PDPTR
,
597 (unsigned long *)&vcpu
->arch
.regs_dirty
);
602 EXPORT_SYMBOL_GPL(load_pdptrs
);
604 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
606 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
612 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
615 if (!test_bit(VCPU_EXREG_PDPTR
,
616 (unsigned long *)&vcpu
->arch
.regs_avail
))
619 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
620 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
621 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
622 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
625 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
630 EXPORT_SYMBOL_GPL(pdptrs_changed
);
632 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
634 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
635 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
640 if (cr0
& 0xffffffff00000000UL
)
644 cr0
&= ~CR0_RESERVED_BITS
;
646 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
649 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
652 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
654 if ((vcpu
->arch
.efer
& EFER_LME
)) {
659 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
664 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
669 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
672 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
674 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
675 kvm_clear_async_pf_completion_queue(vcpu
);
676 kvm_async_pf_hash_reset(vcpu
);
679 if ((cr0
^ old_cr0
) & update_bits
)
680 kvm_mmu_reset_context(vcpu
);
682 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
683 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
684 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
685 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
689 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
691 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
693 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
695 EXPORT_SYMBOL_GPL(kvm_lmsw
);
697 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
699 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
700 !vcpu
->guest_xcr0_loaded
) {
701 /* kvm_set_xcr() also depends on this */
702 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
703 vcpu
->guest_xcr0_loaded
= 1;
707 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
709 if (vcpu
->guest_xcr0_loaded
) {
710 if (vcpu
->arch
.xcr0
!= host_xcr0
)
711 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
712 vcpu
->guest_xcr0_loaded
= 0;
716 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
719 u64 old_xcr0
= vcpu
->arch
.xcr0
;
722 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
723 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
725 if (!(xcr0
& XFEATURE_MASK_FP
))
727 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
731 * Do not allow the guest to set bits that we do not support
732 * saving. However, xcr0 bit 0 is always set, even if the
733 * emulated CPU does not support XSAVE (see fx_init).
735 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
736 if (xcr0
& ~valid_bits
)
739 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
740 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
743 if (xcr0
& XFEATURE_MASK_AVX512
) {
744 if (!(xcr0
& XFEATURE_MASK_YMM
))
746 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
749 vcpu
->arch
.xcr0
= xcr0
;
751 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
752 kvm_update_cpuid(vcpu
);
756 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
758 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
759 __kvm_set_xcr(vcpu
, index
, xcr
)) {
760 kvm_inject_gp(vcpu
, 0);
765 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
767 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
769 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
770 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
771 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
773 if (cr4
& CR4_RESERVED_BITS
)
776 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
779 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
782 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
785 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
788 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
791 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
794 if (is_long_mode(vcpu
)) {
795 if (!(cr4
& X86_CR4_PAE
))
797 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
798 && ((cr4
^ old_cr4
) & pdptr_bits
)
799 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
803 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
804 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
807 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
808 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
812 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
815 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
816 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
817 kvm_mmu_reset_context(vcpu
);
819 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
820 kvm_update_cpuid(vcpu
);
824 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
826 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
829 cr3
&= ~CR3_PCID_INVD
;
832 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
833 kvm_mmu_sync_roots(vcpu
);
834 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
838 if (is_long_mode(vcpu
) &&
839 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 62)))
841 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
842 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
845 vcpu
->arch
.cr3
= cr3
;
846 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
847 kvm_mmu_new_cr3(vcpu
);
850 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
852 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
854 if (cr8
& CR8_RESERVED_BITS
)
856 if (lapic_in_kernel(vcpu
))
857 kvm_lapic_set_tpr(vcpu
, cr8
);
859 vcpu
->arch
.cr8
= cr8
;
862 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
864 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
866 if (lapic_in_kernel(vcpu
))
867 return kvm_lapic_get_cr8(vcpu
);
869 return vcpu
->arch
.cr8
;
871 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
873 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
877 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
878 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
879 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
880 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
884 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
886 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
887 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
890 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
894 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
895 dr7
= vcpu
->arch
.guest_debug_dr7
;
897 dr7
= vcpu
->arch
.dr7
;
898 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
899 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
900 if (dr7
& DR7_BP_EN_MASK
)
901 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
904 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
906 u64 fixed
= DR6_FIXED_1
;
908 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
913 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
917 vcpu
->arch
.db
[dr
] = val
;
918 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
919 vcpu
->arch
.eff_db
[dr
] = val
;
924 if (val
& 0xffffffff00000000ULL
)
926 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
927 kvm_update_dr6(vcpu
);
932 if (val
& 0xffffffff00000000ULL
)
934 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
935 kvm_update_dr7(vcpu
);
942 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
944 if (__kvm_set_dr(vcpu
, dr
, val
)) {
945 kvm_inject_gp(vcpu
, 0);
950 EXPORT_SYMBOL_GPL(kvm_set_dr
);
952 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
956 *val
= vcpu
->arch
.db
[dr
];
961 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
962 *val
= vcpu
->arch
.dr6
;
964 *val
= kvm_x86_ops
->get_dr6(vcpu
);
969 *val
= vcpu
->arch
.dr7
;
974 EXPORT_SYMBOL_GPL(kvm_get_dr
);
976 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
978 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
982 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
985 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
986 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
989 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
992 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
993 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
995 * This list is modified at module load time to reflect the
996 * capabilities of the host cpu. This capabilities test skips MSRs that are
997 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
998 * may depend on host virtualization features rather than host cpu features.
1001 static u32 msrs_to_save
[] = {
1002 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1004 #ifdef CONFIG_X86_64
1005 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1007 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1008 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1009 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1012 static unsigned num_msrs_to_save
;
1014 static u32 emulated_msrs
[] = {
1015 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1016 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1017 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1018 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1019 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1020 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1021 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1023 HV_X64_MSR_VP_INDEX
,
1024 HV_X64_MSR_VP_RUNTIME
,
1025 HV_X64_MSR_SCONTROL
,
1026 HV_X64_MSR_STIMER0_CONFIG
,
1027 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1030 MSR_IA32_TSC_ADJUST
,
1031 MSR_IA32_TSCDEADLINE
,
1032 MSR_IA32_MISC_ENABLE
,
1033 MSR_IA32_MCG_STATUS
,
1035 MSR_IA32_MCG_EXT_CTL
,
1038 MSR_MISC_FEATURES_ENABLES
,
1041 static unsigned num_emulated_msrs
;
1043 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1045 if (efer
& efer_reserved_bits
)
1048 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1051 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1056 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1058 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1060 u64 old_efer
= vcpu
->arch
.efer
;
1062 if (!kvm_valid_efer(vcpu
, efer
))
1066 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1070 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1072 kvm_x86_ops
->set_efer(vcpu
, efer
);
1074 /* Update reserved bits */
1075 if ((efer
^ old_efer
) & EFER_NX
)
1076 kvm_mmu_reset_context(vcpu
);
1081 void kvm_enable_efer_bits(u64 mask
)
1083 efer_reserved_bits
&= ~mask
;
1085 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1088 * Writes msr value into into the appropriate "register".
1089 * Returns 0 on success, non-0 otherwise.
1090 * Assumes vcpu_load() was already called.
1092 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1094 switch (msr
->index
) {
1097 case MSR_KERNEL_GS_BASE
:
1100 if (is_noncanonical_address(msr
->data
, vcpu
))
1103 case MSR_IA32_SYSENTER_EIP
:
1104 case MSR_IA32_SYSENTER_ESP
:
1106 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1107 * non-canonical address is written on Intel but not on
1108 * AMD (which ignores the top 32-bits, because it does
1109 * not implement 64-bit SYSENTER).
1111 * 64-bit code should hence be able to write a non-canonical
1112 * value on AMD. Making the address canonical ensures that
1113 * vmentry does not fail on Intel after writing a non-canonical
1114 * value, and that something deterministic happens if the guest
1115 * invokes 64-bit SYSENTER.
1117 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1119 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1121 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1124 * Adapt set_msr() to msr_io()'s calling convention
1126 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1128 struct msr_data msr
;
1132 msr
.host_initiated
= true;
1133 r
= kvm_get_msr(vcpu
, &msr
);
1141 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1143 struct msr_data msr
;
1147 msr
.host_initiated
= true;
1148 return kvm_set_msr(vcpu
, &msr
);
1151 #ifdef CONFIG_X86_64
1152 struct pvclock_gtod_data
{
1155 struct { /* extract of a clocksource struct */
1168 static struct pvclock_gtod_data pvclock_gtod_data
;
1170 static void update_pvclock_gtod(struct timekeeper
*tk
)
1172 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1175 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1177 write_seqcount_begin(&vdata
->seq
);
1179 /* copy pvclock gtod data */
1180 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1181 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1182 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1183 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1184 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1186 vdata
->boot_ns
= boot_ns
;
1187 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1189 vdata
->wall_time_sec
= tk
->xtime_sec
;
1191 write_seqcount_end(&vdata
->seq
);
1195 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1198 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1199 * vcpu_enter_guest. This function is only called from
1200 * the physical CPU that is running vcpu.
1202 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1205 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1209 struct pvclock_wall_clock wc
;
1210 struct timespec64 boot
;
1215 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1220 ++version
; /* first time write, random junk */
1224 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1228 * The guest calculates current wall clock time by adding
1229 * system time (updated by kvm_guest_time_update below) to the
1230 * wall clock specified here. guest system time equals host
1231 * system time for us, thus we must fill in host boot time here.
1233 getboottime64(&boot
);
1235 if (kvm
->arch
.kvmclock_offset
) {
1236 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1237 boot
= timespec64_sub(boot
, ts
);
1239 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1240 wc
.nsec
= boot
.tv_nsec
;
1241 wc
.version
= version
;
1243 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1246 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1249 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1251 do_shl32_div32(dividend
, divisor
);
1255 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1256 s8
*pshift
, u32
*pmultiplier
)
1264 scaled64
= scaled_hz
;
1265 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1270 tps32
= (uint32_t)tps64
;
1271 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1272 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1280 *pmultiplier
= div_frac(scaled64
, tps32
);
1282 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1283 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1286 #ifdef CONFIG_X86_64
1287 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1290 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1291 static unsigned long max_tsc_khz
;
1293 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1295 u64 v
= (u64
)khz
* (1000000 + ppm
);
1300 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1304 /* Guest TSC same frequency as host TSC? */
1306 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1310 /* TSC scaling supported? */
1311 if (!kvm_has_tsc_control
) {
1312 if (user_tsc_khz
> tsc_khz
) {
1313 vcpu
->arch
.tsc_catchup
= 1;
1314 vcpu
->arch
.tsc_always_catchup
= 1;
1317 WARN(1, "user requested TSC rate below hardware speed\n");
1322 /* TSC scaling required - calculate ratio */
1323 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1324 user_tsc_khz
, tsc_khz
);
1326 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1327 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1332 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1336 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1338 u32 thresh_lo
, thresh_hi
;
1339 int use_scaling
= 0;
1341 /* tsc_khz can be zero if TSC calibration fails */
1342 if (user_tsc_khz
== 0) {
1343 /* set tsc_scaling_ratio to a safe value */
1344 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1348 /* Compute a scale to convert nanoseconds in TSC cycles */
1349 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1350 &vcpu
->arch
.virtual_tsc_shift
,
1351 &vcpu
->arch
.virtual_tsc_mult
);
1352 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1355 * Compute the variation in TSC rate which is acceptable
1356 * within the range of tolerance and decide if the
1357 * rate being applied is within that bounds of the hardware
1358 * rate. If so, no scaling or compensation need be done.
1360 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1361 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1362 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1363 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1366 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1369 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1371 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1372 vcpu
->arch
.virtual_tsc_mult
,
1373 vcpu
->arch
.virtual_tsc_shift
);
1374 tsc
+= vcpu
->arch
.this_tsc_write
;
1378 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1380 #ifdef CONFIG_X86_64
1382 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1383 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1385 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1386 atomic_read(&vcpu
->kvm
->online_vcpus
));
1389 * Once the masterclock is enabled, always perform request in
1390 * order to update it.
1392 * In order to enable masterclock, the host clocksource must be TSC
1393 * and the vcpus need to have matched TSCs. When that happens,
1394 * perform request to enable masterclock.
1396 if (ka
->use_master_clock
||
1397 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1398 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1400 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1401 atomic_read(&vcpu
->kvm
->online_vcpus
),
1402 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1406 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1408 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1409 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1413 * Multiply tsc by a fixed point number represented by ratio.
1415 * The most significant 64-N bits (mult) of ratio represent the
1416 * integral part of the fixed point number; the remaining N bits
1417 * (frac) represent the fractional part, ie. ratio represents a fixed
1418 * point number (mult + frac * 2^(-N)).
1420 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1422 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1424 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1427 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1430 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1432 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1433 _tsc
= __scale_tsc(ratio
, tsc
);
1437 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1439 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1443 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1445 return target_tsc
- tsc
;
1448 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1450 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1452 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1454 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1456 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1457 vcpu
->arch
.tsc_offset
= offset
;
1460 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1462 struct kvm
*kvm
= vcpu
->kvm
;
1463 u64 offset
, ns
, elapsed
;
1464 unsigned long flags
;
1466 bool already_matched
;
1467 u64 data
= msr
->data
;
1468 bool synchronizing
= false;
1470 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1471 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1472 ns
= ktime_get_boot_ns();
1473 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1475 if (vcpu
->arch
.virtual_tsc_khz
) {
1476 if (data
== 0 && msr
->host_initiated
) {
1478 * detection of vcpu initialization -- need to sync
1479 * with other vCPUs. This particularly helps to keep
1480 * kvm_clock stable after CPU hotplug
1482 synchronizing
= true;
1484 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1485 nsec_to_cycles(vcpu
, elapsed
);
1486 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1488 * Special case: TSC write with a small delta (1 second)
1489 * of virtual cycle time against real time is
1490 * interpreted as an attempt to synchronize the CPU.
1492 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1493 data
+ tsc_hz
> tsc_exp
;
1498 * For a reliable TSC, we can match TSC offsets, and for an unstable
1499 * TSC, we add elapsed time in this computation. We could let the
1500 * compensation code attempt to catch up if we fall behind, but
1501 * it's better to try to match offsets from the beginning.
1503 if (synchronizing
&&
1504 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1505 if (!check_tsc_unstable()) {
1506 offset
= kvm
->arch
.cur_tsc_offset
;
1507 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1509 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1511 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1512 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1515 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1518 * We split periods of matched TSC writes into generations.
1519 * For each generation, we track the original measured
1520 * nanosecond time, offset, and write, so if TSCs are in
1521 * sync, we can match exact offset, and if not, we can match
1522 * exact software computation in compute_guest_tsc()
1524 * These values are tracked in kvm->arch.cur_xxx variables.
1526 kvm
->arch
.cur_tsc_generation
++;
1527 kvm
->arch
.cur_tsc_nsec
= ns
;
1528 kvm
->arch
.cur_tsc_write
= data
;
1529 kvm
->arch
.cur_tsc_offset
= offset
;
1531 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1532 kvm
->arch
.cur_tsc_generation
, data
);
1536 * We also track th most recent recorded KHZ, write and time to
1537 * allow the matching interval to be extended at each write.
1539 kvm
->arch
.last_tsc_nsec
= ns
;
1540 kvm
->arch
.last_tsc_write
= data
;
1541 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1543 vcpu
->arch
.last_guest_tsc
= data
;
1545 /* Keep track of which generation this VCPU has synchronized to */
1546 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1547 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1548 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1550 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1551 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1553 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1554 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1556 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1558 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1559 } else if (!already_matched
) {
1560 kvm
->arch
.nr_vcpus_matched_tsc
++;
1563 kvm_track_tsc_matching(vcpu
);
1564 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1567 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1569 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1572 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1575 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1577 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1578 WARN_ON(adjustment
< 0);
1579 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1580 adjust_tsc_offset_guest(vcpu
, adjustment
);
1583 #ifdef CONFIG_X86_64
1585 static u64
read_tsc(void)
1587 u64 ret
= (u64
)rdtsc_ordered();
1588 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1590 if (likely(ret
>= last
))
1594 * GCC likes to generate cmov here, but this branch is extremely
1595 * predictable (it's just a function of time and the likely is
1596 * very likely) and there's a data dependence, so force GCC
1597 * to generate a branch instead. I don't barrier() because
1598 * we don't actually need a barrier, and if this function
1599 * ever gets inlined it will generate worse code.
1605 static inline u64
vgettsc(u64
*cycle_now
)
1608 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1610 *cycle_now
= read_tsc();
1612 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1613 return v
* gtod
->clock
.mult
;
1616 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1618 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1624 seq
= read_seqcount_begin(>od
->seq
);
1625 mode
= gtod
->clock
.vclock_mode
;
1626 ns
= gtod
->nsec_base
;
1627 ns
+= vgettsc(cycle_now
);
1628 ns
>>= gtod
->clock
.shift
;
1629 ns
+= gtod
->boot_ns
;
1630 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1636 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1638 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1644 seq
= read_seqcount_begin(>od
->seq
);
1645 mode
= gtod
->clock
.vclock_mode
;
1646 ts
->tv_sec
= gtod
->wall_time_sec
;
1647 ns
= gtod
->nsec_base
;
1648 ns
+= vgettsc(cycle_now
);
1649 ns
>>= gtod
->clock
.shift
;
1650 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1652 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1658 /* returns true if host is using tsc clocksource */
1659 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1661 /* checked again under seqlock below */
1662 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1665 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1668 /* returns true if host is using tsc clocksource */
1669 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1672 /* checked again under seqlock below */
1673 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1676 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1682 * Assuming a stable TSC across physical CPUS, and a stable TSC
1683 * across virtual CPUs, the following condition is possible.
1684 * Each numbered line represents an event visible to both
1685 * CPUs at the next numbered event.
1687 * "timespecX" represents host monotonic time. "tscX" represents
1690 * VCPU0 on CPU0 | VCPU1 on CPU1
1692 * 1. read timespec0,tsc0
1693 * 2. | timespec1 = timespec0 + N
1695 * 3. transition to guest | transition to guest
1696 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1697 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1698 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1700 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1703 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1705 * - 0 < N - M => M < N
1707 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1708 * always the case (the difference between two distinct xtime instances
1709 * might be smaller then the difference between corresponding TSC reads,
1710 * when updating guest vcpus pvclock areas).
1712 * To avoid that problem, do not allow visibility of distinct
1713 * system_timestamp/tsc_timestamp values simultaneously: use a master
1714 * copy of host monotonic time values. Update that master copy
1717 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1721 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1723 #ifdef CONFIG_X86_64
1724 struct kvm_arch
*ka
= &kvm
->arch
;
1726 bool host_tsc_clocksource
, vcpus_matched
;
1728 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1729 atomic_read(&kvm
->online_vcpus
));
1732 * If the host uses TSC clock, then passthrough TSC as stable
1735 host_tsc_clocksource
= kvm_get_time_and_clockread(
1736 &ka
->master_kernel_ns
,
1737 &ka
->master_cycle_now
);
1739 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1740 && !ka
->backwards_tsc_observed
1741 && !ka
->boot_vcpu_runs_old_kvmclock
;
1743 if (ka
->use_master_clock
)
1744 atomic_set(&kvm_guest_has_master_clock
, 1);
1746 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1747 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1752 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1754 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1757 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1759 #ifdef CONFIG_X86_64
1761 struct kvm_vcpu
*vcpu
;
1762 struct kvm_arch
*ka
= &kvm
->arch
;
1764 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1765 kvm_make_mclock_inprogress_request(kvm
);
1766 /* no guest entries from this point */
1767 pvclock_update_vm_gtod_copy(kvm
);
1769 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1770 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1772 /* guest entries allowed */
1773 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1774 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1776 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1780 u64
get_kvmclock_ns(struct kvm
*kvm
)
1782 struct kvm_arch
*ka
= &kvm
->arch
;
1783 struct pvclock_vcpu_time_info hv_clock
;
1786 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1787 if (!ka
->use_master_clock
) {
1788 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1789 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1792 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1793 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1794 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1796 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1799 if (__this_cpu_read(cpu_tsc_khz
)) {
1800 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1801 &hv_clock
.tsc_shift
,
1802 &hv_clock
.tsc_to_system_mul
);
1803 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1805 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1812 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1814 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1815 struct pvclock_vcpu_time_info guest_hv_clock
;
1817 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1818 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1821 /* This VCPU is paused, but it's legal for a guest to read another
1822 * VCPU's kvmclock, so we really have to follow the specification where
1823 * it says that version is odd if data is being modified, and even after
1826 * Version field updates must be kept separate. This is because
1827 * kvm_write_guest_cached might use a "rep movs" instruction, and
1828 * writes within a string instruction are weakly ordered. So there
1829 * are three writes overall.
1831 * As a small optimization, only write the version field in the first
1832 * and third write. The vcpu->pv_time cache is still valid, because the
1833 * version field is the first in the struct.
1835 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1837 if (guest_hv_clock
.version
& 1)
1838 ++guest_hv_clock
.version
; /* first time write, random junk */
1840 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1841 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1843 sizeof(vcpu
->hv_clock
.version
));
1847 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1848 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1850 if (vcpu
->pvclock_set_guest_stopped_request
) {
1851 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1852 vcpu
->pvclock_set_guest_stopped_request
= false;
1855 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1857 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1859 sizeof(vcpu
->hv_clock
));
1863 vcpu
->hv_clock
.version
++;
1864 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1866 sizeof(vcpu
->hv_clock
.version
));
1869 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1871 unsigned long flags
, tgt_tsc_khz
;
1872 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1873 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1875 u64 tsc_timestamp
, host_tsc
;
1877 bool use_master_clock
;
1883 * If the host uses TSC clock, then passthrough TSC as stable
1886 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1887 use_master_clock
= ka
->use_master_clock
;
1888 if (use_master_clock
) {
1889 host_tsc
= ka
->master_cycle_now
;
1890 kernel_ns
= ka
->master_kernel_ns
;
1892 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1894 /* Keep irq disabled to prevent changes to the clock */
1895 local_irq_save(flags
);
1896 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1897 if (unlikely(tgt_tsc_khz
== 0)) {
1898 local_irq_restore(flags
);
1899 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1902 if (!use_master_clock
) {
1904 kernel_ns
= ktime_get_boot_ns();
1907 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1910 * We may have to catch up the TSC to match elapsed wall clock
1911 * time for two reasons, even if kvmclock is used.
1912 * 1) CPU could have been running below the maximum TSC rate
1913 * 2) Broken TSC compensation resets the base at each VCPU
1914 * entry to avoid unknown leaps of TSC even when running
1915 * again on the same CPU. This may cause apparent elapsed
1916 * time to disappear, and the guest to stand still or run
1919 if (vcpu
->tsc_catchup
) {
1920 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1921 if (tsc
> tsc_timestamp
) {
1922 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1923 tsc_timestamp
= tsc
;
1927 local_irq_restore(flags
);
1929 /* With all the info we got, fill in the values */
1931 if (kvm_has_tsc_control
)
1932 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1934 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1935 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1936 &vcpu
->hv_clock
.tsc_shift
,
1937 &vcpu
->hv_clock
.tsc_to_system_mul
);
1938 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1941 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1942 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1943 vcpu
->last_guest_tsc
= tsc_timestamp
;
1945 /* If the host uses TSC clocksource, then it is stable */
1947 if (use_master_clock
)
1948 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1950 vcpu
->hv_clock
.flags
= pvclock_flags
;
1952 if (vcpu
->pv_time_enabled
)
1953 kvm_setup_pvclock_page(v
);
1954 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1955 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1960 * kvmclock updates which are isolated to a given vcpu, such as
1961 * vcpu->cpu migration, should not allow system_timestamp from
1962 * the rest of the vcpus to remain static. Otherwise ntp frequency
1963 * correction applies to one vcpu's system_timestamp but not
1966 * So in those cases, request a kvmclock update for all vcpus.
1967 * We need to rate-limit these requests though, as they can
1968 * considerably slow guests that have a large number of vcpus.
1969 * The time for a remote vcpu to update its kvmclock is bound
1970 * by the delay we use to rate-limit the updates.
1973 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1975 static void kvmclock_update_fn(struct work_struct
*work
)
1978 struct delayed_work
*dwork
= to_delayed_work(work
);
1979 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1980 kvmclock_update_work
);
1981 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1982 struct kvm_vcpu
*vcpu
;
1984 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1985 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1986 kvm_vcpu_kick(vcpu
);
1990 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1992 struct kvm
*kvm
= v
->kvm
;
1994 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1995 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1996 KVMCLOCK_UPDATE_DELAY
);
1999 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2001 static void kvmclock_sync_fn(struct work_struct
*work
)
2003 struct delayed_work
*dwork
= to_delayed_work(work
);
2004 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2005 kvmclock_sync_work
);
2006 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2008 if (!kvmclock_periodic_sync
)
2011 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2012 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2013 KVMCLOCK_SYNC_PERIOD
);
2016 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
2018 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2019 unsigned bank_num
= mcg_cap
& 0xff;
2022 case MSR_IA32_MCG_STATUS
:
2023 vcpu
->arch
.mcg_status
= data
;
2025 case MSR_IA32_MCG_CTL
:
2026 if (!(mcg_cap
& MCG_CTL_P
))
2028 if (data
!= 0 && data
!= ~(u64
)0)
2030 vcpu
->arch
.mcg_ctl
= data
;
2033 if (msr
>= MSR_IA32_MC0_CTL
&&
2034 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2035 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2036 /* only 0 or all 1s can be written to IA32_MCi_CTL
2037 * some Linux kernels though clear bit 10 in bank 4 to
2038 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2039 * this to avoid an uncatched #GP in the guest
2041 if ((offset
& 0x3) == 0 &&
2042 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2044 vcpu
->arch
.mce_banks
[offset
] = data
;
2052 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2054 struct kvm
*kvm
= vcpu
->kvm
;
2055 int lm
= is_long_mode(vcpu
);
2056 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2057 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2058 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2059 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2060 u32 page_num
= data
& ~PAGE_MASK
;
2061 u64 page_addr
= data
& PAGE_MASK
;
2066 if (page_num
>= blob_size
)
2069 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2074 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2083 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2085 gpa_t gpa
= data
& ~0x3f;
2087 /* Bits 3:5 are reserved, Should be zero */
2091 vcpu
->arch
.apf
.msr_val
= data
;
2093 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2094 kvm_clear_async_pf_completion_queue(vcpu
);
2095 kvm_async_pf_hash_reset(vcpu
);
2099 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2103 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2104 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2105 kvm_async_pf_wakeup_all(vcpu
);
2109 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2111 vcpu
->arch
.pv_time_enabled
= false;
2114 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2116 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2119 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2120 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2123 vcpu
->arch
.st
.steal
.preempted
= 0;
2125 if (vcpu
->arch
.st
.steal
.version
& 1)
2126 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2128 vcpu
->arch
.st
.steal
.version
+= 1;
2130 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2131 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2135 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2136 vcpu
->arch
.st
.last_steal
;
2137 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2139 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2140 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2144 vcpu
->arch
.st
.steal
.version
+= 1;
2146 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2147 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2150 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2153 u32 msr
= msr_info
->index
;
2154 u64 data
= msr_info
->data
;
2157 case MSR_AMD64_NB_CFG
:
2158 case MSR_IA32_UCODE_REV
:
2159 case MSR_IA32_UCODE_WRITE
:
2160 case MSR_VM_HSAVE_PA
:
2161 case MSR_AMD64_PATCH_LOADER
:
2162 case MSR_AMD64_BU_CFG2
:
2163 case MSR_AMD64_DC_CFG
:
2167 return set_efer(vcpu
, data
);
2169 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2170 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2171 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2172 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2174 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2179 case MSR_FAM10H_MMIO_CONF_BASE
:
2181 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2186 case MSR_IA32_DEBUGCTLMSR
:
2188 /* We support the non-activated case already */
2190 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2191 /* Values other than LBR and BTF are vendor-specific,
2192 thus reserved and should throw a #GP */
2195 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2198 case 0x200 ... 0x2ff:
2199 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2200 case MSR_IA32_APICBASE
:
2201 return kvm_set_apic_base(vcpu
, msr_info
);
2202 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2203 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2204 case MSR_IA32_TSCDEADLINE
:
2205 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2207 case MSR_IA32_TSC_ADJUST
:
2208 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2209 if (!msr_info
->host_initiated
) {
2210 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2211 adjust_tsc_offset_guest(vcpu
, adj
);
2213 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2216 case MSR_IA32_MISC_ENABLE
:
2217 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2219 case MSR_IA32_SMBASE
:
2220 if (!msr_info
->host_initiated
)
2222 vcpu
->arch
.smbase
= data
;
2224 case MSR_KVM_WALL_CLOCK_NEW
:
2225 case MSR_KVM_WALL_CLOCK
:
2226 vcpu
->kvm
->arch
.wall_clock
= data
;
2227 kvm_write_wall_clock(vcpu
->kvm
, data
);
2229 case MSR_KVM_SYSTEM_TIME_NEW
:
2230 case MSR_KVM_SYSTEM_TIME
: {
2231 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2233 kvmclock_reset(vcpu
);
2235 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2236 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2238 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2239 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2241 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2244 vcpu
->arch
.time
= data
;
2245 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2247 /* we verify if the enable bit is set... */
2251 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2252 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2253 sizeof(struct pvclock_vcpu_time_info
)))
2254 vcpu
->arch
.pv_time_enabled
= false;
2256 vcpu
->arch
.pv_time_enabled
= true;
2260 case MSR_KVM_ASYNC_PF_EN
:
2261 if (kvm_pv_enable_async_pf(vcpu
, data
))
2264 case MSR_KVM_STEAL_TIME
:
2266 if (unlikely(!sched_info_on()))
2269 if (data
& KVM_STEAL_RESERVED_MASK
)
2272 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2273 data
& KVM_STEAL_VALID_BITS
,
2274 sizeof(struct kvm_steal_time
)))
2277 vcpu
->arch
.st
.msr_val
= data
;
2279 if (!(data
& KVM_MSR_ENABLED
))
2282 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2285 case MSR_KVM_PV_EOI_EN
:
2286 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2290 case MSR_IA32_MCG_CTL
:
2291 case MSR_IA32_MCG_STATUS
:
2292 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2293 return set_msr_mce(vcpu
, msr
, data
);
2295 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2296 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2297 pr
= true; /* fall through */
2298 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2299 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2300 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2301 return kvm_pmu_set_msr(vcpu
, msr_info
);
2303 if (pr
|| data
!= 0)
2304 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2305 "0x%x data 0x%llx\n", msr
, data
);
2307 case MSR_K7_CLK_CTL
:
2309 * Ignore all writes to this no longer documented MSR.
2310 * Writes are only relevant for old K7 processors,
2311 * all pre-dating SVM, but a recommended workaround from
2312 * AMD for these chips. It is possible to specify the
2313 * affected processor models on the command line, hence
2314 * the need to ignore the workaround.
2317 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2318 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2319 case HV_X64_MSR_CRASH_CTL
:
2320 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2321 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2322 msr_info
->host_initiated
);
2323 case MSR_IA32_BBL_CR_CTL3
:
2324 /* Drop writes to this legacy MSR -- see rdmsr
2325 * counterpart for further detail.
2327 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2329 case MSR_AMD64_OSVW_ID_LENGTH
:
2330 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2332 vcpu
->arch
.osvw
.length
= data
;
2334 case MSR_AMD64_OSVW_STATUS
:
2335 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2337 vcpu
->arch
.osvw
.status
= data
;
2339 case MSR_PLATFORM_INFO
:
2340 if (!msr_info
->host_initiated
||
2341 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2342 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2343 cpuid_fault_enabled(vcpu
)))
2345 vcpu
->arch
.msr_platform_info
= data
;
2347 case MSR_MISC_FEATURES_ENABLES
:
2348 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2349 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2350 !supports_cpuid_fault(vcpu
)))
2352 vcpu
->arch
.msr_misc_features_enables
= data
;
2355 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2356 return xen_hvm_config(vcpu
, data
);
2357 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2358 return kvm_pmu_set_msr(vcpu
, msr_info
);
2360 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2364 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2371 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2375 * Reads an msr value (of 'msr_index') into 'pdata'.
2376 * Returns 0 on success, non-0 otherwise.
2377 * Assumes vcpu_load() was already called.
2379 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2381 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2383 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2385 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2388 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2389 unsigned bank_num
= mcg_cap
& 0xff;
2392 case MSR_IA32_P5_MC_ADDR
:
2393 case MSR_IA32_P5_MC_TYPE
:
2396 case MSR_IA32_MCG_CAP
:
2397 data
= vcpu
->arch
.mcg_cap
;
2399 case MSR_IA32_MCG_CTL
:
2400 if (!(mcg_cap
& MCG_CTL_P
))
2402 data
= vcpu
->arch
.mcg_ctl
;
2404 case MSR_IA32_MCG_STATUS
:
2405 data
= vcpu
->arch
.mcg_status
;
2408 if (msr
>= MSR_IA32_MC0_CTL
&&
2409 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2410 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2411 data
= vcpu
->arch
.mce_banks
[offset
];
2420 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2422 switch (msr_info
->index
) {
2423 case MSR_IA32_PLATFORM_ID
:
2424 case MSR_IA32_EBL_CR_POWERON
:
2425 case MSR_IA32_DEBUGCTLMSR
:
2426 case MSR_IA32_LASTBRANCHFROMIP
:
2427 case MSR_IA32_LASTBRANCHTOIP
:
2428 case MSR_IA32_LASTINTFROMIP
:
2429 case MSR_IA32_LASTINTTOIP
:
2431 case MSR_K8_TSEG_ADDR
:
2432 case MSR_K8_TSEG_MASK
:
2434 case MSR_VM_HSAVE_PA
:
2435 case MSR_K8_INT_PENDING_MSG
:
2436 case MSR_AMD64_NB_CFG
:
2437 case MSR_FAM10H_MMIO_CONF_BASE
:
2438 case MSR_AMD64_BU_CFG2
:
2439 case MSR_IA32_PERF_CTL
:
2440 case MSR_AMD64_DC_CFG
:
2443 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2444 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2445 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2446 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2447 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2448 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2451 case MSR_IA32_UCODE_REV
:
2452 msr_info
->data
= 0x100000000ULL
;
2455 case 0x200 ... 0x2ff:
2456 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2457 case 0xcd: /* fsb frequency */
2461 * MSR_EBC_FREQUENCY_ID
2462 * Conservative value valid for even the basic CPU models.
2463 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2464 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2465 * and 266MHz for model 3, or 4. Set Core Clock
2466 * Frequency to System Bus Frequency Ratio to 1 (bits
2467 * 31:24) even though these are only valid for CPU
2468 * models > 2, however guests may end up dividing or
2469 * multiplying by zero otherwise.
2471 case MSR_EBC_FREQUENCY_ID
:
2472 msr_info
->data
= 1 << 24;
2474 case MSR_IA32_APICBASE
:
2475 msr_info
->data
= kvm_get_apic_base(vcpu
);
2477 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2478 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2480 case MSR_IA32_TSCDEADLINE
:
2481 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2483 case MSR_IA32_TSC_ADJUST
:
2484 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2486 case MSR_IA32_MISC_ENABLE
:
2487 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2489 case MSR_IA32_SMBASE
:
2490 if (!msr_info
->host_initiated
)
2492 msr_info
->data
= vcpu
->arch
.smbase
;
2494 case MSR_IA32_PERF_STATUS
:
2495 /* TSC increment by tick */
2496 msr_info
->data
= 1000ULL;
2497 /* CPU multiplier */
2498 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2501 msr_info
->data
= vcpu
->arch
.efer
;
2503 case MSR_KVM_WALL_CLOCK
:
2504 case MSR_KVM_WALL_CLOCK_NEW
:
2505 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2507 case MSR_KVM_SYSTEM_TIME
:
2508 case MSR_KVM_SYSTEM_TIME_NEW
:
2509 msr_info
->data
= vcpu
->arch
.time
;
2511 case MSR_KVM_ASYNC_PF_EN
:
2512 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2514 case MSR_KVM_STEAL_TIME
:
2515 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2517 case MSR_KVM_PV_EOI_EN
:
2518 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2520 case MSR_IA32_P5_MC_ADDR
:
2521 case MSR_IA32_P5_MC_TYPE
:
2522 case MSR_IA32_MCG_CAP
:
2523 case MSR_IA32_MCG_CTL
:
2524 case MSR_IA32_MCG_STATUS
:
2525 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2526 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2527 case MSR_K7_CLK_CTL
:
2529 * Provide expected ramp-up count for K7. All other
2530 * are set to zero, indicating minimum divisors for
2533 * This prevents guest kernels on AMD host with CPU
2534 * type 6, model 8 and higher from exploding due to
2535 * the rdmsr failing.
2537 msr_info
->data
= 0x20000000;
2539 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2540 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2541 case HV_X64_MSR_CRASH_CTL
:
2542 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2543 return kvm_hv_get_msr_common(vcpu
,
2544 msr_info
->index
, &msr_info
->data
);
2546 case MSR_IA32_BBL_CR_CTL3
:
2547 /* This legacy MSR exists but isn't fully documented in current
2548 * silicon. It is however accessed by winxp in very narrow
2549 * scenarios where it sets bit #19, itself documented as
2550 * a "reserved" bit. Best effort attempt to source coherent
2551 * read data here should the balance of the register be
2552 * interpreted by the guest:
2554 * L2 cache control register 3: 64GB range, 256KB size,
2555 * enabled, latency 0x1, configured
2557 msr_info
->data
= 0xbe702111;
2559 case MSR_AMD64_OSVW_ID_LENGTH
:
2560 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2562 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2564 case MSR_AMD64_OSVW_STATUS
:
2565 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2567 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2569 case MSR_PLATFORM_INFO
:
2570 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2572 case MSR_MISC_FEATURES_ENABLES
:
2573 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2576 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2577 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2579 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2583 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2590 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2593 * Read or write a bunch of msrs. All parameters are kernel addresses.
2595 * @return number of msrs set successfully.
2597 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2598 struct kvm_msr_entry
*entries
,
2599 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2600 unsigned index
, u64
*data
))
2604 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2605 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2606 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2608 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2614 * Read or write a bunch of msrs. Parameters are user addresses.
2616 * @return number of msrs set successfully.
2618 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2619 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2620 unsigned index
, u64
*data
),
2623 struct kvm_msrs msrs
;
2624 struct kvm_msr_entry
*entries
;
2629 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2633 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2636 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2637 entries
= memdup_user(user_msrs
->entries
, size
);
2638 if (IS_ERR(entries
)) {
2639 r
= PTR_ERR(entries
);
2643 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2648 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2659 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2664 case KVM_CAP_IRQCHIP
:
2666 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2667 case KVM_CAP_SET_TSS_ADDR
:
2668 case KVM_CAP_EXT_CPUID
:
2669 case KVM_CAP_EXT_EMUL_CPUID
:
2670 case KVM_CAP_CLOCKSOURCE
:
2672 case KVM_CAP_NOP_IO_DELAY
:
2673 case KVM_CAP_MP_STATE
:
2674 case KVM_CAP_SYNC_MMU
:
2675 case KVM_CAP_USER_NMI
:
2676 case KVM_CAP_REINJECT_CONTROL
:
2677 case KVM_CAP_IRQ_INJECT_STATUS
:
2678 case KVM_CAP_IOEVENTFD
:
2679 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2681 case KVM_CAP_PIT_STATE2
:
2682 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2683 case KVM_CAP_XEN_HVM
:
2684 case KVM_CAP_VCPU_EVENTS
:
2685 case KVM_CAP_HYPERV
:
2686 case KVM_CAP_HYPERV_VAPIC
:
2687 case KVM_CAP_HYPERV_SPIN
:
2688 case KVM_CAP_HYPERV_SYNIC
:
2689 case KVM_CAP_HYPERV_SYNIC2
:
2690 case KVM_CAP_HYPERV_VP_INDEX
:
2691 case KVM_CAP_PCI_SEGMENT
:
2692 case KVM_CAP_DEBUGREGS
:
2693 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2695 case KVM_CAP_ASYNC_PF
:
2696 case KVM_CAP_GET_TSC_KHZ
:
2697 case KVM_CAP_KVMCLOCK_CTRL
:
2698 case KVM_CAP_READONLY_MEM
:
2699 case KVM_CAP_HYPERV_TIME
:
2700 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2701 case KVM_CAP_TSC_DEADLINE_TIMER
:
2702 case KVM_CAP_ENABLE_CAP_VM
:
2703 case KVM_CAP_DISABLE_QUIRKS
:
2704 case KVM_CAP_SET_BOOT_CPU_ID
:
2705 case KVM_CAP_SPLIT_IRQCHIP
:
2706 case KVM_CAP_IMMEDIATE_EXIT
:
2709 case KVM_CAP_ADJUST_CLOCK
:
2710 r
= KVM_CLOCK_TSC_STABLE
;
2712 case KVM_CAP_X86_GUEST_MWAIT
:
2713 r
= kvm_mwait_in_guest();
2715 case KVM_CAP_X86_SMM
:
2716 /* SMBASE is usually relocated above 1M on modern chipsets,
2717 * and SMM handlers might indeed rely on 4G segment limits,
2718 * so do not report SMM to be available if real mode is
2719 * emulated via vm86 mode. Still, do not go to great lengths
2720 * to avoid userspace's usage of the feature, because it is a
2721 * fringe case that is not enabled except via specific settings
2722 * of the module parameters.
2724 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2727 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2729 case KVM_CAP_NR_VCPUS
:
2730 r
= KVM_SOFT_MAX_VCPUS
;
2732 case KVM_CAP_MAX_VCPUS
:
2735 case KVM_CAP_NR_MEMSLOTS
:
2736 r
= KVM_USER_MEM_SLOTS
;
2738 case KVM_CAP_PV_MMU
: /* obsolete */
2742 r
= KVM_MAX_MCE_BANKS
;
2745 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2747 case KVM_CAP_TSC_CONTROL
:
2748 r
= kvm_has_tsc_control
;
2750 case KVM_CAP_X2APIC_API
:
2751 r
= KVM_X2APIC_API_VALID_FLAGS
;
2761 long kvm_arch_dev_ioctl(struct file
*filp
,
2762 unsigned int ioctl
, unsigned long arg
)
2764 void __user
*argp
= (void __user
*)arg
;
2768 case KVM_GET_MSR_INDEX_LIST
: {
2769 struct kvm_msr_list __user
*user_msr_list
= argp
;
2770 struct kvm_msr_list msr_list
;
2774 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2777 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2778 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2781 if (n
< msr_list
.nmsrs
)
2784 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2785 num_msrs_to_save
* sizeof(u32
)))
2787 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2789 num_emulated_msrs
* sizeof(u32
)))
2794 case KVM_GET_SUPPORTED_CPUID
:
2795 case KVM_GET_EMULATED_CPUID
: {
2796 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2797 struct kvm_cpuid2 cpuid
;
2800 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2803 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2809 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2814 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2816 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2817 sizeof(kvm_mce_cap_supported
)))
2829 static void wbinvd_ipi(void *garbage
)
2834 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2836 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2839 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2841 /* Address WBINVD may be executed by guest */
2842 if (need_emulate_wbinvd(vcpu
)) {
2843 if (kvm_x86_ops
->has_wbinvd_exit())
2844 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2845 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2846 smp_call_function_single(vcpu
->cpu
,
2847 wbinvd_ipi
, NULL
, 1);
2850 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2852 /* Apply any externally detected TSC adjustments (due to suspend) */
2853 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2854 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2855 vcpu
->arch
.tsc_offset_adjustment
= 0;
2856 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2859 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2860 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2861 rdtsc() - vcpu
->arch
.last_host_tsc
;
2863 mark_tsc_unstable("KVM discovered backwards TSC");
2865 if (check_tsc_unstable()) {
2866 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2867 vcpu
->arch
.last_guest_tsc
);
2868 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2869 vcpu
->arch
.tsc_catchup
= 1;
2872 if (kvm_lapic_hv_timer_in_use(vcpu
))
2873 kvm_lapic_restart_hv_timer(vcpu
);
2876 * On a host with synchronized TSC, there is no need to update
2877 * kvmclock on vcpu->cpu migration
2879 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2880 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2881 if (vcpu
->cpu
!= cpu
)
2882 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2886 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2889 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2891 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2894 vcpu
->arch
.st
.steal
.preempted
= 1;
2896 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2897 &vcpu
->arch
.st
.steal
.preempted
,
2898 offsetof(struct kvm_steal_time
, preempted
),
2899 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2902 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2906 if (vcpu
->preempted
)
2907 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
2910 * Disable page faults because we're in atomic context here.
2911 * kvm_write_guest_offset_cached() would call might_fault()
2912 * that relies on pagefault_disable() to tell if there's a
2913 * bug. NOTE: the write to guest memory may not go through if
2914 * during postcopy live migration or if there's heavy guest
2917 pagefault_disable();
2919 * kvm_memslots() will be called by
2920 * kvm_write_guest_offset_cached() so take the srcu lock.
2922 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2923 kvm_steal_time_set_preempted(vcpu
);
2924 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2926 kvm_x86_ops
->vcpu_put(vcpu
);
2927 kvm_put_guest_fpu(vcpu
);
2928 vcpu
->arch
.last_host_tsc
= rdtsc();
2930 * If userspace has set any breakpoints or watchpoints, dr6 is restored
2931 * on every vmexit, but if not, we might have a stale dr6 from the
2932 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
2937 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2938 struct kvm_lapic_state
*s
)
2940 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2941 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2943 return kvm_apic_get_state(vcpu
, s
);
2946 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2947 struct kvm_lapic_state
*s
)
2951 r
= kvm_apic_set_state(vcpu
, s
);
2954 update_cr8_intercept(vcpu
);
2959 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2961 return (!lapic_in_kernel(vcpu
) ||
2962 kvm_apic_accept_pic_intr(vcpu
));
2966 * if userspace requested an interrupt window, check that the
2967 * interrupt window is open.
2969 * No need to exit to userspace if we already have an interrupt queued.
2971 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2973 return kvm_arch_interrupt_allowed(vcpu
) &&
2974 !kvm_cpu_has_interrupt(vcpu
) &&
2975 !kvm_event_needs_reinjection(vcpu
) &&
2976 kvm_cpu_accept_dm_intr(vcpu
);
2979 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2980 struct kvm_interrupt
*irq
)
2982 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2985 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2986 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2987 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2992 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2993 * fail for in-kernel 8259.
2995 if (pic_in_kernel(vcpu
->kvm
))
2998 if (vcpu
->arch
.pending_external_vector
!= -1)
3001 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3002 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3006 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3008 kvm_inject_nmi(vcpu
);
3013 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3015 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3020 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3021 struct kvm_tpr_access_ctl
*tac
)
3025 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3029 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3033 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3036 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3038 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3041 vcpu
->arch
.mcg_cap
= mcg_cap
;
3042 /* Init IA32_MCG_CTL to all 1s */
3043 if (mcg_cap
& MCG_CTL_P
)
3044 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3045 /* Init IA32_MCi_CTL to all 1s */
3046 for (bank
= 0; bank
< bank_num
; bank
++)
3047 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3049 if (kvm_x86_ops
->setup_mce
)
3050 kvm_x86_ops
->setup_mce(vcpu
);
3055 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3056 struct kvm_x86_mce
*mce
)
3058 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3059 unsigned bank_num
= mcg_cap
& 0xff;
3060 u64
*banks
= vcpu
->arch
.mce_banks
;
3062 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3065 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3066 * reporting is disabled
3068 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3069 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3071 banks
+= 4 * mce
->bank
;
3073 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3074 * reporting is disabled for the bank
3076 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3078 if (mce
->status
& MCI_STATUS_UC
) {
3079 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3080 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3081 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3084 if (banks
[1] & MCI_STATUS_VAL
)
3085 mce
->status
|= MCI_STATUS_OVER
;
3086 banks
[2] = mce
->addr
;
3087 banks
[3] = mce
->misc
;
3088 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3089 banks
[1] = mce
->status
;
3090 kvm_queue_exception(vcpu
, MC_VECTOR
);
3091 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3092 || !(banks
[1] & MCI_STATUS_UC
)) {
3093 if (banks
[1] & MCI_STATUS_VAL
)
3094 mce
->status
|= MCI_STATUS_OVER
;
3095 banks
[2] = mce
->addr
;
3096 banks
[3] = mce
->misc
;
3097 banks
[1] = mce
->status
;
3099 banks
[1] |= MCI_STATUS_OVER
;
3103 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3104 struct kvm_vcpu_events
*events
)
3108 * FIXME: pass injected and pending separately. This is only
3109 * needed for nested virtualization, whose state cannot be
3110 * migrated yet. For now we can combine them.
3112 events
->exception
.injected
=
3113 (vcpu
->arch
.exception
.pending
||
3114 vcpu
->arch
.exception
.injected
) &&
3115 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3116 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3117 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3118 events
->exception
.pad
= 0;
3119 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3121 events
->interrupt
.injected
=
3122 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3123 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3124 events
->interrupt
.soft
= 0;
3125 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3127 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3128 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3129 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3130 events
->nmi
.pad
= 0;
3132 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3134 events
->smi
.smm
= is_smm(vcpu
);
3135 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3136 events
->smi
.smm_inside_nmi
=
3137 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3138 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3140 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3141 | KVM_VCPUEVENT_VALID_SHADOW
3142 | KVM_VCPUEVENT_VALID_SMM
);
3143 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3146 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3148 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3149 struct kvm_vcpu_events
*events
)
3151 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3152 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3153 | KVM_VCPUEVENT_VALID_SHADOW
3154 | KVM_VCPUEVENT_VALID_SMM
))
3157 if (events
->exception
.injected
&&
3158 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3159 is_guest_mode(vcpu
)))
3162 /* INITs are latched while in SMM */
3163 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3164 (events
->smi
.smm
|| events
->smi
.pending
) &&
3165 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3169 vcpu
->arch
.exception
.injected
= false;
3170 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3171 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3172 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3173 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3175 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3176 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3177 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3178 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3179 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3180 events
->interrupt
.shadow
);
3182 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3183 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3184 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3185 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3187 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3188 lapic_in_kernel(vcpu
))
3189 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3191 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3192 u32 hflags
= vcpu
->arch
.hflags
;
3193 if (events
->smi
.smm
)
3194 hflags
|= HF_SMM_MASK
;
3196 hflags
&= ~HF_SMM_MASK
;
3197 kvm_set_hflags(vcpu
, hflags
);
3199 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3201 if (events
->smi
.smm
) {
3202 if (events
->smi
.smm_inside_nmi
)
3203 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3205 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3206 if (lapic_in_kernel(vcpu
)) {
3207 if (events
->smi
.latched_init
)
3208 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3210 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3215 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3220 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3221 struct kvm_debugregs
*dbgregs
)
3225 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3226 kvm_get_dr(vcpu
, 6, &val
);
3228 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3230 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3233 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3234 struct kvm_debugregs
*dbgregs
)
3239 if (dbgregs
->dr6
& ~0xffffffffull
)
3241 if (dbgregs
->dr7
& ~0xffffffffull
)
3244 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3245 kvm_update_dr0123(vcpu
);
3246 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3247 kvm_update_dr6(vcpu
);
3248 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3249 kvm_update_dr7(vcpu
);
3254 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3256 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3258 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3259 u64 xstate_bv
= xsave
->header
.xfeatures
;
3263 * Copy legacy XSAVE area, to avoid complications with CPUID
3264 * leaves 0 and 1 in the loop below.
3266 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3269 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3270 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3273 * Copy each region from the possibly compacted offset to the
3274 * non-compacted offset.
3276 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3278 u64 feature
= valid
& -valid
;
3279 int index
= fls64(feature
) - 1;
3280 void *src
= get_xsave_addr(xsave
, feature
);
3283 u32 size
, offset
, ecx
, edx
;
3284 cpuid_count(XSTATE_CPUID
, index
,
3285 &size
, &offset
, &ecx
, &edx
);
3286 if (feature
== XFEATURE_MASK_PKRU
)
3287 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3288 sizeof(vcpu
->arch
.pkru
));
3290 memcpy(dest
+ offset
, src
, size
);
3298 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3300 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3301 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3305 * Copy legacy XSAVE area, to avoid complications with CPUID
3306 * leaves 0 and 1 in the loop below.
3308 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3310 /* Set XSTATE_BV and possibly XCOMP_BV. */
3311 xsave
->header
.xfeatures
= xstate_bv
;
3312 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3313 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3316 * Copy each region from the non-compacted offset to the
3317 * possibly compacted offset.
3319 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3321 u64 feature
= valid
& -valid
;
3322 int index
= fls64(feature
) - 1;
3323 void *dest
= get_xsave_addr(xsave
, feature
);
3326 u32 size
, offset
, ecx
, edx
;
3327 cpuid_count(XSTATE_CPUID
, index
,
3328 &size
, &offset
, &ecx
, &edx
);
3329 if (feature
== XFEATURE_MASK_PKRU
)
3330 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3331 sizeof(vcpu
->arch
.pkru
));
3333 memcpy(dest
, src
+ offset
, size
);
3340 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3341 struct kvm_xsave
*guest_xsave
)
3343 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3344 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3345 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3347 memcpy(guest_xsave
->region
,
3348 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3349 sizeof(struct fxregs_state
));
3350 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3351 XFEATURE_MASK_FPSSE
;
3355 #define XSAVE_MXCSR_OFFSET 24
3357 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3358 struct kvm_xsave
*guest_xsave
)
3361 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3362 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3364 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3366 * Here we allow setting states that are not present in
3367 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3368 * with old userspace.
3370 if (xstate_bv
& ~kvm_supported_xcr0() ||
3371 mxcsr
& ~mxcsr_feature_mask
)
3373 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3375 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3376 mxcsr
& ~mxcsr_feature_mask
)
3378 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3379 guest_xsave
->region
, sizeof(struct fxregs_state
));
3384 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3385 struct kvm_xcrs
*guest_xcrs
)
3387 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3388 guest_xcrs
->nr_xcrs
= 0;
3392 guest_xcrs
->nr_xcrs
= 1;
3393 guest_xcrs
->flags
= 0;
3394 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3395 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3398 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3399 struct kvm_xcrs
*guest_xcrs
)
3403 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3406 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3409 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3410 /* Only support XCR0 currently */
3411 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3412 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3413 guest_xcrs
->xcrs
[i
].value
);
3422 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3423 * stopped by the hypervisor. This function will be called from the host only.
3424 * EINVAL is returned when the host attempts to set the flag for a guest that
3425 * does not support pv clocks.
3427 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3429 if (!vcpu
->arch
.pv_time_enabled
)
3431 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3432 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3436 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3437 struct kvm_enable_cap
*cap
)
3443 case KVM_CAP_HYPERV_SYNIC2
:
3446 case KVM_CAP_HYPERV_SYNIC
:
3447 if (!irqchip_in_kernel(vcpu
->kvm
))
3449 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3450 KVM_CAP_HYPERV_SYNIC2
);
3456 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3457 unsigned int ioctl
, unsigned long arg
)
3459 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3460 void __user
*argp
= (void __user
*)arg
;
3463 struct kvm_lapic_state
*lapic
;
3464 struct kvm_xsave
*xsave
;
3465 struct kvm_xcrs
*xcrs
;
3471 case KVM_GET_LAPIC
: {
3473 if (!lapic_in_kernel(vcpu
))
3475 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3480 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3484 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3489 case KVM_SET_LAPIC
: {
3491 if (!lapic_in_kernel(vcpu
))
3493 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3494 if (IS_ERR(u
.lapic
))
3495 return PTR_ERR(u
.lapic
);
3497 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3500 case KVM_INTERRUPT
: {
3501 struct kvm_interrupt irq
;
3504 if (copy_from_user(&irq
, argp
, sizeof irq
))
3506 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3510 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3514 r
= kvm_vcpu_ioctl_smi(vcpu
);
3517 case KVM_SET_CPUID
: {
3518 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3519 struct kvm_cpuid cpuid
;
3522 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3524 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3527 case KVM_SET_CPUID2
: {
3528 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3529 struct kvm_cpuid2 cpuid
;
3532 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3534 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3535 cpuid_arg
->entries
);
3538 case KVM_GET_CPUID2
: {
3539 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3540 struct kvm_cpuid2 cpuid
;
3543 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3545 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3546 cpuid_arg
->entries
);
3550 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3556 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3559 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3561 case KVM_TPR_ACCESS_REPORTING
: {
3562 struct kvm_tpr_access_ctl tac
;
3565 if (copy_from_user(&tac
, argp
, sizeof tac
))
3567 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3571 if (copy_to_user(argp
, &tac
, sizeof tac
))
3576 case KVM_SET_VAPIC_ADDR
: {
3577 struct kvm_vapic_addr va
;
3581 if (!lapic_in_kernel(vcpu
))
3584 if (copy_from_user(&va
, argp
, sizeof va
))
3586 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3587 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3588 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3591 case KVM_X86_SETUP_MCE
: {
3595 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3597 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3600 case KVM_X86_SET_MCE
: {
3601 struct kvm_x86_mce mce
;
3604 if (copy_from_user(&mce
, argp
, sizeof mce
))
3606 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3609 case KVM_GET_VCPU_EVENTS
: {
3610 struct kvm_vcpu_events events
;
3612 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3615 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3620 case KVM_SET_VCPU_EVENTS
: {
3621 struct kvm_vcpu_events events
;
3624 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3627 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3630 case KVM_GET_DEBUGREGS
: {
3631 struct kvm_debugregs dbgregs
;
3633 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3636 if (copy_to_user(argp
, &dbgregs
,
3637 sizeof(struct kvm_debugregs
)))
3642 case KVM_SET_DEBUGREGS
: {
3643 struct kvm_debugregs dbgregs
;
3646 if (copy_from_user(&dbgregs
, argp
,
3647 sizeof(struct kvm_debugregs
)))
3650 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3653 case KVM_GET_XSAVE
: {
3654 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3659 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3662 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3667 case KVM_SET_XSAVE
: {
3668 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3669 if (IS_ERR(u
.xsave
))
3670 return PTR_ERR(u
.xsave
);
3672 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3675 case KVM_GET_XCRS
: {
3676 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3681 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3684 if (copy_to_user(argp
, u
.xcrs
,
3685 sizeof(struct kvm_xcrs
)))
3690 case KVM_SET_XCRS
: {
3691 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3693 return PTR_ERR(u
.xcrs
);
3695 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3698 case KVM_SET_TSC_KHZ
: {
3702 user_tsc_khz
= (u32
)arg
;
3704 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3707 if (user_tsc_khz
== 0)
3708 user_tsc_khz
= tsc_khz
;
3710 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3715 case KVM_GET_TSC_KHZ
: {
3716 r
= vcpu
->arch
.virtual_tsc_khz
;
3719 case KVM_KVMCLOCK_CTRL
: {
3720 r
= kvm_set_guest_paused(vcpu
);
3723 case KVM_ENABLE_CAP
: {
3724 struct kvm_enable_cap cap
;
3727 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3729 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3740 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3742 return VM_FAULT_SIGBUS
;
3745 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3749 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3751 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3755 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3758 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3762 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3763 u32 kvm_nr_mmu_pages
)
3765 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3768 mutex_lock(&kvm
->slots_lock
);
3770 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3771 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3773 mutex_unlock(&kvm
->slots_lock
);
3777 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3779 return kvm
->arch
.n_max_mmu_pages
;
3782 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3784 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3788 switch (chip
->chip_id
) {
3789 case KVM_IRQCHIP_PIC_MASTER
:
3790 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3791 sizeof(struct kvm_pic_state
));
3793 case KVM_IRQCHIP_PIC_SLAVE
:
3794 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3795 sizeof(struct kvm_pic_state
));
3797 case KVM_IRQCHIP_IOAPIC
:
3798 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3807 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3809 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3813 switch (chip
->chip_id
) {
3814 case KVM_IRQCHIP_PIC_MASTER
:
3815 spin_lock(&pic
->lock
);
3816 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3817 sizeof(struct kvm_pic_state
));
3818 spin_unlock(&pic
->lock
);
3820 case KVM_IRQCHIP_PIC_SLAVE
:
3821 spin_lock(&pic
->lock
);
3822 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3823 sizeof(struct kvm_pic_state
));
3824 spin_unlock(&pic
->lock
);
3826 case KVM_IRQCHIP_IOAPIC
:
3827 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3833 kvm_pic_update_irq(pic
);
3837 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3839 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3841 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3843 mutex_lock(&kps
->lock
);
3844 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3845 mutex_unlock(&kps
->lock
);
3849 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3852 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3854 mutex_lock(&pit
->pit_state
.lock
);
3855 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3856 for (i
= 0; i
< 3; i
++)
3857 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3858 mutex_unlock(&pit
->pit_state
.lock
);
3862 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3864 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3865 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3866 sizeof(ps
->channels
));
3867 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3868 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3869 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3873 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3877 u32 prev_legacy
, cur_legacy
;
3878 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3880 mutex_lock(&pit
->pit_state
.lock
);
3881 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3882 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3883 if (!prev_legacy
&& cur_legacy
)
3885 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3886 sizeof(pit
->pit_state
.channels
));
3887 pit
->pit_state
.flags
= ps
->flags
;
3888 for (i
= 0; i
< 3; i
++)
3889 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3891 mutex_unlock(&pit
->pit_state
.lock
);
3895 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3896 struct kvm_reinject_control
*control
)
3898 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3903 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3904 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3905 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3907 mutex_lock(&pit
->pit_state
.lock
);
3908 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3909 mutex_unlock(&pit
->pit_state
.lock
);
3915 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3916 * @kvm: kvm instance
3917 * @log: slot id and address to which we copy the log
3919 * Steps 1-4 below provide general overview of dirty page logging. See
3920 * kvm_get_dirty_log_protect() function description for additional details.
3922 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3923 * always flush the TLB (step 4) even if previous step failed and the dirty
3924 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3925 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3926 * writes will be marked dirty for next log read.
3928 * 1. Take a snapshot of the bit and clear it if needed.
3929 * 2. Write protect the corresponding page.
3930 * 3. Copy the snapshot to the userspace.
3931 * 4. Flush TLB's if needed.
3933 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3935 bool is_dirty
= false;
3938 mutex_lock(&kvm
->slots_lock
);
3941 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3943 if (kvm_x86_ops
->flush_log_dirty
)
3944 kvm_x86_ops
->flush_log_dirty(kvm
);
3946 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3949 * All the TLBs can be flushed out of mmu lock, see the comments in
3950 * kvm_mmu_slot_remove_write_access().
3952 lockdep_assert_held(&kvm
->slots_lock
);
3954 kvm_flush_remote_tlbs(kvm
);
3956 mutex_unlock(&kvm
->slots_lock
);
3960 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3963 if (!irqchip_in_kernel(kvm
))
3966 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3967 irq_event
->irq
, irq_event
->level
,
3972 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3973 struct kvm_enable_cap
*cap
)
3981 case KVM_CAP_DISABLE_QUIRKS
:
3982 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3985 case KVM_CAP_SPLIT_IRQCHIP
: {
3986 mutex_lock(&kvm
->lock
);
3988 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3989 goto split_irqchip_unlock
;
3991 if (irqchip_in_kernel(kvm
))
3992 goto split_irqchip_unlock
;
3993 if (kvm
->created_vcpus
)
3994 goto split_irqchip_unlock
;
3995 r
= kvm_setup_empty_irq_routing(kvm
);
3997 goto split_irqchip_unlock
;
3998 /* Pairs with irqchip_in_kernel. */
4000 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4001 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4003 split_irqchip_unlock
:
4004 mutex_unlock(&kvm
->lock
);
4007 case KVM_CAP_X2APIC_API
:
4009 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4012 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4013 kvm
->arch
.x2apic_format
= true;
4014 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4015 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4026 long kvm_arch_vm_ioctl(struct file
*filp
,
4027 unsigned int ioctl
, unsigned long arg
)
4029 struct kvm
*kvm
= filp
->private_data
;
4030 void __user
*argp
= (void __user
*)arg
;
4033 * This union makes it completely explicit to gcc-3.x
4034 * that these two variables' stack usage should be
4035 * combined, not added together.
4038 struct kvm_pit_state ps
;
4039 struct kvm_pit_state2 ps2
;
4040 struct kvm_pit_config pit_config
;
4044 case KVM_SET_TSS_ADDR
:
4045 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4047 case KVM_SET_IDENTITY_MAP_ADDR
: {
4051 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4053 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4056 case KVM_SET_NR_MMU_PAGES
:
4057 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4059 case KVM_GET_NR_MMU_PAGES
:
4060 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4062 case KVM_CREATE_IRQCHIP
: {
4063 mutex_lock(&kvm
->lock
);
4066 if (irqchip_in_kernel(kvm
))
4067 goto create_irqchip_unlock
;
4070 if (kvm
->created_vcpus
)
4071 goto create_irqchip_unlock
;
4073 r
= kvm_pic_init(kvm
);
4075 goto create_irqchip_unlock
;
4077 r
= kvm_ioapic_init(kvm
);
4079 kvm_pic_destroy(kvm
);
4080 goto create_irqchip_unlock
;
4083 r
= kvm_setup_default_irq_routing(kvm
);
4085 kvm_ioapic_destroy(kvm
);
4086 kvm_pic_destroy(kvm
);
4087 goto create_irqchip_unlock
;
4089 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4091 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4092 create_irqchip_unlock
:
4093 mutex_unlock(&kvm
->lock
);
4096 case KVM_CREATE_PIT
:
4097 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4099 case KVM_CREATE_PIT2
:
4101 if (copy_from_user(&u
.pit_config
, argp
,
4102 sizeof(struct kvm_pit_config
)))
4105 mutex_lock(&kvm
->lock
);
4108 goto create_pit_unlock
;
4110 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4114 mutex_unlock(&kvm
->lock
);
4116 case KVM_GET_IRQCHIP
: {
4117 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4118 struct kvm_irqchip
*chip
;
4120 chip
= memdup_user(argp
, sizeof(*chip
));
4127 if (!irqchip_kernel(kvm
))
4128 goto get_irqchip_out
;
4129 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4131 goto get_irqchip_out
;
4133 if (copy_to_user(argp
, chip
, sizeof *chip
))
4134 goto get_irqchip_out
;
4140 case KVM_SET_IRQCHIP
: {
4141 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4142 struct kvm_irqchip
*chip
;
4144 chip
= memdup_user(argp
, sizeof(*chip
));
4151 if (!irqchip_kernel(kvm
))
4152 goto set_irqchip_out
;
4153 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4155 goto set_irqchip_out
;
4163 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4166 if (!kvm
->arch
.vpit
)
4168 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4172 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4179 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4182 if (!kvm
->arch
.vpit
)
4184 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4187 case KVM_GET_PIT2
: {
4189 if (!kvm
->arch
.vpit
)
4191 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4195 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4200 case KVM_SET_PIT2
: {
4202 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4205 if (!kvm
->arch
.vpit
)
4207 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4210 case KVM_REINJECT_CONTROL
: {
4211 struct kvm_reinject_control control
;
4213 if (copy_from_user(&control
, argp
, sizeof(control
)))
4215 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4218 case KVM_SET_BOOT_CPU_ID
:
4220 mutex_lock(&kvm
->lock
);
4221 if (kvm
->created_vcpus
)
4224 kvm
->arch
.bsp_vcpu_id
= arg
;
4225 mutex_unlock(&kvm
->lock
);
4227 case KVM_XEN_HVM_CONFIG
: {
4228 struct kvm_xen_hvm_config xhc
;
4230 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4235 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4239 case KVM_SET_CLOCK
: {
4240 struct kvm_clock_data user_ns
;
4244 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4253 * TODO: userspace has to take care of races with VCPU_RUN, so
4254 * kvm_gen_update_masterclock() can be cut down to locked
4255 * pvclock_update_vm_gtod_copy().
4257 kvm_gen_update_masterclock(kvm
);
4258 now_ns
= get_kvmclock_ns(kvm
);
4259 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4260 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4263 case KVM_GET_CLOCK
: {
4264 struct kvm_clock_data user_ns
;
4267 now_ns
= get_kvmclock_ns(kvm
);
4268 user_ns
.clock
= now_ns
;
4269 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4270 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4273 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4278 case KVM_ENABLE_CAP
: {
4279 struct kvm_enable_cap cap
;
4282 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4284 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4294 static void kvm_init_msr_list(void)
4299 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4300 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4304 * Even MSRs that are valid in the host may not be exposed
4305 * to the guests in some cases.
4307 switch (msrs_to_save
[i
]) {
4308 case MSR_IA32_BNDCFGS
:
4309 if (!kvm_x86_ops
->mpx_supported())
4313 if (!kvm_x86_ops
->rdtscp_supported())
4321 msrs_to_save
[j
] = msrs_to_save
[i
];
4324 num_msrs_to_save
= j
;
4326 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4327 switch (emulated_msrs
[i
]) {
4328 case MSR_IA32_SMBASE
:
4329 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4337 emulated_msrs
[j
] = emulated_msrs
[i
];
4340 num_emulated_msrs
= j
;
4343 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4351 if (!(lapic_in_kernel(vcpu
) &&
4352 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4353 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4364 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4371 if (!(lapic_in_kernel(vcpu
) &&
4372 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4374 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4376 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4386 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4387 struct kvm_segment
*var
, int seg
)
4389 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4392 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4393 struct kvm_segment
*var
, int seg
)
4395 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4398 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4399 struct x86_exception
*exception
)
4403 BUG_ON(!mmu_is_nested(vcpu
));
4405 /* NPT walks are always user-walks */
4406 access
|= PFERR_USER_MASK
;
4407 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4412 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4413 struct x86_exception
*exception
)
4415 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4416 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4419 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4420 struct x86_exception
*exception
)
4422 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4423 access
|= PFERR_FETCH_MASK
;
4424 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4427 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4428 struct x86_exception
*exception
)
4430 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4431 access
|= PFERR_WRITE_MASK
;
4432 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4435 /* uses this to access any guest's mapped memory without checking CPL */
4436 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4437 struct x86_exception
*exception
)
4439 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4442 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4443 struct kvm_vcpu
*vcpu
, u32 access
,
4444 struct x86_exception
*exception
)
4447 int r
= X86EMUL_CONTINUE
;
4450 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4452 unsigned offset
= addr
& (PAGE_SIZE
-1);
4453 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4456 if (gpa
== UNMAPPED_GVA
)
4457 return X86EMUL_PROPAGATE_FAULT
;
4458 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4461 r
= X86EMUL_IO_NEEDED
;
4473 /* used for instruction fetching */
4474 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4475 gva_t addr
, void *val
, unsigned int bytes
,
4476 struct x86_exception
*exception
)
4478 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4479 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4483 /* Inline kvm_read_guest_virt_helper for speed. */
4484 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4486 if (unlikely(gpa
== UNMAPPED_GVA
))
4487 return X86EMUL_PROPAGATE_FAULT
;
4489 offset
= addr
& (PAGE_SIZE
-1);
4490 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4491 bytes
= (unsigned)PAGE_SIZE
- offset
;
4492 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4494 if (unlikely(ret
< 0))
4495 return X86EMUL_IO_NEEDED
;
4497 return X86EMUL_CONTINUE
;
4500 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4501 gva_t addr
, void *val
, unsigned int bytes
,
4502 struct x86_exception
*exception
)
4504 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4505 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4507 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4510 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4512 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4513 gva_t addr
, void *val
, unsigned int bytes
,
4514 struct x86_exception
*exception
)
4516 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4517 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4520 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4521 unsigned long addr
, void *val
, unsigned int bytes
)
4523 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4524 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4526 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4529 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4530 gva_t addr
, void *val
,
4532 struct x86_exception
*exception
)
4534 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4536 int r
= X86EMUL_CONTINUE
;
4539 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4542 unsigned offset
= addr
& (PAGE_SIZE
-1);
4543 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4546 if (gpa
== UNMAPPED_GVA
)
4547 return X86EMUL_PROPAGATE_FAULT
;
4548 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4550 r
= X86EMUL_IO_NEEDED
;
4561 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4563 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4564 gpa_t gpa
, bool write
)
4566 /* For APIC access vmexit */
4567 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4570 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4571 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4578 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4579 gpa_t
*gpa
, struct x86_exception
*exception
,
4582 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4583 | (write
? PFERR_WRITE_MASK
: 0);
4586 * currently PKRU is only applied to ept enabled guest so
4587 * there is no pkey in EPT page table for L1 guest or EPT
4588 * shadow page table for L2 guest.
4590 if (vcpu_match_mmio_gva(vcpu
, gva
)
4591 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4592 vcpu
->arch
.access
, 0, access
)) {
4593 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4594 (gva
& (PAGE_SIZE
- 1));
4595 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4599 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4601 if (*gpa
== UNMAPPED_GVA
)
4604 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4607 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4608 const void *val
, int bytes
)
4612 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4615 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4619 struct read_write_emulator_ops
{
4620 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4622 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4623 void *val
, int bytes
);
4624 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4625 int bytes
, void *val
);
4626 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4627 void *val
, int bytes
);
4631 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4633 if (vcpu
->mmio_read_completed
) {
4634 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4635 vcpu
->mmio_fragments
[0].gpa
, val
);
4636 vcpu
->mmio_read_completed
= 0;
4643 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4644 void *val
, int bytes
)
4646 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4649 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4650 void *val
, int bytes
)
4652 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4655 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4657 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4658 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4661 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4662 void *val
, int bytes
)
4664 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4665 return X86EMUL_IO_NEEDED
;
4668 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4669 void *val
, int bytes
)
4671 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4673 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4674 return X86EMUL_CONTINUE
;
4677 static const struct read_write_emulator_ops read_emultor
= {
4678 .read_write_prepare
= read_prepare
,
4679 .read_write_emulate
= read_emulate
,
4680 .read_write_mmio
= vcpu_mmio_read
,
4681 .read_write_exit_mmio
= read_exit_mmio
,
4684 static const struct read_write_emulator_ops write_emultor
= {
4685 .read_write_emulate
= write_emulate
,
4686 .read_write_mmio
= write_mmio
,
4687 .read_write_exit_mmio
= write_exit_mmio
,
4691 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4693 struct x86_exception
*exception
,
4694 struct kvm_vcpu
*vcpu
,
4695 const struct read_write_emulator_ops
*ops
)
4699 bool write
= ops
->write
;
4700 struct kvm_mmio_fragment
*frag
;
4701 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4704 * If the exit was due to a NPF we may already have a GPA.
4705 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4706 * Note, this cannot be used on string operations since string
4707 * operation using rep will only have the initial GPA from the NPF
4710 if (vcpu
->arch
.gpa_available
&&
4711 emulator_can_use_gpa(ctxt
) &&
4712 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4713 gpa
= vcpu
->arch
.gpa_val
;
4714 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4716 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4718 return X86EMUL_PROPAGATE_FAULT
;
4721 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4722 return X86EMUL_CONTINUE
;
4725 * Is this MMIO handled locally?
4727 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4728 if (handled
== bytes
)
4729 return X86EMUL_CONTINUE
;
4735 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4736 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4740 return X86EMUL_CONTINUE
;
4743 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4745 void *val
, unsigned int bytes
,
4746 struct x86_exception
*exception
,
4747 const struct read_write_emulator_ops
*ops
)
4749 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4753 if (ops
->read_write_prepare
&&
4754 ops
->read_write_prepare(vcpu
, val
, bytes
))
4755 return X86EMUL_CONTINUE
;
4757 vcpu
->mmio_nr_fragments
= 0;
4759 /* Crossing a page boundary? */
4760 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4763 now
= -addr
& ~PAGE_MASK
;
4764 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4767 if (rc
!= X86EMUL_CONTINUE
)
4770 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4776 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4778 if (rc
!= X86EMUL_CONTINUE
)
4781 if (!vcpu
->mmio_nr_fragments
)
4784 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4786 vcpu
->mmio_needed
= 1;
4787 vcpu
->mmio_cur_fragment
= 0;
4789 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4790 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4791 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4792 vcpu
->run
->mmio
.phys_addr
= gpa
;
4794 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4797 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4801 struct x86_exception
*exception
)
4803 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4804 exception
, &read_emultor
);
4807 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4811 struct x86_exception
*exception
)
4813 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4814 exception
, &write_emultor
);
4817 #define CMPXCHG_TYPE(t, ptr, old, new) \
4818 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4820 #ifdef CONFIG_X86_64
4821 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4823 # define CMPXCHG64(ptr, old, new) \
4824 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4827 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4832 struct x86_exception
*exception
)
4834 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4840 /* guests cmpxchg8b have to be emulated atomically */
4841 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4844 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4846 if (gpa
== UNMAPPED_GVA
||
4847 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4850 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4853 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4854 if (is_error_page(page
))
4857 kaddr
= kmap_atomic(page
);
4858 kaddr
+= offset_in_page(gpa
);
4861 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4864 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4867 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4870 exchanged
= CMPXCHG64(kaddr
, old
, new);
4875 kunmap_atomic(kaddr
);
4876 kvm_release_page_dirty(page
);
4879 return X86EMUL_CMPXCHG_FAILED
;
4881 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4882 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4884 return X86EMUL_CONTINUE
;
4887 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4889 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4892 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4896 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4897 if (vcpu
->arch
.pio
.in
)
4898 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4899 vcpu
->arch
.pio
.size
, pd
);
4901 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4902 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4906 pd
+= vcpu
->arch
.pio
.size
;
4911 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4912 unsigned short port
, void *val
,
4913 unsigned int count
, bool in
)
4915 vcpu
->arch
.pio
.port
= port
;
4916 vcpu
->arch
.pio
.in
= in
;
4917 vcpu
->arch
.pio
.count
= count
;
4918 vcpu
->arch
.pio
.size
= size
;
4920 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4921 vcpu
->arch
.pio
.count
= 0;
4925 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4926 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4927 vcpu
->run
->io
.size
= size
;
4928 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4929 vcpu
->run
->io
.count
= count
;
4930 vcpu
->run
->io
.port
= port
;
4935 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4936 int size
, unsigned short port
, void *val
,
4939 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4942 if (vcpu
->arch
.pio
.count
)
4945 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4947 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4950 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4951 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4952 vcpu
->arch
.pio
.count
= 0;
4959 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4960 int size
, unsigned short port
,
4961 const void *val
, unsigned int count
)
4963 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4965 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4966 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4967 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4970 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4972 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4975 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4977 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4980 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4982 if (!need_emulate_wbinvd(vcpu
))
4983 return X86EMUL_CONTINUE
;
4985 if (kvm_x86_ops
->has_wbinvd_exit()) {
4986 int cpu
= get_cpu();
4988 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4989 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4990 wbinvd_ipi
, NULL
, 1);
4992 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4995 return X86EMUL_CONTINUE
;
4998 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5000 kvm_emulate_wbinvd_noskip(vcpu
);
5001 return kvm_skip_emulated_instruction(vcpu
);
5003 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5007 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5009 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5012 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5013 unsigned long *dest
)
5015 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5018 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5019 unsigned long value
)
5022 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5025 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5027 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5030 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5032 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5033 unsigned long value
;
5037 value
= kvm_read_cr0(vcpu
);
5040 value
= vcpu
->arch
.cr2
;
5043 value
= kvm_read_cr3(vcpu
);
5046 value
= kvm_read_cr4(vcpu
);
5049 value
= kvm_get_cr8(vcpu
);
5052 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5059 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5061 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5066 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5069 vcpu
->arch
.cr2
= val
;
5072 res
= kvm_set_cr3(vcpu
, val
);
5075 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5078 res
= kvm_set_cr8(vcpu
, val
);
5081 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5088 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5090 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5093 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5095 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5098 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5100 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5103 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5105 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5108 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5110 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5113 static unsigned long emulator_get_cached_segment_base(
5114 struct x86_emulate_ctxt
*ctxt
, int seg
)
5116 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5119 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5120 struct desc_struct
*desc
, u32
*base3
,
5123 struct kvm_segment var
;
5125 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5126 *selector
= var
.selector
;
5129 memset(desc
, 0, sizeof(*desc
));
5137 set_desc_limit(desc
, var
.limit
);
5138 set_desc_base(desc
, (unsigned long)var
.base
);
5139 #ifdef CONFIG_X86_64
5141 *base3
= var
.base
>> 32;
5143 desc
->type
= var
.type
;
5145 desc
->dpl
= var
.dpl
;
5146 desc
->p
= var
.present
;
5147 desc
->avl
= var
.avl
;
5155 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5156 struct desc_struct
*desc
, u32 base3
,
5159 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5160 struct kvm_segment var
;
5162 var
.selector
= selector
;
5163 var
.base
= get_desc_base(desc
);
5164 #ifdef CONFIG_X86_64
5165 var
.base
|= ((u64
)base3
) << 32;
5167 var
.limit
= get_desc_limit(desc
);
5169 var
.limit
= (var
.limit
<< 12) | 0xfff;
5170 var
.type
= desc
->type
;
5171 var
.dpl
= desc
->dpl
;
5176 var
.avl
= desc
->avl
;
5177 var
.present
= desc
->p
;
5178 var
.unusable
= !var
.present
;
5181 kvm_set_segment(vcpu
, &var
, seg
);
5185 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5186 u32 msr_index
, u64
*pdata
)
5188 struct msr_data msr
;
5191 msr
.index
= msr_index
;
5192 msr
.host_initiated
= false;
5193 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5201 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5202 u32 msr_index
, u64 data
)
5204 struct msr_data msr
;
5207 msr
.index
= msr_index
;
5208 msr
.host_initiated
= false;
5209 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5212 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5214 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5216 return vcpu
->arch
.smbase
;
5219 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5221 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5223 vcpu
->arch
.smbase
= smbase
;
5226 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5229 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5232 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5233 u32 pmc
, u64
*pdata
)
5235 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5238 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5240 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5243 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5246 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5249 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5254 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5255 struct x86_instruction_info
*info
,
5256 enum x86_intercept_stage stage
)
5258 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5261 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5262 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5264 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5267 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5269 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5272 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5274 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5277 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5279 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5282 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5284 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5287 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5289 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5292 static const struct x86_emulate_ops emulate_ops
= {
5293 .read_gpr
= emulator_read_gpr
,
5294 .write_gpr
= emulator_write_gpr
,
5295 .read_std
= kvm_read_guest_virt_system
,
5296 .write_std
= kvm_write_guest_virt_system
,
5297 .read_phys
= kvm_read_guest_phys_system
,
5298 .fetch
= kvm_fetch_guest_virt
,
5299 .read_emulated
= emulator_read_emulated
,
5300 .write_emulated
= emulator_write_emulated
,
5301 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5302 .invlpg
= emulator_invlpg
,
5303 .pio_in_emulated
= emulator_pio_in_emulated
,
5304 .pio_out_emulated
= emulator_pio_out_emulated
,
5305 .get_segment
= emulator_get_segment
,
5306 .set_segment
= emulator_set_segment
,
5307 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5308 .get_gdt
= emulator_get_gdt
,
5309 .get_idt
= emulator_get_idt
,
5310 .set_gdt
= emulator_set_gdt
,
5311 .set_idt
= emulator_set_idt
,
5312 .get_cr
= emulator_get_cr
,
5313 .set_cr
= emulator_set_cr
,
5314 .cpl
= emulator_get_cpl
,
5315 .get_dr
= emulator_get_dr
,
5316 .set_dr
= emulator_set_dr
,
5317 .get_smbase
= emulator_get_smbase
,
5318 .set_smbase
= emulator_set_smbase
,
5319 .set_msr
= emulator_set_msr
,
5320 .get_msr
= emulator_get_msr
,
5321 .check_pmc
= emulator_check_pmc
,
5322 .read_pmc
= emulator_read_pmc
,
5323 .halt
= emulator_halt
,
5324 .wbinvd
= emulator_wbinvd
,
5325 .fix_hypercall
= emulator_fix_hypercall
,
5326 .get_fpu
= emulator_get_fpu
,
5327 .put_fpu
= emulator_put_fpu
,
5328 .intercept
= emulator_intercept
,
5329 .get_cpuid
= emulator_get_cpuid
,
5330 .set_nmi_mask
= emulator_set_nmi_mask
,
5331 .get_hflags
= emulator_get_hflags
,
5332 .set_hflags
= emulator_set_hflags
,
5335 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5337 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5339 * an sti; sti; sequence only disable interrupts for the first
5340 * instruction. So, if the last instruction, be it emulated or
5341 * not, left the system with the INT_STI flag enabled, it
5342 * means that the last instruction is an sti. We should not
5343 * leave the flag on in this case. The same goes for mov ss
5345 if (int_shadow
& mask
)
5347 if (unlikely(int_shadow
|| mask
)) {
5348 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5350 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5354 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5356 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5357 if (ctxt
->exception
.vector
== PF_VECTOR
)
5358 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5360 if (ctxt
->exception
.error_code_valid
)
5361 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5362 ctxt
->exception
.error_code
);
5364 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5368 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5370 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5373 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5375 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5376 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5378 ctxt
->eip
= kvm_rip_read(vcpu
);
5379 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5380 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5381 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5382 cs_db
? X86EMUL_MODE_PROT32
:
5383 X86EMUL_MODE_PROT16
;
5384 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5385 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5386 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5388 init_decode_cache(ctxt
);
5389 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5392 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5394 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5397 init_emulate_ctxt(vcpu
);
5401 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5402 ret
= emulate_int_real(ctxt
, irq
);
5404 if (ret
!= X86EMUL_CONTINUE
)
5405 return EMULATE_FAIL
;
5407 ctxt
->eip
= ctxt
->_eip
;
5408 kvm_rip_write(vcpu
, ctxt
->eip
);
5409 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5411 if (irq
== NMI_VECTOR
)
5412 vcpu
->arch
.nmi_pending
= 0;
5414 vcpu
->arch
.interrupt
.pending
= false;
5416 return EMULATE_DONE
;
5418 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5420 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5422 int r
= EMULATE_DONE
;
5424 ++vcpu
->stat
.insn_emulation_fail
;
5425 trace_kvm_emulate_insn_failed(vcpu
);
5426 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5427 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5428 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5429 vcpu
->run
->internal
.ndata
= 0;
5430 r
= EMULATE_USER_EXIT
;
5432 kvm_queue_exception(vcpu
, UD_VECTOR
);
5437 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5438 bool write_fault_to_shadow_pgtable
,
5444 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5447 if (!vcpu
->arch
.mmu
.direct_map
) {
5449 * Write permission should be allowed since only
5450 * write access need to be emulated.
5452 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5455 * If the mapping is invalid in guest, let cpu retry
5456 * it to generate fault.
5458 if (gpa
== UNMAPPED_GVA
)
5463 * Do not retry the unhandleable instruction if it faults on the
5464 * readonly host memory, otherwise it will goto a infinite loop:
5465 * retry instruction -> write #PF -> emulation fail -> retry
5466 * instruction -> ...
5468 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5471 * If the instruction failed on the error pfn, it can not be fixed,
5472 * report the error to userspace.
5474 if (is_error_noslot_pfn(pfn
))
5477 kvm_release_pfn_clean(pfn
);
5479 /* The instructions are well-emulated on direct mmu. */
5480 if (vcpu
->arch
.mmu
.direct_map
) {
5481 unsigned int indirect_shadow_pages
;
5483 spin_lock(&vcpu
->kvm
->mmu_lock
);
5484 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5485 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5487 if (indirect_shadow_pages
)
5488 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5494 * if emulation was due to access to shadowed page table
5495 * and it failed try to unshadow page and re-enter the
5496 * guest to let CPU execute the instruction.
5498 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5501 * If the access faults on its page table, it can not
5502 * be fixed by unprotecting shadow page and it should
5503 * be reported to userspace.
5505 return !write_fault_to_shadow_pgtable
;
5508 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5509 unsigned long cr2
, int emulation_type
)
5511 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5512 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5514 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5515 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5518 * If the emulation is caused by #PF and it is non-page_table
5519 * writing instruction, it means the VM-EXIT is caused by shadow
5520 * page protected, we can zap the shadow page and retry this
5521 * instruction directly.
5523 * Note: if the guest uses a non-page-table modifying instruction
5524 * on the PDE that points to the instruction, then we will unmap
5525 * the instruction and go to an infinite loop. So, we cache the
5526 * last retried eip and the last fault address, if we meet the eip
5527 * and the address again, we can break out of the potential infinite
5530 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5532 if (!(emulation_type
& EMULTYPE_RETRY
))
5535 if (x86_page_table_writing_insn(ctxt
))
5538 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5541 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5542 vcpu
->arch
.last_retry_addr
= cr2
;
5544 if (!vcpu
->arch
.mmu
.direct_map
)
5545 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5547 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5552 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5553 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5555 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5557 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5558 /* This is a good place to trace that we are exiting SMM. */
5559 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5561 /* Process a latched INIT or SMI, if any. */
5562 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5565 kvm_mmu_reset_context(vcpu
);
5568 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5570 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5572 vcpu
->arch
.hflags
= emul_flags
;
5574 if (changed
& HF_SMM_MASK
)
5575 kvm_smm_changed(vcpu
);
5578 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5587 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5588 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5593 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5595 struct kvm_run
*kvm_run
= vcpu
->run
;
5597 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5598 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5599 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5600 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5601 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5602 *r
= EMULATE_USER_EXIT
;
5605 * "Certain debug exceptions may clear bit 0-3. The
5606 * remaining contents of the DR6 register are never
5607 * cleared by the processor".
5609 vcpu
->arch
.dr6
&= ~15;
5610 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5611 kvm_queue_exception(vcpu
, DB_VECTOR
);
5615 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5617 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5618 int r
= EMULATE_DONE
;
5620 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5623 * rflags is the old, "raw" value of the flags. The new value has
5624 * not been saved yet.
5626 * This is correct even for TF set by the guest, because "the
5627 * processor will not generate this exception after the instruction
5628 * that sets the TF flag".
5630 if (unlikely(rflags
& X86_EFLAGS_TF
))
5631 kvm_vcpu_do_singlestep(vcpu
, &r
);
5632 return r
== EMULATE_DONE
;
5634 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5636 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5638 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5639 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5640 struct kvm_run
*kvm_run
= vcpu
->run
;
5641 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5642 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5643 vcpu
->arch
.guest_debug_dr7
,
5647 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5648 kvm_run
->debug
.arch
.pc
= eip
;
5649 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5650 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5651 *r
= EMULATE_USER_EXIT
;
5656 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5657 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5658 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5659 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5664 vcpu
->arch
.dr6
&= ~15;
5665 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5666 kvm_queue_exception(vcpu
, DB_VECTOR
);
5675 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5682 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5683 bool writeback
= true;
5684 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5687 * Clear write_fault_to_shadow_pgtable here to ensure it is
5690 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5691 kvm_clear_exception_queue(vcpu
);
5693 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5694 init_emulate_ctxt(vcpu
);
5697 * We will reenter on the same instruction since
5698 * we do not set complete_userspace_io. This does not
5699 * handle watchpoints yet, those would be handled in
5702 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5703 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5706 ctxt
->interruptibility
= 0;
5707 ctxt
->have_exception
= false;
5708 ctxt
->exception
.vector
= -1;
5709 ctxt
->perm_ok
= false;
5711 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5713 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5715 trace_kvm_emulate_insn_start(vcpu
);
5716 ++vcpu
->stat
.insn_emulation
;
5717 if (r
!= EMULATION_OK
) {
5718 if (emulation_type
& EMULTYPE_TRAP_UD
)
5719 return EMULATE_FAIL
;
5720 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5722 return EMULATE_DONE
;
5723 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5724 return EMULATE_DONE
;
5725 if (emulation_type
& EMULTYPE_SKIP
)
5726 return EMULATE_FAIL
;
5727 return handle_emulation_failure(vcpu
);
5731 if (emulation_type
& EMULTYPE_SKIP
) {
5732 kvm_rip_write(vcpu
, ctxt
->_eip
);
5733 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5734 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5735 return EMULATE_DONE
;
5738 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5739 return EMULATE_DONE
;
5741 /* this is needed for vmware backdoor interface to work since it
5742 changes registers values during IO operation */
5743 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5744 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5745 emulator_invalidate_register_cache(ctxt
);
5749 /* Save the faulting GPA (cr2) in the address field */
5750 ctxt
->exception
.address
= cr2
;
5752 r
= x86_emulate_insn(ctxt
);
5754 if (r
== EMULATION_INTERCEPTED
)
5755 return EMULATE_DONE
;
5757 if (r
== EMULATION_FAILED
) {
5758 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5760 return EMULATE_DONE
;
5762 return handle_emulation_failure(vcpu
);
5765 if (ctxt
->have_exception
) {
5767 if (inject_emulated_exception(vcpu
))
5769 } else if (vcpu
->arch
.pio
.count
) {
5770 if (!vcpu
->arch
.pio
.in
) {
5771 /* FIXME: return into emulator if single-stepping. */
5772 vcpu
->arch
.pio
.count
= 0;
5775 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5777 r
= EMULATE_USER_EXIT
;
5778 } else if (vcpu
->mmio_needed
) {
5779 if (!vcpu
->mmio_is_write
)
5781 r
= EMULATE_USER_EXIT
;
5782 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5783 } else if (r
== EMULATION_RESTART
)
5789 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5790 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5791 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5792 kvm_rip_write(vcpu
, ctxt
->eip
);
5793 if (r
== EMULATE_DONE
&&
5794 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5795 kvm_vcpu_do_singlestep(vcpu
, &r
);
5796 if (!ctxt
->have_exception
||
5797 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5798 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5801 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5802 * do nothing, and it will be requested again as soon as
5803 * the shadow expires. But we still need to check here,
5804 * because POPF has no interrupt shadow.
5806 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5807 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5809 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5813 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5815 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5817 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5818 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5819 size
, port
, &val
, 1);
5820 /* do not return to emulator after return from userspace */
5821 vcpu
->arch
.pio
.count
= 0;
5824 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5826 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5830 /* We should only ever be called with arch.pio.count equal to 1 */
5831 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5833 /* For size less than 4 we merge, else we zero extend */
5834 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5838 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5839 * the copy and tracing
5841 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5842 vcpu
->arch
.pio
.port
, &val
, 1);
5843 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5848 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5853 /* For size less than 4 we merge, else we zero extend */
5854 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5856 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5859 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5863 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5867 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5869 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5871 __this_cpu_write(cpu_tsc_khz
, 0);
5875 static void tsc_khz_changed(void *data
)
5877 struct cpufreq_freqs
*freq
= data
;
5878 unsigned long khz
= 0;
5882 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5883 khz
= cpufreq_quick_get(raw_smp_processor_id());
5886 __this_cpu_write(cpu_tsc_khz
, khz
);
5889 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5892 struct cpufreq_freqs
*freq
= data
;
5894 struct kvm_vcpu
*vcpu
;
5895 int i
, send_ipi
= 0;
5898 * We allow guests to temporarily run on slowing clocks,
5899 * provided we notify them after, or to run on accelerating
5900 * clocks, provided we notify them before. Thus time never
5903 * However, we have a problem. We can't atomically update
5904 * the frequency of a given CPU from this function; it is
5905 * merely a notifier, which can be called from any CPU.
5906 * Changing the TSC frequency at arbitrary points in time
5907 * requires a recomputation of local variables related to
5908 * the TSC for each VCPU. We must flag these local variables
5909 * to be updated and be sure the update takes place with the
5910 * new frequency before any guests proceed.
5912 * Unfortunately, the combination of hotplug CPU and frequency
5913 * change creates an intractable locking scenario; the order
5914 * of when these callouts happen is undefined with respect to
5915 * CPU hotplug, and they can race with each other. As such,
5916 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5917 * undefined; you can actually have a CPU frequency change take
5918 * place in between the computation of X and the setting of the
5919 * variable. To protect against this problem, all updates of
5920 * the per_cpu tsc_khz variable are done in an interrupt
5921 * protected IPI, and all callers wishing to update the value
5922 * must wait for a synchronous IPI to complete (which is trivial
5923 * if the caller is on the CPU already). This establishes the
5924 * necessary total order on variable updates.
5926 * Note that because a guest time update may take place
5927 * anytime after the setting of the VCPU's request bit, the
5928 * correct TSC value must be set before the request. However,
5929 * to ensure the update actually makes it to any guest which
5930 * starts running in hardware virtualization between the set
5931 * and the acquisition of the spinlock, we must also ping the
5932 * CPU after setting the request bit.
5936 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5938 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5941 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5943 spin_lock(&kvm_lock
);
5944 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5945 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5946 if (vcpu
->cpu
!= freq
->cpu
)
5948 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5949 if (vcpu
->cpu
!= smp_processor_id())
5953 spin_unlock(&kvm_lock
);
5955 if (freq
->old
< freq
->new && send_ipi
) {
5957 * We upscale the frequency. Must make the guest
5958 * doesn't see old kvmclock values while running with
5959 * the new frequency, otherwise we risk the guest sees
5960 * time go backwards.
5962 * In case we update the frequency for another cpu
5963 * (which might be in guest context) send an interrupt
5964 * to kick the cpu out of guest context. Next time
5965 * guest context is entered kvmclock will be updated,
5966 * so the guest will not see stale values.
5968 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5973 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5974 .notifier_call
= kvmclock_cpufreq_notifier
5977 static int kvmclock_cpu_online(unsigned int cpu
)
5979 tsc_khz_changed(NULL
);
5983 static void kvm_timer_init(void)
5985 max_tsc_khz
= tsc_khz
;
5987 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5988 #ifdef CONFIG_CPU_FREQ
5989 struct cpufreq_policy policy
;
5992 memset(&policy
, 0, sizeof(policy
));
5994 cpufreq_get_policy(&policy
, cpu
);
5995 if (policy
.cpuinfo
.max_freq
)
5996 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5999 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6000 CPUFREQ_TRANSITION_NOTIFIER
);
6002 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6004 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6005 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6008 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6010 int kvm_is_in_guest(void)
6012 return __this_cpu_read(current_vcpu
) != NULL
;
6015 static int kvm_is_user_mode(void)
6019 if (__this_cpu_read(current_vcpu
))
6020 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6022 return user_mode
!= 0;
6025 static unsigned long kvm_get_guest_ip(void)
6027 unsigned long ip
= 0;
6029 if (__this_cpu_read(current_vcpu
))
6030 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6035 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6036 .is_in_guest
= kvm_is_in_guest
,
6037 .is_user_mode
= kvm_is_user_mode
,
6038 .get_guest_ip
= kvm_get_guest_ip
,
6041 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6043 __this_cpu_write(current_vcpu
, vcpu
);
6045 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6047 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6049 __this_cpu_write(current_vcpu
, NULL
);
6051 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6053 static void kvm_set_mmio_spte_mask(void)
6056 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6059 * Set the reserved bits and the present bit of an paging-structure
6060 * entry to generate page fault with PFER.RSV = 1.
6062 /* Mask the reserved physical address bits. */
6063 mask
= rsvd_bits(maxphyaddr
, 51);
6065 /* Set the present bit. */
6068 #ifdef CONFIG_X86_64
6070 * If reserved bit is not supported, clear the present bit to disable
6073 if (maxphyaddr
== 52)
6077 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6080 #ifdef CONFIG_X86_64
6081 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6085 struct kvm_vcpu
*vcpu
;
6088 spin_lock(&kvm_lock
);
6089 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6090 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6091 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6092 atomic_set(&kvm_guest_has_master_clock
, 0);
6093 spin_unlock(&kvm_lock
);
6096 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6099 * Notification about pvclock gtod data update.
6101 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6104 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6105 struct timekeeper
*tk
= priv
;
6107 update_pvclock_gtod(tk
);
6109 /* disable master clock if host does not trust, or does not
6110 * use, TSC clocksource
6112 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6113 atomic_read(&kvm_guest_has_master_clock
) != 0)
6114 queue_work(system_long_wq
, &pvclock_gtod_work
);
6119 static struct notifier_block pvclock_gtod_notifier
= {
6120 .notifier_call
= pvclock_gtod_notify
,
6124 int kvm_arch_init(void *opaque
)
6127 struct kvm_x86_ops
*ops
= opaque
;
6130 printk(KERN_ERR
"kvm: already loaded the other module\n");
6135 if (!ops
->cpu_has_kvm_support()) {
6136 printk(KERN_ERR
"kvm: no hardware support\n");
6140 if (ops
->disabled_by_bios()) {
6141 printk(KERN_ERR
"kvm: disabled by bios\n");
6147 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6149 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6153 r
= kvm_mmu_module_init();
6155 goto out_free_percpu
;
6157 kvm_set_mmio_spte_mask();
6161 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6162 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6163 PT_PRESENT_MASK
, 0, sme_me_mask
);
6166 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6168 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6169 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6172 #ifdef CONFIG_X86_64
6173 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6179 free_percpu(shared_msrs
);
6184 void kvm_arch_exit(void)
6187 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6189 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6190 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6191 CPUFREQ_TRANSITION_NOTIFIER
);
6192 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6193 #ifdef CONFIG_X86_64
6194 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6197 kvm_mmu_module_exit();
6198 free_percpu(shared_msrs
);
6201 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6203 ++vcpu
->stat
.halt_exits
;
6204 if (lapic_in_kernel(vcpu
)) {
6205 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6208 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6212 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6214 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6216 int ret
= kvm_skip_emulated_instruction(vcpu
);
6218 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6219 * KVM_EXIT_DEBUG here.
6221 return kvm_vcpu_halt(vcpu
) && ret
;
6223 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6225 #ifdef CONFIG_X86_64
6226 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6227 unsigned long clock_type
)
6229 struct kvm_clock_pairing clock_pairing
;
6234 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6235 return -KVM_EOPNOTSUPP
;
6237 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6238 return -KVM_EOPNOTSUPP
;
6240 clock_pairing
.sec
= ts
.tv_sec
;
6241 clock_pairing
.nsec
= ts
.tv_nsec
;
6242 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6243 clock_pairing
.flags
= 0;
6246 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6247 sizeof(struct kvm_clock_pairing
)))
6255 * kvm_pv_kick_cpu_op: Kick a vcpu.
6257 * @apicid - apicid of vcpu to be kicked.
6259 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6261 struct kvm_lapic_irq lapic_irq
;
6263 lapic_irq
.shorthand
= 0;
6264 lapic_irq
.dest_mode
= 0;
6265 lapic_irq
.level
= 0;
6266 lapic_irq
.dest_id
= apicid
;
6267 lapic_irq
.msi_redir_hint
= false;
6269 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6270 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6273 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6275 vcpu
->arch
.apicv_active
= false;
6276 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6279 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6281 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6284 r
= kvm_skip_emulated_instruction(vcpu
);
6286 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6287 return kvm_hv_hypercall(vcpu
);
6289 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6290 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6291 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6292 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6293 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6295 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6297 op_64_bit
= is_64_bit_mode(vcpu
);
6306 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6312 case KVM_HC_VAPIC_POLL_IRQ
:
6315 case KVM_HC_KICK_CPU
:
6316 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6319 #ifdef CONFIG_X86_64
6320 case KVM_HC_CLOCK_PAIRING
:
6321 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6331 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6332 ++vcpu
->stat
.hypercalls
;
6335 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6337 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6339 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6340 char instruction
[3];
6341 unsigned long rip
= kvm_rip_read(vcpu
);
6343 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6345 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6349 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6351 return vcpu
->run
->request_interrupt_window
&&
6352 likely(!pic_in_kernel(vcpu
->kvm
));
6355 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6357 struct kvm_run
*kvm_run
= vcpu
->run
;
6359 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6360 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6361 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6362 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6363 kvm_run
->ready_for_interrupt_injection
=
6364 pic_in_kernel(vcpu
->kvm
) ||
6365 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6368 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6372 if (!kvm_x86_ops
->update_cr8_intercept
)
6375 if (!lapic_in_kernel(vcpu
))
6378 if (vcpu
->arch
.apicv_active
)
6381 if (!vcpu
->arch
.apic
->vapic_addr
)
6382 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6389 tpr
= kvm_lapic_get_cr8(vcpu
);
6391 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6394 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6398 /* try to reinject previous events if any */
6399 if (vcpu
->arch
.exception
.injected
) {
6400 kvm_x86_ops
->queue_exception(vcpu
);
6405 * Exceptions must be injected immediately, or the exception
6406 * frame will have the address of the NMI or interrupt handler.
6408 if (!vcpu
->arch
.exception
.pending
) {
6409 if (vcpu
->arch
.nmi_injected
) {
6410 kvm_x86_ops
->set_nmi(vcpu
);
6414 if (vcpu
->arch
.interrupt
.pending
) {
6415 kvm_x86_ops
->set_irq(vcpu
);
6420 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6421 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6426 /* try to inject new event if pending */
6427 if (vcpu
->arch
.exception
.pending
) {
6428 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6429 vcpu
->arch
.exception
.has_error_code
,
6430 vcpu
->arch
.exception
.error_code
);
6432 vcpu
->arch
.exception
.pending
= false;
6433 vcpu
->arch
.exception
.injected
= true;
6435 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6436 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6439 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6440 (vcpu
->arch
.dr7
& DR7_GD
)) {
6441 vcpu
->arch
.dr7
&= ~DR7_GD
;
6442 kvm_update_dr7(vcpu
);
6445 kvm_x86_ops
->queue_exception(vcpu
);
6446 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6447 vcpu
->arch
.smi_pending
= false;
6449 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6450 --vcpu
->arch
.nmi_pending
;
6451 vcpu
->arch
.nmi_injected
= true;
6452 kvm_x86_ops
->set_nmi(vcpu
);
6453 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6455 * Because interrupts can be injected asynchronously, we are
6456 * calling check_nested_events again here to avoid a race condition.
6457 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6458 * proposal and current concerns. Perhaps we should be setting
6459 * KVM_REQ_EVENT only on certain events and not unconditionally?
6461 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6462 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6466 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6467 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6469 kvm_x86_ops
->set_irq(vcpu
);
6476 static void process_nmi(struct kvm_vcpu
*vcpu
)
6481 * x86 is limited to one NMI running, and one NMI pending after it.
6482 * If an NMI is already in progress, limit further NMIs to just one.
6483 * Otherwise, allow two (and we'll inject the first one immediately).
6485 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6488 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6489 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6490 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6493 #define put_smstate(type, buf, offset, val) \
6494 *(type *)((buf) + (offset) - 0x7e00) = val
6496 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6499 flags
|= seg
->g
<< 23;
6500 flags
|= seg
->db
<< 22;
6501 flags
|= seg
->l
<< 21;
6502 flags
|= seg
->avl
<< 20;
6503 flags
|= seg
->present
<< 15;
6504 flags
|= seg
->dpl
<< 13;
6505 flags
|= seg
->s
<< 12;
6506 flags
|= seg
->type
<< 8;
6510 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6512 struct kvm_segment seg
;
6515 kvm_get_segment(vcpu
, &seg
, n
);
6516 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6519 offset
= 0x7f84 + n
* 12;
6521 offset
= 0x7f2c + (n
- 3) * 12;
6523 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6524 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6525 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6528 #ifdef CONFIG_X86_64
6529 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6531 struct kvm_segment seg
;
6535 kvm_get_segment(vcpu
, &seg
, n
);
6536 offset
= 0x7e00 + n
* 16;
6538 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6539 put_smstate(u16
, buf
, offset
, seg
.selector
);
6540 put_smstate(u16
, buf
, offset
+ 2, flags
);
6541 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6542 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6546 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6549 struct kvm_segment seg
;
6553 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6554 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6555 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6556 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6558 for (i
= 0; i
< 8; i
++)
6559 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6561 kvm_get_dr(vcpu
, 6, &val
);
6562 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6563 kvm_get_dr(vcpu
, 7, &val
);
6564 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6566 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6567 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6568 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6569 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6570 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6572 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6573 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6574 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6575 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6576 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6578 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6579 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6580 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6582 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6583 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6584 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6586 for (i
= 0; i
< 6; i
++)
6587 enter_smm_save_seg_32(vcpu
, buf
, i
);
6589 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6592 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6593 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6596 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6598 #ifdef CONFIG_X86_64
6600 struct kvm_segment seg
;
6604 for (i
= 0; i
< 16; i
++)
6605 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6607 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6608 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6610 kvm_get_dr(vcpu
, 6, &val
);
6611 put_smstate(u64
, buf
, 0x7f68, val
);
6612 kvm_get_dr(vcpu
, 7, &val
);
6613 put_smstate(u64
, buf
, 0x7f60, val
);
6615 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6616 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6617 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6619 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6622 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6624 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6626 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6627 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6628 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6629 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6630 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6632 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6633 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6634 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6636 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6637 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6638 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6639 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6640 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6642 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6643 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6644 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6646 for (i
= 0; i
< 6; i
++)
6647 enter_smm_save_seg_64(vcpu
, buf
, i
);
6653 static void enter_smm(struct kvm_vcpu
*vcpu
)
6655 struct kvm_segment cs
, ds
;
6660 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6661 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6662 memset(buf
, 0, 512);
6663 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6664 enter_smm_save_state_64(vcpu
, buf
);
6666 enter_smm_save_state_32(vcpu
, buf
);
6668 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6670 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6671 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6673 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6675 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6676 kvm_rip_write(vcpu
, 0x8000);
6678 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6679 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6680 vcpu
->arch
.cr0
= cr0
;
6682 kvm_x86_ops
->set_cr4(vcpu
, 0);
6684 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6685 dt
.address
= dt
.size
= 0;
6686 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6688 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6690 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6691 cs
.base
= vcpu
->arch
.smbase
;
6696 cs
.limit
= ds
.limit
= 0xffffffff;
6697 cs
.type
= ds
.type
= 0x3;
6698 cs
.dpl
= ds
.dpl
= 0;
6703 cs
.avl
= ds
.avl
= 0;
6704 cs
.present
= ds
.present
= 1;
6705 cs
.unusable
= ds
.unusable
= 0;
6706 cs
.padding
= ds
.padding
= 0;
6708 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6709 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6710 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6711 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6712 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6713 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6715 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6716 kvm_x86_ops
->set_efer(vcpu
, 0);
6718 kvm_update_cpuid(vcpu
);
6719 kvm_mmu_reset_context(vcpu
);
6722 static void process_smi(struct kvm_vcpu
*vcpu
)
6724 vcpu
->arch
.smi_pending
= true;
6725 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6728 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6730 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6733 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6735 u64 eoi_exit_bitmap
[4];
6737 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6740 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6742 if (irqchip_split(vcpu
->kvm
))
6743 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6745 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6746 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6747 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6749 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6750 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6751 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6754 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6756 ++vcpu
->stat
.tlb_flush
;
6757 kvm_x86_ops
->tlb_flush(vcpu
);
6760 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6761 unsigned long start
, unsigned long end
)
6763 unsigned long apic_address
;
6766 * The physical address of apic access page is stored in the VMCS.
6767 * Update it when it becomes invalid.
6769 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6770 if (start
<= apic_address
&& apic_address
< end
)
6771 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6774 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6776 struct page
*page
= NULL
;
6778 if (!lapic_in_kernel(vcpu
))
6781 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6784 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6785 if (is_error_page(page
))
6787 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6790 * Do not pin apic access page in memory, the MMU notifier
6791 * will call us again if it is migrated or swapped out.
6795 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6798 * Returns 1 to let vcpu_run() continue the guest execution loop without
6799 * exiting to the userspace. Otherwise, the value will be returned to the
6802 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6806 dm_request_for_irq_injection(vcpu
) &&
6807 kvm_cpu_accept_dm_intr(vcpu
);
6809 bool req_immediate_exit
= false;
6811 if (kvm_request_pending(vcpu
)) {
6812 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6813 kvm_mmu_unload(vcpu
);
6814 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6815 __kvm_migrate_timers(vcpu
);
6816 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6817 kvm_gen_update_masterclock(vcpu
->kvm
);
6818 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6819 kvm_gen_kvmclock_update(vcpu
);
6820 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6821 r
= kvm_guest_time_update(vcpu
);
6825 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6826 kvm_mmu_sync_roots(vcpu
);
6827 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6828 kvm_vcpu_flush_tlb(vcpu
);
6829 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6830 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6834 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6835 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6836 vcpu
->mmio_needed
= 0;
6840 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6841 /* Page is swapped out. Do synthetic halt */
6842 vcpu
->arch
.apf
.halted
= true;
6846 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6847 record_steal_time(vcpu
);
6848 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6850 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6852 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6853 kvm_pmu_handle_event(vcpu
);
6854 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6855 kvm_pmu_deliver_pmi(vcpu
);
6856 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6857 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6858 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6859 vcpu
->arch
.ioapic_handled_vectors
)) {
6860 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6861 vcpu
->run
->eoi
.vector
=
6862 vcpu
->arch
.pending_ioapic_eoi
;
6867 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6868 vcpu_scan_ioapic(vcpu
);
6869 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6870 kvm_vcpu_reload_apic_access_page(vcpu
);
6871 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6872 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6873 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6877 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6878 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6879 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6883 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6884 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6885 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6891 * KVM_REQ_HV_STIMER has to be processed after
6892 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6893 * depend on the guest clock being up-to-date
6895 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6896 kvm_hv_process_stimers(vcpu
);
6899 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6900 ++vcpu
->stat
.req_event
;
6901 kvm_apic_accept_events(vcpu
);
6902 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6907 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6908 req_immediate_exit
= true;
6910 /* Enable NMI/IRQ window open exits if needed.
6912 * SMIs have two cases: 1) they can be nested, and
6913 * then there is nothing to do here because RSM will
6914 * cause a vmexit anyway; 2) or the SMI can be pending
6915 * because inject_pending_event has completed the
6916 * injection of an IRQ or NMI from the previous vmexit,
6917 * and then we request an immediate exit to inject the SMI.
6919 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6920 req_immediate_exit
= true;
6921 if (vcpu
->arch
.nmi_pending
)
6922 kvm_x86_ops
->enable_nmi_window(vcpu
);
6923 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6924 kvm_x86_ops
->enable_irq_window(vcpu
);
6925 WARN_ON(vcpu
->arch
.exception
.pending
);
6928 if (kvm_lapic_enabled(vcpu
)) {
6929 update_cr8_intercept(vcpu
);
6930 kvm_lapic_sync_to_vapic(vcpu
);
6934 r
= kvm_mmu_reload(vcpu
);
6936 goto cancel_injection
;
6941 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6942 kvm_load_guest_fpu(vcpu
);
6945 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6946 * IPI are then delayed after guest entry, which ensures that they
6947 * result in virtual interrupt delivery.
6949 local_irq_disable();
6950 vcpu
->mode
= IN_GUEST_MODE
;
6952 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6955 * 1) We should set ->mode before checking ->requests. Please see
6956 * the comment in kvm_vcpu_exiting_guest_mode().
6958 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6959 * pairs with the memory barrier implicit in pi_test_and_set_on
6960 * (see vmx_deliver_posted_interrupt).
6962 * 3) This also orders the write to mode from any reads to the page
6963 * tables done while the VCPU is running. Please see the comment
6964 * in kvm_flush_remote_tlbs.
6966 smp_mb__after_srcu_read_unlock();
6969 * This handles the case where a posted interrupt was
6970 * notified with kvm_vcpu_kick.
6972 if (kvm_lapic_enabled(vcpu
)) {
6973 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6974 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6977 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6978 || need_resched() || signal_pending(current
)) {
6979 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6983 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6985 goto cancel_injection
;
6988 kvm_load_guest_xcr0(vcpu
);
6990 if (req_immediate_exit
) {
6991 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6992 smp_send_reschedule(vcpu
->cpu
);
6995 trace_kvm_entry(vcpu
->vcpu_id
);
6996 wait_lapic_expire(vcpu
);
6997 guest_enter_irqoff();
6999 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7001 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7002 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7003 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7004 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7005 set_debugreg(vcpu
->arch
.dr6
, 6);
7006 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7009 kvm_x86_ops
->run(vcpu
);
7012 * Do this here before restoring debug registers on the host. And
7013 * since we do this before handling the vmexit, a DR access vmexit
7014 * can (a) read the correct value of the debug registers, (b) set
7015 * KVM_DEBUGREG_WONT_EXIT again.
7017 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7018 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7019 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7020 kvm_update_dr0123(vcpu
);
7021 kvm_update_dr6(vcpu
);
7022 kvm_update_dr7(vcpu
);
7023 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7027 * If the guest has used debug registers, at least dr7
7028 * will be disabled while returning to the host.
7029 * If we don't have active breakpoints in the host, we don't
7030 * care about the messed up debug address registers. But if
7031 * we have some of them active, restore the old state.
7033 if (hw_breakpoint_active())
7034 hw_breakpoint_restore();
7036 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7038 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7041 kvm_put_guest_xcr0(vcpu
);
7043 kvm_x86_ops
->handle_external_intr(vcpu
);
7047 guest_exit_irqoff();
7052 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7055 * Profile KVM exit RIPs:
7057 if (unlikely(prof_on
== KVM_PROFILING
)) {
7058 unsigned long rip
= kvm_rip_read(vcpu
);
7059 profile_hit(KVM_PROFILING
, (void *)rip
);
7062 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7063 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7065 if (vcpu
->arch
.apic_attention
)
7066 kvm_lapic_sync_from_vapic(vcpu
);
7068 vcpu
->arch
.gpa_available
= false;
7069 r
= kvm_x86_ops
->handle_exit(vcpu
);
7073 kvm_x86_ops
->cancel_injection(vcpu
);
7074 if (unlikely(vcpu
->arch
.apic_attention
))
7075 kvm_lapic_sync_from_vapic(vcpu
);
7080 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7082 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7083 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7084 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7085 kvm_vcpu_block(vcpu
);
7086 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7088 if (kvm_x86_ops
->post_block
)
7089 kvm_x86_ops
->post_block(vcpu
);
7091 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7095 kvm_apic_accept_events(vcpu
);
7096 switch(vcpu
->arch
.mp_state
) {
7097 case KVM_MP_STATE_HALTED
:
7098 vcpu
->arch
.pv
.pv_unhalted
= false;
7099 vcpu
->arch
.mp_state
=
7100 KVM_MP_STATE_RUNNABLE
;
7101 case KVM_MP_STATE_RUNNABLE
:
7102 vcpu
->arch
.apf
.halted
= false;
7104 case KVM_MP_STATE_INIT_RECEIVED
:
7113 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7115 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7116 kvm_x86_ops
->check_nested_events(vcpu
, false);
7118 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7119 !vcpu
->arch
.apf
.halted
);
7122 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7125 struct kvm
*kvm
= vcpu
->kvm
;
7127 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7130 if (kvm_vcpu_running(vcpu
)) {
7131 r
= vcpu_enter_guest(vcpu
);
7133 r
= vcpu_block(kvm
, vcpu
);
7139 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7140 if (kvm_cpu_has_pending_timer(vcpu
))
7141 kvm_inject_pending_timer_irqs(vcpu
);
7143 if (dm_request_for_irq_injection(vcpu
) &&
7144 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7146 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7147 ++vcpu
->stat
.request_irq_exits
;
7151 kvm_check_async_pf_completion(vcpu
);
7153 if (signal_pending(current
)) {
7155 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7156 ++vcpu
->stat
.signal_exits
;
7159 if (need_resched()) {
7160 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7162 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7166 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7171 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7174 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7175 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7176 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7177 if (r
!= EMULATE_DONE
)
7182 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7184 BUG_ON(!vcpu
->arch
.pio
.count
);
7186 return complete_emulated_io(vcpu
);
7190 * Implements the following, as a state machine:
7194 * for each mmio piece in the fragment
7202 * for each mmio piece in the fragment
7207 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7209 struct kvm_run
*run
= vcpu
->run
;
7210 struct kvm_mmio_fragment
*frag
;
7213 BUG_ON(!vcpu
->mmio_needed
);
7215 /* Complete previous fragment */
7216 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7217 len
= min(8u, frag
->len
);
7218 if (!vcpu
->mmio_is_write
)
7219 memcpy(frag
->data
, run
->mmio
.data
, len
);
7221 if (frag
->len
<= 8) {
7222 /* Switch to the next fragment. */
7224 vcpu
->mmio_cur_fragment
++;
7226 /* Go forward to the next mmio piece. */
7232 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7233 vcpu
->mmio_needed
= 0;
7235 /* FIXME: return into emulator if single-stepping. */
7236 if (vcpu
->mmio_is_write
)
7238 vcpu
->mmio_read_completed
= 1;
7239 return complete_emulated_io(vcpu
);
7242 run
->exit_reason
= KVM_EXIT_MMIO
;
7243 run
->mmio
.phys_addr
= frag
->gpa
;
7244 if (vcpu
->mmio_is_write
)
7245 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7246 run
->mmio
.len
= min(8u, frag
->len
);
7247 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7248 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7253 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7255 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7258 fpu__initialize(fpu
);
7260 kvm_sigset_activate(vcpu
);
7262 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7263 if (kvm_run
->immediate_exit
) {
7267 kvm_vcpu_block(vcpu
);
7268 kvm_apic_accept_events(vcpu
);
7269 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7271 if (signal_pending(current
)) {
7273 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7274 ++vcpu
->stat
.signal_exits
;
7279 /* re-sync apic's tpr */
7280 if (!lapic_in_kernel(vcpu
)) {
7281 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7287 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7288 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7289 vcpu
->arch
.complete_userspace_io
= NULL
;
7294 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7296 if (kvm_run
->immediate_exit
)
7302 post_kvm_run_save(vcpu
);
7303 kvm_sigset_deactivate(vcpu
);
7308 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7310 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7312 * We are here if userspace calls get_regs() in the middle of
7313 * instruction emulation. Registers state needs to be copied
7314 * back from emulation context to vcpu. Userspace shouldn't do
7315 * that usually, but some bad designed PV devices (vmware
7316 * backdoor interface) need this to work
7318 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7319 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7321 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7322 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7323 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7324 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7325 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7326 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7327 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7328 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7329 #ifdef CONFIG_X86_64
7330 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7331 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7332 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7333 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7334 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7335 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7336 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7337 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7340 regs
->rip
= kvm_rip_read(vcpu
);
7341 regs
->rflags
= kvm_get_rflags(vcpu
);
7346 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7348 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7349 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7351 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7352 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7353 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7354 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7355 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7356 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7357 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7358 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7359 #ifdef CONFIG_X86_64
7360 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7361 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7362 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7363 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7364 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7365 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7366 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7367 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7370 kvm_rip_write(vcpu
, regs
->rip
);
7371 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7373 vcpu
->arch
.exception
.pending
= false;
7375 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7380 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7382 struct kvm_segment cs
;
7384 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7388 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7390 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7391 struct kvm_sregs
*sregs
)
7395 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7396 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7397 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7398 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7399 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7400 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7402 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7403 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7405 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7406 sregs
->idt
.limit
= dt
.size
;
7407 sregs
->idt
.base
= dt
.address
;
7408 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7409 sregs
->gdt
.limit
= dt
.size
;
7410 sregs
->gdt
.base
= dt
.address
;
7412 sregs
->cr0
= kvm_read_cr0(vcpu
);
7413 sregs
->cr2
= vcpu
->arch
.cr2
;
7414 sregs
->cr3
= kvm_read_cr3(vcpu
);
7415 sregs
->cr4
= kvm_read_cr4(vcpu
);
7416 sregs
->cr8
= kvm_get_cr8(vcpu
);
7417 sregs
->efer
= vcpu
->arch
.efer
;
7418 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7420 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7422 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7423 set_bit(vcpu
->arch
.interrupt
.nr
,
7424 (unsigned long *)sregs
->interrupt_bitmap
);
7429 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7430 struct kvm_mp_state
*mp_state
)
7432 kvm_apic_accept_events(vcpu
);
7433 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7434 vcpu
->arch
.pv
.pv_unhalted
)
7435 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7437 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7442 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7443 struct kvm_mp_state
*mp_state
)
7445 if (!lapic_in_kernel(vcpu
) &&
7446 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7449 /* INITs are latched while in SMM */
7450 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7451 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7452 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7455 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7456 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7457 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7459 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7460 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7464 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7465 int reason
, bool has_error_code
, u32 error_code
)
7467 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7470 init_emulate_ctxt(vcpu
);
7472 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7473 has_error_code
, error_code
);
7476 return EMULATE_FAIL
;
7478 kvm_rip_write(vcpu
, ctxt
->eip
);
7479 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7480 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7481 return EMULATE_DONE
;
7483 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7485 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7487 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7489 * When EFER.LME and CR0.PG are set, the processor is in
7490 * 64-bit mode (though maybe in a 32-bit code segment).
7491 * CR4.PAE and EFER.LMA must be set.
7493 if (!(sregs
->cr4
& X86_CR4_PAE
)
7494 || !(sregs
->efer
& EFER_LMA
))
7498 * Not in 64-bit mode: EFER.LMA is clear and the code
7499 * segment cannot be 64-bit.
7501 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7508 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7509 struct kvm_sregs
*sregs
)
7511 struct msr_data apic_base_msr
;
7512 int mmu_reset_needed
= 0;
7513 int pending_vec
, max_bits
, idx
;
7516 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7517 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7520 if (kvm_valid_sregs(vcpu
, sregs
))
7523 apic_base_msr
.data
= sregs
->apic_base
;
7524 apic_base_msr
.host_initiated
= true;
7525 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7528 dt
.size
= sregs
->idt
.limit
;
7529 dt
.address
= sregs
->idt
.base
;
7530 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7531 dt
.size
= sregs
->gdt
.limit
;
7532 dt
.address
= sregs
->gdt
.base
;
7533 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7535 vcpu
->arch
.cr2
= sregs
->cr2
;
7536 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7537 vcpu
->arch
.cr3
= sregs
->cr3
;
7538 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7540 kvm_set_cr8(vcpu
, sregs
->cr8
);
7542 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7543 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7545 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7546 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7547 vcpu
->arch
.cr0
= sregs
->cr0
;
7549 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7550 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7551 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7552 kvm_update_cpuid(vcpu
);
7554 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7555 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7556 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7557 mmu_reset_needed
= 1;
7559 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7561 if (mmu_reset_needed
)
7562 kvm_mmu_reset_context(vcpu
);
7564 max_bits
= KVM_NR_INTERRUPTS
;
7565 pending_vec
= find_first_bit(
7566 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7567 if (pending_vec
< max_bits
) {
7568 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7569 pr_debug("Set back pending irq %d\n", pending_vec
);
7572 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7573 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7574 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7575 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7576 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7577 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7579 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7580 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7582 update_cr8_intercept(vcpu
);
7584 /* Older userspace won't unhalt the vcpu on reset. */
7585 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7586 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7588 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7590 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7595 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7596 struct kvm_guest_debug
*dbg
)
7598 unsigned long rflags
;
7601 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7603 if (vcpu
->arch
.exception
.pending
)
7605 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7606 kvm_queue_exception(vcpu
, DB_VECTOR
);
7608 kvm_queue_exception(vcpu
, BP_VECTOR
);
7612 * Read rflags as long as potentially injected trace flags are still
7615 rflags
= kvm_get_rflags(vcpu
);
7617 vcpu
->guest_debug
= dbg
->control
;
7618 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7619 vcpu
->guest_debug
= 0;
7621 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7622 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7623 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7624 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7626 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7627 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7629 kvm_update_dr7(vcpu
);
7631 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7632 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7633 get_segment_base(vcpu
, VCPU_SREG_CS
);
7636 * Trigger an rflags update that will inject or remove the trace
7639 kvm_set_rflags(vcpu
, rflags
);
7641 kvm_x86_ops
->update_bp_intercept(vcpu
);
7651 * Translate a guest virtual address to a guest physical address.
7653 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7654 struct kvm_translation
*tr
)
7656 unsigned long vaddr
= tr
->linear_address
;
7660 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7661 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7662 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7663 tr
->physical_address
= gpa
;
7664 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7671 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7673 struct fxregs_state
*fxsave
=
7674 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7676 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7677 fpu
->fcw
= fxsave
->cwd
;
7678 fpu
->fsw
= fxsave
->swd
;
7679 fpu
->ftwx
= fxsave
->twd
;
7680 fpu
->last_opcode
= fxsave
->fop
;
7681 fpu
->last_ip
= fxsave
->rip
;
7682 fpu
->last_dp
= fxsave
->rdp
;
7683 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7688 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7690 struct fxregs_state
*fxsave
=
7691 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7693 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7694 fxsave
->cwd
= fpu
->fcw
;
7695 fxsave
->swd
= fpu
->fsw
;
7696 fxsave
->twd
= fpu
->ftwx
;
7697 fxsave
->fop
= fpu
->last_opcode
;
7698 fxsave
->rip
= fpu
->last_ip
;
7699 fxsave
->rdp
= fpu
->last_dp
;
7700 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7705 static void fx_init(struct kvm_vcpu
*vcpu
)
7707 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7708 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7709 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7710 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7713 * Ensure guest xcr0 is valid for loading
7715 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7717 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7720 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7722 if (vcpu
->guest_fpu_loaded
)
7726 * Restore all possible states in the guest,
7727 * and assume host would use all available bits.
7728 * Guest xcr0 would be loaded later.
7730 vcpu
->guest_fpu_loaded
= 1;
7731 __kernel_fpu_begin();
7732 /* PKRU is separately restored in kvm_x86_ops->run. */
7733 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7734 ~XFEATURE_MASK_PKRU
);
7738 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7740 if (!vcpu
->guest_fpu_loaded
)
7743 vcpu
->guest_fpu_loaded
= 0;
7744 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7746 ++vcpu
->stat
.fpu_reload
;
7750 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7752 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7754 kvmclock_reset(vcpu
);
7756 kvm_x86_ops
->vcpu_free(vcpu
);
7757 free_cpumask_var(wbinvd_dirty_mask
);
7760 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7763 struct kvm_vcpu
*vcpu
;
7765 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7766 printk_once(KERN_WARNING
7767 "kvm: SMP vm created on host with unstable TSC; "
7768 "guest TSC will not be reliable\n");
7770 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7775 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7779 kvm_vcpu_mtrr_init(vcpu
);
7780 r
= vcpu_load(vcpu
);
7783 kvm_vcpu_reset(vcpu
, false);
7784 kvm_mmu_setup(vcpu
);
7789 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7791 struct msr_data msr
;
7792 struct kvm
*kvm
= vcpu
->kvm
;
7794 kvm_hv_vcpu_postcreate(vcpu
);
7796 if (vcpu_load(vcpu
))
7799 msr
.index
= MSR_IA32_TSC
;
7800 msr
.host_initiated
= true;
7801 kvm_write_tsc(vcpu
, &msr
);
7804 if (!kvmclock_periodic_sync
)
7807 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7808 KVMCLOCK_SYNC_PERIOD
);
7811 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7814 vcpu
->arch
.apf
.msr_val
= 0;
7816 r
= vcpu_load(vcpu
);
7818 kvm_mmu_unload(vcpu
);
7821 kvm_x86_ops
->vcpu_free(vcpu
);
7824 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7826 kvm_lapic_reset(vcpu
, init_event
);
7828 vcpu
->arch
.hflags
= 0;
7830 vcpu
->arch
.smi_pending
= 0;
7831 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7832 vcpu
->arch
.nmi_pending
= 0;
7833 vcpu
->arch
.nmi_injected
= false;
7834 kvm_clear_interrupt_queue(vcpu
);
7835 kvm_clear_exception_queue(vcpu
);
7836 vcpu
->arch
.exception
.pending
= false;
7838 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7839 kvm_update_dr0123(vcpu
);
7840 vcpu
->arch
.dr6
= DR6_INIT
;
7841 kvm_update_dr6(vcpu
);
7842 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7843 kvm_update_dr7(vcpu
);
7847 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7848 vcpu
->arch
.apf
.msr_val
= 0;
7849 vcpu
->arch
.st
.msr_val
= 0;
7851 kvmclock_reset(vcpu
);
7853 kvm_clear_async_pf_completion_queue(vcpu
);
7854 kvm_async_pf_hash_reset(vcpu
);
7855 vcpu
->arch
.apf
.halted
= false;
7858 kvm_pmu_reset(vcpu
);
7859 vcpu
->arch
.smbase
= 0x30000;
7861 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7862 vcpu
->arch
.msr_misc_features_enables
= 0;
7865 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7866 vcpu
->arch
.regs_avail
= ~0;
7867 vcpu
->arch
.regs_dirty
= ~0;
7869 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7872 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7874 struct kvm_segment cs
;
7876 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7877 cs
.selector
= vector
<< 8;
7878 cs
.base
= vector
<< 12;
7879 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7880 kvm_rip_write(vcpu
, 0);
7883 int kvm_arch_hardware_enable(void)
7886 struct kvm_vcpu
*vcpu
;
7891 bool stable
, backwards_tsc
= false;
7893 kvm_shared_msr_cpu_online();
7894 ret
= kvm_x86_ops
->hardware_enable();
7898 local_tsc
= rdtsc();
7899 stable
= !check_tsc_unstable();
7900 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7901 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7902 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7903 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7904 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7905 backwards_tsc
= true;
7906 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7907 max_tsc
= vcpu
->arch
.last_host_tsc
;
7913 * Sometimes, even reliable TSCs go backwards. This happens on
7914 * platforms that reset TSC during suspend or hibernate actions, but
7915 * maintain synchronization. We must compensate. Fortunately, we can
7916 * detect that condition here, which happens early in CPU bringup,
7917 * before any KVM threads can be running. Unfortunately, we can't
7918 * bring the TSCs fully up to date with real time, as we aren't yet far
7919 * enough into CPU bringup that we know how much real time has actually
7920 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7921 * variables that haven't been updated yet.
7923 * So we simply find the maximum observed TSC above, then record the
7924 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7925 * the adjustment will be applied. Note that we accumulate
7926 * adjustments, in case multiple suspend cycles happen before some VCPU
7927 * gets a chance to run again. In the event that no KVM threads get a
7928 * chance to run, we will miss the entire elapsed period, as we'll have
7929 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7930 * loose cycle time. This isn't too big a deal, since the loss will be
7931 * uniform across all VCPUs (not to mention the scenario is extremely
7932 * unlikely). It is possible that a second hibernate recovery happens
7933 * much faster than a first, causing the observed TSC here to be
7934 * smaller; this would require additional padding adjustment, which is
7935 * why we set last_host_tsc to the local tsc observed here.
7937 * N.B. - this code below runs only on platforms with reliable TSC,
7938 * as that is the only way backwards_tsc is set above. Also note
7939 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7940 * have the same delta_cyc adjustment applied if backwards_tsc
7941 * is detected. Note further, this adjustment is only done once,
7942 * as we reset last_host_tsc on all VCPUs to stop this from being
7943 * called multiple times (one for each physical CPU bringup).
7945 * Platforms with unreliable TSCs don't have to deal with this, they
7946 * will be compensated by the logic in vcpu_load, which sets the TSC to
7947 * catchup mode. This will catchup all VCPUs to real time, but cannot
7948 * guarantee that they stay in perfect synchronization.
7950 if (backwards_tsc
) {
7951 u64 delta_cyc
= max_tsc
- local_tsc
;
7952 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7953 kvm
->arch
.backwards_tsc_observed
= true;
7954 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7955 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7956 vcpu
->arch
.last_host_tsc
= local_tsc
;
7957 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7961 * We have to disable TSC offset matching.. if you were
7962 * booting a VM while issuing an S4 host suspend....
7963 * you may have some problem. Solving this issue is
7964 * left as an exercise to the reader.
7966 kvm
->arch
.last_tsc_nsec
= 0;
7967 kvm
->arch
.last_tsc_write
= 0;
7974 void kvm_arch_hardware_disable(void)
7976 kvm_x86_ops
->hardware_disable();
7977 drop_user_return_notifiers();
7980 int kvm_arch_hardware_setup(void)
7984 r
= kvm_x86_ops
->hardware_setup();
7988 if (kvm_has_tsc_control
) {
7990 * Make sure the user can only configure tsc_khz values that
7991 * fit into a signed integer.
7992 * A min value is not calculated needed because it will always
7993 * be 1 on all machines.
7995 u64 max
= min(0x7fffffffULL
,
7996 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7997 kvm_max_guest_tsc_khz
= max
;
7999 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8002 kvm_init_msr_list();
8006 void kvm_arch_hardware_unsetup(void)
8008 kvm_x86_ops
->hardware_unsetup();
8011 void kvm_arch_check_processor_compat(void *rtn
)
8013 kvm_x86_ops
->check_processor_compatibility(rtn
);
8016 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8018 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8020 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8022 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8024 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8027 struct static_key kvm_no_apic_vcpu __read_mostly
;
8028 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8030 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8036 BUG_ON(vcpu
->kvm
== NULL
);
8039 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8040 vcpu
->arch
.pv
.pv_unhalted
= false;
8041 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8042 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8043 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8045 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8047 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8052 vcpu
->arch
.pio_data
= page_address(page
);
8054 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8056 r
= kvm_mmu_create(vcpu
);
8058 goto fail_free_pio_data
;
8060 if (irqchip_in_kernel(kvm
)) {
8061 r
= kvm_create_lapic(vcpu
);
8063 goto fail_mmu_destroy
;
8065 static_key_slow_inc(&kvm_no_apic_vcpu
);
8067 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8069 if (!vcpu
->arch
.mce_banks
) {
8071 goto fail_free_lapic
;
8073 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8075 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8077 goto fail_free_mce_banks
;
8082 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
8083 vcpu
->arch
.pv_time_enabled
= false;
8085 vcpu
->arch
.guest_supported_xcr0
= 0;
8086 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8088 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8090 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8092 kvm_async_pf_hash_reset(vcpu
);
8095 vcpu
->arch
.pending_external_vector
= -1;
8096 vcpu
->arch
.preempted_in_kernel
= false;
8098 kvm_hv_vcpu_init(vcpu
);
8102 fail_free_mce_banks
:
8103 kfree(vcpu
->arch
.mce_banks
);
8105 kvm_free_lapic(vcpu
);
8107 kvm_mmu_destroy(vcpu
);
8109 free_page((unsigned long)vcpu
->arch
.pio_data
);
8114 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8118 kvm_hv_vcpu_uninit(vcpu
);
8119 kvm_pmu_destroy(vcpu
);
8120 kfree(vcpu
->arch
.mce_banks
);
8121 kvm_free_lapic(vcpu
);
8122 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8123 kvm_mmu_destroy(vcpu
);
8124 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8125 free_page((unsigned long)vcpu
->arch
.pio_data
);
8126 if (!lapic_in_kernel(vcpu
))
8127 static_key_slow_dec(&kvm_no_apic_vcpu
);
8130 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8132 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8135 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8140 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8141 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8142 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8143 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8144 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8146 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8147 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8148 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8149 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8150 &kvm
->arch
.irq_sources_bitmap
);
8152 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8153 mutex_init(&kvm
->arch
.apic_map_lock
);
8154 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8155 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8157 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8158 pvclock_update_vm_gtod_copy(kvm
);
8160 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8161 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8163 kvm_page_track_init(kvm
);
8164 kvm_mmu_init_vm(kvm
);
8166 if (kvm_x86_ops
->vm_init
)
8167 return kvm_x86_ops
->vm_init(kvm
);
8172 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8175 r
= vcpu_load(vcpu
);
8177 kvm_mmu_unload(vcpu
);
8181 static void kvm_free_vcpus(struct kvm
*kvm
)
8184 struct kvm_vcpu
*vcpu
;
8187 * Unpin any mmu pages first.
8189 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8190 kvm_clear_async_pf_completion_queue(vcpu
);
8191 kvm_unload_vcpu_mmu(vcpu
);
8193 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8194 kvm_arch_vcpu_free(vcpu
);
8196 mutex_lock(&kvm
->lock
);
8197 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8198 kvm
->vcpus
[i
] = NULL
;
8200 atomic_set(&kvm
->online_vcpus
, 0);
8201 mutex_unlock(&kvm
->lock
);
8204 void kvm_arch_sync_events(struct kvm
*kvm
)
8206 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8207 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8211 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8215 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8216 struct kvm_memory_slot
*slot
, old
;
8218 /* Called with kvm->slots_lock held. */
8219 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8222 slot
= id_to_memslot(slots
, id
);
8228 * MAP_SHARED to prevent internal slot pages from being moved
8231 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8232 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8233 if (IS_ERR((void *)hva
))
8234 return PTR_ERR((void *)hva
);
8243 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8244 struct kvm_userspace_memory_region m
;
8246 m
.slot
= id
| (i
<< 16);
8248 m
.guest_phys_addr
= gpa
;
8249 m
.userspace_addr
= hva
;
8250 m
.memory_size
= size
;
8251 r
= __kvm_set_memory_region(kvm
, &m
);
8257 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8261 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8263 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8267 mutex_lock(&kvm
->slots_lock
);
8268 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8269 mutex_unlock(&kvm
->slots_lock
);
8273 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8275 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8277 if (current
->mm
== kvm
->mm
) {
8279 * Free memory regions allocated on behalf of userspace,
8280 * unless the the memory map has changed due to process exit
8283 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8284 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8285 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8287 if (kvm_x86_ops
->vm_destroy
)
8288 kvm_x86_ops
->vm_destroy(kvm
);
8289 kvm_pic_destroy(kvm
);
8290 kvm_ioapic_destroy(kvm
);
8291 kvm_free_vcpus(kvm
);
8292 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8293 kvm_mmu_uninit_vm(kvm
);
8294 kvm_page_track_cleanup(kvm
);
8297 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8298 struct kvm_memory_slot
*dont
)
8302 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8303 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8304 kvfree(free
->arch
.rmap
[i
]);
8305 free
->arch
.rmap
[i
] = NULL
;
8310 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8311 dont
->arch
.lpage_info
[i
- 1]) {
8312 kvfree(free
->arch
.lpage_info
[i
- 1]);
8313 free
->arch
.lpage_info
[i
- 1] = NULL
;
8317 kvm_page_track_free_memslot(free
, dont
);
8320 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8321 unsigned long npages
)
8325 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8326 struct kvm_lpage_info
*linfo
;
8331 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8332 slot
->base_gfn
, level
) + 1;
8334 slot
->arch
.rmap
[i
] =
8335 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8336 if (!slot
->arch
.rmap
[i
])
8341 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8345 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8347 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8348 linfo
[0].disallow_lpage
= 1;
8349 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8350 linfo
[lpages
- 1].disallow_lpage
= 1;
8351 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8353 * If the gfn and userspace address are not aligned wrt each
8354 * other, or if explicitly asked to, disable large page
8355 * support for this slot
8357 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8358 !kvm_largepages_enabled()) {
8361 for (j
= 0; j
< lpages
; ++j
)
8362 linfo
[j
].disallow_lpage
= 1;
8366 if (kvm_page_track_create_memslot(slot
, npages
))
8372 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8373 kvfree(slot
->arch
.rmap
[i
]);
8374 slot
->arch
.rmap
[i
] = NULL
;
8378 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8379 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8384 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8387 * memslots->generation has been incremented.
8388 * mmio generation may have reached its maximum value.
8390 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8393 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8394 struct kvm_memory_slot
*memslot
,
8395 const struct kvm_userspace_memory_region
*mem
,
8396 enum kvm_mr_change change
)
8401 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8402 struct kvm_memory_slot
*new)
8404 /* Still write protect RO slot */
8405 if (new->flags
& KVM_MEM_READONLY
) {
8406 kvm_mmu_slot_remove_write_access(kvm
, new);
8411 * Call kvm_x86_ops dirty logging hooks when they are valid.
8413 * kvm_x86_ops->slot_disable_log_dirty is called when:
8415 * - KVM_MR_CREATE with dirty logging is disabled
8416 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8418 * The reason is, in case of PML, we need to set D-bit for any slots
8419 * with dirty logging disabled in order to eliminate unnecessary GPA
8420 * logging in PML buffer (and potential PML buffer full VMEXT). This
8421 * guarantees leaving PML enabled during guest's lifetime won't have
8422 * any additonal overhead from PML when guest is running with dirty
8423 * logging disabled for memory slots.
8425 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8426 * to dirty logging mode.
8428 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8430 * In case of write protect:
8432 * Write protect all pages for dirty logging.
8434 * All the sptes including the large sptes which point to this
8435 * slot are set to readonly. We can not create any new large
8436 * spte on this slot until the end of the logging.
8438 * See the comments in fast_page_fault().
8440 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8441 if (kvm_x86_ops
->slot_enable_log_dirty
)
8442 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8444 kvm_mmu_slot_remove_write_access(kvm
, new);
8446 if (kvm_x86_ops
->slot_disable_log_dirty
)
8447 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8451 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8452 const struct kvm_userspace_memory_region
*mem
,
8453 const struct kvm_memory_slot
*old
,
8454 const struct kvm_memory_slot
*new,
8455 enum kvm_mr_change change
)
8457 int nr_mmu_pages
= 0;
8459 if (!kvm
->arch
.n_requested_mmu_pages
)
8460 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8463 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8466 * Dirty logging tracks sptes in 4k granularity, meaning that large
8467 * sptes have to be split. If live migration is successful, the guest
8468 * in the source machine will be destroyed and large sptes will be
8469 * created in the destination. However, if the guest continues to run
8470 * in the source machine (for example if live migration fails), small
8471 * sptes will remain around and cause bad performance.
8473 * Scan sptes if dirty logging has been stopped, dropping those
8474 * which can be collapsed into a single large-page spte. Later
8475 * page faults will create the large-page sptes.
8477 if ((change
!= KVM_MR_DELETE
) &&
8478 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8479 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8480 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8483 * Set up write protection and/or dirty logging for the new slot.
8485 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8486 * been zapped so no dirty logging staff is needed for old slot. For
8487 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8488 * new and it's also covered when dealing with the new slot.
8490 * FIXME: const-ify all uses of struct kvm_memory_slot.
8492 if (change
!= KVM_MR_DELETE
)
8493 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8496 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8498 kvm_mmu_invalidate_zap_all_pages(kvm
);
8501 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8502 struct kvm_memory_slot
*slot
)
8504 kvm_page_track_flush_slot(kvm
, slot
);
8507 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8509 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8512 if (kvm_apic_has_events(vcpu
))
8515 if (vcpu
->arch
.pv
.pv_unhalted
)
8518 if (vcpu
->arch
.exception
.pending
)
8521 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8522 (vcpu
->arch
.nmi_pending
&&
8523 kvm_x86_ops
->nmi_allowed(vcpu
)))
8526 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8527 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8530 if (kvm_arch_interrupt_allowed(vcpu
) &&
8531 kvm_cpu_has_interrupt(vcpu
))
8534 if (kvm_hv_has_stimer_pending(vcpu
))
8540 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8542 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8545 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8547 return vcpu
->arch
.preempted_in_kernel
;
8550 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8552 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8555 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8557 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8560 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8562 if (is_64_bit_mode(vcpu
))
8563 return kvm_rip_read(vcpu
);
8564 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8565 kvm_rip_read(vcpu
));
8567 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8569 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8571 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8573 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8575 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8577 unsigned long rflags
;
8579 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8580 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8581 rflags
&= ~X86_EFLAGS_TF
;
8584 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8586 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8588 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8589 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8590 rflags
|= X86_EFLAGS_TF
;
8591 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8594 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8596 __kvm_set_rflags(vcpu
, rflags
);
8597 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8599 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8601 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8605 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8609 r
= kvm_mmu_reload(vcpu
);
8613 if (!vcpu
->arch
.mmu
.direct_map
&&
8614 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8617 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8620 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8622 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8625 static inline u32
kvm_async_pf_next_probe(u32 key
)
8627 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8630 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8632 u32 key
= kvm_async_pf_hash_fn(gfn
);
8634 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8635 key
= kvm_async_pf_next_probe(key
);
8637 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8640 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8643 u32 key
= kvm_async_pf_hash_fn(gfn
);
8645 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8646 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8647 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8648 key
= kvm_async_pf_next_probe(key
);
8653 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8655 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8658 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8662 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8664 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8666 j
= kvm_async_pf_next_probe(j
);
8667 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8669 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8671 * k lies cyclically in ]i,j]
8673 * |....j i.k.| or |.k..j i...|
8675 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8676 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8681 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8684 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8688 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8691 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8695 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8696 struct kvm_async_pf
*work
)
8698 struct x86_exception fault
;
8700 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8701 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8703 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8704 (vcpu
->arch
.apf
.send_user_only
&&
8705 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8706 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8707 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8708 fault
.vector
= PF_VECTOR
;
8709 fault
.error_code_valid
= true;
8710 fault
.error_code
= 0;
8711 fault
.nested_page_fault
= false;
8712 fault
.address
= work
->arch
.token
;
8713 fault
.async_page_fault
= true;
8714 kvm_inject_page_fault(vcpu
, &fault
);
8718 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8719 struct kvm_async_pf
*work
)
8721 struct x86_exception fault
;
8724 if (work
->wakeup_all
)
8725 work
->arch
.token
= ~0; /* broadcast wakeup */
8727 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8728 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8730 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8731 !apf_get_user(vcpu
, &val
)) {
8732 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8733 vcpu
->arch
.exception
.pending
&&
8734 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8735 !apf_put_user(vcpu
, 0)) {
8736 vcpu
->arch
.exception
.injected
= false;
8737 vcpu
->arch
.exception
.pending
= false;
8738 vcpu
->arch
.exception
.nr
= 0;
8739 vcpu
->arch
.exception
.has_error_code
= false;
8740 vcpu
->arch
.exception
.error_code
= 0;
8741 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8742 fault
.vector
= PF_VECTOR
;
8743 fault
.error_code_valid
= true;
8744 fault
.error_code
= 0;
8745 fault
.nested_page_fault
= false;
8746 fault
.address
= work
->arch
.token
;
8747 fault
.async_page_fault
= true;
8748 kvm_inject_page_fault(vcpu
, &fault
);
8751 vcpu
->arch
.apf
.halted
= false;
8752 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8755 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8757 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8760 return kvm_can_do_async_pf(vcpu
);
8763 void kvm_arch_start_assignment(struct kvm
*kvm
)
8765 atomic_inc(&kvm
->arch
.assigned_device_count
);
8767 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8769 void kvm_arch_end_assignment(struct kvm
*kvm
)
8771 atomic_dec(&kvm
->arch
.assigned_device_count
);
8773 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8775 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8777 return atomic_read(&kvm
->arch
.assigned_device_count
);
8779 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8781 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8783 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8785 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8787 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8789 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8791 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8793 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8795 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8797 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8799 bool kvm_arch_has_irq_bypass(void)
8801 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8804 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8805 struct irq_bypass_producer
*prod
)
8807 struct kvm_kernel_irqfd
*irqfd
=
8808 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8810 irqfd
->producer
= prod
;
8812 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8813 prod
->irq
, irqfd
->gsi
, 1);
8816 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8817 struct irq_bypass_producer
*prod
)
8820 struct kvm_kernel_irqfd
*irqfd
=
8821 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8823 WARN_ON(irqfd
->producer
!= prod
);
8824 irqfd
->producer
= NULL
;
8827 * When producer of consumer is unregistered, we change back to
8828 * remapped mode, so we can re-use the current implementation
8829 * when the irq is masked/disabled or the consumer side (KVM
8830 * int this case doesn't want to receive the interrupts.
8832 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8834 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8835 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8838 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8839 uint32_t guest_irq
, bool set
)
8841 if (!kvm_x86_ops
->update_pi_irte
)
8844 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8847 bool kvm_vector_hashing_enabled(void)
8849 return vector_hashing
;
8851 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);