1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
27 #include "kvm_emulate.h"
28 #include "mmu/page_track.h"
37 #include <linux/clocksource.h>
38 #include <linux/interrupt.h>
39 #include <linux/kvm.h>
41 #include <linux/vmalloc.h>
42 #include <linux/export.h>
43 #include <linux/moduleparam.h>
44 #include <linux/mman.h>
45 #include <linux/highmem.h>
46 #include <linux/iommu.h>
47 #include <linux/cpufreq.h>
48 #include <linux/user-return-notifier.h>
49 #include <linux/srcu.h>
50 #include <linux/slab.h>
51 #include <linux/perf_event.h>
52 #include <linux/uaccess.h>
53 #include <linux/hash.h>
54 #include <linux/pci.h>
55 #include <linux/timekeeper_internal.h>
56 #include <linux/pvclock_gtod.h>
57 #include <linux/kvm_irqfd.h>
58 #include <linux/irqbypass.h>
59 #include <linux/sched/stat.h>
60 #include <linux/sched/isolation.h>
61 #include <linux/mem_encrypt.h>
62 #include <linux/entry-kvm.h>
63 #include <linux/suspend.h>
64 #include <linux/smp.h>
66 #include <trace/events/ipi.h>
67 #include <trace/events/kvm.h>
69 #include <asm/debugreg.h>
74 #include <linux/kernel_stat.h>
75 #include <asm/fpu/api.h>
76 #include <asm/fpu/xcr.h>
77 #include <asm/fpu/xstate.h>
78 #include <asm/pvclock.h>
79 #include <asm/div64.h>
80 #include <asm/irq_remapping.h>
81 #include <asm/mshyperv.h>
82 #include <asm/hypervisor.h>
83 #include <asm/tlbflush.h>
84 #include <asm/intel_pt.h>
85 #include <asm/emulate_prefix.h>
87 #include <clocksource/hyperv_timer.h>
89 #define CREATE_TRACE_POINTS
92 #define MAX_IO_MSRS 256
93 #define KVM_MAX_MCE_BANKS 32
95 struct kvm_caps kvm_caps __read_mostly
= {
96 .supported_mce_cap
= MCG_CTL_P
| MCG_SER_P
,
98 EXPORT_SYMBOL_GPL(kvm_caps
);
100 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
102 #define emul_to_vcpu(ctxt) \
103 ((struct kvm_vcpu *)(ctxt)->vcpu)
106 * - enable syscall per default because its emulated by KVM
107 * - enable LME and LMA per default on 64 bit KVM
111 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
113 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
116 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
118 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
120 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
122 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
123 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
125 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
126 static void process_nmi(struct kvm_vcpu
*vcpu
);
127 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
128 static void store_regs(struct kvm_vcpu
*vcpu
);
129 static int sync_regs(struct kvm_vcpu
*vcpu
);
130 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
);
132 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
133 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
135 static DEFINE_MUTEX(vendor_module_lock
);
136 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
138 #define KVM_X86_OP(func) \
139 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
140 *(((struct kvm_x86_ops *)0)->func));
141 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
142 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
143 #include <asm/kvm-x86-ops.h>
144 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
145 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
147 static bool __read_mostly ignore_msrs
= 0;
148 module_param(ignore_msrs
, bool, 0644);
150 bool __read_mostly report_ignored_msrs
= true;
151 module_param(report_ignored_msrs
, bool, 0644);
152 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
154 unsigned int min_timer_period_us
= 200;
155 module_param(min_timer_period_us
, uint
, 0644);
157 static bool __read_mostly kvmclock_periodic_sync
= true;
158 module_param(kvmclock_periodic_sync
, bool, 0444);
160 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
161 static u32 __read_mostly tsc_tolerance_ppm
= 250;
162 module_param(tsc_tolerance_ppm
, uint
, 0644);
165 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
166 * adaptive tuning starting from default advancement of 1000ns. '0' disables
167 * advancement entirely. Any other value is used as-is and disables adaptive
168 * tuning, i.e. allows privileged userspace to set an exact advancement time.
170 static int __read_mostly lapic_timer_advance_ns
= -1;
171 module_param(lapic_timer_advance_ns
, int, 0644);
173 static bool __read_mostly vector_hashing
= true;
174 module_param(vector_hashing
, bool, 0444);
176 bool __read_mostly enable_vmware_backdoor
= false;
177 module_param(enable_vmware_backdoor
, bool, 0444);
178 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
181 * Flags to manipulate forced emulation behavior (any non-zero value will
182 * enable forced emulation).
184 #define KVM_FEP_CLEAR_RFLAGS_RF BIT(1)
185 static int __read_mostly force_emulation_prefix
;
186 module_param(force_emulation_prefix
, int, 0644);
188 int __read_mostly pi_inject_timer
= -1;
189 module_param(pi_inject_timer
, bint
, 0644);
191 /* Enable/disable PMU virtualization */
192 bool __read_mostly enable_pmu
= true;
193 EXPORT_SYMBOL_GPL(enable_pmu
);
194 module_param(enable_pmu
, bool, 0444);
196 bool __read_mostly eager_page_split
= true;
197 module_param(eager_page_split
, bool, 0644);
199 /* Enable/disable SMT_RSB bug mitigation */
200 static bool __read_mostly mitigate_smt_rsb
;
201 module_param(mitigate_smt_rsb
, bool, 0444);
204 * Restoring the host value for MSRs that are only consumed when running in
205 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
206 * returns to userspace, i.e. the kernel can run with the guest's value.
208 #define KVM_MAX_NR_USER_RETURN_MSRS 16
210 struct kvm_user_return_msrs
{
211 struct user_return_notifier urn
;
213 struct kvm_user_return_msr_values
{
216 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
219 u32 __read_mostly kvm_nr_uret_msrs
;
220 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
221 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
222 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
224 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
225 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
226 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
227 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
229 u64 __read_mostly host_efer
;
230 EXPORT_SYMBOL_GPL(host_efer
);
232 bool __read_mostly allow_smaller_maxphyaddr
= 0;
233 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
235 bool __read_mostly enable_apicv
= true;
236 EXPORT_SYMBOL_GPL(enable_apicv
);
238 u64 __read_mostly host_xss
;
239 EXPORT_SYMBOL_GPL(host_xss
);
241 u64 __read_mostly host_arch_capabilities
;
242 EXPORT_SYMBOL_GPL(host_arch_capabilities
);
244 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
245 KVM_GENERIC_VM_STATS(),
246 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
247 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
248 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
249 STATS_DESC_COUNTER(VM
, mmu_flooded
),
250 STATS_DESC_COUNTER(VM
, mmu_recycled
),
251 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
252 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
253 STATS_DESC_ICOUNTER(VM
, pages_4k
),
254 STATS_DESC_ICOUNTER(VM
, pages_2m
),
255 STATS_DESC_ICOUNTER(VM
, pages_1g
),
256 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
257 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
258 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
261 const struct kvm_stats_header kvm_vm_stats_header
= {
262 .name_size
= KVM_STATS_NAME_SIZE
,
263 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
264 .id_offset
= sizeof(struct kvm_stats_header
),
265 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
266 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
267 sizeof(kvm_vm_stats_desc
),
270 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
271 KVM_GENERIC_VCPU_STATS(),
272 STATS_DESC_COUNTER(VCPU
, pf_taken
),
273 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
274 STATS_DESC_COUNTER(VCPU
, pf_emulate
),
275 STATS_DESC_COUNTER(VCPU
, pf_spurious
),
276 STATS_DESC_COUNTER(VCPU
, pf_fast
),
277 STATS_DESC_COUNTER(VCPU
, pf_mmio_spte_created
),
278 STATS_DESC_COUNTER(VCPU
, pf_guest
),
279 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
280 STATS_DESC_COUNTER(VCPU
, invlpg
),
281 STATS_DESC_COUNTER(VCPU
, exits
),
282 STATS_DESC_COUNTER(VCPU
, io_exits
),
283 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
284 STATS_DESC_COUNTER(VCPU
, signal_exits
),
285 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
286 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
287 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
288 STATS_DESC_COUNTER(VCPU
, halt_exits
),
289 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
290 STATS_DESC_COUNTER(VCPU
, irq_exits
),
291 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
292 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
293 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
294 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
295 STATS_DESC_COUNTER(VCPU
, hypercalls
),
296 STATS_DESC_COUNTER(VCPU
, irq_injections
),
297 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
298 STATS_DESC_COUNTER(VCPU
, req_event
),
299 STATS_DESC_COUNTER(VCPU
, nested_run
),
300 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
301 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
302 STATS_DESC_COUNTER(VCPU
, preemption_reported
),
303 STATS_DESC_COUNTER(VCPU
, preemption_other
),
304 STATS_DESC_IBOOLEAN(VCPU
, guest_mode
),
305 STATS_DESC_COUNTER(VCPU
, notify_window_exits
),
308 const struct kvm_stats_header kvm_vcpu_stats_header
= {
309 .name_size
= KVM_STATS_NAME_SIZE
,
310 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
311 .id_offset
= sizeof(struct kvm_stats_header
),
312 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
313 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
314 sizeof(kvm_vcpu_stats_desc
),
317 u64 __read_mostly host_xcr0
;
319 static struct kmem_cache
*x86_emulator_cache
;
322 * When called, it means the previous get/set msr reached an invalid msr.
323 * Return true if we want to ignore/silent this failed msr access.
325 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
327 const char *op
= write
? "wrmsr" : "rdmsr";
330 if (report_ignored_msrs
)
331 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
336 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
342 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
344 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
345 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
347 return kmem_cache_create_usercopy("x86_emulator", size
,
348 __alignof__(struct x86_emulate_ctxt
),
349 SLAB_ACCOUNT
, useroffset
,
350 size
- useroffset
, NULL
);
353 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
355 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
358 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
359 vcpu
->arch
.apf
.gfns
[i
] = ~0;
362 static void kvm_on_user_return(struct user_return_notifier
*urn
)
365 struct kvm_user_return_msrs
*msrs
366 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
367 struct kvm_user_return_msr_values
*values
;
371 * Disabling irqs at this point since the following code could be
372 * interrupted and executed through kvm_arch_hardware_disable()
374 local_irq_save(flags
);
375 if (msrs
->registered
) {
376 msrs
->registered
= false;
377 user_return_notifier_unregister(urn
);
379 local_irq_restore(flags
);
380 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
381 values
= &msrs
->values
[slot
];
382 if (values
->host
!= values
->curr
) {
383 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
384 values
->curr
= values
->host
;
389 static int kvm_probe_user_return_msr(u32 msr
)
395 ret
= rdmsrl_safe(msr
, &val
);
398 ret
= wrmsrl_safe(msr
, val
);
404 int kvm_add_user_return_msr(u32 msr
)
406 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
408 if (kvm_probe_user_return_msr(msr
))
411 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
412 return kvm_nr_uret_msrs
++;
414 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
416 int kvm_find_user_return_msr(u32 msr
)
420 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
421 if (kvm_uret_msrs_list
[i
] == msr
)
426 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
428 static void kvm_user_return_msr_cpu_online(void)
430 unsigned int cpu
= smp_processor_id();
431 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
435 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
436 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
437 msrs
->values
[i
].host
= value
;
438 msrs
->values
[i
].curr
= value
;
442 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
444 unsigned int cpu
= smp_processor_id();
445 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
448 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
449 if (value
== msrs
->values
[slot
].curr
)
451 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
455 msrs
->values
[slot
].curr
= value
;
456 if (!msrs
->registered
) {
457 msrs
->urn
.on_user_return
= kvm_on_user_return
;
458 user_return_notifier_register(&msrs
->urn
);
459 msrs
->registered
= true;
463 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
465 static void drop_user_return_notifiers(void)
467 unsigned int cpu
= smp_processor_id();
468 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
470 if (msrs
->registered
)
471 kvm_on_user_return(&msrs
->urn
);
474 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
476 return vcpu
->arch
.apic_base
;
479 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
481 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
483 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
485 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
487 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
488 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
489 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
490 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
492 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
494 if (!msr_info
->host_initiated
) {
495 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
497 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
501 kvm_lapic_set_base(vcpu
, msr_info
->data
);
502 kvm_recalculate_apic_map(vcpu
->kvm
);
507 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
509 * Hardware virtualization extension instructions may fault if a reboot turns
510 * off virtualization while processes are running. Usually after catching the
511 * fault we just panic; during reboot instead the instruction is ignored.
513 noinstr
void kvm_spurious_fault(void)
515 /* Fault while not rebooting. We want the trace. */
516 BUG_ON(!kvm_rebooting
);
518 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
520 #define EXCPT_BENIGN 0
521 #define EXCPT_CONTRIBUTORY 1
524 static int exception_class(int vector
)
534 return EXCPT_CONTRIBUTORY
;
541 #define EXCPT_FAULT 0
543 #define EXCPT_ABORT 2
544 #define EXCPT_INTERRUPT 3
547 static int exception_type(int vector
)
551 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
552 return EXCPT_INTERRUPT
;
557 * #DBs can be trap-like or fault-like, the caller must check other CPU
558 * state, e.g. DR6, to determine whether a #DB is a trap or fault.
560 if (mask
& (1 << DB_VECTOR
))
563 if (mask
& ((1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
566 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
569 /* Reserved exceptions will result in fault */
573 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
,
574 struct kvm_queued_exception
*ex
)
576 if (!ex
->has_payload
)
579 switch (ex
->vector
) {
582 * "Certain debug exceptions may clear bit 0-3. The
583 * remaining contents of the DR6 register are never
584 * cleared by the processor".
586 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
588 * In order to reflect the #DB exception payload in guest
589 * dr6, three components need to be considered: active low
590 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
592 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
593 * In the target guest dr6:
594 * FIXED_1 bits should always be set.
595 * Active low bits should be cleared if 1-setting in payload.
596 * Active high bits should be set if 1-setting in payload.
598 * Note, the payload is compatible with the pending debug
599 * exceptions/exit qualification under VMX, that active_low bits
600 * are active high in payload.
601 * So they need to be flipped for DR6.
603 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
604 vcpu
->arch
.dr6
|= ex
->payload
;
605 vcpu
->arch
.dr6
^= ex
->payload
& DR6_ACTIVE_LOW
;
608 * The #DB payload is defined as compatible with the 'pending
609 * debug exceptions' field under VMX, not DR6. While bit 12 is
610 * defined in the 'pending debug exceptions' field (enabled
611 * breakpoint), it is reserved and must be zero in DR6.
613 vcpu
->arch
.dr6
&= ~BIT(12);
616 vcpu
->arch
.cr2
= ex
->payload
;
620 ex
->has_payload
= false;
623 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
625 static void kvm_queue_exception_vmexit(struct kvm_vcpu
*vcpu
, unsigned int vector
,
626 bool has_error_code
, u32 error_code
,
627 bool has_payload
, unsigned long payload
)
629 struct kvm_queued_exception
*ex
= &vcpu
->arch
.exception_vmexit
;
632 ex
->injected
= false;
634 ex
->has_error_code
= has_error_code
;
635 ex
->error_code
= error_code
;
636 ex
->has_payload
= has_payload
;
637 ex
->payload
= payload
;
640 /* Forcibly leave the nested mode in cases like a vCPU reset */
641 static void kvm_leave_nested(struct kvm_vcpu
*vcpu
)
643 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
646 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
647 unsigned nr
, bool has_error
, u32 error_code
,
648 bool has_payload
, unsigned long payload
, bool reinject
)
653 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
656 * If the exception is destined for L2 and isn't being reinjected,
657 * morph it to a VM-Exit if L1 wants to intercept the exception. A
658 * previously injected exception is not checked because it was checked
659 * when it was original queued, and re-checking is incorrect if _L1_
660 * injected the exception, in which case it's exempt from interception.
662 if (!reinject
&& is_guest_mode(vcpu
) &&
663 kvm_x86_ops
.nested_ops
->is_exception_vmexit(vcpu
, nr
, error_code
)) {
664 kvm_queue_exception_vmexit(vcpu
, nr
, has_error
, error_code
,
665 has_payload
, payload
);
669 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
673 * On VM-Entry, an exception can be pending if and only
674 * if event injection was blocked by nested_run_pending.
675 * In that case, however, vcpu_enter_guest() requests an
676 * immediate exit, and the guest shouldn't proceed far
677 * enough to need reinjection.
679 WARN_ON_ONCE(kvm_is_exception_pending(vcpu
));
680 vcpu
->arch
.exception
.injected
= true;
681 if (WARN_ON_ONCE(has_payload
)) {
683 * A reinjected event has already
684 * delivered its payload.
690 vcpu
->arch
.exception
.pending
= true;
691 vcpu
->arch
.exception
.injected
= false;
693 vcpu
->arch
.exception
.has_error_code
= has_error
;
694 vcpu
->arch
.exception
.vector
= nr
;
695 vcpu
->arch
.exception
.error_code
= error_code
;
696 vcpu
->arch
.exception
.has_payload
= has_payload
;
697 vcpu
->arch
.exception
.payload
= payload
;
698 if (!is_guest_mode(vcpu
))
699 kvm_deliver_exception_payload(vcpu
,
700 &vcpu
->arch
.exception
);
704 /* to check exception */
705 prev_nr
= vcpu
->arch
.exception
.vector
;
706 if (prev_nr
== DF_VECTOR
) {
707 /* triple fault -> shutdown */
708 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
711 class1
= exception_class(prev_nr
);
712 class2
= exception_class(nr
);
713 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
) ||
714 (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
716 * Synthesize #DF. Clear the previously injected or pending
717 * exception so as not to incorrectly trigger shutdown.
719 vcpu
->arch
.exception
.injected
= false;
720 vcpu
->arch
.exception
.pending
= false;
722 kvm_queue_exception_e(vcpu
, DF_VECTOR
, 0);
724 /* replace previous exception with a new one in a hope
725 that instruction re-execution will regenerate lost
731 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
733 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
735 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
737 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
739 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
741 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
743 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
744 unsigned long payload
)
746 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
748 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
750 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
751 u32 error_code
, unsigned long payload
)
753 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
754 true, payload
, false);
757 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
760 kvm_inject_gp(vcpu
, 0);
762 return kvm_skip_emulated_instruction(vcpu
);
766 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
768 static int complete_emulated_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
771 kvm_inject_gp(vcpu
, 0);
775 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
776 EMULTYPE_COMPLETE_USER_EXIT
);
779 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
781 ++vcpu
->stat
.pf_guest
;
784 * Async #PF in L2 is always forwarded to L1 as a VM-Exit regardless of
785 * whether or not L1 wants to intercept "regular" #PF.
787 if (is_guest_mode(vcpu
) && fault
->async_page_fault
)
788 kvm_queue_exception_vmexit(vcpu
, PF_VECTOR
,
789 true, fault
->error_code
,
790 true, fault
->address
);
792 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
796 void kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
797 struct x86_exception
*fault
)
799 struct kvm_mmu
*fault_mmu
;
800 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
802 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
806 * Invalidate the TLB entry for the faulting address, if it exists,
807 * else the access will fault indefinitely (and to emulate hardware).
809 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
810 !(fault
->error_code
& PFERR_RSVD_MASK
))
811 kvm_mmu_invalidate_addr(vcpu
, fault_mmu
, fault
->address
,
812 KVM_MMU_ROOT_CURRENT
);
814 fault_mmu
->inject_page_fault(vcpu
, fault
);
816 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
818 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
820 atomic_inc(&vcpu
->arch
.nmi_queued
);
821 kvm_make_request(KVM_REQ_NMI
, vcpu
);
824 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
826 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
828 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
830 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
832 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
834 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
837 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
838 * a #GP and return false.
840 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
842 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
844 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
848 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
850 if ((dr
!= 4 && dr
!= 5) || !kvm_is_cr4_bit_set(vcpu
, X86_CR4_DE
))
853 kvm_queue_exception(vcpu
, UD_VECTOR
);
856 EXPORT_SYMBOL_GPL(kvm_require_dr
);
858 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
860 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
864 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
866 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
868 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
869 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
873 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
876 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
879 real_gpa
= kvm_translate_gpa(vcpu
, mmu
, gfn_to_gpa(pdpt_gfn
),
880 PFERR_USER_MASK
| PFERR_WRITE_MASK
, NULL
);
881 if (real_gpa
== INVALID_GPA
)
884 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
885 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa_to_gfn(real_gpa
), pdpte
,
886 cr3
& GENMASK(11, 5), sizeof(pdpte
));
890 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
891 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
892 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
898 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
899 * Shadow page roots need to be reconstructed instead.
901 if (!tdp_enabled
&& memcmp(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
)))
902 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, KVM_MMU_ROOT_CURRENT
);
904 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
905 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
906 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
907 vcpu
->arch
.pdptrs_from_userspace
= false;
911 EXPORT_SYMBOL_GPL(load_pdptrs
);
913 static bool kvm_is_valid_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
916 if (cr0
& 0xffffffff00000000UL
)
920 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
923 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
926 return static_call(kvm_x86_is_valid_cr0
)(vcpu
, cr0
);
929 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
932 * CR0.WP is incorporated into the MMU role, but only for non-nested,
933 * indirect shadow MMUs. If paging is disabled, no updates are needed
934 * as there are no permission bits to emulate. If TDP is enabled, the
935 * MMU's metadata needs to be updated, e.g. so that emulating guest
936 * translations does the right thing, but there's no need to unload the
937 * root as CR0.WP doesn't affect SPTEs.
939 if ((cr0
^ old_cr0
) == X86_CR0_WP
) {
940 if (!(cr0
& X86_CR0_PG
))
949 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
950 kvm_clear_async_pf_completion_queue(vcpu
);
951 kvm_async_pf_hash_reset(vcpu
);
954 * Clearing CR0.PG is defined to flush the TLB from the guest's
957 if (!(cr0
& X86_CR0_PG
))
958 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
961 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
962 kvm_mmu_reset_context(vcpu
);
964 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
965 kvm_mmu_honors_guest_mtrrs(vcpu
->kvm
) &&
966 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
967 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
969 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
971 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
973 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
975 if (!kvm_is_valid_cr0(vcpu
, cr0
))
980 /* Write to CR0 reserved bits are ignored, even on Intel. */
981 cr0
&= ~CR0_RESERVED_BITS
;
984 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
985 (cr0
& X86_CR0_PG
)) {
990 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
995 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
996 is_pae(vcpu
) && ((cr0
^ old_cr0
) & X86_CR0_PDPTR_BITS
) &&
997 !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
1000 if (!(cr0
& X86_CR0_PG
) &&
1001 (is_64_bit_mode(vcpu
) || kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
)))
1004 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
1006 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
1010 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
1012 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
1014 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
1016 EXPORT_SYMBOL_GPL(kvm_lmsw
);
1018 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
1020 if (vcpu
->arch
.guest_state_protected
)
1023 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_OSXSAVE
)) {
1025 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1026 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
1028 if (guest_can_use(vcpu
, X86_FEATURE_XSAVES
) &&
1029 vcpu
->arch
.ia32_xss
!= host_xss
)
1030 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
1033 if (cpu_feature_enabled(X86_FEATURE_PKU
) &&
1034 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
&&
1035 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1036 kvm_is_cr4_bit_set(vcpu
, X86_CR4_PKE
)))
1037 write_pkru(vcpu
->arch
.pkru
);
1039 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
1041 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
1043 if (vcpu
->arch
.guest_state_protected
)
1046 if (cpu_feature_enabled(X86_FEATURE_PKU
) &&
1047 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1048 kvm_is_cr4_bit_set(vcpu
, X86_CR4_PKE
))) {
1049 vcpu
->arch
.pkru
= rdpkru();
1050 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
1051 write_pkru(vcpu
->arch
.host_pkru
);
1054 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_OSXSAVE
)) {
1056 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1057 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
1059 if (guest_can_use(vcpu
, X86_FEATURE_XSAVES
) &&
1060 vcpu
->arch
.ia32_xss
!= host_xss
)
1061 wrmsrl(MSR_IA32_XSS
, host_xss
);
1065 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
1067 #ifdef CONFIG_X86_64
1068 static inline u64
kvm_guest_supported_xfd(struct kvm_vcpu
*vcpu
)
1070 return vcpu
->arch
.guest_supported_xcr0
& XFEATURE_MASK_USER_DYNAMIC
;
1074 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
1077 u64 old_xcr0
= vcpu
->arch
.xcr0
;
1080 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1081 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
1083 if (!(xcr0
& XFEATURE_MASK_FP
))
1085 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
1089 * Do not allow the guest to set bits that we do not support
1090 * saving. However, xcr0 bit 0 is always set, even if the
1091 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1093 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
1094 if (xcr0
& ~valid_bits
)
1097 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1098 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1101 if (xcr0
& XFEATURE_MASK_AVX512
) {
1102 if (!(xcr0
& XFEATURE_MASK_YMM
))
1104 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1108 if ((xcr0
& XFEATURE_MASK_XTILE
) &&
1109 ((xcr0
& XFEATURE_MASK_XTILE
) != XFEATURE_MASK_XTILE
))
1112 vcpu
->arch
.xcr0
= xcr0
;
1114 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1115 kvm_update_cpuid_runtime(vcpu
);
1119 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1121 /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1122 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1123 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1124 kvm_inject_gp(vcpu
, 0);
1128 return kvm_skip_emulated_instruction(vcpu
);
1130 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1132 bool __kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1134 if (cr4
& cr4_reserved_bits
)
1137 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1142 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4
);
1144 static bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1146 return __kvm_is_valid_cr4(vcpu
, cr4
) &&
1147 static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1150 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1152 if ((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
)
1153 kvm_mmu_reset_context(vcpu
);
1156 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1157 * according to the SDM; however, stale prev_roots could be reused
1158 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1159 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1160 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1164 (cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
))
1165 kvm_mmu_unload(vcpu
);
1168 * The TLB has to be flushed for all PCIDs if any of the following
1169 * (architecturally required) changes happen:
1170 * - CR4.PCIDE is changed from 1 to 0
1171 * - CR4.PGE is toggled
1173 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1175 if (((cr4
^ old_cr4
) & X86_CR4_PGE
) ||
1176 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1177 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1180 * The TLB has to be flushed for the current PCID if any of the
1181 * following (architecturally required) changes happen:
1182 * - CR4.SMEP is changed from 0 to 1
1183 * - CR4.PAE is toggled
1185 else if (((cr4
^ old_cr4
) & X86_CR4_PAE
) ||
1186 ((cr4
& X86_CR4_SMEP
) && !(old_cr4
& X86_CR4_SMEP
)))
1187 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1190 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1192 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1194 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1196 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1199 if (is_long_mode(vcpu
)) {
1200 if (!(cr4
& X86_CR4_PAE
))
1202 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1204 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1205 && ((cr4
^ old_cr4
) & X86_CR4_PDPTR_BITS
)
1206 && !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
1209 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1210 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1211 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1215 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1217 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1221 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1223 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1225 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1226 unsigned long roots_to_free
= 0;
1230 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1231 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1232 * also via the emulator. KVM's TDP page tables are not in the scope of
1233 * the invalidation, but the guest's TLB entries need to be flushed as
1234 * the CPU may have cached entries in its TLB for the target PCID.
1236 if (unlikely(tdp_enabled
)) {
1237 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1242 * If neither the current CR3 nor any of the prev_roots use the given
1243 * PCID, then nothing needs to be done here because a resync will
1244 * happen anyway before switching to any other CR3.
1246 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1247 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1248 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1252 * If PCID is disabled, there is no need to free prev_roots even if the
1253 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1256 if (!kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
))
1259 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1260 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1261 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1263 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, roots_to_free
);
1266 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1268 bool skip_tlb_flush
= false;
1269 unsigned long pcid
= 0;
1270 #ifdef CONFIG_X86_64
1271 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
)) {
1272 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1273 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1274 pcid
= cr3
& X86_CR3_PCID_MASK
;
1278 /* PDPTRs are always reloaded for PAE paging. */
1279 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1280 goto handle_tlb_flush
;
1283 * Do not condition the GPA check on long mode, this helper is used to
1284 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1285 * the current vCPU mode is accurate.
1287 if (!kvm_vcpu_is_legal_cr3(vcpu
, cr3
))
1290 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
))
1293 if (cr3
!= kvm_read_cr3(vcpu
))
1294 kvm_mmu_new_pgd(vcpu
, cr3
);
1296 vcpu
->arch
.cr3
= cr3
;
1297 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
1298 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1302 * A load of CR3 that flushes the TLB flushes only the current PCID,
1303 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1304 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1305 * and it's impossible to use a non-zero PCID when PCID is disabled,
1306 * i.e. only PCID=0 can be relevant.
1308 if (!skip_tlb_flush
)
1309 kvm_invalidate_pcid(vcpu
, pcid
);
1313 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1315 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1317 if (cr8
& CR8_RESERVED_BITS
)
1319 if (lapic_in_kernel(vcpu
))
1320 kvm_lapic_set_tpr(vcpu
, cr8
);
1322 vcpu
->arch
.cr8
= cr8
;
1325 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1327 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1329 if (lapic_in_kernel(vcpu
))
1330 return kvm_lapic_get_cr8(vcpu
);
1332 return vcpu
->arch
.cr8
;
1334 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1336 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1340 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1341 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1342 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1346 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1350 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1351 dr7
= vcpu
->arch
.guest_debug_dr7
;
1353 dr7
= vcpu
->arch
.dr7
;
1354 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1355 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1356 if (dr7
& DR7_BP_EN_MASK
)
1357 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1359 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1361 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1363 u64 fixed
= DR6_FIXED_1
;
1365 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1368 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1369 fixed
|= DR6_BUS_LOCK
;
1373 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1375 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1379 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1380 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1381 vcpu
->arch
.eff_db
[dr
] = val
;
1385 if (!kvm_dr6_valid(val
))
1387 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1391 if (!kvm_dr7_valid(val
))
1393 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1394 kvm_update_dr7(vcpu
);
1400 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1402 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1404 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1408 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1412 *val
= vcpu
->arch
.dr6
;
1416 *val
= vcpu
->arch
.dr7
;
1420 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1422 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1424 u32 ecx
= kvm_rcx_read(vcpu
);
1427 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1428 kvm_inject_gp(vcpu
, 0);
1432 kvm_rax_write(vcpu
, (u32
)data
);
1433 kvm_rdx_write(vcpu
, data
>> 32);
1434 return kvm_skip_emulated_instruction(vcpu
);
1436 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1439 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features) track
1440 * the set of MSRs that KVM exposes to userspace through KVM_GET_MSRS,
1441 * KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. msrs_to_save holds MSRs that
1442 * require host support, i.e. should be probed via RDMSR. emulated_msrs holds
1443 * MSRs that KVM emulates without strictly requiring host support.
1444 * msr_based_features holds MSRs that enumerate features, i.e. are effectively
1445 * CPUID leafs. Note, msr_based_features isn't mutually exclusive with
1446 * msrs_to_save and emulated_msrs.
1449 static const u32 msrs_to_save_base
[] = {
1450 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1452 #ifdef CONFIG_X86_64
1453 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1455 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1456 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1457 MSR_IA32_SPEC_CTRL
, MSR_IA32_TSX_CTRL
,
1458 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1459 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1460 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1461 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1462 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1463 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1464 MSR_IA32_UMWAIT_CONTROL
,
1466 MSR_IA32_XFD
, MSR_IA32_XFD_ERR
,
1469 static const u32 msrs_to_save_pmu
[] = {
1470 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1471 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1472 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1473 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1474 MSR_IA32_PEBS_ENABLE
, MSR_IA32_DS_AREA
, MSR_PEBS_DATA_CFG
,
1476 /* This part of MSRs should match KVM_INTEL_PMC_MAX_GENERIC. */
1477 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1478 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1479 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1480 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1481 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1482 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1483 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1484 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1486 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1487 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1489 /* This part of MSRs should match KVM_AMD_PMC_MAX_GENERIC. */
1490 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1491 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1492 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1493 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1495 MSR_AMD64_PERF_CNTR_GLOBAL_CTL
,
1496 MSR_AMD64_PERF_CNTR_GLOBAL_STATUS
,
1497 MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR
,
1500 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_base
) +
1501 ARRAY_SIZE(msrs_to_save_pmu
)];
1502 static unsigned num_msrs_to_save
;
1504 static const u32 emulated_msrs_all
[] = {
1505 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1506 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1508 #ifdef CONFIG_KVM_HYPERV
1509 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1510 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1511 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1512 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1513 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1515 HV_X64_MSR_VP_INDEX
,
1516 HV_X64_MSR_VP_RUNTIME
,
1517 HV_X64_MSR_SCONTROL
,
1518 HV_X64_MSR_STIMER0_CONFIG
,
1519 HV_X64_MSR_VP_ASSIST_PAGE
,
1520 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1521 HV_X64_MSR_TSC_EMULATION_STATUS
, HV_X64_MSR_TSC_INVARIANT_CONTROL
,
1522 HV_X64_MSR_SYNDBG_OPTIONS
,
1523 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1524 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1525 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1528 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1529 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1531 MSR_IA32_TSC_ADJUST
,
1532 MSR_IA32_TSC_DEADLINE
,
1533 MSR_IA32_ARCH_CAPABILITIES
,
1534 MSR_IA32_PERF_CAPABILITIES
,
1535 MSR_IA32_MISC_ENABLE
,
1536 MSR_IA32_MCG_STATUS
,
1538 MSR_IA32_MCG_EXT_CTL
,
1542 MSR_MISC_FEATURES_ENABLES
,
1543 MSR_AMD64_VIRT_SPEC_CTRL
,
1544 MSR_AMD64_TSC_RATIO
,
1549 * KVM always supports the "true" VMX control MSRs, even if the host
1550 * does not. The VMX MSRs as a whole are considered "emulated" as KVM
1551 * doesn't strictly require them to exist in the host (ignoring that
1552 * KVM would refuse to load in the first place if the core set of MSRs
1553 * aren't supported).
1556 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1557 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1558 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1559 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1561 MSR_IA32_VMX_CR0_FIXED0
,
1562 MSR_IA32_VMX_CR4_FIXED0
,
1563 MSR_IA32_VMX_VMCS_ENUM
,
1564 MSR_IA32_VMX_PROCBASED_CTLS2
,
1565 MSR_IA32_VMX_EPT_VPID_CAP
,
1566 MSR_IA32_VMX_VMFUNC
,
1569 MSR_KVM_POLL_CONTROL
,
1572 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1573 static unsigned num_emulated_msrs
;
1576 * List of MSRs that control the existence of MSR-based features, i.e. MSRs
1577 * that are effectively CPUID leafs. VMX MSRs are also included in the set of
1578 * feature MSRs, but are handled separately to allow expedited lookups.
1580 static const u32 msr_based_features_all_except_vmx
[] = {
1583 MSR_IA32_ARCH_CAPABILITIES
,
1584 MSR_IA32_PERF_CAPABILITIES
,
1587 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all_except_vmx
) +
1588 (KVM_LAST_EMULATED_VMX_MSR
- KVM_FIRST_EMULATED_VMX_MSR
+ 1)];
1589 static unsigned int num_msr_based_features
;
1592 * All feature MSRs except uCode revID, which tracks the currently loaded uCode
1593 * patch, are immutable once the vCPU model is defined.
1595 static bool kvm_is_immutable_feature_msr(u32 msr
)
1599 if (msr
>= KVM_FIRST_EMULATED_VMX_MSR
&& msr
<= KVM_LAST_EMULATED_VMX_MSR
)
1602 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all_except_vmx
); i
++) {
1603 if (msr
== msr_based_features_all_except_vmx
[i
])
1604 return msr
!= MSR_IA32_UCODE_REV
;
1611 * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1612 * does not yet virtualize. These include:
1613 * 10 - MISC_PACKAGE_CTRLS
1614 * 11 - ENERGY_FILTERING_CTL
1616 * 18 - FB_CLEAR_CTRL
1617 * 21 - XAPIC_DISABLE_STATUS
1618 * 23 - OVERCLOCKING_STATUS
1621 #define KVM_SUPPORTED_ARCH_CAP \
1622 (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1623 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1624 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1625 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1626 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO)
1628 static u64
kvm_get_arch_capabilities(void)
1630 u64 data
= host_arch_capabilities
& KVM_SUPPORTED_ARCH_CAP
;
1633 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1634 * the nested hypervisor runs with NX huge pages. If it is not,
1635 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1636 * L1 guests, so it need not worry about its own (L2) guests.
1638 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1641 * If we're doing cache flushes (either "always" or "cond")
1642 * we will do one whenever the guest does a vmlaunch/vmresume.
1643 * If an outer hypervisor is doing the cache flush for us
1644 * (ARCH_CAP_SKIP_VMENTRY_L1DFLUSH), we can safely pass that
1645 * capability to the guest too, and if EPT is disabled we're not
1646 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1647 * require a nested hypervisor to do a flush of its own.
1649 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1650 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1652 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1653 data
|= ARCH_CAP_RDCL_NO
;
1654 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1655 data
|= ARCH_CAP_SSB_NO
;
1656 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1657 data
|= ARCH_CAP_MDS_NO
;
1659 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1661 * If RTM=0 because the kernel has disabled TSX, the host might
1662 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1663 * and therefore knows that there cannot be TAA) but keep
1664 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1665 * and we want to allow migrating those guests to tsx=off hosts.
1667 data
&= ~ARCH_CAP_TAA_NO
;
1668 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1669 data
|= ARCH_CAP_TAA_NO
;
1672 * Nothing to do here; we emulate TSX_CTRL if present on the
1673 * host so the guest can choose between disabling TSX or
1674 * using VERW to clear CPU buffers.
1678 if (!boot_cpu_has_bug(X86_BUG_GDS
) || gds_ucode_mitigated())
1679 data
|= ARCH_CAP_GDS_NO
;
1684 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1686 switch (msr
->index
) {
1687 case MSR_IA32_ARCH_CAPABILITIES
:
1688 msr
->data
= kvm_get_arch_capabilities();
1690 case MSR_IA32_PERF_CAPABILITIES
:
1691 msr
->data
= kvm_caps
.supported_perf_cap
;
1693 case MSR_IA32_UCODE_REV
:
1694 rdmsrl_safe(msr
->index
, &msr
->data
);
1697 return static_call(kvm_x86_get_msr_feature
)(msr
);
1702 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1704 struct kvm_msr_entry msr
;
1708 r
= kvm_get_msr_feature(&msr
);
1710 if (r
== KVM_MSR_RET_INVALID
) {
1711 /* Unconditionally clear the output for simplicity */
1713 if (kvm_msr_ignored_check(index
, 0, false))
1725 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1727 if (efer
& EFER_AUTOIBRS
&& !guest_cpuid_has(vcpu
, X86_FEATURE_AUTOIBRS
))
1730 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1733 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1736 if (efer
& (EFER_LME
| EFER_LMA
) &&
1737 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1740 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1746 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1748 if (efer
& efer_reserved_bits
)
1751 return __kvm_valid_efer(vcpu
, efer
);
1753 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1755 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1757 u64 old_efer
= vcpu
->arch
.efer
;
1758 u64 efer
= msr_info
->data
;
1761 if (efer
& efer_reserved_bits
)
1764 if (!msr_info
->host_initiated
) {
1765 if (!__kvm_valid_efer(vcpu
, efer
))
1768 if (is_paging(vcpu
) &&
1769 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1774 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1776 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1782 if ((efer
^ old_efer
) & KVM_MMU_EFER_ROLE_BITS
)
1783 kvm_mmu_reset_context(vcpu
);
1788 void kvm_enable_efer_bits(u64 mask
)
1790 efer_reserved_bits
&= ~mask
;
1792 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1794 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1796 struct kvm_x86_msr_filter
*msr_filter
;
1797 struct msr_bitmap_range
*ranges
;
1798 struct kvm
*kvm
= vcpu
->kvm
;
1803 /* x2APIC MSRs do not support filtering. */
1804 if (index
>= 0x800 && index
<= 0x8ff)
1807 idx
= srcu_read_lock(&kvm
->srcu
);
1809 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1815 allowed
= msr_filter
->default_allow
;
1816 ranges
= msr_filter
->ranges
;
1818 for (i
= 0; i
< msr_filter
->count
; i
++) {
1819 u32 start
= ranges
[i
].base
;
1820 u32 end
= start
+ ranges
[i
].nmsrs
;
1821 u32 flags
= ranges
[i
].flags
;
1822 unsigned long *bitmap
= ranges
[i
].bitmap
;
1824 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1825 allowed
= test_bit(index
- start
, bitmap
);
1831 srcu_read_unlock(&kvm
->srcu
, idx
);
1835 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1838 * Write @data into the MSR specified by @index. Select MSR specific fault
1839 * checks are bypassed if @host_initiated is %true.
1840 * Returns 0 on success, non-0 otherwise.
1841 * Assumes vcpu_load() was already called.
1843 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1844 bool host_initiated
)
1846 struct msr_data msr
;
1851 case MSR_KERNEL_GS_BASE
:
1854 if (is_noncanonical_address(data
, vcpu
))
1857 case MSR_IA32_SYSENTER_EIP
:
1858 case MSR_IA32_SYSENTER_ESP
:
1860 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1861 * non-canonical address is written on Intel but not on
1862 * AMD (which ignores the top 32-bits, because it does
1863 * not implement 64-bit SYSENTER).
1865 * 64-bit code should hence be able to write a non-canonical
1866 * value on AMD. Making the address canonical ensures that
1867 * vmentry does not fail on Intel after writing a non-canonical
1868 * value, and that something deterministic happens if the guest
1869 * invokes 64-bit SYSENTER.
1871 data
= __canonical_address(data
, vcpu_virt_addr_bits(vcpu
));
1874 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1877 if (!host_initiated
&&
1878 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1879 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1883 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1884 * incomplete and conflicting architectural behavior. Current
1885 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1886 * reserved and always read as zeros. Enforce Intel's reserved
1887 * bits check if and only if the guest CPU is Intel, and clear
1888 * the bits in all other cases. This ensures cross-vendor
1889 * migration will provide consistent behavior for the guest.
1891 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1900 msr
.host_initiated
= host_initiated
;
1902 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1905 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1906 u32 index
, u64 data
, bool host_initiated
)
1908 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1910 if (ret
== KVM_MSR_RET_INVALID
)
1911 if (kvm_msr_ignored_check(index
, data
, true))
1918 * Read the MSR specified by @index into @data. Select MSR specific fault
1919 * checks are bypassed if @host_initiated is %true.
1920 * Returns 0 on success, non-0 otherwise.
1921 * Assumes vcpu_load() was already called.
1923 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1924 bool host_initiated
)
1926 struct msr_data msr
;
1931 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1934 if (!host_initiated
&&
1935 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1936 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1942 msr
.host_initiated
= host_initiated
;
1944 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1950 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1951 u32 index
, u64
*data
, bool host_initiated
)
1953 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1955 if (ret
== KVM_MSR_RET_INVALID
) {
1956 /* Unconditionally clear *data for simplicity */
1958 if (kvm_msr_ignored_check(index
, 0, false))
1965 static int kvm_get_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1967 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1968 return KVM_MSR_RET_FILTERED
;
1969 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1972 static int kvm_set_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1974 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1975 return KVM_MSR_RET_FILTERED
;
1976 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1979 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1981 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1983 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1985 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1987 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1989 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1991 static void complete_userspace_rdmsr(struct kvm_vcpu
*vcpu
)
1993 if (!vcpu
->run
->msr
.error
) {
1994 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1995 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1999 static int complete_emulated_msr_access(struct kvm_vcpu
*vcpu
)
2001 return complete_emulated_insn_gp(vcpu
, vcpu
->run
->msr
.error
);
2004 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
2006 complete_userspace_rdmsr(vcpu
);
2007 return complete_emulated_msr_access(vcpu
);
2010 static int complete_fast_msr_access(struct kvm_vcpu
*vcpu
)
2012 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
2015 static int complete_fast_rdmsr(struct kvm_vcpu
*vcpu
)
2017 complete_userspace_rdmsr(vcpu
);
2018 return complete_fast_msr_access(vcpu
);
2021 static u64
kvm_msr_reason(int r
)
2024 case KVM_MSR_RET_INVALID
:
2025 return KVM_MSR_EXIT_REASON_UNKNOWN
;
2026 case KVM_MSR_RET_FILTERED
:
2027 return KVM_MSR_EXIT_REASON_FILTER
;
2029 return KVM_MSR_EXIT_REASON_INVAL
;
2033 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
2034 u32 exit_reason
, u64 data
,
2035 int (*completion
)(struct kvm_vcpu
*vcpu
),
2038 u64 msr_reason
= kvm_msr_reason(r
);
2040 /* Check if the user wanted to know about this MSR fault */
2041 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
2044 vcpu
->run
->exit_reason
= exit_reason
;
2045 vcpu
->run
->msr
.error
= 0;
2046 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
2047 vcpu
->run
->msr
.reason
= msr_reason
;
2048 vcpu
->run
->msr
.index
= index
;
2049 vcpu
->run
->msr
.data
= data
;
2050 vcpu
->arch
.complete_userspace_io
= completion
;
2055 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
2057 u32 ecx
= kvm_rcx_read(vcpu
);
2061 r
= kvm_get_msr_with_filter(vcpu
, ecx
, &data
);
2064 trace_kvm_msr_read(ecx
, data
);
2066 kvm_rax_write(vcpu
, data
& -1u);
2067 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
2069 /* MSR read failed? See if we should ask user space */
2070 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_RDMSR
, 0,
2071 complete_fast_rdmsr
, r
))
2073 trace_kvm_msr_read_ex(ecx
);
2076 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2078 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
2080 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
2082 u32 ecx
= kvm_rcx_read(vcpu
);
2083 u64 data
= kvm_read_edx_eax(vcpu
);
2086 r
= kvm_set_msr_with_filter(vcpu
, ecx
, data
);
2089 trace_kvm_msr_write(ecx
, data
);
2091 /* MSR write failed? See if we should ask user space */
2092 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_WRMSR
, data
,
2093 complete_fast_msr_access
, r
))
2095 /* Signal all other negative errors to userspace */
2098 trace_kvm_msr_write_ex(ecx
, data
);
2101 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2103 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
2105 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
2107 return kvm_skip_emulated_instruction(vcpu
);
2110 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
2112 /* Treat an INVD instruction as a NOP and just skip it. */
2113 return kvm_emulate_as_nop(vcpu
);
2115 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
2117 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
2119 kvm_queue_exception(vcpu
, UD_VECTOR
);
2122 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
2125 static int kvm_emulate_monitor_mwait(struct kvm_vcpu
*vcpu
, const char *insn
)
2127 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS
) &&
2128 !guest_cpuid_has(vcpu
, X86_FEATURE_MWAIT
))
2129 return kvm_handle_invalid_op(vcpu
);
2131 pr_warn_once("%s instruction emulated as NOP!\n", insn
);
2132 return kvm_emulate_as_nop(vcpu
);
2134 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
2136 return kvm_emulate_monitor_mwait(vcpu
, "MWAIT");
2138 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
2140 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
2142 return kvm_emulate_monitor_mwait(vcpu
, "MONITOR");
2144 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
2146 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
2148 xfer_to_guest_mode_prepare();
2149 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
2150 xfer_to_guest_mode_work_pending();
2154 * The fast path for frequent and performance sensitive wrmsr emulation,
2155 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2156 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2157 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2158 * other cases which must be called after interrupts are enabled on the host.
2160 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
2162 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
2165 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
2166 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
2167 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
2168 ((u32
)(data
>> 32) != X2APIC_BROADCAST
))
2169 return kvm_x2apic_icr_write(vcpu
->arch
.apic
, data
);
2174 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
2176 if (!kvm_can_use_hv_timer(vcpu
))
2179 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2183 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2185 u32 msr
= kvm_rcx_read(vcpu
);
2187 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2189 kvm_vcpu_srcu_read_lock(vcpu
);
2192 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2193 data
= kvm_read_edx_eax(vcpu
);
2194 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2195 kvm_skip_emulated_instruction(vcpu
);
2196 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2199 case MSR_IA32_TSC_DEADLINE
:
2200 data
= kvm_read_edx_eax(vcpu
);
2201 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2202 kvm_skip_emulated_instruction(vcpu
);
2203 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2210 if (ret
!= EXIT_FASTPATH_NONE
)
2211 trace_kvm_msr_write(msr
, data
);
2213 kvm_vcpu_srcu_read_unlock(vcpu
);
2217 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2220 * Adapt set_msr() to msr_io()'s calling convention
2222 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2224 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2227 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2232 * Disallow writes to immutable feature MSRs after KVM_RUN. KVM does
2233 * not support modifying the guest vCPU model on the fly, e.g. changing
2234 * the nVMX capabilities while L2 is running is nonsensical. Ignore
2235 * writes of the same value, e.g. to allow userspace to blindly stuff
2236 * all MSRs when emulating RESET.
2238 if (kvm_vcpu_has_run(vcpu
) && kvm_is_immutable_feature_msr(index
)) {
2239 if (do_get_msr(vcpu
, index
, &val
) || *data
!= val
)
2245 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2248 #ifdef CONFIG_X86_64
2249 struct pvclock_clock
{
2259 struct pvclock_gtod_data
{
2262 struct pvclock_clock clock
; /* extract of a clocksource struct */
2263 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2269 static struct pvclock_gtod_data pvclock_gtod_data
;
2271 static void update_pvclock_gtod(struct timekeeper
*tk
)
2273 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2275 write_seqcount_begin(&vdata
->seq
);
2277 /* copy pvclock gtod data */
2278 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2279 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2280 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2281 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2282 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2283 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2284 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2286 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2287 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2288 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2289 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2290 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2291 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2292 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2294 vdata
->wall_time_sec
= tk
->xtime_sec
;
2296 vdata
->offs_boot
= tk
->offs_boot
;
2298 write_seqcount_end(&vdata
->seq
);
2301 static s64
get_kvmclock_base_ns(void)
2303 /* Count up from boot time, but with the frequency of the raw clock. */
2304 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2307 static s64
get_kvmclock_base_ns(void)
2309 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2310 return ktime_get_boottime_ns();
2314 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2318 struct pvclock_wall_clock wc
;
2325 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2330 ++version
; /* first time write, random junk */
2334 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2337 wall_nsec
= kvm_get_wall_clock_epoch(kvm
);
2339 wc
.nsec
= do_div(wall_nsec
, NSEC_PER_SEC
);
2340 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2341 wc
.version
= version
;
2343 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2346 wc_sec_hi
= wall_nsec
>> 32;
2347 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2348 &wc_sec_hi
, sizeof(wc_sec_hi
));
2352 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2355 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2356 bool old_msr
, bool host_initiated
)
2358 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2360 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2361 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2362 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2364 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2367 vcpu
->arch
.time
= system_time
;
2368 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2370 /* we verify if the enable bit is set... */
2371 if (system_time
& 1)
2372 kvm_gpc_activate(&vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2373 sizeof(struct pvclock_vcpu_time_info
));
2375 kvm_gpc_deactivate(&vcpu
->arch
.pv_time
);
2380 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2382 do_shl32_div32(dividend
, divisor
);
2386 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2387 s8
*pshift
, u32
*pmultiplier
)
2395 scaled64
= scaled_hz
;
2396 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2401 tps32
= (uint32_t)tps64
;
2402 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2403 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2411 *pmultiplier
= div_frac(scaled64
, tps32
);
2414 #ifdef CONFIG_X86_64
2415 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2418 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2419 static unsigned long max_tsc_khz
;
2421 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2423 u64 v
= (u64
)khz
* (1000000 + ppm
);
2428 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2430 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2434 /* Guest TSC same frequency as host TSC? */
2436 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_caps
.default_tsc_scaling_ratio
);
2440 /* TSC scaling supported? */
2441 if (!kvm_caps
.has_tsc_control
) {
2442 if (user_tsc_khz
> tsc_khz
) {
2443 vcpu
->arch
.tsc_catchup
= 1;
2444 vcpu
->arch
.tsc_always_catchup
= 1;
2447 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2452 /* TSC scaling required - calculate ratio */
2453 ratio
= mul_u64_u32_div(1ULL << kvm_caps
.tsc_scaling_ratio_frac_bits
,
2454 user_tsc_khz
, tsc_khz
);
2456 if (ratio
== 0 || ratio
>= kvm_caps
.max_tsc_scaling_ratio
) {
2457 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2462 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2466 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2468 u32 thresh_lo
, thresh_hi
;
2469 int use_scaling
= 0;
2471 /* tsc_khz can be zero if TSC calibration fails */
2472 if (user_tsc_khz
== 0) {
2473 /* set tsc_scaling_ratio to a safe value */
2474 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_caps
.default_tsc_scaling_ratio
);
2478 /* Compute a scale to convert nanoseconds in TSC cycles */
2479 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2480 &vcpu
->arch
.virtual_tsc_shift
,
2481 &vcpu
->arch
.virtual_tsc_mult
);
2482 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2485 * Compute the variation in TSC rate which is acceptable
2486 * within the range of tolerance and decide if the
2487 * rate being applied is within that bounds of the hardware
2488 * rate. If so, no scaling or compensation need be done.
2490 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2491 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2492 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2493 pr_debug("requested TSC rate %u falls outside tolerance [%u,%u]\n",
2494 user_tsc_khz
, thresh_lo
, thresh_hi
);
2497 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2500 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2502 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2503 vcpu
->arch
.virtual_tsc_mult
,
2504 vcpu
->arch
.virtual_tsc_shift
);
2505 tsc
+= vcpu
->arch
.this_tsc_write
;
2509 #ifdef CONFIG_X86_64
2510 static inline int gtod_is_based_on_tsc(int mode
)
2512 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2516 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
, bool new_generation
)
2518 #ifdef CONFIG_X86_64
2519 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2520 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2523 * To use the masterclock, the host clocksource must be based on TSC
2524 * and all vCPUs must have matching TSCs. Note, the count for matching
2525 * vCPUs doesn't include the reference vCPU, hence "+1".
2527 bool use_master_clock
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2528 atomic_read(&vcpu
->kvm
->online_vcpus
)) &&
2529 gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
);
2532 * Request a masterclock update if the masterclock needs to be toggled
2533 * on/off, or when starting a new generation and the masterclock is
2534 * enabled (compute_guest_tsc() requires the masterclock snapshot to be
2535 * taken _after_ the new generation is created).
2537 if ((ka
->use_master_clock
&& new_generation
) ||
2538 (ka
->use_master_clock
!= use_master_clock
))
2539 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2541 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2542 atomic_read(&vcpu
->kvm
->online_vcpus
),
2543 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2548 * Multiply tsc by a fixed point number represented by ratio.
2550 * The most significant 64-N bits (mult) of ratio represent the
2551 * integral part of the fixed point number; the remaining N bits
2552 * (frac) represent the fractional part, ie. ratio represents a fixed
2553 * point number (mult + frac * 2^(-N)).
2555 * N equals to kvm_caps.tsc_scaling_ratio_frac_bits.
2557 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2559 return mul_u64_u64_shr(tsc
, ratio
, kvm_caps
.tsc_scaling_ratio_frac_bits
);
2562 u64
kvm_scale_tsc(u64 tsc
, u64 ratio
)
2566 if (ratio
!= kvm_caps
.default_tsc_scaling_ratio
)
2567 _tsc
= __scale_tsc(ratio
, tsc
);
2572 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2576 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2578 return target_tsc
- tsc
;
2581 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2583 return vcpu
->arch
.l1_tsc_offset
+
2584 kvm_scale_tsc(host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2586 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2588 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2592 if (l2_multiplier
== kvm_caps
.default_tsc_scaling_ratio
)
2593 nested_offset
= l1_offset
;
2595 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2596 kvm_caps
.tsc_scaling_ratio_frac_bits
);
2598 nested_offset
+= l2_offset
;
2599 return nested_offset
;
2601 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2603 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2605 if (l2_multiplier
!= kvm_caps
.default_tsc_scaling_ratio
)
2606 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2607 kvm_caps
.tsc_scaling_ratio_frac_bits
);
2609 return l1_multiplier
;
2611 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2613 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2615 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2616 vcpu
->arch
.l1_tsc_offset
,
2619 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2622 * If we are here because L1 chose not to trap WRMSR to TSC then
2623 * according to the spec this should set L1's TSC (as opposed to
2624 * setting L1's offset for L2).
2626 if (is_guest_mode(vcpu
))
2627 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2629 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2630 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2632 vcpu
->arch
.tsc_offset
= l1_offset
;
2634 static_call(kvm_x86_write_tsc_offset
)(vcpu
);
2637 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2639 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2641 /* Userspace is changing the multiplier while L2 is active */
2642 if (is_guest_mode(vcpu
))
2643 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2645 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2647 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2649 if (kvm_caps
.has_tsc_control
)
2650 static_call(kvm_x86_write_tsc_multiplier
)(vcpu
);
2653 static inline bool kvm_check_tsc_unstable(void)
2655 #ifdef CONFIG_X86_64
2657 * TSC is marked unstable when we're running on Hyper-V,
2658 * 'TSC page' clocksource is good.
2660 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2663 return check_tsc_unstable();
2667 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2668 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2671 static void __kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 offset
, u64 tsc
,
2672 u64 ns
, bool matched
)
2674 struct kvm
*kvm
= vcpu
->kvm
;
2676 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2679 * We also track th most recent recorded KHZ, write and time to
2680 * allow the matching interval to be extended at each write.
2682 kvm
->arch
.last_tsc_nsec
= ns
;
2683 kvm
->arch
.last_tsc_write
= tsc
;
2684 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2685 kvm
->arch
.last_tsc_offset
= offset
;
2687 vcpu
->arch
.last_guest_tsc
= tsc
;
2689 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2693 * We split periods of matched TSC writes into generations.
2694 * For each generation, we track the original measured
2695 * nanosecond time, offset, and write, so if TSCs are in
2696 * sync, we can match exact offset, and if not, we can match
2697 * exact software computation in compute_guest_tsc()
2699 * These values are tracked in kvm->arch.cur_xxx variables.
2701 kvm
->arch
.cur_tsc_generation
++;
2702 kvm
->arch
.cur_tsc_nsec
= ns
;
2703 kvm
->arch
.cur_tsc_write
= tsc
;
2704 kvm
->arch
.cur_tsc_offset
= offset
;
2705 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2706 } else if (vcpu
->arch
.this_tsc_generation
!= kvm
->arch
.cur_tsc_generation
) {
2707 kvm
->arch
.nr_vcpus_matched_tsc
++;
2710 /* Keep track of which generation this VCPU has synchronized to */
2711 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2712 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2713 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2715 kvm_track_tsc_matching(vcpu
, !matched
);
2718 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64
*user_value
)
2720 u64 data
= user_value
? *user_value
: 0;
2721 struct kvm
*kvm
= vcpu
->kvm
;
2722 u64 offset
, ns
, elapsed
;
2723 unsigned long flags
;
2724 bool matched
= false;
2725 bool synchronizing
= false;
2727 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2728 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2729 ns
= get_kvmclock_base_ns();
2730 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2732 if (vcpu
->arch
.virtual_tsc_khz
) {
2735 * Force synchronization when creating a vCPU, or when
2736 * userspace explicitly writes a zero value.
2738 synchronizing
= true;
2739 } else if (kvm
->arch
.user_set_tsc
) {
2740 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2741 nsec_to_cycles(vcpu
, elapsed
);
2742 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2744 * Here lies UAPI baggage: when a user-initiated TSC write has
2745 * a small delta (1 second) of virtual cycle time against the
2746 * previously set vCPU, we assume that they were intended to be
2747 * in sync and the delta was only due to the racy nature of the
2750 * This trick falls down when restoring a guest which genuinely
2751 * has been running for less time than the 1 second of imprecision
2752 * which we allow for in the legacy API. In this case, the first
2753 * value written by userspace (on any vCPU) should not be subject
2754 * to this 'correction' to make it sync up with values that only
2755 * come from the kernel's default vCPU creation. Make the 1-second
2756 * slop hack only trigger if the user_set_tsc flag is already set.
2758 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2759 data
+ tsc_hz
> tsc_exp
;
2764 kvm
->arch
.user_set_tsc
= true;
2767 * For a reliable TSC, we can match TSC offsets, and for an unstable
2768 * TSC, we add elapsed time in this computation. We could let the
2769 * compensation code attempt to catch up if we fall behind, but
2770 * it's better to try to match offsets from the beginning.
2772 if (synchronizing
&&
2773 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2774 if (!kvm_check_tsc_unstable()) {
2775 offset
= kvm
->arch
.cur_tsc_offset
;
2777 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2779 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2784 __kvm_synchronize_tsc(vcpu
, offset
, data
, ns
, matched
);
2785 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2788 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2791 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2792 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2795 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2797 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_caps
.default_tsc_scaling_ratio
)
2798 WARN_ON(adjustment
< 0);
2799 adjustment
= kvm_scale_tsc((u64
) adjustment
,
2800 vcpu
->arch
.l1_tsc_scaling_ratio
);
2801 adjust_tsc_offset_guest(vcpu
, adjustment
);
2804 #ifdef CONFIG_X86_64
2806 static u64
read_tsc(void)
2808 u64 ret
= (u64
)rdtsc_ordered();
2809 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2811 if (likely(ret
>= last
))
2815 * GCC likes to generate cmov here, but this branch is extremely
2816 * predictable (it's just a function of time and the likely is
2817 * very likely) and there's a data dependence, so force GCC
2818 * to generate a branch instead. I don't barrier() because
2819 * we don't actually need a barrier, and if this function
2820 * ever gets inlined it will generate worse code.
2826 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2832 switch (clock
->vclock_mode
) {
2833 case VDSO_CLOCKMODE_HVCLOCK
:
2834 if (hv_read_tsc_page_tsc(hv_get_tsc_page(),
2835 tsc_timestamp
, &tsc_pg_val
)) {
2836 /* TSC page valid */
2837 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2838 v
= (tsc_pg_val
- clock
->cycle_last
) &
2841 /* TSC page invalid */
2842 *mode
= VDSO_CLOCKMODE_NONE
;
2845 case VDSO_CLOCKMODE_TSC
:
2846 *mode
= VDSO_CLOCKMODE_TSC
;
2847 *tsc_timestamp
= read_tsc();
2848 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2852 *mode
= VDSO_CLOCKMODE_NONE
;
2855 if (*mode
== VDSO_CLOCKMODE_NONE
)
2856 *tsc_timestamp
= v
= 0;
2858 return v
* clock
->mult
;
2861 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2863 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2869 seq
= read_seqcount_begin(>od
->seq
);
2870 ns
= gtod
->raw_clock
.base_cycles
;
2871 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2872 ns
>>= gtod
->raw_clock
.shift
;
2873 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2874 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2880 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2882 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2888 seq
= read_seqcount_begin(>od
->seq
);
2889 ts
->tv_sec
= gtod
->wall_time_sec
;
2890 ns
= gtod
->clock
.base_cycles
;
2891 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2892 ns
>>= gtod
->clock
.shift
;
2893 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2895 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2901 /* returns true if host is using TSC based clocksource */
2902 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2904 /* checked again under seqlock below */
2905 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2908 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2912 /* returns true if host is using TSC based clocksource */
2913 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2916 /* checked again under seqlock below */
2917 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2920 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2926 * Assuming a stable TSC across physical CPUS, and a stable TSC
2927 * across virtual CPUs, the following condition is possible.
2928 * Each numbered line represents an event visible to both
2929 * CPUs at the next numbered event.
2931 * "timespecX" represents host monotonic time. "tscX" represents
2934 * VCPU0 on CPU0 | VCPU1 on CPU1
2936 * 1. read timespec0,tsc0
2937 * 2. | timespec1 = timespec0 + N
2939 * 3. transition to guest | transition to guest
2940 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2941 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2942 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2944 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2947 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2949 * - 0 < N - M => M < N
2951 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2952 * always the case (the difference between two distinct xtime instances
2953 * might be smaller then the difference between corresponding TSC reads,
2954 * when updating guest vcpus pvclock areas).
2956 * To avoid that problem, do not allow visibility of distinct
2957 * system_timestamp/tsc_timestamp values simultaneously: use a master
2958 * copy of host monotonic time values. Update that master copy
2961 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2965 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2967 #ifdef CONFIG_X86_64
2968 struct kvm_arch
*ka
= &kvm
->arch
;
2970 bool host_tsc_clocksource
, vcpus_matched
;
2972 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2973 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2974 atomic_read(&kvm
->online_vcpus
));
2977 * If the host uses TSC clock, then passthrough TSC as stable
2980 host_tsc_clocksource
= kvm_get_time_and_clockread(
2981 &ka
->master_kernel_ns
,
2982 &ka
->master_cycle_now
);
2984 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2985 && !ka
->backwards_tsc_observed
2986 && !ka
->boot_vcpu_runs_old_kvmclock
;
2988 if (ka
->use_master_clock
)
2989 atomic_set(&kvm_guest_has_master_clock
, 1);
2991 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2992 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2997 static void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2999 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
3002 static void __kvm_start_pvclock_update(struct kvm
*kvm
)
3004 raw_spin_lock_irq(&kvm
->arch
.tsc_write_lock
);
3005 write_seqcount_begin(&kvm
->arch
.pvclock_sc
);
3008 static void kvm_start_pvclock_update(struct kvm
*kvm
)
3010 kvm_make_mclock_inprogress_request(kvm
);
3012 /* no guest entries from this point */
3013 __kvm_start_pvclock_update(kvm
);
3016 static void kvm_end_pvclock_update(struct kvm
*kvm
)
3018 struct kvm_arch
*ka
= &kvm
->arch
;
3019 struct kvm_vcpu
*vcpu
;
3022 write_seqcount_end(&ka
->pvclock_sc
);
3023 raw_spin_unlock_irq(&ka
->tsc_write_lock
);
3024 kvm_for_each_vcpu(i
, vcpu
, kvm
)
3025 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3027 /* guest entries allowed */
3028 kvm_for_each_vcpu(i
, vcpu
, kvm
)
3029 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
3032 static void kvm_update_masterclock(struct kvm
*kvm
)
3034 kvm_hv_request_tsc_page_update(kvm
);
3035 kvm_start_pvclock_update(kvm
);
3036 pvclock_update_vm_gtod_copy(kvm
);
3037 kvm_end_pvclock_update(kvm
);
3041 * Use the kernel's tsc_khz directly if the TSC is constant, otherwise use KVM's
3042 * per-CPU value (which may be zero if a CPU is going offline). Note, tsc_khz
3043 * can change during boot even if the TSC is constant, as it's possible for KVM
3044 * to be loaded before TSC calibration completes. Ideally, KVM would get a
3045 * notification when calibration completes, but practically speaking calibration
3046 * will complete before userspace is alive enough to create VMs.
3048 static unsigned long get_cpu_tsc_khz(void)
3050 if (static_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3053 return __this_cpu_read(cpu_tsc_khz
);
3056 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
3057 static void __get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
3059 struct kvm_arch
*ka
= &kvm
->arch
;
3060 struct pvclock_vcpu_time_info hv_clock
;
3062 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
3066 if (ka
->use_master_clock
&&
3067 (static_cpu_has(X86_FEATURE_CONSTANT_TSC
) || __this_cpu_read(cpu_tsc_khz
))) {
3068 #ifdef CONFIG_X86_64
3069 struct timespec64 ts
;
3071 if (kvm_get_walltime_and_clockread(&ts
, &data
->host_tsc
)) {
3072 data
->realtime
= ts
.tv_nsec
+ NSEC_PER_SEC
* ts
.tv_sec
;
3073 data
->flags
|= KVM_CLOCK_REALTIME
| KVM_CLOCK_HOST_TSC
;
3076 data
->host_tsc
= rdtsc();
3078 data
->flags
|= KVM_CLOCK_TSC_STABLE
;
3079 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
3080 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
3081 kvm_get_time_scale(NSEC_PER_SEC
, get_cpu_tsc_khz() * 1000LL,
3082 &hv_clock
.tsc_shift
,
3083 &hv_clock
.tsc_to_system_mul
);
3084 data
->clock
= __pvclock_read_cycles(&hv_clock
, data
->host_tsc
);
3086 data
->clock
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
3092 static void get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
3094 struct kvm_arch
*ka
= &kvm
->arch
;
3098 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3099 __get_kvmclock(kvm
, data
);
3100 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3103 u64
get_kvmclock_ns(struct kvm
*kvm
)
3105 struct kvm_clock_data data
;
3107 get_kvmclock(kvm
, &data
);
3111 static void kvm_setup_guest_pvclock(struct kvm_vcpu
*v
,
3112 struct gfn_to_pfn_cache
*gpc
,
3113 unsigned int offset
,
3114 bool force_tsc_unstable
)
3116 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3117 struct pvclock_vcpu_time_info
*guest_hv_clock
;
3118 unsigned long flags
;
3120 read_lock_irqsave(&gpc
->lock
, flags
);
3121 while (!kvm_gpc_check(gpc
, offset
+ sizeof(*guest_hv_clock
))) {
3122 read_unlock_irqrestore(&gpc
->lock
, flags
);
3124 if (kvm_gpc_refresh(gpc
, offset
+ sizeof(*guest_hv_clock
)))
3127 read_lock_irqsave(&gpc
->lock
, flags
);
3130 guest_hv_clock
= (void *)(gpc
->khva
+ offset
);
3133 * This VCPU is paused, but it's legal for a guest to read another
3134 * VCPU's kvmclock, so we really have to follow the specification where
3135 * it says that version is odd if data is being modified, and even after
3139 guest_hv_clock
->version
= vcpu
->hv_clock
.version
= (guest_hv_clock
->version
+ 1) | 1;
3142 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3143 vcpu
->hv_clock
.flags
|= (guest_hv_clock
->flags
& PVCLOCK_GUEST_STOPPED
);
3145 if (vcpu
->pvclock_set_guest_stopped_request
) {
3146 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
3147 vcpu
->pvclock_set_guest_stopped_request
= false;
3150 memcpy(guest_hv_clock
, &vcpu
->hv_clock
, sizeof(*guest_hv_clock
));
3152 if (force_tsc_unstable
)
3153 guest_hv_clock
->flags
&= ~PVCLOCK_TSC_STABLE_BIT
;
3157 guest_hv_clock
->version
= ++vcpu
->hv_clock
.version
;
3159 mark_page_dirty_in_slot(v
->kvm
, gpc
->memslot
, gpc
->gpa
>> PAGE_SHIFT
);
3160 read_unlock_irqrestore(&gpc
->lock
, flags
);
3162 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
3165 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
3167 unsigned long flags
, tgt_tsc_khz
;
3169 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3170 struct kvm_arch
*ka
= &v
->kvm
->arch
;
3172 u64 tsc_timestamp
, host_tsc
;
3174 bool use_master_clock
;
3175 #ifdef CONFIG_KVM_XEN
3177 * For Xen guests we may need to override PVCLOCK_TSC_STABLE_BIT as unless
3178 * explicitly told to use TSC as its clocksource Xen will not set this bit.
3179 * This default behaviour led to bugs in some guest kernels which cause
3180 * problems if they observe PVCLOCK_TSC_STABLE_BIT in the pvclock flags.
3182 bool xen_pvclock_tsc_unstable
=
3183 ka
->xen_hvm_config
.flags
& KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE
;
3190 * If the host uses TSC clock, then passthrough TSC as stable
3194 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3195 use_master_clock
= ka
->use_master_clock
;
3196 if (use_master_clock
) {
3197 host_tsc
= ka
->master_cycle_now
;
3198 kernel_ns
= ka
->master_kernel_ns
;
3200 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3202 /* Keep irq disabled to prevent changes to the clock */
3203 local_irq_save(flags
);
3204 tgt_tsc_khz
= get_cpu_tsc_khz();
3205 if (unlikely(tgt_tsc_khz
== 0)) {
3206 local_irq_restore(flags
);
3207 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3210 if (!use_master_clock
) {
3212 kernel_ns
= get_kvmclock_base_ns();
3215 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
3218 * We may have to catch up the TSC to match elapsed wall clock
3219 * time for two reasons, even if kvmclock is used.
3220 * 1) CPU could have been running below the maximum TSC rate
3221 * 2) Broken TSC compensation resets the base at each VCPU
3222 * entry to avoid unknown leaps of TSC even when running
3223 * again on the same CPU. This may cause apparent elapsed
3224 * time to disappear, and the guest to stand still or run
3227 if (vcpu
->tsc_catchup
) {
3228 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
3229 if (tsc
> tsc_timestamp
) {
3230 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
3231 tsc_timestamp
= tsc
;
3235 local_irq_restore(flags
);
3237 /* With all the info we got, fill in the values */
3239 if (kvm_caps
.has_tsc_control
)
3240 tgt_tsc_khz
= kvm_scale_tsc(tgt_tsc_khz
,
3241 v
->arch
.l1_tsc_scaling_ratio
);
3243 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
3244 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
3245 &vcpu
->hv_clock
.tsc_shift
,
3246 &vcpu
->hv_clock
.tsc_to_system_mul
);
3247 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
3248 kvm_xen_update_tsc_info(v
);
3251 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
3252 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
3253 vcpu
->last_guest_tsc
= tsc_timestamp
;
3255 /* If the host uses TSC clocksource, then it is stable */
3257 if (use_master_clock
)
3258 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
3260 vcpu
->hv_clock
.flags
= pvclock_flags
;
3262 if (vcpu
->pv_time
.active
)
3263 kvm_setup_guest_pvclock(v
, &vcpu
->pv_time
, 0, false);
3264 #ifdef CONFIG_KVM_XEN
3265 if (vcpu
->xen
.vcpu_info_cache
.active
)
3266 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_info_cache
,
3267 offsetof(struct compat_vcpu_info
, time
),
3268 xen_pvclock_tsc_unstable
);
3269 if (vcpu
->xen
.vcpu_time_info_cache
.active
)
3270 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0,
3271 xen_pvclock_tsc_unstable
);
3273 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
3278 * The pvclock_wall_clock ABI tells the guest the wall clock time at
3279 * which it started (i.e. its epoch, when its kvmclock was zero).
3281 * In fact those clocks are subtly different; wall clock frequency is
3282 * adjusted by NTP and has leap seconds, while the kvmclock is a
3283 * simple function of the TSC without any such adjustment.
3285 * Perhaps the ABI should have exposed CLOCK_TAI and a ratio between
3286 * that and kvmclock, but even that would be subject to change over
3289 * Attempt to calculate the epoch at a given moment using the *same*
3290 * TSC reading via kvm_get_walltime_and_clockread() to obtain both
3291 * wallclock and kvmclock times, and subtracting one from the other.
3293 * Fall back to using their values at slightly different moments by
3294 * calling ktime_get_real_ns() and get_kvmclock_ns() separately.
3296 uint64_t kvm_get_wall_clock_epoch(struct kvm
*kvm
)
3298 #ifdef CONFIG_X86_64
3299 struct pvclock_vcpu_time_info hv_clock
;
3300 struct kvm_arch
*ka
= &kvm
->arch
;
3301 unsigned long seq
, local_tsc_khz
;
3302 struct timespec64 ts
;
3306 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3309 if (!ka
->use_master_clock
)
3313 * The TSC read and the call to get_cpu_tsc_khz() must happen
3318 local_tsc_khz
= get_cpu_tsc_khz();
3320 if (local_tsc_khz
&&
3321 !kvm_get_walltime_and_clockread(&ts
, &host_tsc
))
3322 local_tsc_khz
= 0; /* Fall back to old method */
3327 * These values must be snapshotted within the seqcount loop.
3328 * After that, it's just mathematics which can happen on any
3331 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
3332 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
3334 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3337 * If the conditions were right, and obtaining the wallclock+TSC was
3338 * successful, calculate the KVM clock at the corresponding time and
3339 * subtract one from the other to get the guest's epoch in nanoseconds
3342 if (local_tsc_khz
) {
3343 kvm_get_time_scale(NSEC_PER_SEC
, local_tsc_khz
* NSEC_PER_USEC
,
3344 &hv_clock
.tsc_shift
,
3345 &hv_clock
.tsc_to_system_mul
);
3346 return ts
.tv_nsec
+ NSEC_PER_SEC
* ts
.tv_sec
-
3347 __pvclock_read_cycles(&hv_clock
, host_tsc
);
3350 return ktime_get_real_ns() - get_kvmclock_ns(kvm
);
3354 * kvmclock updates which are isolated to a given vcpu, such as
3355 * vcpu->cpu migration, should not allow system_timestamp from
3356 * the rest of the vcpus to remain static. Otherwise ntp frequency
3357 * correction applies to one vcpu's system_timestamp but not
3360 * So in those cases, request a kvmclock update for all vcpus.
3361 * We need to rate-limit these requests though, as they can
3362 * considerably slow guests that have a large number of vcpus.
3363 * The time for a remote vcpu to update its kvmclock is bound
3364 * by the delay we use to rate-limit the updates.
3367 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3369 static void kvmclock_update_fn(struct work_struct
*work
)
3372 struct delayed_work
*dwork
= to_delayed_work(work
);
3373 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3374 kvmclock_update_work
);
3375 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3376 struct kvm_vcpu
*vcpu
;
3378 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3379 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3380 kvm_vcpu_kick(vcpu
);
3384 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3386 struct kvm
*kvm
= v
->kvm
;
3388 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3389 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3390 KVMCLOCK_UPDATE_DELAY
);
3393 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3395 static void kvmclock_sync_fn(struct work_struct
*work
)
3397 struct delayed_work
*dwork
= to_delayed_work(work
);
3398 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3399 kvmclock_sync_work
);
3400 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3402 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3403 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3404 KVMCLOCK_SYNC_PERIOD
);
3407 /* These helpers are safe iff @msr is known to be an MCx bank MSR. */
3408 static bool is_mci_control_msr(u32 msr
)
3410 return (msr
& 3) == 0;
3412 static bool is_mci_status_msr(u32 msr
)
3414 return (msr
& 3) == 1;
3418 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3420 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3422 /* McStatusWrEn enabled? */
3423 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3424 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3429 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3431 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3432 unsigned bank_num
= mcg_cap
& 0xff;
3433 u32 msr
= msr_info
->index
;
3434 u64 data
= msr_info
->data
;
3435 u32 offset
, last_msr
;
3438 case MSR_IA32_MCG_STATUS
:
3439 vcpu
->arch
.mcg_status
= data
;
3441 case MSR_IA32_MCG_CTL
:
3442 if (!(mcg_cap
& MCG_CTL_P
) &&
3443 (data
|| !msr_info
->host_initiated
))
3445 if (data
!= 0 && data
!= ~(u64
)0)
3447 vcpu
->arch
.mcg_ctl
= data
;
3449 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
3450 last_msr
= MSR_IA32_MCx_CTL2(bank_num
) - 1;
3454 if (!(mcg_cap
& MCG_CMCI_P
) && (data
|| !msr_info
->host_initiated
))
3456 /* An attempt to write a 1 to a reserved bit raises #GP */
3457 if (data
& ~(MCI_CTL2_CMCI_EN
| MCI_CTL2_CMCI_THRESHOLD_MASK
))
3459 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL2
,
3460 last_msr
+ 1 - MSR_IA32_MC0_CTL2
);
3461 vcpu
->arch
.mci_ctl2_banks
[offset
] = data
;
3463 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3464 last_msr
= MSR_IA32_MCx_CTL(bank_num
) - 1;
3469 * Only 0 or all 1s can be written to IA32_MCi_CTL, all other
3470 * values are architecturally undefined. But, some Linux
3471 * kernels clear bit 10 in bank 4 to workaround a BIOS/GART TLB
3472 * issue on AMD K8s, allow bit 10 to be clear when setting all
3473 * other bits in order to avoid an uncaught #GP in the guest.
3475 * UNIXWARE clears bit 0 of MC1_CTL to ignore correctable,
3476 * single-bit ECC data errors.
3478 if (is_mci_control_msr(msr
) &&
3479 data
!= 0 && (data
| (1 << 10) | 1) != ~(u64
)0)
3483 * All CPUs allow writing 0 to MCi_STATUS MSRs to clear the MSR.
3484 * AMD-based CPUs allow non-zero values, but if and only if
3485 * HWCR[McStatusWrEn] is set.
3487 if (!msr_info
->host_initiated
&& is_mci_status_msr(msr
) &&
3488 data
!= 0 && !can_set_mci_status(vcpu
))
3491 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL
,
3492 last_msr
+ 1 - MSR_IA32_MC0_CTL
);
3493 vcpu
->arch
.mce_banks
[offset
] = data
;
3501 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3503 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3505 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3508 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3510 gpa_t gpa
= data
& ~0x3f;
3512 /* Bits 4:5 are reserved, Should be zero */
3516 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3517 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3520 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3521 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3524 if (!lapic_in_kernel(vcpu
))
3525 return data
? 1 : 0;
3527 vcpu
->arch
.apf
.msr_en_val
= data
;
3529 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3530 kvm_clear_async_pf_completion_queue(vcpu
);
3531 kvm_async_pf_hash_reset(vcpu
);
3535 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3539 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3540 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3542 kvm_async_pf_wakeup_all(vcpu
);
3547 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3549 /* Bits 8-63 are reserved */
3553 if (!lapic_in_kernel(vcpu
))
3556 vcpu
->arch
.apf
.msr_int_val
= data
;
3558 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3563 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3565 kvm_gpc_deactivate(&vcpu
->arch
.pv_time
);
3566 vcpu
->arch
.time
= 0;
3569 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3571 ++vcpu
->stat
.tlb_flush
;
3572 static_call(kvm_x86_flush_tlb_all
)(vcpu
);
3574 /* Flushing all ASIDs flushes the current ASID... */
3575 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
3578 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3580 ++vcpu
->stat
.tlb_flush
;
3584 * A TLB flush on behalf of the guest is equivalent to
3585 * INVPCID(all), toggling CR4.PGE, etc., which requires
3586 * a forced sync of the shadow page tables. Ensure all the
3587 * roots are synced and the guest TLB in hardware is clean.
3589 kvm_mmu_sync_roots(vcpu
);
3590 kvm_mmu_sync_prev_roots(vcpu
);
3593 static_call(kvm_x86_flush_tlb_guest
)(vcpu
);
3596 * Flushing all "guest" TLB is always a superset of Hyper-V's fine
3599 kvm_hv_vcpu_purge_flush_tlb(vcpu
);
3603 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3605 ++vcpu
->stat
.tlb_flush
;
3606 static_call(kvm_x86_flush_tlb_current
)(vcpu
);
3610 * Service "local" TLB flush requests, which are specific to the current MMU
3611 * context. In addition to the generic event handling in vcpu_enter_guest(),
3612 * TLB flushes that are targeted at an MMU context also need to be serviced
3613 * prior before nested VM-Enter/VM-Exit.
3615 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3617 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3618 kvm_vcpu_flush_tlb_current(vcpu
);
3620 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3621 kvm_vcpu_flush_tlb_guest(vcpu
);
3623 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3625 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3627 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3628 struct kvm_steal_time __user
*st
;
3629 struct kvm_memslots
*slots
;
3630 gpa_t gpa
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3634 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3635 kvm_xen_runstate_set_running(vcpu
);
3639 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3642 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3645 slots
= kvm_memslots(vcpu
->kvm
);
3647 if (unlikely(slots
->generation
!= ghc
->generation
||
3649 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3650 /* We rely on the fact that it fits in a single page. */
3651 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3653 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gpa
, sizeof(*st
)) ||
3654 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3658 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3660 * Doing a TLB flush here, on the guest's behalf, can avoid
3663 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3664 u8 st_preempted
= 0;
3667 if (!user_access_begin(st
, sizeof(*st
)))
3670 asm volatile("1: xchgb %0, %2\n"
3673 _ASM_EXTABLE_UA(1b
, 2b
)
3674 : "+q" (st_preempted
),
3676 "+m" (st
->preempted
));
3682 vcpu
->arch
.st
.preempted
= 0;
3684 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3685 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3686 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3687 kvm_vcpu_flush_tlb_guest(vcpu
);
3689 if (!user_access_begin(st
, sizeof(*st
)))
3692 if (!user_access_begin(st
, sizeof(*st
)))
3695 unsafe_put_user(0, &st
->preempted
, out
);
3696 vcpu
->arch
.st
.preempted
= 0;
3699 unsafe_get_user(version
, &st
->version
, out
);
3701 version
+= 1; /* first time write, random junk */
3704 unsafe_put_user(version
, &st
->version
, out
);
3708 unsafe_get_user(steal
, &st
->steal
, out
);
3709 steal
+= current
->sched_info
.run_delay
-
3710 vcpu
->arch
.st
.last_steal
;
3711 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3712 unsafe_put_user(steal
, &st
->steal
, out
);
3715 unsafe_put_user(version
, &st
->version
, out
);
3720 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3723 static bool kvm_is_msr_to_save(u32 msr_index
)
3727 for (i
= 0; i
< num_msrs_to_save
; i
++) {
3728 if (msrs_to_save
[i
] == msr_index
)
3735 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3737 u32 msr
= msr_info
->index
;
3738 u64 data
= msr_info
->data
;
3740 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3741 return kvm_xen_write_hypercall_page(vcpu
, data
);
3744 case MSR_AMD64_NB_CFG
:
3745 case MSR_IA32_UCODE_WRITE
:
3746 case MSR_VM_HSAVE_PA
:
3747 case MSR_AMD64_PATCH_LOADER
:
3748 case MSR_AMD64_BU_CFG2
:
3749 case MSR_AMD64_DC_CFG
:
3750 case MSR_AMD64_TW_CFG
:
3751 case MSR_F15H_EX_CFG
:
3754 case MSR_IA32_UCODE_REV
:
3755 if (msr_info
->host_initiated
)
3756 vcpu
->arch
.microcode_version
= data
;
3758 case MSR_IA32_ARCH_CAPABILITIES
:
3759 if (!msr_info
->host_initiated
)
3761 vcpu
->arch
.arch_capabilities
= data
;
3763 case MSR_IA32_PERF_CAPABILITIES
:
3764 if (!msr_info
->host_initiated
)
3766 if (data
& ~kvm_caps
.supported_perf_cap
)
3770 * Note, this is not just a performance optimization! KVM
3771 * disallows changing feature MSRs after the vCPU has run; PMU
3772 * refresh will bug the VM if called after the vCPU has run.
3774 if (vcpu
->arch
.perf_capabilities
== data
)
3777 vcpu
->arch
.perf_capabilities
= data
;
3778 kvm_pmu_refresh(vcpu
);
3780 case MSR_IA32_PRED_CMD
: {
3781 u64 reserved_bits
= ~(PRED_CMD_IBPB
| PRED_CMD_SBPB
);
3783 if (!msr_info
->host_initiated
) {
3784 if ((!guest_has_pred_cmd_msr(vcpu
)))
3787 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SPEC_CTRL
) &&
3788 !guest_cpuid_has(vcpu
, X86_FEATURE_AMD_IBPB
))
3789 reserved_bits
|= PRED_CMD_IBPB
;
3791 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SBPB
))
3792 reserved_bits
|= PRED_CMD_SBPB
;
3795 if (!boot_cpu_has(X86_FEATURE_IBPB
))
3796 reserved_bits
|= PRED_CMD_IBPB
;
3798 if (!boot_cpu_has(X86_FEATURE_SBPB
))
3799 reserved_bits
|= PRED_CMD_SBPB
;
3801 if (data
& reserved_bits
)
3807 wrmsrl(MSR_IA32_PRED_CMD
, data
);
3810 case MSR_IA32_FLUSH_CMD
:
3811 if (!msr_info
->host_initiated
&&
3812 !guest_cpuid_has(vcpu
, X86_FEATURE_FLUSH_L1D
))
3815 if (!boot_cpu_has(X86_FEATURE_FLUSH_L1D
) || (data
& ~L1D_FLUSH
))
3820 wrmsrl(MSR_IA32_FLUSH_CMD
, L1D_FLUSH
);
3823 return set_efer(vcpu
, msr_info
);
3825 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3826 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3827 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3830 * Allow McStatusWrEn and TscFreqSel. (Linux guests from v3.2
3831 * through at least v6.6 whine if TscFreqSel is clear,
3832 * depending on F/M/S.
3834 if (data
& ~(BIT_ULL(18) | BIT_ULL(24))) {
3835 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3838 vcpu
->arch
.msr_hwcr
= data
;
3840 case MSR_FAM10H_MMIO_CONF_BASE
:
3842 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3846 case MSR_IA32_CR_PAT
:
3847 if (!kvm_pat_valid(data
))
3850 vcpu
->arch
.pat
= data
;
3852 case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000
:
3853 case MSR_MTRRdefType
:
3854 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3855 case MSR_IA32_APICBASE
:
3856 return kvm_set_apic_base(vcpu
, msr_info
);
3857 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3858 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3859 case MSR_IA32_TSC_DEADLINE
:
3860 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3862 case MSR_IA32_TSC_ADJUST
:
3863 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3864 if (!msr_info
->host_initiated
) {
3865 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3866 adjust_tsc_offset_guest(vcpu
, adj
);
3867 /* Before back to guest, tsc_timestamp must be adjusted
3868 * as well, otherwise guest's percpu pvclock time could jump.
3870 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3872 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3875 case MSR_IA32_MISC_ENABLE
: {
3876 u64 old_val
= vcpu
->arch
.ia32_misc_enable_msr
;
3878 if (!msr_info
->host_initiated
) {
3880 if ((old_val
^ data
) & MSR_IA32_MISC_ENABLE_PMU_RO_MASK
)
3883 /* R bits, i.e. writes are ignored, but don't fault. */
3884 data
= data
& ~MSR_IA32_MISC_ENABLE_EMON
;
3885 data
|= old_val
& MSR_IA32_MISC_ENABLE_EMON
;
3888 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3889 ((old_val
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3890 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3892 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3893 kvm_update_cpuid_runtime(vcpu
);
3895 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3899 case MSR_IA32_SMBASE
:
3900 if (!IS_ENABLED(CONFIG_KVM_SMM
) || !msr_info
->host_initiated
)
3902 vcpu
->arch
.smbase
= data
;
3904 case MSR_IA32_POWER_CTL
:
3905 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3908 if (msr_info
->host_initiated
) {
3909 kvm_synchronize_tsc(vcpu
, &data
);
3911 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3912 adjust_tsc_offset_guest(vcpu
, adj
);
3913 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3917 if (!msr_info
->host_initiated
&&
3918 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3921 * KVM supports exposing PT to the guest, but does not support
3922 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3923 * XSAVES/XRSTORS to save/restore PT MSRs.
3925 if (data
& ~kvm_caps
.supported_xss
)
3927 vcpu
->arch
.ia32_xss
= data
;
3928 kvm_update_cpuid_runtime(vcpu
);
3931 if (!msr_info
->host_initiated
)
3933 vcpu
->arch
.smi_count
= data
;
3935 case MSR_KVM_WALL_CLOCK_NEW
:
3936 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3939 vcpu
->kvm
->arch
.wall_clock
= data
;
3940 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3942 case MSR_KVM_WALL_CLOCK
:
3943 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3946 vcpu
->kvm
->arch
.wall_clock
= data
;
3947 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3949 case MSR_KVM_SYSTEM_TIME_NEW
:
3950 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3953 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3955 case MSR_KVM_SYSTEM_TIME
:
3956 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3959 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3961 case MSR_KVM_ASYNC_PF_EN
:
3962 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3965 if (kvm_pv_enable_async_pf(vcpu
, data
))
3968 case MSR_KVM_ASYNC_PF_INT
:
3969 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3972 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3975 case MSR_KVM_ASYNC_PF_ACK
:
3976 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3979 vcpu
->arch
.apf
.pageready_pending
= false;
3980 kvm_check_async_pf_completion(vcpu
);
3983 case MSR_KVM_STEAL_TIME
:
3984 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3987 if (unlikely(!sched_info_on()))
3990 if (data
& KVM_STEAL_RESERVED_MASK
)
3993 vcpu
->arch
.st
.msr_val
= data
;
3995 if (!(data
& KVM_MSR_ENABLED
))
3998 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4001 case MSR_KVM_PV_EOI_EN
:
4002 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
4005 if (kvm_lapic_set_pv_eoi(vcpu
, data
, sizeof(u8
)))
4009 case MSR_KVM_POLL_CONTROL
:
4010 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
4013 /* only enable bit supported */
4014 if (data
& (-1ULL << 1))
4017 vcpu
->arch
.msr_kvm_poll_control
= data
;
4020 case MSR_IA32_MCG_CTL
:
4021 case MSR_IA32_MCG_STATUS
:
4022 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4023 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4024 return set_msr_mce(vcpu
, msr_info
);
4026 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
4027 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
4028 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
4029 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
4030 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
4031 return kvm_pmu_set_msr(vcpu
, msr_info
);
4034 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
4036 case MSR_K7_CLK_CTL
:
4038 * Ignore all writes to this no longer documented MSR.
4039 * Writes are only relevant for old K7 processors,
4040 * all pre-dating SVM, but a recommended workaround from
4041 * AMD for these chips. It is possible to specify the
4042 * affected processor models on the command line, hence
4043 * the need to ignore the workaround.
4046 #ifdef CONFIG_KVM_HYPERV
4047 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
4048 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
4049 case HV_X64_MSR_SYNDBG_OPTIONS
:
4050 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
4051 case HV_X64_MSR_CRASH_CTL
:
4052 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
4053 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
4054 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
4055 case HV_X64_MSR_TSC_EMULATION_STATUS
:
4056 case HV_X64_MSR_TSC_INVARIANT_CONTROL
:
4057 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
4058 msr_info
->host_initiated
);
4060 case MSR_IA32_BBL_CR_CTL3
:
4061 /* Drop writes to this legacy MSR -- see rdmsr
4062 * counterpart for further detail.
4064 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
4066 case MSR_AMD64_OSVW_ID_LENGTH
:
4067 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4069 vcpu
->arch
.osvw
.length
= data
;
4071 case MSR_AMD64_OSVW_STATUS
:
4072 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4074 vcpu
->arch
.osvw
.status
= data
;
4076 case MSR_PLATFORM_INFO
:
4077 if (!msr_info
->host_initiated
||
4078 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
4079 cpuid_fault_enabled(vcpu
)))
4081 vcpu
->arch
.msr_platform_info
= data
;
4083 case MSR_MISC_FEATURES_ENABLES
:
4084 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
4085 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
4086 !supports_cpuid_fault(vcpu
)))
4088 vcpu
->arch
.msr_misc_features_enables
= data
;
4090 #ifdef CONFIG_X86_64
4092 if (!msr_info
->host_initiated
&&
4093 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4096 if (data
& ~kvm_guest_supported_xfd(vcpu
))
4099 fpu_update_guest_xfd(&vcpu
->arch
.guest_fpu
, data
);
4101 case MSR_IA32_XFD_ERR
:
4102 if (!msr_info
->host_initiated
&&
4103 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4106 if (data
& ~kvm_guest_supported_xfd(vcpu
))
4109 vcpu
->arch
.guest_fpu
.xfd_err
= data
;
4113 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
4114 return kvm_pmu_set_msr(vcpu
, msr_info
);
4117 * Userspace is allowed to write '0' to MSRs that KVM reports
4118 * as to-be-saved, even if an MSRs isn't fully supported.
4120 if (msr_info
->host_initiated
&& !data
&&
4121 kvm_is_msr_to_save(msr
))
4124 return KVM_MSR_RET_INVALID
;
4128 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
4130 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
4133 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4134 unsigned bank_num
= mcg_cap
& 0xff;
4135 u32 offset
, last_msr
;
4138 case MSR_IA32_P5_MC_ADDR
:
4139 case MSR_IA32_P5_MC_TYPE
:
4142 case MSR_IA32_MCG_CAP
:
4143 data
= vcpu
->arch
.mcg_cap
;
4145 case MSR_IA32_MCG_CTL
:
4146 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
4148 data
= vcpu
->arch
.mcg_ctl
;
4150 case MSR_IA32_MCG_STATUS
:
4151 data
= vcpu
->arch
.mcg_status
;
4153 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4154 last_msr
= MSR_IA32_MCx_CTL2(bank_num
) - 1;
4158 if (!(mcg_cap
& MCG_CMCI_P
) && !host
)
4160 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL2
,
4161 last_msr
+ 1 - MSR_IA32_MC0_CTL2
);
4162 data
= vcpu
->arch
.mci_ctl2_banks
[offset
];
4164 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4165 last_msr
= MSR_IA32_MCx_CTL(bank_num
) - 1;
4169 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL
,
4170 last_msr
+ 1 - MSR_IA32_MC0_CTL
);
4171 data
= vcpu
->arch
.mce_banks
[offset
];
4180 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
4182 switch (msr_info
->index
) {
4183 case MSR_IA32_PLATFORM_ID
:
4184 case MSR_IA32_EBL_CR_POWERON
:
4185 case MSR_IA32_LASTBRANCHFROMIP
:
4186 case MSR_IA32_LASTBRANCHTOIP
:
4187 case MSR_IA32_LASTINTFROMIP
:
4188 case MSR_IA32_LASTINTTOIP
:
4189 case MSR_AMD64_SYSCFG
:
4190 case MSR_K8_TSEG_ADDR
:
4191 case MSR_K8_TSEG_MASK
:
4192 case MSR_VM_HSAVE_PA
:
4193 case MSR_K8_INT_PENDING_MSG
:
4194 case MSR_AMD64_NB_CFG
:
4195 case MSR_FAM10H_MMIO_CONF_BASE
:
4196 case MSR_AMD64_BU_CFG2
:
4197 case MSR_IA32_PERF_CTL
:
4198 case MSR_AMD64_DC_CFG
:
4199 case MSR_AMD64_TW_CFG
:
4200 case MSR_F15H_EX_CFG
:
4202 * Intel Sandy Bridge CPUs must support the RAPL (running average power
4203 * limit) MSRs. Just return 0, as we do not want to expose the host
4204 * data here. Do not conditionalize this on CPUID, as KVM does not do
4205 * so for existing CPU-specific MSRs.
4207 case MSR_RAPL_POWER_UNIT
:
4208 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
4209 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
4210 case MSR_PKG_ENERGY_STATUS
: /* Total package */
4211 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
4214 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
4215 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
4216 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
4217 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
4218 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4219 return kvm_pmu_get_msr(vcpu
, msr_info
);
4222 case MSR_IA32_UCODE_REV
:
4223 msr_info
->data
= vcpu
->arch
.microcode_version
;
4225 case MSR_IA32_ARCH_CAPABILITIES
:
4226 if (!msr_info
->host_initiated
&&
4227 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
4229 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
4231 case MSR_IA32_PERF_CAPABILITIES
:
4232 if (!msr_info
->host_initiated
&&
4233 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
4235 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
4237 case MSR_IA32_POWER_CTL
:
4238 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
4240 case MSR_IA32_TSC
: {
4242 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
4243 * even when not intercepted. AMD manual doesn't explicitly
4244 * state this but appears to behave the same.
4246 * On userspace reads and writes, however, we unconditionally
4247 * return L1's TSC value to ensure backwards-compatible
4248 * behavior for migration.
4252 if (msr_info
->host_initiated
) {
4253 offset
= vcpu
->arch
.l1_tsc_offset
;
4254 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
4256 offset
= vcpu
->arch
.tsc_offset
;
4257 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
4260 msr_info
->data
= kvm_scale_tsc(rdtsc(), ratio
) + offset
;
4263 case MSR_IA32_CR_PAT
:
4264 msr_info
->data
= vcpu
->arch
.pat
;
4267 case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000
:
4268 case MSR_MTRRdefType
:
4269 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
4270 case 0xcd: /* fsb frequency */
4274 * MSR_EBC_FREQUENCY_ID
4275 * Conservative value valid for even the basic CPU models.
4276 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
4277 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
4278 * and 266MHz for model 3, or 4. Set Core Clock
4279 * Frequency to System Bus Frequency Ratio to 1 (bits
4280 * 31:24) even though these are only valid for CPU
4281 * models > 2, however guests may end up dividing or
4282 * multiplying by zero otherwise.
4284 case MSR_EBC_FREQUENCY_ID
:
4285 msr_info
->data
= 1 << 24;
4287 case MSR_IA32_APICBASE
:
4288 msr_info
->data
= kvm_get_apic_base(vcpu
);
4290 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
4291 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
4292 case MSR_IA32_TSC_DEADLINE
:
4293 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
4295 case MSR_IA32_TSC_ADJUST
:
4296 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
4298 case MSR_IA32_MISC_ENABLE
:
4299 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
4301 case MSR_IA32_SMBASE
:
4302 if (!IS_ENABLED(CONFIG_KVM_SMM
) || !msr_info
->host_initiated
)
4304 msr_info
->data
= vcpu
->arch
.smbase
;
4307 msr_info
->data
= vcpu
->arch
.smi_count
;
4309 case MSR_IA32_PERF_STATUS
:
4310 /* TSC increment by tick */
4311 msr_info
->data
= 1000ULL;
4312 /* CPU multiplier */
4313 msr_info
->data
|= (((uint64_t)4ULL) << 40);
4316 msr_info
->data
= vcpu
->arch
.efer
;
4318 case MSR_KVM_WALL_CLOCK
:
4319 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
4322 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
4324 case MSR_KVM_WALL_CLOCK_NEW
:
4325 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
4328 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
4330 case MSR_KVM_SYSTEM_TIME
:
4331 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
4334 msr_info
->data
= vcpu
->arch
.time
;
4336 case MSR_KVM_SYSTEM_TIME_NEW
:
4337 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
4340 msr_info
->data
= vcpu
->arch
.time
;
4342 case MSR_KVM_ASYNC_PF_EN
:
4343 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
4346 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
4348 case MSR_KVM_ASYNC_PF_INT
:
4349 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4352 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
4354 case MSR_KVM_ASYNC_PF_ACK
:
4355 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4360 case MSR_KVM_STEAL_TIME
:
4361 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
4364 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
4366 case MSR_KVM_PV_EOI_EN
:
4367 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
4370 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
4372 case MSR_KVM_POLL_CONTROL
:
4373 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
4376 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
4378 case MSR_IA32_P5_MC_ADDR
:
4379 case MSR_IA32_P5_MC_TYPE
:
4380 case MSR_IA32_MCG_CAP
:
4381 case MSR_IA32_MCG_CTL
:
4382 case MSR_IA32_MCG_STATUS
:
4383 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4384 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4385 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
4386 msr_info
->host_initiated
);
4388 if (!msr_info
->host_initiated
&&
4389 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
4391 msr_info
->data
= vcpu
->arch
.ia32_xss
;
4393 case MSR_K7_CLK_CTL
:
4395 * Provide expected ramp-up count for K7. All other
4396 * are set to zero, indicating minimum divisors for
4399 * This prevents guest kernels on AMD host with CPU
4400 * type 6, model 8 and higher from exploding due to
4401 * the rdmsr failing.
4403 msr_info
->data
= 0x20000000;
4405 #ifdef CONFIG_KVM_HYPERV
4406 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
4407 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
4408 case HV_X64_MSR_SYNDBG_OPTIONS
:
4409 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
4410 case HV_X64_MSR_CRASH_CTL
:
4411 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
4412 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
4413 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
4414 case HV_X64_MSR_TSC_EMULATION_STATUS
:
4415 case HV_X64_MSR_TSC_INVARIANT_CONTROL
:
4416 return kvm_hv_get_msr_common(vcpu
,
4417 msr_info
->index
, &msr_info
->data
,
4418 msr_info
->host_initiated
);
4420 case MSR_IA32_BBL_CR_CTL3
:
4421 /* This legacy MSR exists but isn't fully documented in current
4422 * silicon. It is however accessed by winxp in very narrow
4423 * scenarios where it sets bit #19, itself documented as
4424 * a "reserved" bit. Best effort attempt to source coherent
4425 * read data here should the balance of the register be
4426 * interpreted by the guest:
4428 * L2 cache control register 3: 64GB range, 256KB size,
4429 * enabled, latency 0x1, configured
4431 msr_info
->data
= 0xbe702111;
4433 case MSR_AMD64_OSVW_ID_LENGTH
:
4434 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4436 msr_info
->data
= vcpu
->arch
.osvw
.length
;
4438 case MSR_AMD64_OSVW_STATUS
:
4439 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4441 msr_info
->data
= vcpu
->arch
.osvw
.status
;
4443 case MSR_PLATFORM_INFO
:
4444 if (!msr_info
->host_initiated
&&
4445 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
4447 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
4449 case MSR_MISC_FEATURES_ENABLES
:
4450 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
4453 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
4455 #ifdef CONFIG_X86_64
4457 if (!msr_info
->host_initiated
&&
4458 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4461 msr_info
->data
= vcpu
->arch
.guest_fpu
.fpstate
->xfd
;
4463 case MSR_IA32_XFD_ERR
:
4464 if (!msr_info
->host_initiated
&&
4465 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4468 msr_info
->data
= vcpu
->arch
.guest_fpu
.xfd_err
;
4472 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4473 return kvm_pmu_get_msr(vcpu
, msr_info
);
4476 * Userspace is allowed to read MSRs that KVM reports as
4477 * to-be-saved, even if an MSR isn't fully supported.
4479 if (msr_info
->host_initiated
&&
4480 kvm_is_msr_to_save(msr_info
->index
)) {
4485 return KVM_MSR_RET_INVALID
;
4489 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
4492 * Read or write a bunch of msrs. All parameters are kernel addresses.
4494 * @return number of msrs set successfully.
4496 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
4497 struct kvm_msr_entry
*entries
,
4498 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4499 unsigned index
, u64
*data
))
4503 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
4504 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
4511 * Read or write a bunch of msrs. Parameters are user addresses.
4513 * @return number of msrs set successfully.
4515 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
4516 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4517 unsigned index
, u64
*data
),
4520 struct kvm_msrs msrs
;
4521 struct kvm_msr_entry
*entries
;
4526 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
4530 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
4533 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
4534 entries
= memdup_user(user_msrs
->entries
, size
);
4535 if (IS_ERR(entries
)) {
4536 r
= PTR_ERR(entries
);
4540 r
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4542 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4550 static inline bool kvm_can_mwait_in_guest(void)
4552 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4553 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4554 boot_cpu_has(X86_FEATURE_ARAT
);
4557 #ifdef CONFIG_KVM_HYPERV
4558 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4559 struct kvm_cpuid2 __user
*cpuid_arg
)
4561 struct kvm_cpuid2 cpuid
;
4565 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4568 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4573 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4580 static bool kvm_is_vm_type_supported(unsigned long type
)
4582 return type
== KVM_X86_DEFAULT_VM
||
4583 (type
== KVM_X86_SW_PROTECTED_VM
&&
4584 IS_ENABLED(CONFIG_KVM_SW_PROTECTED_VM
) && tdp_enabled
);
4587 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4592 case KVM_CAP_IRQCHIP
:
4594 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4595 case KVM_CAP_SET_TSS_ADDR
:
4596 case KVM_CAP_EXT_CPUID
:
4597 case KVM_CAP_EXT_EMUL_CPUID
:
4598 case KVM_CAP_CLOCKSOURCE
:
4600 case KVM_CAP_NOP_IO_DELAY
:
4601 case KVM_CAP_MP_STATE
:
4602 case KVM_CAP_SYNC_MMU
:
4603 case KVM_CAP_USER_NMI
:
4604 case KVM_CAP_REINJECT_CONTROL
:
4605 case KVM_CAP_IRQ_INJECT_STATUS
:
4606 case KVM_CAP_IOEVENTFD
:
4607 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4609 case KVM_CAP_PIT_STATE2
:
4610 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4611 case KVM_CAP_VCPU_EVENTS
:
4612 #ifdef CONFIG_KVM_HYPERV
4613 case KVM_CAP_HYPERV
:
4614 case KVM_CAP_HYPERV_VAPIC
:
4615 case KVM_CAP_HYPERV_SPIN
:
4616 case KVM_CAP_HYPERV_TIME
:
4617 case KVM_CAP_HYPERV_SYNIC
:
4618 case KVM_CAP_HYPERV_SYNIC2
:
4619 case KVM_CAP_HYPERV_VP_INDEX
:
4620 case KVM_CAP_HYPERV_EVENTFD
:
4621 case KVM_CAP_HYPERV_TLBFLUSH
:
4622 case KVM_CAP_HYPERV_SEND_IPI
:
4623 case KVM_CAP_HYPERV_CPUID
:
4624 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4625 case KVM_CAP_SYS_HYPERV_CPUID
:
4627 case KVM_CAP_PCI_SEGMENT
:
4628 case KVM_CAP_DEBUGREGS
:
4629 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4631 case KVM_CAP_ASYNC_PF
:
4632 case KVM_CAP_ASYNC_PF_INT
:
4633 case KVM_CAP_GET_TSC_KHZ
:
4634 case KVM_CAP_KVMCLOCK_CTRL
:
4635 case KVM_CAP_READONLY_MEM
:
4636 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4637 case KVM_CAP_TSC_DEADLINE_TIMER
:
4638 case KVM_CAP_DISABLE_QUIRKS
:
4639 case KVM_CAP_SET_BOOT_CPU_ID
:
4640 case KVM_CAP_SPLIT_IRQCHIP
:
4641 case KVM_CAP_IMMEDIATE_EXIT
:
4642 case KVM_CAP_PMU_EVENT_FILTER
:
4643 case KVM_CAP_PMU_EVENT_MASKED_EVENTS
:
4644 case KVM_CAP_GET_MSR_FEATURES
:
4645 case KVM_CAP_MSR_PLATFORM_INFO
:
4646 case KVM_CAP_EXCEPTION_PAYLOAD
:
4647 case KVM_CAP_X86_TRIPLE_FAULT_EVENT
:
4648 case KVM_CAP_SET_GUEST_DEBUG
:
4649 case KVM_CAP_LAST_CPU
:
4650 case KVM_CAP_X86_USER_SPACE_MSR
:
4651 case KVM_CAP_X86_MSR_FILTER
:
4652 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4653 #ifdef CONFIG_X86_SGX_KVM
4654 case KVM_CAP_SGX_ATTRIBUTE
:
4656 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4657 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
4658 case KVM_CAP_SREGS2
:
4659 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4660 case KVM_CAP_VCPU_ATTRIBUTES
:
4661 case KVM_CAP_SYS_ATTRIBUTES
:
4663 case KVM_CAP_ENABLE_CAP
:
4664 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES
:
4665 case KVM_CAP_IRQFD_RESAMPLE
:
4666 case KVM_CAP_MEMORY_FAULT_INFO
:
4669 case KVM_CAP_EXIT_HYPERCALL
:
4670 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4672 case KVM_CAP_SET_GUEST_DEBUG2
:
4673 return KVM_GUESTDBG_VALID_MASK
;
4674 #ifdef CONFIG_KVM_XEN
4675 case KVM_CAP_XEN_HVM
:
4676 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4677 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4678 KVM_XEN_HVM_CONFIG_SHARED_INFO
|
4679 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL
|
4680 KVM_XEN_HVM_CONFIG_EVTCHN_SEND
|
4681 KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE
;
4682 if (sched_info_on())
4683 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
|
4684 KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG
;
4687 case KVM_CAP_SYNC_REGS
:
4688 r
= KVM_SYNC_X86_VALID_FIELDS
;
4690 case KVM_CAP_ADJUST_CLOCK
:
4691 r
= KVM_CLOCK_VALID_FLAGS
;
4693 case KVM_CAP_X86_DISABLE_EXITS
:
4694 r
= KVM_X86_DISABLE_EXITS_PAUSE
;
4696 if (!mitigate_smt_rsb
) {
4697 r
|= KVM_X86_DISABLE_EXITS_HLT
|
4698 KVM_X86_DISABLE_EXITS_CSTATE
;
4700 if (kvm_can_mwait_in_guest())
4701 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4704 case KVM_CAP_X86_SMM
:
4705 if (!IS_ENABLED(CONFIG_KVM_SMM
))
4708 /* SMBASE is usually relocated above 1M on modern chipsets,
4709 * and SMM handlers might indeed rely on 4G segment limits,
4710 * so do not report SMM to be available if real mode is
4711 * emulated via vm86 mode. Still, do not go to great lengths
4712 * to avoid userspace's usage of the feature, because it is a
4713 * fringe case that is not enabled except via specific settings
4714 * of the module parameters.
4716 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4718 case KVM_CAP_NR_VCPUS
:
4719 r
= min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS
);
4721 case KVM_CAP_MAX_VCPUS
:
4724 case KVM_CAP_MAX_VCPU_ID
:
4725 r
= KVM_MAX_VCPU_IDS
;
4727 case KVM_CAP_PV_MMU
: /* obsolete */
4731 r
= KVM_MAX_MCE_BANKS
;
4734 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4736 case KVM_CAP_TSC_CONTROL
:
4737 case KVM_CAP_VM_TSC_CONTROL
:
4738 r
= kvm_caps
.has_tsc_control
;
4740 case KVM_CAP_X2APIC_API
:
4741 r
= KVM_X2APIC_API_VALID_FLAGS
;
4743 case KVM_CAP_NESTED_STATE
:
4744 r
= kvm_x86_ops
.nested_ops
->get_state
?
4745 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4747 #ifdef CONFIG_KVM_HYPERV
4748 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4749 r
= kvm_x86_ops
.enable_l2_tlb_flush
!= NULL
;
4751 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4752 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4755 case KVM_CAP_SMALLER_MAXPHYADDR
:
4756 r
= (int) allow_smaller_maxphyaddr
;
4758 case KVM_CAP_STEAL_TIME
:
4759 r
= sched_info_on();
4761 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4762 if (kvm_caps
.has_bus_lock_exit
)
4763 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4764 KVM_BUS_LOCK_DETECTION_EXIT
;
4768 case KVM_CAP_XSAVE2
: {
4769 r
= xstate_required_size(kvm_get_filtered_xcr0(), false);
4770 if (r
< sizeof(struct kvm_xsave
))
4771 r
= sizeof(struct kvm_xsave
);
4774 case KVM_CAP_PMU_CAPABILITY
:
4775 r
= enable_pmu
? KVM_CAP_PMU_VALID_MASK
: 0;
4777 case KVM_CAP_DISABLE_QUIRKS2
:
4778 r
= KVM_X86_VALID_QUIRKS
;
4780 case KVM_CAP_X86_NOTIFY_VMEXIT
:
4781 r
= kvm_caps
.has_notify_vmexit
;
4783 case KVM_CAP_VM_TYPES
:
4784 r
= BIT(KVM_X86_DEFAULT_VM
);
4785 if (kvm_is_vm_type_supported(KVM_X86_SW_PROTECTED_VM
))
4786 r
|= BIT(KVM_X86_SW_PROTECTED_VM
);
4794 static inline void __user
*kvm_get_attr_addr(struct kvm_device_attr
*attr
)
4796 void __user
*uaddr
= (void __user
*)(unsigned long)attr
->addr
;
4798 if ((u64
)(unsigned long)uaddr
!= attr
->addr
)
4799 return ERR_PTR_USR(-EFAULT
);
4803 static int kvm_x86_dev_get_attr(struct kvm_device_attr
*attr
)
4805 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
4811 return PTR_ERR(uaddr
);
4813 switch (attr
->attr
) {
4814 case KVM_X86_XCOMP_GUEST_SUPP
:
4815 if (put_user(kvm_caps
.supported_xcr0
, uaddr
))
4823 static int kvm_x86_dev_has_attr(struct kvm_device_attr
*attr
)
4828 switch (attr
->attr
) {
4829 case KVM_X86_XCOMP_GUEST_SUPP
:
4836 long kvm_arch_dev_ioctl(struct file
*filp
,
4837 unsigned int ioctl
, unsigned long arg
)
4839 void __user
*argp
= (void __user
*)arg
;
4843 case KVM_GET_MSR_INDEX_LIST
: {
4844 struct kvm_msr_list __user
*user_msr_list
= argp
;
4845 struct kvm_msr_list msr_list
;
4849 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4852 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4853 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4856 if (n
< msr_list
.nmsrs
)
4859 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4860 num_msrs_to_save
* sizeof(u32
)))
4862 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4864 num_emulated_msrs
* sizeof(u32
)))
4869 case KVM_GET_SUPPORTED_CPUID
:
4870 case KVM_GET_EMULATED_CPUID
: {
4871 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4872 struct kvm_cpuid2 cpuid
;
4875 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4878 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4884 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4889 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4891 if (copy_to_user(argp
, &kvm_caps
.supported_mce_cap
,
4892 sizeof(kvm_caps
.supported_mce_cap
)))
4896 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4897 struct kvm_msr_list __user
*user_msr_list
= argp
;
4898 struct kvm_msr_list msr_list
;
4902 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4905 msr_list
.nmsrs
= num_msr_based_features
;
4906 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4909 if (n
< msr_list
.nmsrs
)
4912 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4913 num_msr_based_features
* sizeof(u32
)))
4919 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4921 #ifdef CONFIG_KVM_HYPERV
4922 case KVM_GET_SUPPORTED_HV_CPUID
:
4923 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4926 case KVM_GET_DEVICE_ATTR
: {
4927 struct kvm_device_attr attr
;
4929 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4931 r
= kvm_x86_dev_get_attr(&attr
);
4934 case KVM_HAS_DEVICE_ATTR
: {
4935 struct kvm_device_attr attr
;
4937 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4939 r
= kvm_x86_dev_has_attr(&attr
);
4950 static void wbinvd_ipi(void *garbage
)
4955 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4957 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4960 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4962 /* Address WBINVD may be executed by guest */
4963 if (need_emulate_wbinvd(vcpu
)) {
4964 if (static_call(kvm_x86_has_wbinvd_exit
)())
4965 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4966 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4967 smp_call_function_single(vcpu
->cpu
,
4968 wbinvd_ipi
, NULL
, 1);
4971 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4973 /* Save host pkru register if supported */
4974 vcpu
->arch
.host_pkru
= read_pkru();
4976 /* Apply any externally detected TSC adjustments (due to suspend) */
4977 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4978 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4979 vcpu
->arch
.tsc_offset_adjustment
= 0;
4980 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4983 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4984 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4985 rdtsc() - vcpu
->arch
.last_host_tsc
;
4987 mark_tsc_unstable("KVM discovered backwards TSC");
4989 if (kvm_check_tsc_unstable()) {
4990 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4991 vcpu
->arch
.last_guest_tsc
);
4992 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4993 vcpu
->arch
.tsc_catchup
= 1;
4996 if (kvm_lapic_hv_timer_in_use(vcpu
))
4997 kvm_lapic_restart_hv_timer(vcpu
);
5000 * On a host with synchronized TSC, there is no need to update
5001 * kvmclock on vcpu->cpu migration
5003 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
5004 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
5005 if (vcpu
->cpu
!= cpu
)
5006 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
5010 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
5013 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
5015 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
5016 struct kvm_steal_time __user
*st
;
5017 struct kvm_memslots
*slots
;
5018 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
5019 gpa_t gpa
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
5022 * The vCPU can be marked preempted if and only if the VM-Exit was on
5023 * an instruction boundary and will not trigger guest emulation of any
5024 * kind (see vcpu_run). Vendor specific code controls (conservatively)
5025 * when this is true, for example allowing the vCPU to be marked
5026 * preempted if and only if the VM-Exit was due to a host interrupt.
5028 if (!vcpu
->arch
.at_instruction_boundary
) {
5029 vcpu
->stat
.preemption_other
++;
5033 vcpu
->stat
.preemption_reported
++;
5034 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
5037 if (vcpu
->arch
.st
.preempted
)
5040 /* This happens on process exit */
5041 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
5044 slots
= kvm_memslots(vcpu
->kvm
);
5046 if (unlikely(slots
->generation
!= ghc
->generation
||
5048 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
5051 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
5052 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
5054 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
5055 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
5057 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
5060 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
5064 if (vcpu
->preempted
) {
5065 if (!vcpu
->arch
.guest_state_protected
)
5066 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
5069 * Take the srcu lock as memslots will be accessed to check the gfn
5070 * cache generation against the memslots generation.
5072 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5073 if (kvm_xen_msr_enabled(vcpu
->kvm
))
5074 kvm_xen_runstate_set_preempted(vcpu
);
5076 kvm_steal_time_set_preempted(vcpu
);
5077 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5080 static_call(kvm_x86_vcpu_put
)(vcpu
);
5081 vcpu
->arch
.last_host_tsc
= rdtsc();
5084 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
5085 struct kvm_lapic_state
*s
)
5087 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
5089 return kvm_apic_get_state(vcpu
, s
);
5092 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
5093 struct kvm_lapic_state
*s
)
5097 r
= kvm_apic_set_state(vcpu
, s
);
5100 update_cr8_intercept(vcpu
);
5105 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
5108 * We can accept userspace's request for interrupt injection
5109 * as long as we have a place to store the interrupt number.
5110 * The actual injection will happen when the CPU is able to
5111 * deliver the interrupt.
5113 if (kvm_cpu_has_extint(vcpu
))
5116 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
5117 return (!lapic_in_kernel(vcpu
) ||
5118 kvm_apic_accept_pic_intr(vcpu
));
5121 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
5124 * Do not cause an interrupt window exit if an exception
5125 * is pending or an event needs reinjection; userspace
5126 * might want to inject the interrupt manually using KVM_SET_REGS
5127 * or KVM_SET_SREGS. For that to work, we must be at an
5128 * instruction boundary and with no events half-injected.
5130 return (kvm_arch_interrupt_allowed(vcpu
) &&
5131 kvm_cpu_accept_dm_intr(vcpu
) &&
5132 !kvm_event_needs_reinjection(vcpu
) &&
5133 !kvm_is_exception_pending(vcpu
));
5136 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
5137 struct kvm_interrupt
*irq
)
5139 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
5142 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5143 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
5144 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5149 * With in-kernel LAPIC, we only use this to inject EXTINT, so
5150 * fail for in-kernel 8259.
5152 if (pic_in_kernel(vcpu
->kvm
))
5155 if (vcpu
->arch
.pending_external_vector
!= -1)
5158 vcpu
->arch
.pending_external_vector
= irq
->irq
;
5159 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5163 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
5165 kvm_inject_nmi(vcpu
);
5170 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
5171 struct kvm_tpr_access_ctl
*tac
)
5175 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
5179 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
5183 unsigned bank_num
= mcg_cap
& 0xff, bank
;
5186 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
5188 if (mcg_cap
& ~(kvm_caps
.supported_mce_cap
| 0xff | 0xff0000))
5191 vcpu
->arch
.mcg_cap
= mcg_cap
;
5192 /* Init IA32_MCG_CTL to all 1s */
5193 if (mcg_cap
& MCG_CTL_P
)
5194 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
5195 /* Init IA32_MCi_CTL to all 1s, IA32_MCi_CTL2 to all 0s */
5196 for (bank
= 0; bank
< bank_num
; bank
++) {
5197 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
5198 if (mcg_cap
& MCG_CMCI_P
)
5199 vcpu
->arch
.mci_ctl2_banks
[bank
] = 0;
5202 kvm_apic_after_set_mcg_cap(vcpu
);
5204 static_call(kvm_x86_setup_mce
)(vcpu
);
5210 * Validate this is an UCNA (uncorrectable no action) error by checking the
5211 * MCG_STATUS and MCi_STATUS registers:
5212 * - none of the bits for Machine Check Exceptions are set
5213 * - both the VAL (valid) and UC (uncorrectable) bits are set
5214 * MCI_STATUS_PCC - Processor Context Corrupted
5215 * MCI_STATUS_S - Signaled as a Machine Check Exception
5216 * MCI_STATUS_AR - Software recoverable Action Required
5218 static bool is_ucna(struct kvm_x86_mce
*mce
)
5220 return !mce
->mcg_status
&&
5221 !(mce
->status
& (MCI_STATUS_PCC
| MCI_STATUS_S
| MCI_STATUS_AR
)) &&
5222 (mce
->status
& MCI_STATUS_VAL
) &&
5223 (mce
->status
& MCI_STATUS_UC
);
5226 static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu
*vcpu
, struct kvm_x86_mce
*mce
, u64
* banks
)
5228 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
5230 banks
[1] = mce
->status
;
5231 banks
[2] = mce
->addr
;
5232 banks
[3] = mce
->misc
;
5233 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
5235 if (!(mcg_cap
& MCG_CMCI_P
) ||
5236 !(vcpu
->arch
.mci_ctl2_banks
[mce
->bank
] & MCI_CTL2_CMCI_EN
))
5239 if (lapic_in_kernel(vcpu
))
5240 kvm_apic_local_deliver(vcpu
->arch
.apic
, APIC_LVTCMCI
);
5245 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
5246 struct kvm_x86_mce
*mce
)
5248 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
5249 unsigned bank_num
= mcg_cap
& 0xff;
5250 u64
*banks
= vcpu
->arch
.mce_banks
;
5252 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
5255 banks
+= array_index_nospec(4 * mce
->bank
, 4 * bank_num
);
5258 return kvm_vcpu_x86_set_ucna(vcpu
, mce
, banks
);
5261 * if IA32_MCG_CTL is not all 1s, the uncorrected error
5262 * reporting is disabled
5264 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
5265 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
5268 * if IA32_MCi_CTL is not all 1s, the uncorrected error
5269 * reporting is disabled for the bank
5271 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
5273 if (mce
->status
& MCI_STATUS_UC
) {
5274 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
5275 !kvm_is_cr4_bit_set(vcpu
, X86_CR4_MCE
)) {
5276 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5279 if (banks
[1] & MCI_STATUS_VAL
)
5280 mce
->status
|= MCI_STATUS_OVER
;
5281 banks
[2] = mce
->addr
;
5282 banks
[3] = mce
->misc
;
5283 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
5284 banks
[1] = mce
->status
;
5285 kvm_queue_exception(vcpu
, MC_VECTOR
);
5286 } else if (!(banks
[1] & MCI_STATUS_VAL
)
5287 || !(banks
[1] & MCI_STATUS_UC
)) {
5288 if (banks
[1] & MCI_STATUS_VAL
)
5289 mce
->status
|= MCI_STATUS_OVER
;
5290 banks
[2] = mce
->addr
;
5291 banks
[3] = mce
->misc
;
5292 banks
[1] = mce
->status
;
5294 banks
[1] |= MCI_STATUS_OVER
;
5298 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
5299 struct kvm_vcpu_events
*events
)
5301 struct kvm_queued_exception
*ex
;
5305 #ifdef CONFIG_KVM_SMM
5306 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
5311 * KVM's ABI only allows for one exception to be migrated. Luckily,
5312 * the only time there can be two queued exceptions is if there's a
5313 * non-exiting _injected_ exception, and a pending exiting exception.
5314 * In that case, ignore the VM-Exiting exception as it's an extension
5315 * of the injected exception.
5317 if (vcpu
->arch
.exception_vmexit
.pending
&&
5318 !vcpu
->arch
.exception
.pending
&&
5319 !vcpu
->arch
.exception
.injected
)
5320 ex
= &vcpu
->arch
.exception_vmexit
;
5322 ex
= &vcpu
->arch
.exception
;
5325 * In guest mode, payload delivery should be deferred if the exception
5326 * will be intercepted by L1, e.g. KVM should not modifying CR2 if L1
5327 * intercepts #PF, ditto for DR6 and #DBs. If the per-VM capability,
5328 * KVM_CAP_EXCEPTION_PAYLOAD, is not set, userspace may or may not
5329 * propagate the payload and so it cannot be safely deferred. Deliver
5330 * the payload if the capability hasn't been requested.
5332 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
5333 ex
->pending
&& ex
->has_payload
)
5334 kvm_deliver_exception_payload(vcpu
, ex
);
5336 memset(events
, 0, sizeof(*events
));
5339 * The API doesn't provide the instruction length for software
5340 * exceptions, so don't report them. As long as the guest RIP
5341 * isn't advanced, we should expect to encounter the exception
5344 if (!kvm_exception_is_soft(ex
->vector
)) {
5345 events
->exception
.injected
= ex
->injected
;
5346 events
->exception
.pending
= ex
->pending
;
5348 * For ABI compatibility, deliberately conflate
5349 * pending and injected exceptions when
5350 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
5352 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
5353 events
->exception
.injected
|= ex
->pending
;
5355 events
->exception
.nr
= ex
->vector
;
5356 events
->exception
.has_error_code
= ex
->has_error_code
;
5357 events
->exception
.error_code
= ex
->error_code
;
5358 events
->exception_has_payload
= ex
->has_payload
;
5359 events
->exception_payload
= ex
->payload
;
5361 events
->interrupt
.injected
=
5362 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
5363 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
5364 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
5366 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
5367 events
->nmi
.pending
= kvm_get_nr_pending_nmis(vcpu
);
5368 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
5370 /* events->sipi_vector is never valid when reporting to user space */
5372 #ifdef CONFIG_KVM_SMM
5373 events
->smi
.smm
= is_smm(vcpu
);
5374 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
5375 events
->smi
.smm_inside_nmi
=
5376 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
5378 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
5380 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
5381 | KVM_VCPUEVENT_VALID_SHADOW
5382 | KVM_VCPUEVENT_VALID_SMM
);
5383 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
5384 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
5385 if (vcpu
->kvm
->arch
.triple_fault_event
) {
5386 events
->triple_fault
.pending
= kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5387 events
->flags
|= KVM_VCPUEVENT_VALID_TRIPLE_FAULT
;
5391 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
5392 struct kvm_vcpu_events
*events
)
5394 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
5395 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
5396 | KVM_VCPUEVENT_VALID_SHADOW
5397 | KVM_VCPUEVENT_VALID_SMM
5398 | KVM_VCPUEVENT_VALID_PAYLOAD
5399 | KVM_VCPUEVENT_VALID_TRIPLE_FAULT
))
5402 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
5403 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
5405 if (events
->exception
.pending
)
5406 events
->exception
.injected
= 0;
5408 events
->exception_has_payload
= 0;
5410 events
->exception
.pending
= 0;
5411 events
->exception_has_payload
= 0;
5414 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
5415 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
5418 /* INITs are latched while in SMM */
5419 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
5420 (events
->smi
.smm
|| events
->smi
.pending
) &&
5421 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
5427 * Flag that userspace is stuffing an exception, the next KVM_RUN will
5428 * morph the exception to a VM-Exit if appropriate. Do this only for
5429 * pending exceptions, already-injected exceptions are not subject to
5430 * intercpetion. Note, userspace that conflates pending and injected
5431 * is hosed, and will incorrectly convert an injected exception into a
5432 * pending exception, which in turn may cause a spurious VM-Exit.
5434 vcpu
->arch
.exception_from_userspace
= events
->exception
.pending
;
5436 vcpu
->arch
.exception_vmexit
.pending
= false;
5438 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
5439 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
5440 vcpu
->arch
.exception
.vector
= events
->exception
.nr
;
5441 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
5442 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
5443 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
5444 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
5446 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
5447 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
5448 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
5449 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
5450 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
5451 events
->interrupt
.shadow
);
5453 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
5454 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
) {
5455 vcpu
->arch
.nmi_pending
= 0;
5456 atomic_set(&vcpu
->arch
.nmi_queued
, events
->nmi
.pending
);
5457 kvm_make_request(KVM_REQ_NMI
, vcpu
);
5459 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
5461 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
5462 lapic_in_kernel(vcpu
))
5463 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
5465 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
5466 #ifdef CONFIG_KVM_SMM
5467 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
5468 kvm_leave_nested(vcpu
);
5469 kvm_smm_changed(vcpu
, events
->smi
.smm
);
5472 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
5474 if (events
->smi
.smm
) {
5475 if (events
->smi
.smm_inside_nmi
)
5476 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
5478 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
5482 if (events
->smi
.smm
|| events
->smi
.pending
||
5483 events
->smi
.smm_inside_nmi
)
5487 if (lapic_in_kernel(vcpu
)) {
5488 if (events
->smi
.latched_init
)
5489 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5491 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5495 if (events
->flags
& KVM_VCPUEVENT_VALID_TRIPLE_FAULT
) {
5496 if (!vcpu
->kvm
->arch
.triple_fault_event
)
5498 if (events
->triple_fault
.pending
)
5499 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5501 kvm_clear_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5504 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5509 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
5510 struct kvm_debugregs
*dbgregs
)
5514 memset(dbgregs
, 0, sizeof(*dbgregs
));
5515 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
5516 kvm_get_dr(vcpu
, 6, &val
);
5518 dbgregs
->dr7
= vcpu
->arch
.dr7
;
5521 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
5522 struct kvm_debugregs
*dbgregs
)
5527 if (!kvm_dr6_valid(dbgregs
->dr6
))
5529 if (!kvm_dr7_valid(dbgregs
->dr7
))
5532 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
5533 kvm_update_dr0123(vcpu
);
5534 vcpu
->arch
.dr6
= dbgregs
->dr6
;
5535 vcpu
->arch
.dr7
= dbgregs
->dr7
;
5536 kvm_update_dr7(vcpu
);
5542 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu
*vcpu
,
5543 u8
*state
, unsigned int size
)
5546 * Only copy state for features that are enabled for the guest. The
5547 * state itself isn't problematic, but setting bits in the header for
5548 * features that are supported in *this* host but not exposed to the
5549 * guest can result in KVM_SET_XSAVE failing when live migrating to a
5550 * compatible host without the features that are NOT exposed to the
5553 * FP+SSE can always be saved/restored via KVM_{G,S}ET_XSAVE, even if
5554 * XSAVE/XCRO are not exposed to the guest, and even if XSAVE isn't
5555 * supported by the host.
5557 u64 supported_xcr0
= vcpu
->arch
.guest_supported_xcr0
|
5558 XFEATURE_MASK_FPSSE
;
5560 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5563 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
, state
, size
,
5564 supported_xcr0
, vcpu
->arch
.pkru
);
5567 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
5568 struct kvm_xsave
*guest_xsave
)
5570 kvm_vcpu_ioctl_x86_get_xsave2(vcpu
, (void *)guest_xsave
->region
,
5571 sizeof(guest_xsave
->region
));
5574 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
5575 struct kvm_xsave
*guest_xsave
)
5577 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5580 return fpu_copy_uabi_to_guest_fpstate(&vcpu
->arch
.guest_fpu
,
5581 guest_xsave
->region
,
5582 kvm_caps
.supported_xcr0
,
5586 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
5587 struct kvm_xcrs
*guest_xcrs
)
5589 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
5590 guest_xcrs
->nr_xcrs
= 0;
5594 guest_xcrs
->nr_xcrs
= 1;
5595 guest_xcrs
->flags
= 0;
5596 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
5597 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
5600 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
5601 struct kvm_xcrs
*guest_xcrs
)
5605 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
5608 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
5611 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
5612 /* Only support XCR0 currently */
5613 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
5614 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
5615 guest_xcrs
->xcrs
[i
].value
);
5624 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5625 * stopped by the hypervisor. This function will be called from the host only.
5626 * EINVAL is returned when the host attempts to set the flag for a guest that
5627 * does not support pv clocks.
5629 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
5631 if (!vcpu
->arch
.pv_time
.active
)
5633 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
5634 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5638 static int kvm_arch_tsc_has_attr(struct kvm_vcpu
*vcpu
,
5639 struct kvm_device_attr
*attr
)
5643 switch (attr
->attr
) {
5644 case KVM_VCPU_TSC_OFFSET
:
5654 static int kvm_arch_tsc_get_attr(struct kvm_vcpu
*vcpu
,
5655 struct kvm_device_attr
*attr
)
5657 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5661 return PTR_ERR(uaddr
);
5663 switch (attr
->attr
) {
5664 case KVM_VCPU_TSC_OFFSET
:
5666 if (put_user(vcpu
->arch
.l1_tsc_offset
, uaddr
))
5677 static int kvm_arch_tsc_set_attr(struct kvm_vcpu
*vcpu
,
5678 struct kvm_device_attr
*attr
)
5680 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5681 struct kvm
*kvm
= vcpu
->kvm
;
5685 return PTR_ERR(uaddr
);
5687 switch (attr
->attr
) {
5688 case KVM_VCPU_TSC_OFFSET
: {
5689 u64 offset
, tsc
, ns
;
5690 unsigned long flags
;
5694 if (get_user(offset
, uaddr
))
5697 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
5699 matched
= (vcpu
->arch
.virtual_tsc_khz
&&
5700 kvm
->arch
.last_tsc_khz
== vcpu
->arch
.virtual_tsc_khz
&&
5701 kvm
->arch
.last_tsc_offset
== offset
);
5703 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
) + offset
;
5704 ns
= get_kvmclock_base_ns();
5706 kvm
->arch
.user_set_tsc
= true;
5707 __kvm_synchronize_tsc(vcpu
, offset
, tsc
, ns
, matched
);
5708 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
5720 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu
*vcpu
,
5724 struct kvm_device_attr attr
;
5727 if (copy_from_user(&attr
, argp
, sizeof(attr
)))
5730 if (attr
.group
!= KVM_VCPU_TSC_CTRL
)
5734 case KVM_HAS_DEVICE_ATTR
:
5735 r
= kvm_arch_tsc_has_attr(vcpu
, &attr
);
5737 case KVM_GET_DEVICE_ATTR
:
5738 r
= kvm_arch_tsc_get_attr(vcpu
, &attr
);
5740 case KVM_SET_DEVICE_ATTR
:
5741 r
= kvm_arch_tsc_set_attr(vcpu
, &attr
);
5748 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
5749 struct kvm_enable_cap
*cap
)
5755 #ifdef CONFIG_KVM_HYPERV
5756 case KVM_CAP_HYPERV_SYNIC2
:
5761 case KVM_CAP_HYPERV_SYNIC
:
5762 if (!irqchip_in_kernel(vcpu
->kvm
))
5764 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
5765 KVM_CAP_HYPERV_SYNIC2
);
5766 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
5769 uint16_t vmcs_version
;
5770 void __user
*user_ptr
;
5772 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
5774 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
5776 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
5777 if (copy_to_user(user_ptr
, &vmcs_version
,
5778 sizeof(vmcs_version
)))
5783 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5784 if (!kvm_x86_ops
.enable_l2_tlb_flush
)
5787 return static_call(kvm_x86_enable_l2_tlb_flush
)(vcpu
);
5789 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5790 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5793 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5794 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5795 if (vcpu
->arch
.pv_cpuid
.enforce
)
5796 kvm_update_pv_runtime(vcpu
);
5804 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5805 unsigned int ioctl
, unsigned long arg
)
5807 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5808 void __user
*argp
= (void __user
*)arg
;
5811 struct kvm_sregs2
*sregs2
;
5812 struct kvm_lapic_state
*lapic
;
5813 struct kvm_xsave
*xsave
;
5814 struct kvm_xcrs
*xcrs
;
5822 case KVM_GET_LAPIC
: {
5824 if (!lapic_in_kernel(vcpu
))
5826 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5827 GFP_KERNEL_ACCOUNT
);
5832 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5836 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5841 case KVM_SET_LAPIC
: {
5843 if (!lapic_in_kernel(vcpu
))
5845 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5846 if (IS_ERR(u
.lapic
)) {
5847 r
= PTR_ERR(u
.lapic
);
5851 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5854 case KVM_INTERRUPT
: {
5855 struct kvm_interrupt irq
;
5858 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5860 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5864 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5868 r
= kvm_inject_smi(vcpu
);
5871 case KVM_SET_CPUID
: {
5872 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5873 struct kvm_cpuid cpuid
;
5876 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5878 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5881 case KVM_SET_CPUID2
: {
5882 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5883 struct kvm_cpuid2 cpuid
;
5886 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5888 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5889 cpuid_arg
->entries
);
5892 case KVM_GET_CPUID2
: {
5893 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5894 struct kvm_cpuid2 cpuid
;
5897 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5899 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5900 cpuid_arg
->entries
);
5904 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5909 case KVM_GET_MSRS
: {
5910 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5911 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5912 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5915 case KVM_SET_MSRS
: {
5916 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5917 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5918 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5921 case KVM_TPR_ACCESS_REPORTING
: {
5922 struct kvm_tpr_access_ctl tac
;
5925 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5927 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5931 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5936 case KVM_SET_VAPIC_ADDR
: {
5937 struct kvm_vapic_addr va
;
5941 if (!lapic_in_kernel(vcpu
))
5944 if (copy_from_user(&va
, argp
, sizeof(va
)))
5946 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5947 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5948 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5951 case KVM_X86_SETUP_MCE
: {
5955 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5957 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5960 case KVM_X86_SET_MCE
: {
5961 struct kvm_x86_mce mce
;
5964 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5966 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5969 case KVM_GET_VCPU_EVENTS
: {
5970 struct kvm_vcpu_events events
;
5972 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5975 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5980 case KVM_SET_VCPU_EVENTS
: {
5981 struct kvm_vcpu_events events
;
5984 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5987 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5990 case KVM_GET_DEBUGREGS
: {
5991 struct kvm_debugregs dbgregs
;
5993 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5996 if (copy_to_user(argp
, &dbgregs
,
5997 sizeof(struct kvm_debugregs
)))
6002 case KVM_SET_DEBUGREGS
: {
6003 struct kvm_debugregs dbgregs
;
6006 if (copy_from_user(&dbgregs
, argp
,
6007 sizeof(struct kvm_debugregs
)))
6010 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
6013 case KVM_GET_XSAVE
: {
6015 if (vcpu
->arch
.guest_fpu
.uabi_size
> sizeof(struct kvm_xsave
))
6018 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
6023 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
6026 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
6031 case KVM_SET_XSAVE
: {
6032 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
6034 u
.xsave
= memdup_user(argp
, size
);
6035 if (IS_ERR(u
.xsave
)) {
6036 r
= PTR_ERR(u
.xsave
);
6040 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
6044 case KVM_GET_XSAVE2
: {
6045 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
6047 u
.xsave
= kzalloc(size
, GFP_KERNEL_ACCOUNT
);
6052 kvm_vcpu_ioctl_x86_get_xsave2(vcpu
, u
.buffer
, size
);
6055 if (copy_to_user(argp
, u
.xsave
, size
))
6062 case KVM_GET_XCRS
: {
6063 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
6068 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
6071 if (copy_to_user(argp
, u
.xcrs
,
6072 sizeof(struct kvm_xcrs
)))
6077 case KVM_SET_XCRS
: {
6078 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
6079 if (IS_ERR(u
.xcrs
)) {
6080 r
= PTR_ERR(u
.xcrs
);
6084 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
6087 case KVM_SET_TSC_KHZ
: {
6091 user_tsc_khz
= (u32
)arg
;
6093 if (kvm_caps
.has_tsc_control
&&
6094 user_tsc_khz
>= kvm_caps
.max_guest_tsc_khz
)
6097 if (user_tsc_khz
== 0)
6098 user_tsc_khz
= tsc_khz
;
6100 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
6105 case KVM_GET_TSC_KHZ
: {
6106 r
= vcpu
->arch
.virtual_tsc_khz
;
6109 case KVM_KVMCLOCK_CTRL
: {
6110 r
= kvm_set_guest_paused(vcpu
);
6113 case KVM_ENABLE_CAP
: {
6114 struct kvm_enable_cap cap
;
6117 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
6119 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
6122 case KVM_GET_NESTED_STATE
: {
6123 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
6127 if (!kvm_x86_ops
.nested_ops
->get_state
)
6130 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
6132 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
6135 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
6140 if (r
> user_data_size
) {
6141 if (put_user(r
, &user_kvm_nested_state
->size
))
6151 case KVM_SET_NESTED_STATE
: {
6152 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
6153 struct kvm_nested_state kvm_state
;
6157 if (!kvm_x86_ops
.nested_ops
->set_state
)
6161 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
6165 if (kvm_state
.size
< sizeof(kvm_state
))
6168 if (kvm_state
.flags
&
6169 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
6170 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
6171 | KVM_STATE_NESTED_GIF_SET
))
6174 /* nested_run_pending implies guest_mode. */
6175 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
6176 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
6179 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6180 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
6181 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6184 #ifdef CONFIG_KVM_HYPERV
6185 case KVM_GET_SUPPORTED_HV_CPUID
:
6186 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
6189 #ifdef CONFIG_KVM_XEN
6190 case KVM_XEN_VCPU_GET_ATTR
: {
6191 struct kvm_xen_vcpu_attr xva
;
6194 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
6196 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
6197 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
6201 case KVM_XEN_VCPU_SET_ATTR
: {
6202 struct kvm_xen_vcpu_attr xva
;
6205 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
6207 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
6211 case KVM_GET_SREGS2
: {
6212 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
6216 __get_sregs2(vcpu
, u
.sregs2
);
6218 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
6223 case KVM_SET_SREGS2
: {
6224 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
6225 if (IS_ERR(u
.sregs2
)) {
6226 r
= PTR_ERR(u
.sregs2
);
6230 r
= __set_sregs2(vcpu
, u
.sregs2
);
6233 case KVM_HAS_DEVICE_ATTR
:
6234 case KVM_GET_DEVICE_ATTR
:
6235 case KVM_SET_DEVICE_ATTR
:
6236 r
= kvm_vcpu_ioctl_device_attr(vcpu
, ioctl
, argp
);
6248 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
6250 return VM_FAULT_SIGBUS
;
6253 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
6257 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
6259 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
6263 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
6266 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
6269 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
6270 unsigned long kvm_nr_mmu_pages
)
6272 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
6275 mutex_lock(&kvm
->slots_lock
);
6277 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
6278 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
6280 mutex_unlock(&kvm
->slots_lock
);
6284 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
6286 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
6290 switch (chip
->chip_id
) {
6291 case KVM_IRQCHIP_PIC_MASTER
:
6292 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
6293 sizeof(struct kvm_pic_state
));
6295 case KVM_IRQCHIP_PIC_SLAVE
:
6296 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
6297 sizeof(struct kvm_pic_state
));
6299 case KVM_IRQCHIP_IOAPIC
:
6300 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
6309 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
6311 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
6315 switch (chip
->chip_id
) {
6316 case KVM_IRQCHIP_PIC_MASTER
:
6317 spin_lock(&pic
->lock
);
6318 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
6319 sizeof(struct kvm_pic_state
));
6320 spin_unlock(&pic
->lock
);
6322 case KVM_IRQCHIP_PIC_SLAVE
:
6323 spin_lock(&pic
->lock
);
6324 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
6325 sizeof(struct kvm_pic_state
));
6326 spin_unlock(&pic
->lock
);
6328 case KVM_IRQCHIP_IOAPIC
:
6329 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
6335 kvm_pic_update_irq(pic
);
6339 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
6341 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
6343 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
6345 mutex_lock(&kps
->lock
);
6346 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
6347 mutex_unlock(&kps
->lock
);
6351 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
6354 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6356 mutex_lock(&pit
->pit_state
.lock
);
6357 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
6358 for (i
= 0; i
< 3; i
++)
6359 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
6360 mutex_unlock(&pit
->pit_state
.lock
);
6364 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
6366 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
6367 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
6368 sizeof(ps
->channels
));
6369 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
6370 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
6371 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
6375 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
6379 u32 prev_legacy
, cur_legacy
;
6380 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6382 mutex_lock(&pit
->pit_state
.lock
);
6383 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
6384 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
6385 if (!prev_legacy
&& cur_legacy
)
6387 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
6388 sizeof(pit
->pit_state
.channels
));
6389 pit
->pit_state
.flags
= ps
->flags
;
6390 for (i
= 0; i
< 3; i
++)
6391 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
6393 mutex_unlock(&pit
->pit_state
.lock
);
6397 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
6398 struct kvm_reinject_control
*control
)
6400 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6402 /* pit->pit_state.lock was overloaded to prevent userspace from getting
6403 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
6404 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
6406 mutex_lock(&pit
->pit_state
.lock
);
6407 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
6408 mutex_unlock(&pit
->pit_state
.lock
);
6413 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
6417 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
6418 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
6419 * on all VM-Exits, thus we only need to kick running vCPUs to force a
6422 struct kvm_vcpu
*vcpu
;
6425 if (!kvm_x86_ops
.cpu_dirty_log_size
)
6428 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6429 kvm_vcpu_kick(vcpu
);
6432 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
6435 if (!irqchip_in_kernel(kvm
))
6438 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
6439 irq_event
->irq
, irq_event
->level
,
6444 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
6445 struct kvm_enable_cap
*cap
)
6453 case KVM_CAP_DISABLE_QUIRKS2
:
6455 if (cap
->args
[0] & ~KVM_X86_VALID_QUIRKS
)
6458 case KVM_CAP_DISABLE_QUIRKS
:
6459 kvm
->arch
.disabled_quirks
= cap
->args
[0];
6462 case KVM_CAP_SPLIT_IRQCHIP
: {
6463 mutex_lock(&kvm
->lock
);
6465 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
6466 goto split_irqchip_unlock
;
6468 if (irqchip_in_kernel(kvm
))
6469 goto split_irqchip_unlock
;
6470 if (kvm
->created_vcpus
)
6471 goto split_irqchip_unlock
;
6472 r
= kvm_setup_empty_irq_routing(kvm
);
6474 goto split_irqchip_unlock
;
6475 /* Pairs with irqchip_in_kernel. */
6477 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
6478 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
6479 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
6481 split_irqchip_unlock
:
6482 mutex_unlock(&kvm
->lock
);
6485 case KVM_CAP_X2APIC_API
:
6487 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
6490 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
6491 kvm
->arch
.x2apic_format
= true;
6492 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
6493 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
6497 case KVM_CAP_X86_DISABLE_EXITS
:
6499 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
6502 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
6503 kvm
->arch
.pause_in_guest
= true;
6505 #define SMT_RSB_MSG "This processor is affected by the Cross-Thread Return Predictions vulnerability. " \
6506 "KVM_CAP_X86_DISABLE_EXITS should only be used with SMT disabled or trusted guests."
6508 if (!mitigate_smt_rsb
) {
6509 if (boot_cpu_has_bug(X86_BUG_SMT_RSB
) && cpu_smt_possible() &&
6510 (cap
->args
[0] & ~KVM_X86_DISABLE_EXITS_PAUSE
))
6511 pr_warn_once(SMT_RSB_MSG
);
6513 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
6514 kvm_can_mwait_in_guest())
6515 kvm
->arch
.mwait_in_guest
= true;
6516 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
6517 kvm
->arch
.hlt_in_guest
= true;
6518 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
6519 kvm
->arch
.cstate_in_guest
= true;
6524 case KVM_CAP_MSR_PLATFORM_INFO
:
6525 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
6528 case KVM_CAP_EXCEPTION_PAYLOAD
:
6529 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
6532 case KVM_CAP_X86_TRIPLE_FAULT_EVENT
:
6533 kvm
->arch
.triple_fault_event
= cap
->args
[0];
6536 case KVM_CAP_X86_USER_SPACE_MSR
:
6538 if (cap
->args
[0] & ~KVM_MSR_EXIT_REASON_VALID_MASK
)
6540 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
6543 case KVM_CAP_X86_BUS_LOCK_EXIT
:
6545 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
6548 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
6549 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
6552 if (kvm_caps
.has_bus_lock_exit
&&
6553 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
6554 kvm
->arch
.bus_lock_detection_enabled
= true;
6557 #ifdef CONFIG_X86_SGX_KVM
6558 case KVM_CAP_SGX_ATTRIBUTE
: {
6559 unsigned long allowed_attributes
= 0;
6561 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
6565 /* KVM only supports the PROVISIONKEY privileged attribute. */
6566 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
6567 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
6568 kvm
->arch
.sgx_provisioning_allowed
= true;
6574 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
6576 if (!kvm_x86_ops
.vm_copy_enc_context_from
)
6579 r
= static_call(kvm_x86_vm_copy_enc_context_from
)(kvm
, cap
->args
[0]);
6581 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
6583 if (!kvm_x86_ops
.vm_move_enc_context_from
)
6586 r
= static_call(kvm_x86_vm_move_enc_context_from
)(kvm
, cap
->args
[0]);
6588 case KVM_CAP_EXIT_HYPERCALL
:
6589 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
6593 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
6596 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
6598 if (cap
->args
[0] & ~1)
6600 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
6603 case KVM_CAP_PMU_CAPABILITY
:
6605 if (!enable_pmu
|| (cap
->args
[0] & ~KVM_CAP_PMU_VALID_MASK
))
6608 mutex_lock(&kvm
->lock
);
6609 if (!kvm
->created_vcpus
) {
6610 kvm
->arch
.enable_pmu
= !(cap
->args
[0] & KVM_PMU_CAP_DISABLE
);
6613 mutex_unlock(&kvm
->lock
);
6615 case KVM_CAP_MAX_VCPU_ID
:
6617 if (cap
->args
[0] > KVM_MAX_VCPU_IDS
)
6620 mutex_lock(&kvm
->lock
);
6621 if (kvm
->arch
.max_vcpu_ids
== cap
->args
[0]) {
6623 } else if (!kvm
->arch
.max_vcpu_ids
) {
6624 kvm
->arch
.max_vcpu_ids
= cap
->args
[0];
6627 mutex_unlock(&kvm
->lock
);
6629 case KVM_CAP_X86_NOTIFY_VMEXIT
:
6631 if ((u32
)cap
->args
[0] & ~KVM_X86_NOTIFY_VMEXIT_VALID_BITS
)
6633 if (!kvm_caps
.has_notify_vmexit
)
6635 if (!((u32
)cap
->args
[0] & KVM_X86_NOTIFY_VMEXIT_ENABLED
))
6637 mutex_lock(&kvm
->lock
);
6638 if (!kvm
->created_vcpus
) {
6639 kvm
->arch
.notify_window
= cap
->args
[0] >> 32;
6640 kvm
->arch
.notify_vmexit_flags
= (u32
)cap
->args
[0];
6643 mutex_unlock(&kvm
->lock
);
6645 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES
:
6649 * Since the risk of disabling NX hugepages is a guest crashing
6650 * the system, ensure the userspace process has permission to
6651 * reboot the system.
6653 * Note that unlike the reboot() syscall, the process must have
6654 * this capability in the root namespace because exposing
6655 * /dev/kvm into a container does not limit the scope of the
6656 * iTLB multihit bug to that container. In other words,
6657 * this must use capable(), not ns_capable().
6659 if (!capable(CAP_SYS_BOOT
)) {
6667 mutex_lock(&kvm
->lock
);
6668 if (!kvm
->created_vcpus
) {
6669 kvm
->arch
.disable_nx_huge_pages
= true;
6672 mutex_unlock(&kvm
->lock
);
6681 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
6683 struct kvm_x86_msr_filter
*msr_filter
;
6685 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
6689 msr_filter
->default_allow
= default_allow
;
6693 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
6700 for (i
= 0; i
< msr_filter
->count
; i
++)
6701 kfree(msr_filter
->ranges
[i
].bitmap
);
6706 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
6707 struct kvm_msr_filter_range
*user_range
)
6709 unsigned long *bitmap
;
6712 if (!user_range
->nmsrs
)
6715 if (user_range
->flags
& ~KVM_MSR_FILTER_RANGE_VALID_MASK
)
6718 if (!user_range
->flags
)
6721 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
6722 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
6725 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
6727 return PTR_ERR(bitmap
);
6729 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
6730 .flags
= user_range
->flags
,
6731 .base
= user_range
->base
,
6732 .nmsrs
= user_range
->nmsrs
,
6736 msr_filter
->count
++;
6740 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
,
6741 struct kvm_msr_filter
*filter
)
6743 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
6749 if (filter
->flags
& ~KVM_MSR_FILTER_VALID_MASK
)
6752 for (i
= 0; i
< ARRAY_SIZE(filter
->ranges
); i
++)
6753 empty
&= !filter
->ranges
[i
].nmsrs
;
6755 default_allow
= !(filter
->flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
6756 if (empty
&& !default_allow
)
6759 new_filter
= kvm_alloc_msr_filter(default_allow
);
6763 for (i
= 0; i
< ARRAY_SIZE(filter
->ranges
); i
++) {
6764 r
= kvm_add_msr_filter(new_filter
, &filter
->ranges
[i
]);
6766 kvm_free_msr_filter(new_filter
);
6771 mutex_lock(&kvm
->lock
);
6772 old_filter
= rcu_replace_pointer(kvm
->arch
.msr_filter
, new_filter
,
6773 mutex_is_locked(&kvm
->lock
));
6774 mutex_unlock(&kvm
->lock
);
6775 synchronize_srcu(&kvm
->srcu
);
6777 kvm_free_msr_filter(old_filter
);
6779 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
6784 #ifdef CONFIG_KVM_COMPAT
6785 /* for KVM_X86_SET_MSR_FILTER */
6786 struct kvm_msr_filter_range_compat
{
6793 struct kvm_msr_filter_compat
{
6795 struct kvm_msr_filter_range_compat ranges
[KVM_MSR_FILTER_MAX_RANGES
];
6798 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
6800 long kvm_arch_vm_compat_ioctl(struct file
*filp
, unsigned int ioctl
,
6803 void __user
*argp
= (void __user
*)arg
;
6804 struct kvm
*kvm
= filp
->private_data
;
6808 case KVM_X86_SET_MSR_FILTER_COMPAT
: {
6809 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
6810 struct kvm_msr_filter_compat filter_compat
;
6811 struct kvm_msr_filter filter
;
6814 if (copy_from_user(&filter_compat
, user_msr_filter
,
6815 sizeof(filter_compat
)))
6818 filter
.flags
= filter_compat
.flags
;
6819 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
6820 struct kvm_msr_filter_range_compat
*cr
;
6822 cr
= &filter_compat
.ranges
[i
];
6823 filter
.ranges
[i
] = (struct kvm_msr_filter_range
) {
6827 .bitmap
= (__u8
*)(ulong
)cr
->bitmap
,
6831 r
= kvm_vm_ioctl_set_msr_filter(kvm
, &filter
);
6840 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6841 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
6843 struct kvm_vcpu
*vcpu
;
6847 mutex_lock(&kvm
->lock
);
6848 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6849 if (!vcpu
->arch
.pv_time
.active
)
6852 ret
= kvm_set_guest_paused(vcpu
);
6854 kvm_err("Failed to pause guest VCPU%d: %d\n",
6855 vcpu
->vcpu_id
, ret
);
6859 mutex_unlock(&kvm
->lock
);
6861 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
6864 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
6867 case PM_HIBERNATION_PREPARE
:
6868 case PM_SUSPEND_PREPARE
:
6869 return kvm_arch_suspend_notifier(kvm
);
6874 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6876 static int kvm_vm_ioctl_get_clock(struct kvm
*kvm
, void __user
*argp
)
6878 struct kvm_clock_data data
= { 0 };
6880 get_kvmclock(kvm
, &data
);
6881 if (copy_to_user(argp
, &data
, sizeof(data
)))
6887 static int kvm_vm_ioctl_set_clock(struct kvm
*kvm
, void __user
*argp
)
6889 struct kvm_arch
*ka
= &kvm
->arch
;
6890 struct kvm_clock_data data
;
6893 if (copy_from_user(&data
, argp
, sizeof(data
)))
6897 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6898 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6900 if (data
.flags
& ~KVM_CLOCK_VALID_FLAGS
)
6903 kvm_hv_request_tsc_page_update(kvm
);
6904 kvm_start_pvclock_update(kvm
);
6905 pvclock_update_vm_gtod_copy(kvm
);
6908 * This pairs with kvm_guest_time_update(): when masterclock is
6909 * in use, we use master_kernel_ns + kvmclock_offset to set
6910 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6911 * is slightly ahead) here we risk going negative on unsigned
6912 * 'system_time' when 'data.clock' is very small.
6914 if (data
.flags
& KVM_CLOCK_REALTIME
) {
6915 u64 now_real_ns
= ktime_get_real_ns();
6918 * Avoid stepping the kvmclock backwards.
6920 if (now_real_ns
> data
.realtime
)
6921 data
.clock
+= now_real_ns
- data
.realtime
;
6924 if (ka
->use_master_clock
)
6925 now_raw_ns
= ka
->master_kernel_ns
;
6927 now_raw_ns
= get_kvmclock_base_ns();
6928 ka
->kvmclock_offset
= data
.clock
- now_raw_ns
;
6929 kvm_end_pvclock_update(kvm
);
6933 int kvm_arch_vm_ioctl(struct file
*filp
, unsigned int ioctl
, unsigned long arg
)
6935 struct kvm
*kvm
= filp
->private_data
;
6936 void __user
*argp
= (void __user
*)arg
;
6939 * This union makes it completely explicit to gcc-3.x
6940 * that these two variables' stack usage should be
6941 * combined, not added together.
6944 struct kvm_pit_state ps
;
6945 struct kvm_pit_state2 ps2
;
6946 struct kvm_pit_config pit_config
;
6950 case KVM_SET_TSS_ADDR
:
6951 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
6953 case KVM_SET_IDENTITY_MAP_ADDR
: {
6956 mutex_lock(&kvm
->lock
);
6958 if (kvm
->created_vcpus
)
6959 goto set_identity_unlock
;
6961 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
6962 goto set_identity_unlock
;
6963 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
6964 set_identity_unlock
:
6965 mutex_unlock(&kvm
->lock
);
6968 case KVM_SET_NR_MMU_PAGES
:
6969 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
6971 case KVM_CREATE_IRQCHIP
: {
6972 mutex_lock(&kvm
->lock
);
6975 if (irqchip_in_kernel(kvm
))
6976 goto create_irqchip_unlock
;
6979 if (kvm
->created_vcpus
)
6980 goto create_irqchip_unlock
;
6982 r
= kvm_pic_init(kvm
);
6984 goto create_irqchip_unlock
;
6986 r
= kvm_ioapic_init(kvm
);
6988 kvm_pic_destroy(kvm
);
6989 goto create_irqchip_unlock
;
6992 r
= kvm_setup_default_irq_routing(kvm
);
6994 kvm_ioapic_destroy(kvm
);
6995 kvm_pic_destroy(kvm
);
6996 goto create_irqchip_unlock
;
6998 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
7000 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
7001 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
7002 create_irqchip_unlock
:
7003 mutex_unlock(&kvm
->lock
);
7006 case KVM_CREATE_PIT
:
7007 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
7009 case KVM_CREATE_PIT2
:
7011 if (copy_from_user(&u
.pit_config
, argp
,
7012 sizeof(struct kvm_pit_config
)))
7015 mutex_lock(&kvm
->lock
);
7018 goto create_pit_unlock
;
7020 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
7024 mutex_unlock(&kvm
->lock
);
7026 case KVM_GET_IRQCHIP
: {
7027 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
7028 struct kvm_irqchip
*chip
;
7030 chip
= memdup_user(argp
, sizeof(*chip
));
7037 if (!irqchip_kernel(kvm
))
7038 goto get_irqchip_out
;
7039 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
7041 goto get_irqchip_out
;
7043 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
7044 goto get_irqchip_out
;
7050 case KVM_SET_IRQCHIP
: {
7051 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
7052 struct kvm_irqchip
*chip
;
7054 chip
= memdup_user(argp
, sizeof(*chip
));
7061 if (!irqchip_kernel(kvm
))
7062 goto set_irqchip_out
;
7063 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
7070 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
7073 if (!kvm
->arch
.vpit
)
7075 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
7079 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
7086 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
7088 mutex_lock(&kvm
->lock
);
7090 if (!kvm
->arch
.vpit
)
7092 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
7094 mutex_unlock(&kvm
->lock
);
7097 case KVM_GET_PIT2
: {
7099 if (!kvm
->arch
.vpit
)
7101 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
7105 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
7110 case KVM_SET_PIT2
: {
7112 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
7114 mutex_lock(&kvm
->lock
);
7116 if (!kvm
->arch
.vpit
)
7118 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
7120 mutex_unlock(&kvm
->lock
);
7123 case KVM_REINJECT_CONTROL
: {
7124 struct kvm_reinject_control control
;
7126 if (copy_from_user(&control
, argp
, sizeof(control
)))
7129 if (!kvm
->arch
.vpit
)
7131 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
7134 case KVM_SET_BOOT_CPU_ID
:
7136 mutex_lock(&kvm
->lock
);
7137 if (kvm
->created_vcpus
)
7140 kvm
->arch
.bsp_vcpu_id
= arg
;
7141 mutex_unlock(&kvm
->lock
);
7143 #ifdef CONFIG_KVM_XEN
7144 case KVM_XEN_HVM_CONFIG
: {
7145 struct kvm_xen_hvm_config xhc
;
7147 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
7149 r
= kvm_xen_hvm_config(kvm
, &xhc
);
7152 case KVM_XEN_HVM_GET_ATTR
: {
7153 struct kvm_xen_hvm_attr xha
;
7156 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
7158 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
7159 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
7163 case KVM_XEN_HVM_SET_ATTR
: {
7164 struct kvm_xen_hvm_attr xha
;
7167 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
7169 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
7172 case KVM_XEN_HVM_EVTCHN_SEND
: {
7173 struct kvm_irq_routing_xen_evtchn uxe
;
7176 if (copy_from_user(&uxe
, argp
, sizeof(uxe
)))
7178 r
= kvm_xen_hvm_evtchn_send(kvm
, &uxe
);
7183 r
= kvm_vm_ioctl_set_clock(kvm
, argp
);
7186 r
= kvm_vm_ioctl_get_clock(kvm
, argp
);
7188 case KVM_SET_TSC_KHZ
: {
7192 user_tsc_khz
= (u32
)arg
;
7194 if (kvm_caps
.has_tsc_control
&&
7195 user_tsc_khz
>= kvm_caps
.max_guest_tsc_khz
)
7198 if (user_tsc_khz
== 0)
7199 user_tsc_khz
= tsc_khz
;
7201 WRITE_ONCE(kvm
->arch
.default_tsc_khz
, user_tsc_khz
);
7206 case KVM_GET_TSC_KHZ
: {
7207 r
= READ_ONCE(kvm
->arch
.default_tsc_khz
);
7210 case KVM_MEMORY_ENCRYPT_OP
: {
7212 if (!kvm_x86_ops
.mem_enc_ioctl
)
7215 r
= static_call(kvm_x86_mem_enc_ioctl
)(kvm
, argp
);
7218 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
7219 struct kvm_enc_region region
;
7222 if (copy_from_user(®ion
, argp
, sizeof(region
)))
7226 if (!kvm_x86_ops
.mem_enc_register_region
)
7229 r
= static_call(kvm_x86_mem_enc_register_region
)(kvm
, ®ion
);
7232 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
7233 struct kvm_enc_region region
;
7236 if (copy_from_user(®ion
, argp
, sizeof(region
)))
7240 if (!kvm_x86_ops
.mem_enc_unregister_region
)
7243 r
= static_call(kvm_x86_mem_enc_unregister_region
)(kvm
, ®ion
);
7246 #ifdef CONFIG_KVM_HYPERV
7247 case KVM_HYPERV_EVENTFD
: {
7248 struct kvm_hyperv_eventfd hvevfd
;
7251 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
7253 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
7257 case KVM_SET_PMU_EVENT_FILTER
:
7258 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
7260 case KVM_X86_SET_MSR_FILTER
: {
7261 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
7262 struct kvm_msr_filter filter
;
7264 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
7267 r
= kvm_vm_ioctl_set_msr_filter(kvm
, &filter
);
7277 static void kvm_probe_feature_msr(u32 msr_index
)
7279 struct kvm_msr_entry msr
= {
7283 if (kvm_get_msr_feature(&msr
))
7286 msr_based_features
[num_msr_based_features
++] = msr_index
;
7289 static void kvm_probe_msr_to_save(u32 msr_index
)
7293 if (rdmsr_safe(msr_index
, &dummy
[0], &dummy
[1]))
7297 * Even MSRs that are valid in the host may not be exposed to guests in
7300 switch (msr_index
) {
7301 case MSR_IA32_BNDCFGS
:
7302 if (!kvm_mpx_supported())
7306 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
7307 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
7310 case MSR_IA32_UMWAIT_CONTROL
:
7311 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
7314 case MSR_IA32_RTIT_CTL
:
7315 case MSR_IA32_RTIT_STATUS
:
7316 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
7319 case MSR_IA32_RTIT_CR3_MATCH
:
7320 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7321 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
7324 case MSR_IA32_RTIT_OUTPUT_BASE
:
7325 case MSR_IA32_RTIT_OUTPUT_MASK
:
7326 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7327 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
7328 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
7331 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
7332 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7333 (msr_index
- MSR_IA32_RTIT_ADDR0_A
>=
7334 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2))
7337 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR_MAX
:
7338 if (msr_index
- MSR_ARCH_PERFMON_PERFCTR0
>=
7339 kvm_pmu_cap
.num_counters_gp
)
7342 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL_MAX
:
7343 if (msr_index
- MSR_ARCH_PERFMON_EVENTSEL0
>=
7344 kvm_pmu_cap
.num_counters_gp
)
7347 case MSR_ARCH_PERFMON_FIXED_CTR0
... MSR_ARCH_PERFMON_FIXED_CTR_MAX
:
7348 if (msr_index
- MSR_ARCH_PERFMON_FIXED_CTR0
>=
7349 kvm_pmu_cap
.num_counters_fixed
)
7352 case MSR_AMD64_PERF_CNTR_GLOBAL_CTL
:
7353 case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS
:
7354 case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR
:
7355 if (!kvm_cpu_cap_has(X86_FEATURE_PERFMON_V2
))
7359 case MSR_IA32_XFD_ERR
:
7360 if (!kvm_cpu_cap_has(X86_FEATURE_XFD
))
7363 case MSR_IA32_TSX_CTRL
:
7364 if (!(kvm_get_arch_capabilities() & ARCH_CAP_TSX_CTRL_MSR
))
7371 msrs_to_save
[num_msrs_to_save
++] = msr_index
;
7374 static void kvm_init_msr_lists(void)
7378 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED
!= 3,
7379 "Please update the fixed PMCs in msrs_to_save_pmu[]");
7381 num_msrs_to_save
= 0;
7382 num_emulated_msrs
= 0;
7383 num_msr_based_features
= 0;
7385 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_base
); i
++)
7386 kvm_probe_msr_to_save(msrs_to_save_base
[i
]);
7389 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_pmu
); i
++)
7390 kvm_probe_msr_to_save(msrs_to_save_pmu
[i
]);
7393 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
7394 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
7397 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
7400 for (i
= KVM_FIRST_EMULATED_VMX_MSR
; i
<= KVM_LAST_EMULATED_VMX_MSR
; i
++)
7401 kvm_probe_feature_msr(i
);
7403 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all_except_vmx
); i
++)
7404 kvm_probe_feature_msr(msr_based_features_all_except_vmx
[i
]);
7407 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
7415 if (!(lapic_in_kernel(vcpu
) &&
7416 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
7417 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
7428 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
7435 if (!(lapic_in_kernel(vcpu
) &&
7436 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
7438 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
7440 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
7450 void kvm_set_segment(struct kvm_vcpu
*vcpu
,
7451 struct kvm_segment
*var
, int seg
)
7453 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
7456 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
7457 struct kvm_segment
*var
, int seg
)
7459 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
7462 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u64 access
,
7463 struct x86_exception
*exception
)
7465 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
7468 BUG_ON(!mmu_is_nested(vcpu
));
7470 /* NPT walks are always user-walks */
7471 access
|= PFERR_USER_MASK
;
7472 t_gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gpa
, access
, exception
);
7477 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
7478 struct x86_exception
*exception
)
7480 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7482 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7483 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7485 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
7487 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
7488 struct x86_exception
*exception
)
7490 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7492 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7493 access
|= PFERR_WRITE_MASK
;
7494 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7496 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
7498 /* uses this to access any guest's mapped memory without checking CPL */
7499 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
7500 struct x86_exception
*exception
)
7502 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7504 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, 0, exception
);
7507 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
7508 struct kvm_vcpu
*vcpu
, u64 access
,
7509 struct x86_exception
*exception
)
7511 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7513 int r
= X86EMUL_CONTINUE
;
7516 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
7517 unsigned offset
= addr
& (PAGE_SIZE
-1);
7518 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
7521 if (gpa
== INVALID_GPA
)
7522 return X86EMUL_PROPAGATE_FAULT
;
7523 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
7526 r
= X86EMUL_IO_NEEDED
;
7538 /* used for instruction fetching */
7539 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
7540 gva_t addr
, void *val
, unsigned int bytes
,
7541 struct x86_exception
*exception
)
7543 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7544 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7545 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7549 /* Inline kvm_read_guest_virt_helper for speed. */
7550 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
|PFERR_FETCH_MASK
,
7552 if (unlikely(gpa
== INVALID_GPA
))
7553 return X86EMUL_PROPAGATE_FAULT
;
7555 offset
= addr
& (PAGE_SIZE
-1);
7556 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
7557 bytes
= (unsigned)PAGE_SIZE
- offset
;
7558 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
7560 if (unlikely(ret
< 0))
7561 return X86EMUL_IO_NEEDED
;
7563 return X86EMUL_CONTINUE
;
7566 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
7567 gva_t addr
, void *val
, unsigned int bytes
,
7568 struct x86_exception
*exception
)
7570 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7573 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
7574 * is returned, but our callers are not ready for that and they blindly
7575 * call kvm_inject_page_fault. Ensure that they at least do not leak
7576 * uninitialized kernel stack memory into cr2 and error code.
7578 memset(exception
, 0, sizeof(*exception
));
7579 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
7582 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
7584 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
7585 gva_t addr
, void *val
, unsigned int bytes
,
7586 struct x86_exception
*exception
, bool system
)
7588 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7592 access
|= PFERR_IMPLICIT_ACCESS
;
7593 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7594 access
|= PFERR_USER_MASK
;
7596 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
7599 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
7600 struct kvm_vcpu
*vcpu
, u64 access
,
7601 struct x86_exception
*exception
)
7603 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7605 int r
= X86EMUL_CONTINUE
;
7608 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
7609 unsigned offset
= addr
& (PAGE_SIZE
-1);
7610 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
7613 if (gpa
== INVALID_GPA
)
7614 return X86EMUL_PROPAGATE_FAULT
;
7615 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
7617 r
= X86EMUL_IO_NEEDED
;
7629 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
7630 unsigned int bytes
, struct x86_exception
*exception
,
7633 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7634 u64 access
= PFERR_WRITE_MASK
;
7637 access
|= PFERR_IMPLICIT_ACCESS
;
7638 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7639 access
|= PFERR_USER_MASK
;
7641 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7645 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
7646 unsigned int bytes
, struct x86_exception
*exception
)
7648 /* kvm_write_guest_virt_system can pull in tons of pages. */
7649 vcpu
->arch
.l1tf_flush_l1d
= true;
7651 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7652 PFERR_WRITE_MASK
, exception
);
7654 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
7656 static int kvm_check_emulate_insn(struct kvm_vcpu
*vcpu
, int emul_type
,
7657 void *insn
, int insn_len
)
7659 return static_call(kvm_x86_check_emulate_instruction
)(vcpu
, emul_type
,
7663 int handle_ud(struct kvm_vcpu
*vcpu
)
7665 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
7666 int fep_flags
= READ_ONCE(force_emulation_prefix
);
7667 int emul_type
= EMULTYPE_TRAP_UD
;
7668 char sig
[5]; /* ud2; .ascii "kvm" */
7669 struct x86_exception e
;
7672 r
= kvm_check_emulate_insn(vcpu
, emul_type
, NULL
, 0);
7673 if (r
!= X86EMUL_CONTINUE
)
7677 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
7678 sig
, sizeof(sig
), &e
) == 0 &&
7679 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
7680 if (fep_flags
& KVM_FEP_CLEAR_RFLAGS_RF
)
7681 kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) & ~X86_EFLAGS_RF
);
7682 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
7683 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
7686 return kvm_emulate_instruction(vcpu
, emul_type
);
7688 EXPORT_SYMBOL_GPL(handle_ud
);
7690 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7691 gpa_t gpa
, bool write
)
7693 /* For APIC access vmexit */
7694 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7697 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
7698 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
7705 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7706 gpa_t
*gpa
, struct x86_exception
*exception
,
7709 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7710 u64 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
7711 | (write
? PFERR_WRITE_MASK
: 0);
7714 * currently PKRU is only applied to ept enabled guest so
7715 * there is no pkey in EPT page table for L1 guest or EPT
7716 * shadow page table for L2 guest.
7718 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
7719 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
7720 vcpu
->arch
.mmio_access
, 0, access
))) {
7721 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
7722 (gva
& (PAGE_SIZE
- 1));
7723 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
7727 *gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7729 if (*gpa
== INVALID_GPA
)
7732 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
7735 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7736 const void *val
, int bytes
)
7740 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
7743 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
7747 struct read_write_emulator_ops
{
7748 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
7750 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7751 void *val
, int bytes
);
7752 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7753 int bytes
, void *val
);
7754 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7755 void *val
, int bytes
);
7759 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
7761 if (vcpu
->mmio_read_completed
) {
7762 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
7763 vcpu
->mmio_fragments
[0].gpa
, val
);
7764 vcpu
->mmio_read_completed
= 0;
7771 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7772 void *val
, int bytes
)
7774 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
7777 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7778 void *val
, int bytes
)
7780 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
7783 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
7785 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
7786 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
7789 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7790 void *val
, int bytes
)
7792 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
7793 return X86EMUL_IO_NEEDED
;
7796 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7797 void *val
, int bytes
)
7799 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
7801 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7802 return X86EMUL_CONTINUE
;
7805 static const struct read_write_emulator_ops read_emultor
= {
7806 .read_write_prepare
= read_prepare
,
7807 .read_write_emulate
= read_emulate
,
7808 .read_write_mmio
= vcpu_mmio_read
,
7809 .read_write_exit_mmio
= read_exit_mmio
,
7812 static const struct read_write_emulator_ops write_emultor
= {
7813 .read_write_emulate
= write_emulate
,
7814 .read_write_mmio
= write_mmio
,
7815 .read_write_exit_mmio
= write_exit_mmio
,
7819 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
7821 struct x86_exception
*exception
,
7822 struct kvm_vcpu
*vcpu
,
7823 const struct read_write_emulator_ops
*ops
)
7827 bool write
= ops
->write
;
7828 struct kvm_mmio_fragment
*frag
;
7829 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7832 * If the exit was due to a NPF we may already have a GPA.
7833 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7834 * Note, this cannot be used on string operations since string
7835 * operation using rep will only have the initial GPA from the NPF
7838 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
7839 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
7840 gpa
= ctxt
->gpa_val
;
7841 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
7843 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
7845 return X86EMUL_PROPAGATE_FAULT
;
7848 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
7849 return X86EMUL_CONTINUE
;
7852 * Is this MMIO handled locally?
7854 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
7855 if (handled
== bytes
)
7856 return X86EMUL_CONTINUE
;
7862 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
7863 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
7867 return X86EMUL_CONTINUE
;
7870 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
7872 void *val
, unsigned int bytes
,
7873 struct x86_exception
*exception
,
7874 const struct read_write_emulator_ops
*ops
)
7876 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7880 if (ops
->read_write_prepare
&&
7881 ops
->read_write_prepare(vcpu
, val
, bytes
))
7882 return X86EMUL_CONTINUE
;
7884 vcpu
->mmio_nr_fragments
= 0;
7886 /* Crossing a page boundary? */
7887 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
7890 now
= -addr
& ~PAGE_MASK
;
7891 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
7894 if (rc
!= X86EMUL_CONTINUE
)
7897 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
7903 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
7905 if (rc
!= X86EMUL_CONTINUE
)
7908 if (!vcpu
->mmio_nr_fragments
)
7911 gpa
= vcpu
->mmio_fragments
[0].gpa
;
7913 vcpu
->mmio_needed
= 1;
7914 vcpu
->mmio_cur_fragment
= 0;
7916 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
7917 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
7918 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
7919 vcpu
->run
->mmio
.phys_addr
= gpa
;
7921 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
7924 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
7928 struct x86_exception
*exception
)
7930 return emulator_read_write(ctxt
, addr
, val
, bytes
,
7931 exception
, &read_emultor
);
7934 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
7938 struct x86_exception
*exception
)
7940 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
7941 exception
, &write_emultor
);
7944 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7945 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7947 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
7952 struct x86_exception
*exception
)
7954 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7960 /* guests cmpxchg8b have to be emulated atomically */
7961 if (bytes
> 8 || (bytes
& (bytes
- 1)))
7964 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
7966 if (gpa
== INVALID_GPA
||
7967 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7971 * Emulate the atomic as a straight write to avoid #AC if SLD is
7972 * enabled in the host and the access splits a cache line.
7974 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
7975 page_line_mask
= ~(cache_line_size() - 1);
7977 page_line_mask
= PAGE_MASK
;
7979 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
7982 hva
= kvm_vcpu_gfn_to_hva(vcpu
, gpa_to_gfn(gpa
));
7983 if (kvm_is_error_hva(hva
))
7986 hva
+= offset_in_page(gpa
);
7990 r
= emulator_try_cmpxchg_user(u8
, hva
, old
, new);
7993 r
= emulator_try_cmpxchg_user(u16
, hva
, old
, new);
7996 r
= emulator_try_cmpxchg_user(u32
, hva
, old
, new);
7999 r
= emulator_try_cmpxchg_user(u64
, hva
, old
, new);
8006 return X86EMUL_UNHANDLEABLE
;
8008 return X86EMUL_CMPXCHG_FAILED
;
8010 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
8012 return X86EMUL_CONTINUE
;
8015 pr_warn_once("emulating exchange as write\n");
8017 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
8020 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
8021 unsigned short port
, void *data
,
8022 unsigned int count
, bool in
)
8027 WARN_ON_ONCE(vcpu
->arch
.pio
.count
);
8028 for (i
= 0; i
< count
; i
++) {
8030 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, port
, size
, data
);
8032 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
, port
, size
, data
);
8039 * Userspace must have unregistered the device while PIO
8040 * was running. Drop writes / read as 0.
8043 memset(data
, 0, size
* (count
- i
));
8052 vcpu
->arch
.pio
.port
= port
;
8053 vcpu
->arch
.pio
.in
= in
;
8054 vcpu
->arch
.pio
.count
= count
;
8055 vcpu
->arch
.pio
.size
= size
;
8058 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
8060 memcpy(vcpu
->arch
.pio_data
, data
, size
* count
);
8062 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
8063 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
8064 vcpu
->run
->io
.size
= size
;
8065 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
8066 vcpu
->run
->io
.count
= count
;
8067 vcpu
->run
->io
.port
= port
;
8071 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8072 unsigned short port
, void *val
, unsigned int count
)
8074 int r
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
8076 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, val
);
8081 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
8083 int size
= vcpu
->arch
.pio
.size
;
8084 unsigned int count
= vcpu
->arch
.pio
.count
;
8085 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
8086 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
8087 vcpu
->arch
.pio
.count
= 0;
8090 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
8091 int size
, unsigned short port
, void *val
,
8094 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8095 if (vcpu
->arch
.pio
.count
) {
8097 * Complete a previous iteration that required userspace I/O.
8098 * Note, @count isn't guaranteed to match pio.count as userspace
8099 * can modify ECX before rerunning the vCPU. Ignore any such
8100 * shenanigans as KVM doesn't support modifying the rep count,
8101 * and the emulator ensures @count doesn't overflow the buffer.
8103 complete_emulator_pio_in(vcpu
, val
);
8107 return emulator_pio_in(vcpu
, size
, port
, val
, count
);
8110 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8111 unsigned short port
, const void *val
,
8114 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, val
);
8115 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
8118 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
8119 int size
, unsigned short port
,
8120 const void *val
, unsigned int count
)
8122 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
8125 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
8127 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
8130 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
8132 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
8135 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
8137 if (!need_emulate_wbinvd(vcpu
))
8138 return X86EMUL_CONTINUE
;
8140 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
8141 int cpu
= get_cpu();
8143 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
8144 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
8145 wbinvd_ipi
, NULL
, 1);
8147 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
8150 return X86EMUL_CONTINUE
;
8153 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
8155 kvm_emulate_wbinvd_noskip(vcpu
);
8156 return kvm_skip_emulated_instruction(vcpu
);
8158 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
8162 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
8164 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
8167 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
8168 unsigned long *dest
)
8170 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
8173 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
8174 unsigned long value
)
8177 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
8180 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
8182 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
8185 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
8187 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8188 unsigned long value
;
8192 value
= kvm_read_cr0(vcpu
);
8195 value
= vcpu
->arch
.cr2
;
8198 value
= kvm_read_cr3(vcpu
);
8201 value
= kvm_read_cr4(vcpu
);
8204 value
= kvm_get_cr8(vcpu
);
8207 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
8214 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
8216 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8221 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
8224 vcpu
->arch
.cr2
= val
;
8227 res
= kvm_set_cr3(vcpu
, val
);
8230 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
8233 res
= kvm_set_cr8(vcpu
, val
);
8236 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
8243 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
8245 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
8248 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8250 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
8253 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8255 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
8258 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8260 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
8263 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8265 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
8268 static unsigned long emulator_get_cached_segment_base(
8269 struct x86_emulate_ctxt
*ctxt
, int seg
)
8271 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
8274 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
8275 struct desc_struct
*desc
, u32
*base3
,
8278 struct kvm_segment var
;
8280 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
8281 *selector
= var
.selector
;
8284 memset(desc
, 0, sizeof(*desc
));
8292 set_desc_limit(desc
, var
.limit
);
8293 set_desc_base(desc
, (unsigned long)var
.base
);
8294 #ifdef CONFIG_X86_64
8296 *base3
= var
.base
>> 32;
8298 desc
->type
= var
.type
;
8300 desc
->dpl
= var
.dpl
;
8301 desc
->p
= var
.present
;
8302 desc
->avl
= var
.avl
;
8310 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
8311 struct desc_struct
*desc
, u32 base3
,
8314 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8315 struct kvm_segment var
;
8317 var
.selector
= selector
;
8318 var
.base
= get_desc_base(desc
);
8319 #ifdef CONFIG_X86_64
8320 var
.base
|= ((u64
)base3
) << 32;
8322 var
.limit
= get_desc_limit(desc
);
8324 var
.limit
= (var
.limit
<< 12) | 0xfff;
8325 var
.type
= desc
->type
;
8326 var
.dpl
= desc
->dpl
;
8331 var
.avl
= desc
->avl
;
8332 var
.present
= desc
->p
;
8333 var
.unusable
= !var
.present
;
8336 kvm_set_segment(vcpu
, &var
, seg
);
8340 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
8341 u32 msr_index
, u64
*pdata
)
8343 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8346 r
= kvm_get_msr_with_filter(vcpu
, msr_index
, pdata
);
8348 return X86EMUL_UNHANDLEABLE
;
8351 if (kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_RDMSR
, 0,
8352 complete_emulated_rdmsr
, r
))
8353 return X86EMUL_IO_NEEDED
;
8355 trace_kvm_msr_read_ex(msr_index
);
8356 return X86EMUL_PROPAGATE_FAULT
;
8359 trace_kvm_msr_read(msr_index
, *pdata
);
8360 return X86EMUL_CONTINUE
;
8363 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
8364 u32 msr_index
, u64 data
)
8366 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8369 r
= kvm_set_msr_with_filter(vcpu
, msr_index
, data
);
8371 return X86EMUL_UNHANDLEABLE
;
8374 if (kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_WRMSR
, data
,
8375 complete_emulated_msr_access
, r
))
8376 return X86EMUL_IO_NEEDED
;
8378 trace_kvm_msr_write_ex(msr_index
, data
);
8379 return X86EMUL_PROPAGATE_FAULT
;
8382 trace_kvm_msr_write(msr_index
, data
);
8383 return X86EMUL_CONTINUE
;
8386 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
8387 u32 msr_index
, u64
*pdata
)
8389 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
8392 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
8395 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
))
8400 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
8401 u32 pmc
, u64
*pdata
)
8403 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
8406 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
8408 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
8411 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
8412 struct x86_instruction_info
*info
,
8413 enum x86_intercept_stage stage
)
8415 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
8419 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
8420 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
8423 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
8426 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
8428 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
8431 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
8433 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
8436 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt
*ctxt
)
8438 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_RDPID
);
8441 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
8443 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
8446 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
8448 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
8451 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
8453 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
8456 static bool emulator_is_smm(struct x86_emulate_ctxt
*ctxt
)
8458 return is_smm(emul_to_vcpu(ctxt
));
8461 static bool emulator_is_guest_mode(struct x86_emulate_ctxt
*ctxt
)
8463 return is_guest_mode(emul_to_vcpu(ctxt
));
8466 #ifndef CONFIG_KVM_SMM
8467 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
)
8470 return X86EMUL_UNHANDLEABLE
;
8474 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
8476 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
8479 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
8481 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
8484 static void emulator_vm_bugged(struct x86_emulate_ctxt
*ctxt
)
8486 struct kvm
*kvm
= emul_to_vcpu(ctxt
)->kvm
;
8488 if (!kvm
->vm_bugged
)
8492 static gva_t
emulator_get_untagged_addr(struct x86_emulate_ctxt
*ctxt
,
8493 gva_t addr
, unsigned int flags
)
8495 if (!kvm_x86_ops
.get_untagged_addr
)
8498 return static_call(kvm_x86_get_untagged_addr
)(emul_to_vcpu(ctxt
), addr
, flags
);
8501 static const struct x86_emulate_ops emulate_ops
= {
8502 .vm_bugged
= emulator_vm_bugged
,
8503 .read_gpr
= emulator_read_gpr
,
8504 .write_gpr
= emulator_write_gpr
,
8505 .read_std
= emulator_read_std
,
8506 .write_std
= emulator_write_std
,
8507 .fetch
= kvm_fetch_guest_virt
,
8508 .read_emulated
= emulator_read_emulated
,
8509 .write_emulated
= emulator_write_emulated
,
8510 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
8511 .invlpg
= emulator_invlpg
,
8512 .pio_in_emulated
= emulator_pio_in_emulated
,
8513 .pio_out_emulated
= emulator_pio_out_emulated
,
8514 .get_segment
= emulator_get_segment
,
8515 .set_segment
= emulator_set_segment
,
8516 .get_cached_segment_base
= emulator_get_cached_segment_base
,
8517 .get_gdt
= emulator_get_gdt
,
8518 .get_idt
= emulator_get_idt
,
8519 .set_gdt
= emulator_set_gdt
,
8520 .set_idt
= emulator_set_idt
,
8521 .get_cr
= emulator_get_cr
,
8522 .set_cr
= emulator_set_cr
,
8523 .cpl
= emulator_get_cpl
,
8524 .get_dr
= emulator_get_dr
,
8525 .set_dr
= emulator_set_dr
,
8526 .set_msr_with_filter
= emulator_set_msr_with_filter
,
8527 .get_msr_with_filter
= emulator_get_msr_with_filter
,
8528 .get_msr
= emulator_get_msr
,
8529 .check_pmc
= emulator_check_pmc
,
8530 .read_pmc
= emulator_read_pmc
,
8531 .halt
= emulator_halt
,
8532 .wbinvd
= emulator_wbinvd
,
8533 .fix_hypercall
= emulator_fix_hypercall
,
8534 .intercept
= emulator_intercept
,
8535 .get_cpuid
= emulator_get_cpuid
,
8536 .guest_has_movbe
= emulator_guest_has_movbe
,
8537 .guest_has_fxsr
= emulator_guest_has_fxsr
,
8538 .guest_has_rdpid
= emulator_guest_has_rdpid
,
8539 .set_nmi_mask
= emulator_set_nmi_mask
,
8540 .is_smm
= emulator_is_smm
,
8541 .is_guest_mode
= emulator_is_guest_mode
,
8542 .leave_smm
= emulator_leave_smm
,
8543 .triple_fault
= emulator_triple_fault
,
8544 .set_xcr
= emulator_set_xcr
,
8545 .get_untagged_addr
= emulator_get_untagged_addr
,
8548 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
8550 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
8552 * an sti; sti; sequence only disable interrupts for the first
8553 * instruction. So, if the last instruction, be it emulated or
8554 * not, left the system with the INT_STI flag enabled, it
8555 * means that the last instruction is an sti. We should not
8556 * leave the flag on in this case. The same goes for mov ss
8558 if (int_shadow
& mask
)
8560 if (unlikely(int_shadow
|| mask
)) {
8561 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
8563 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8567 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
8569 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8571 if (ctxt
->exception
.vector
== PF_VECTOR
)
8572 kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
8573 else if (ctxt
->exception
.error_code_valid
)
8574 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
8575 ctxt
->exception
.error_code
);
8577 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
8580 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
8582 struct x86_emulate_ctxt
*ctxt
;
8584 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
8586 pr_err("failed to allocate vcpu's emulator\n");
8591 ctxt
->ops
= &emulate_ops
;
8592 vcpu
->arch
.emulate_ctxt
= ctxt
;
8597 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
8599 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8602 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
8604 ctxt
->gpa_available
= false;
8605 ctxt
->eflags
= kvm_get_rflags(vcpu
);
8606 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
8608 ctxt
->eip
= kvm_rip_read(vcpu
);
8609 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
8610 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
8611 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
8612 cs_db
? X86EMUL_MODE_PROT32
:
8613 X86EMUL_MODE_PROT16
;
8614 ctxt
->interruptibility
= 0;
8615 ctxt
->have_exception
= false;
8616 ctxt
->exception
.vector
= -1;
8617 ctxt
->perm_ok
= false;
8619 init_decode_cache(ctxt
);
8620 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8623 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
8625 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8628 init_emulate_ctxt(vcpu
);
8632 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
8633 ret
= emulate_int_real(ctxt
, irq
);
8635 if (ret
!= X86EMUL_CONTINUE
) {
8636 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
8638 ctxt
->eip
= ctxt
->_eip
;
8639 kvm_rip_write(vcpu
, ctxt
->eip
);
8640 kvm_set_rflags(vcpu
, ctxt
->eflags
);
8643 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
8645 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8646 u8 ndata
, u8
*insn_bytes
, u8 insn_size
)
8648 struct kvm_run
*run
= vcpu
->run
;
8653 * Zero the whole array used to retrieve the exit info, as casting to
8654 * u32 for select entries will leave some chunks uninitialized.
8656 memset(&info
, 0, sizeof(info
));
8658 static_call(kvm_x86_get_exit_info
)(vcpu
, (u32
*)&info
[0], &info
[1],
8659 &info
[2], (u32
*)&info
[3],
8662 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
8663 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
8666 * There's currently space for 13 entries, but 5 are used for the exit
8667 * reason and info. Restrict to 4 to reduce the maintenance burden
8668 * when expanding kvm_run.emulation_failure in the future.
8670 if (WARN_ON_ONCE(ndata
> 4))
8673 /* Always include the flags as a 'data' entry. */
8675 run
->emulation_failure
.flags
= 0;
8678 BUILD_BUG_ON((sizeof(run
->emulation_failure
.insn_size
) +
8679 sizeof(run
->emulation_failure
.insn_bytes
) != 16));
8681 run
->emulation_failure
.flags
|=
8682 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
8683 run
->emulation_failure
.insn_size
= insn_size
;
8684 memset(run
->emulation_failure
.insn_bytes
, 0x90,
8685 sizeof(run
->emulation_failure
.insn_bytes
));
8686 memcpy(run
->emulation_failure
.insn_bytes
, insn_bytes
, insn_size
);
8689 memcpy(&run
->internal
.data
[info_start
], info
, sizeof(info
));
8690 memcpy(&run
->internal
.data
[info_start
+ ARRAY_SIZE(info
)], data
,
8691 ndata
* sizeof(data
[0]));
8693 run
->emulation_failure
.ndata
= info_start
+ ARRAY_SIZE(info
) + ndata
;
8696 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu
*vcpu
)
8698 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8700 prepare_emulation_failure_exit(vcpu
, NULL
, 0, ctxt
->fetch
.data
,
8701 ctxt
->fetch
.end
- ctxt
->fetch
.data
);
8704 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8707 prepare_emulation_failure_exit(vcpu
, data
, ndata
, NULL
, 0);
8709 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit
);
8711 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
8713 __kvm_prepare_emulation_failure_exit(vcpu
, NULL
, 0);
8715 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit
);
8717 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
8719 struct kvm
*kvm
= vcpu
->kvm
;
8721 ++vcpu
->stat
.insn_emulation_fail
;
8722 trace_kvm_emulate_insn_failed(vcpu
);
8724 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
8725 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
8729 if (kvm
->arch
.exit_on_emulation_error
||
8730 (emulation_type
& EMULTYPE_SKIP
)) {
8731 prepare_emulation_ctxt_failure_exit(vcpu
);
8735 kvm_queue_exception(vcpu
, UD_VECTOR
);
8737 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
8738 prepare_emulation_ctxt_failure_exit(vcpu
);
8745 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
8748 gpa_t gpa
= cr2_or_gpa
;
8751 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8754 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8755 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8758 if (!vcpu
->arch
.mmu
->root_role
.direct
) {
8760 * Write permission should be allowed since only
8761 * write access need to be emulated.
8763 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8766 * If the mapping is invalid in guest, let cpu retry
8767 * it to generate fault.
8769 if (gpa
== INVALID_GPA
)
8774 * Do not retry the unhandleable instruction if it faults on the
8775 * readonly host memory, otherwise it will goto a infinite loop:
8776 * retry instruction -> write #PF -> emulation fail -> retry
8777 * instruction -> ...
8779 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
8782 * If the instruction failed on the error pfn, it can not be fixed,
8783 * report the error to userspace.
8785 if (is_error_noslot_pfn(pfn
))
8788 kvm_release_pfn_clean(pfn
);
8791 * If emulation may have been triggered by a write to a shadowed page
8792 * table, unprotect the gfn (zap any relevant SPTEs) and re-enter the
8793 * guest to let the CPU re-execute the instruction in the hope that the
8794 * CPU can cleanly execute the instruction that KVM failed to emulate.
8796 if (vcpu
->kvm
->arch
.indirect_shadow_pages
)
8797 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8800 * If the failed instruction faulted on an access to page tables that
8801 * are used to translate any part of the instruction, KVM can't resolve
8802 * the issue by unprotecting the gfn, as zapping the shadow page will
8803 * result in the instruction taking a !PRESENT page fault and thus put
8804 * the vCPU into an infinite loop of page faults. E.g. KVM will create
8805 * a SPTE and write-protect the gfn to resolve the !PRESENT fault, and
8806 * then zap the SPTE to unprotect the gfn, and then do it all over
8807 * again. Report the error to userspace.
8809 return !(emulation_type
& EMULTYPE_WRITE_PF_TO_SP
);
8812 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
8813 gpa_t cr2_or_gpa
, int emulation_type
)
8815 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8816 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
8818 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
8819 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
8822 * If the emulation is caused by #PF and it is non-page_table
8823 * writing instruction, it means the VM-EXIT is caused by shadow
8824 * page protected, we can zap the shadow page and retry this
8825 * instruction directly.
8827 * Note: if the guest uses a non-page-table modifying instruction
8828 * on the PDE that points to the instruction, then we will unmap
8829 * the instruction and go to an infinite loop. So, we cache the
8830 * last retried eip and the last fault address, if we meet the eip
8831 * and the address again, we can break out of the potential infinite
8834 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
8836 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8839 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8840 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8843 if (x86_page_table_writing_insn(ctxt
))
8846 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
8849 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
8850 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
8852 if (!vcpu
->arch
.mmu
->root_role
.direct
)
8853 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8855 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8860 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
8861 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
8863 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
8872 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
8873 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
8878 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
8880 struct kvm_run
*kvm_run
= vcpu
->run
;
8882 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
8883 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
8884 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
8885 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8886 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8889 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
8893 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
8895 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8898 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
8902 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
8905 * rflags is the old, "raw" value of the flags. The new value has
8906 * not been saved yet.
8908 * This is correct even for TF set by the guest, because "the
8909 * processor will not generate this exception after the instruction
8910 * that sets the TF flag".
8912 if (unlikely(rflags
& X86_EFLAGS_TF
))
8913 r
= kvm_vcpu_do_singlestep(vcpu
);
8916 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
8918 static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu
*vcpu
)
8922 if (kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)
8926 * Intel CPUs inhibit code #DBs when MOV/POP SS blocking is active,
8927 * but AMD CPUs do not. MOV/POP SS blocking is rare, check that first
8928 * to avoid the relatively expensive CPUID lookup.
8930 shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
8931 return (shadow
& KVM_X86_SHADOW_INT_MOV_SS
) &&
8932 guest_cpuid_is_intel(vcpu
);
8935 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu
*vcpu
,
8936 int emulation_type
, int *r
)
8938 WARN_ON_ONCE(emulation_type
& EMULTYPE_NO_DECODE
);
8941 * Do not check for code breakpoints if hardware has already done the
8942 * checks, as inferred from the emulation type. On NO_DECODE and SKIP,
8943 * the instruction has passed all exception checks, and all intercepted
8944 * exceptions that trigger emulation have lower priority than code
8945 * breakpoints, i.e. the fact that the intercepted exception occurred
8946 * means any code breakpoints have already been serviced.
8948 * Note, KVM needs to check for code #DBs on EMULTYPE_TRAP_UD_FORCED as
8949 * hardware has checked the RIP of the magic prefix, but not the RIP of
8950 * the instruction being emulated. The intent of forced emulation is
8951 * to behave as if KVM intercepted the instruction without an exception
8952 * and without a prefix.
8954 if (emulation_type
& (EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
8955 EMULTYPE_TRAP_UD
| EMULTYPE_VMWARE_GP
| EMULTYPE_PF
))
8958 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
8959 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
8960 struct kvm_run
*kvm_run
= vcpu
->run
;
8961 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8962 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8963 vcpu
->arch
.guest_debug_dr7
,
8967 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
8968 kvm_run
->debug
.arch
.pc
= eip
;
8969 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8970 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8976 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
8977 !kvm_is_code_breakpoint_inhibited(vcpu
)) {
8978 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8979 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8984 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
8993 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
8995 switch (ctxt
->opcode_len
) {
9002 case 0xe6: /* OUT */
9006 case 0x6c: /* INS */
9008 case 0x6e: /* OUTS */
9015 case 0x33: /* RDPMC */
9025 * Decode an instruction for emulation. The caller is responsible for handling
9026 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
9027 * (and wrong) when emulating on an intercepted fault-like exception[*], as
9028 * code breakpoints have higher priority and thus have already been done by
9031 * [*] Except #MC, which is higher priority, but KVM should never emulate in
9032 * response to a machine check.
9034 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
9035 void *insn
, int insn_len
)
9037 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9040 init_emulate_ctxt(vcpu
);
9042 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
9044 trace_kvm_emulate_insn_start(vcpu
);
9045 ++vcpu
->stat
.insn_emulation
;
9049 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
9051 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
9052 int emulation_type
, void *insn
, int insn_len
)
9055 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9056 bool writeback
= true;
9058 r
= kvm_check_emulate_insn(vcpu
, emulation_type
, insn
, insn_len
);
9059 if (r
!= X86EMUL_CONTINUE
) {
9060 if (r
== X86EMUL_RETRY_INSTR
|| r
== X86EMUL_PROPAGATE_FAULT
)
9063 WARN_ON_ONCE(r
!= X86EMUL_UNHANDLEABLE
);
9064 return handle_emulation_failure(vcpu
, emulation_type
);
9067 vcpu
->arch
.l1tf_flush_l1d
= true;
9069 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
9070 kvm_clear_exception_queue(vcpu
);
9073 * Return immediately if RIP hits a code breakpoint, such #DBs
9074 * are fault-like and are higher priority than any faults on
9075 * the code fetch itself.
9077 if (kvm_vcpu_check_code_breakpoint(vcpu
, emulation_type
, &r
))
9080 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
9082 if (r
!= EMULATION_OK
) {
9083 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
9084 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
9085 kvm_queue_exception(vcpu
, UD_VECTOR
);
9088 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
9092 if (ctxt
->have_exception
&&
9093 !(emulation_type
& EMULTYPE_SKIP
)) {
9095 * #UD should result in just EMULATION_FAILED, and trap-like
9096 * exception should not be encountered during decode.
9098 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
9099 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
9100 inject_emulated_exception(vcpu
);
9103 return handle_emulation_failure(vcpu
, emulation_type
);
9107 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
9108 !is_vmware_backdoor_opcode(ctxt
)) {
9109 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
9114 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
9115 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
9116 * The caller is responsible for updating interruptibility state and
9117 * injecting single-step #DBs.
9119 if (emulation_type
& EMULTYPE_SKIP
) {
9120 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
9121 ctxt
->eip
= (u32
)ctxt
->_eip
;
9123 ctxt
->eip
= ctxt
->_eip
;
9125 if (emulation_type
& EMULTYPE_COMPLETE_USER_EXIT
) {
9130 kvm_rip_write(vcpu
, ctxt
->eip
);
9131 if (ctxt
->eflags
& X86_EFLAGS_RF
)
9132 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
9136 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
9139 /* this is needed for vmware backdoor interface to work since it
9140 changes registers values during IO operation */
9141 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
9142 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
9143 emulator_invalidate_register_cache(ctxt
);
9147 if (emulation_type
& EMULTYPE_PF
) {
9148 /* Save the faulting GPA (cr2) in the address field */
9149 ctxt
->exception
.address
= cr2_or_gpa
;
9151 /* With shadow page tables, cr2 contains a GVA or nGPA. */
9152 if (vcpu
->arch
.mmu
->root_role
.direct
) {
9153 ctxt
->gpa_available
= true;
9154 ctxt
->gpa_val
= cr2_or_gpa
;
9157 /* Sanitize the address out of an abundance of paranoia. */
9158 ctxt
->exception
.address
= 0;
9161 r
= x86_emulate_insn(ctxt
);
9163 if (r
== EMULATION_INTERCEPTED
)
9166 if (r
== EMULATION_FAILED
) {
9167 if (reexecute_instruction(vcpu
, cr2_or_gpa
, emulation_type
))
9170 return handle_emulation_failure(vcpu
, emulation_type
);
9173 if (ctxt
->have_exception
) {
9174 WARN_ON_ONCE(vcpu
->mmio_needed
&& !vcpu
->mmio_is_write
);
9175 vcpu
->mmio_needed
= false;
9177 inject_emulated_exception(vcpu
);
9178 } else if (vcpu
->arch
.pio
.count
) {
9179 if (!vcpu
->arch
.pio
.in
) {
9180 /* FIXME: return into emulator if single-stepping. */
9181 vcpu
->arch
.pio
.count
= 0;
9184 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
9187 } else if (vcpu
->mmio_needed
) {
9188 ++vcpu
->stat
.mmio_exits
;
9190 if (!vcpu
->mmio_is_write
)
9193 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9194 } else if (vcpu
->arch
.complete_userspace_io
) {
9197 } else if (r
== EMULATION_RESTART
)
9204 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
9205 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
9206 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9209 * Note, EXCPT_DB is assumed to be fault-like as the emulator
9210 * only supports code breakpoints and general detect #DB, both
9211 * of which are fault-like.
9213 if (!ctxt
->have_exception
||
9214 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
9215 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
9216 if (ctxt
->is_branch
)
9217 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_BRANCH_INSTRUCTIONS
);
9218 kvm_rip_write(vcpu
, ctxt
->eip
);
9219 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
9220 r
= kvm_vcpu_do_singlestep(vcpu
);
9221 static_call_cond(kvm_x86_update_emulated_instruction
)(vcpu
);
9222 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
9226 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
9227 * do nothing, and it will be requested again as soon as
9228 * the shadow expires. But we still need to check here,
9229 * because POPF has no interrupt shadow.
9231 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
9232 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9234 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
9239 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
9241 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
9243 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
9245 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
9246 void *insn
, int insn_len
)
9248 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
9250 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
9252 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
9254 vcpu
->arch
.pio
.count
= 0;
9258 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
9260 vcpu
->arch
.pio
.count
= 0;
9262 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
9265 return kvm_skip_emulated_instruction(vcpu
);
9268 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
9269 unsigned short port
)
9271 unsigned long val
= kvm_rax_read(vcpu
);
9272 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
9278 * Workaround userspace that relies on old KVM behavior of %rip being
9279 * incremented prior to exiting to userspace to handle "OUT 0x7e".
9282 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
9283 vcpu
->arch
.complete_userspace_io
=
9284 complete_fast_pio_out_port_0x7e
;
9285 kvm_skip_emulated_instruction(vcpu
);
9287 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
9288 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
9293 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
9297 /* We should only ever be called with arch.pio.count equal to 1 */
9298 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
9300 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
9301 vcpu
->arch
.pio
.count
= 0;
9305 /* For size less than 4 we merge, else we zero extend */
9306 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
9308 complete_emulator_pio_in(vcpu
, &val
);
9309 kvm_rax_write(vcpu
, val
);
9311 return kvm_skip_emulated_instruction(vcpu
);
9314 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
9315 unsigned short port
)
9320 /* For size less than 4 we merge, else we zero extend */
9321 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
9323 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
9325 kvm_rax_write(vcpu
, val
);
9329 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
9330 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
9335 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
9340 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
9342 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
9343 return ret
&& kvm_skip_emulated_instruction(vcpu
);
9345 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
9347 static int kvmclock_cpu_down_prep(unsigned int cpu
)
9349 __this_cpu_write(cpu_tsc_khz
, 0);
9353 static void tsc_khz_changed(void *data
)
9355 struct cpufreq_freqs
*freq
= data
;
9358 WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_CONSTANT_TSC
));
9363 khz
= cpufreq_quick_get(raw_smp_processor_id());
9366 __this_cpu_write(cpu_tsc_khz
, khz
);
9369 #ifdef CONFIG_X86_64
9370 static void kvm_hyperv_tsc_notifier(void)
9375 mutex_lock(&kvm_lock
);
9376 list_for_each_entry(kvm
, &vm_list
, vm_list
)
9377 kvm_make_mclock_inprogress_request(kvm
);
9379 /* no guest entries from this point */
9380 hyperv_stop_tsc_emulation();
9382 /* TSC frequency always matches when on Hyper-V */
9383 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9384 for_each_present_cpu(cpu
)
9385 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
9387 kvm_caps
.max_guest_tsc_khz
= tsc_khz
;
9389 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9390 __kvm_start_pvclock_update(kvm
);
9391 pvclock_update_vm_gtod_copy(kvm
);
9392 kvm_end_pvclock_update(kvm
);
9395 mutex_unlock(&kvm_lock
);
9399 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
9402 struct kvm_vcpu
*vcpu
;
9407 * We allow guests to temporarily run on slowing clocks,
9408 * provided we notify them after, or to run on accelerating
9409 * clocks, provided we notify them before. Thus time never
9412 * However, we have a problem. We can't atomically update
9413 * the frequency of a given CPU from this function; it is
9414 * merely a notifier, which can be called from any CPU.
9415 * Changing the TSC frequency at arbitrary points in time
9416 * requires a recomputation of local variables related to
9417 * the TSC for each VCPU. We must flag these local variables
9418 * to be updated and be sure the update takes place with the
9419 * new frequency before any guests proceed.
9421 * Unfortunately, the combination of hotplug CPU and frequency
9422 * change creates an intractable locking scenario; the order
9423 * of when these callouts happen is undefined with respect to
9424 * CPU hotplug, and they can race with each other. As such,
9425 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
9426 * undefined; you can actually have a CPU frequency change take
9427 * place in between the computation of X and the setting of the
9428 * variable. To protect against this problem, all updates of
9429 * the per_cpu tsc_khz variable are done in an interrupt
9430 * protected IPI, and all callers wishing to update the value
9431 * must wait for a synchronous IPI to complete (which is trivial
9432 * if the caller is on the CPU already). This establishes the
9433 * necessary total order on variable updates.
9435 * Note that because a guest time update may take place
9436 * anytime after the setting of the VCPU's request bit, the
9437 * correct TSC value must be set before the request. However,
9438 * to ensure the update actually makes it to any guest which
9439 * starts running in hardware virtualization between the set
9440 * and the acquisition of the spinlock, we must also ping the
9441 * CPU after setting the request bit.
9445 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
9447 mutex_lock(&kvm_lock
);
9448 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9449 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9450 if (vcpu
->cpu
!= cpu
)
9452 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9453 if (vcpu
->cpu
!= raw_smp_processor_id())
9457 mutex_unlock(&kvm_lock
);
9459 if (freq
->old
< freq
->new && send_ipi
) {
9461 * We upscale the frequency. Must make the guest
9462 * doesn't see old kvmclock values while running with
9463 * the new frequency, otherwise we risk the guest sees
9464 * time go backwards.
9466 * In case we update the frequency for another cpu
9467 * (which might be in guest context) send an interrupt
9468 * to kick the cpu out of guest context. Next time
9469 * guest context is entered kvmclock will be updated,
9470 * so the guest will not see stale values.
9472 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
9476 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
9479 struct cpufreq_freqs
*freq
= data
;
9482 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
9484 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
9487 for_each_cpu(cpu
, freq
->policy
->cpus
)
9488 __kvmclock_cpufreq_notifier(freq
, cpu
);
9493 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
9494 .notifier_call
= kvmclock_cpufreq_notifier
9497 static int kvmclock_cpu_online(unsigned int cpu
)
9499 tsc_khz_changed(NULL
);
9503 static void kvm_timer_init(void)
9505 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9506 max_tsc_khz
= tsc_khz
;
9508 if (IS_ENABLED(CONFIG_CPU_FREQ
)) {
9509 struct cpufreq_policy
*policy
;
9513 policy
= cpufreq_cpu_get(cpu
);
9515 if (policy
->cpuinfo
.max_freq
)
9516 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
9517 cpufreq_cpu_put(policy
);
9521 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
9522 CPUFREQ_TRANSITION_NOTIFIER
);
9524 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
9525 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
9529 #ifdef CONFIG_X86_64
9530 static void pvclock_gtod_update_fn(struct work_struct
*work
)
9533 struct kvm_vcpu
*vcpu
;
9536 mutex_lock(&kvm_lock
);
9537 list_for_each_entry(kvm
, &vm_list
, vm_list
)
9538 kvm_for_each_vcpu(i
, vcpu
, kvm
)
9539 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
9540 atomic_set(&kvm_guest_has_master_clock
, 0);
9541 mutex_unlock(&kvm_lock
);
9544 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
9547 * Indirection to move queue_work() out of the tk_core.seq write held
9548 * region to prevent possible deadlocks against time accessors which
9549 * are invoked with work related locks held.
9551 static void pvclock_irq_work_fn(struct irq_work
*w
)
9553 queue_work(system_long_wq
, &pvclock_gtod_work
);
9556 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
9559 * Notification about pvclock gtod data update.
9561 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
9564 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
9565 struct timekeeper
*tk
= priv
;
9567 update_pvclock_gtod(tk
);
9570 * Disable master clock if host does not trust, or does not use,
9571 * TSC based clocksource. Delegate queue_work() to irq_work as
9572 * this is invoked with tk_core.seq write held.
9574 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
9575 atomic_read(&kvm_guest_has_master_clock
) != 0)
9576 irq_work_queue(&pvclock_irq_work
);
9580 static struct notifier_block pvclock_gtod_notifier
= {
9581 .notifier_call
= pvclock_gtod_notify
,
9585 static inline void kvm_ops_update(struct kvm_x86_init_ops
*ops
)
9587 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
9589 #define __KVM_X86_OP(func) \
9590 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
9591 #define KVM_X86_OP(func) \
9592 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
9593 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
9594 #define KVM_X86_OP_OPTIONAL_RET0(func) \
9595 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
9596 (void *)__static_call_return0);
9597 #include <asm/kvm-x86-ops.h>
9600 kvm_pmu_ops_update(ops
->pmu_ops
);
9603 static int kvm_x86_check_processor_compatibility(void)
9605 int cpu
= smp_processor_id();
9606 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
9609 * Compatibility checks are done when loading KVM and when enabling
9610 * hardware, e.g. during CPU hotplug, to ensure all online CPUs are
9611 * compatible, i.e. KVM should never perform a compatibility check on
9614 WARN_ON(!cpu_online(cpu
));
9616 if (__cr4_reserved_bits(cpu_has
, c
) !=
9617 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
9620 return static_call(kvm_x86_check_processor_compatibility
)();
9623 static void kvm_x86_check_cpu_compat(void *ret
)
9625 *(int *)ret
= kvm_x86_check_processor_compatibility();
9628 static int __kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
)
9633 if (kvm_x86_ops
.hardware_enable
) {
9634 pr_err("already loaded vendor module '%s'\n", kvm_x86_ops
.name
);
9639 * KVM explicitly assumes that the guest has an FPU and
9640 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
9641 * vCPU's FPU state as a fxregs_state struct.
9643 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
9644 pr_err("inadequate fpu\n");
9648 if (IS_ENABLED(CONFIG_PREEMPT_RT
) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9649 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9654 * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
9655 * the PAT bits in SPTEs. Bail if PAT[0] is programmed to something
9656 * other than WB. Note, EPT doesn't utilize the PAT, but don't bother
9657 * with an exception. PAT[0] is set to WB on RESET and also by the
9658 * kernel, i.e. failure indicates a kernel bug or broken firmware.
9660 if (rdmsrl_safe(MSR_IA32_CR_PAT
, &host_pat
) ||
9661 (host_pat
& GENMASK(2, 0)) != 6) {
9662 pr_err("host PAT[0] is not WB\n");
9666 x86_emulator_cache
= kvm_alloc_emulator_cache();
9667 if (!x86_emulator_cache
) {
9668 pr_err("failed to allocate cache for x86 emulator\n");
9672 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
9673 if (!user_return_msrs
) {
9674 pr_err("failed to allocate percpu kvm_user_return_msrs\n");
9676 goto out_free_x86_emulator_cache
;
9678 kvm_nr_uret_msrs
= 0;
9680 r
= kvm_mmu_vendor_module_init();
9682 goto out_free_percpu
;
9684 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
9685 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
9686 kvm_caps
.supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
9689 rdmsrl_safe(MSR_EFER
, &host_efer
);
9691 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9692 rdmsrl(MSR_IA32_XSS
, host_xss
);
9694 kvm_init_pmu_capability(ops
->pmu_ops
);
9696 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
9697 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, host_arch_capabilities
);
9699 r
= ops
->hardware_setup();
9703 kvm_ops_update(ops
);
9705 for_each_online_cpu(cpu
) {
9706 smp_call_function_single(cpu
, kvm_x86_check_cpu_compat
, &r
, 1);
9708 goto out_unwind_ops
;
9712 * Point of no return! DO NOT add error paths below this point unless
9713 * absolutely necessary, as most operations from this point forward
9714 * require unwinding.
9718 if (pi_inject_timer
== -1)
9719 pi_inject_timer
= housekeeping_enabled(HK_TYPE_TIMER
);
9720 #ifdef CONFIG_X86_64
9721 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
9723 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9724 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
9727 kvm_register_perf_callbacks(ops
->handle_intel_pt_intr
);
9729 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
9730 kvm_caps
.supported_xss
= 0;
9732 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
9733 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
9734 #undef __kvm_cpu_cap_has
9736 if (kvm_caps
.has_tsc_control
) {
9738 * Make sure the user can only configure tsc_khz values that
9739 * fit into a signed integer.
9740 * A min value is not calculated because it will always
9741 * be 1 on all machines.
9743 u64 max
= min(0x7fffffffULL
,
9744 __scale_tsc(kvm_caps
.max_tsc_scaling_ratio
, tsc_khz
));
9745 kvm_caps
.max_guest_tsc_khz
= max
;
9747 kvm_caps
.default_tsc_scaling_ratio
= 1ULL << kvm_caps
.tsc_scaling_ratio_frac_bits
;
9748 kvm_init_msr_lists();
9752 kvm_x86_ops
.hardware_enable
= NULL
;
9753 static_call(kvm_x86_hardware_unsetup
)();
9755 kvm_mmu_vendor_module_exit();
9757 free_percpu(user_return_msrs
);
9758 out_free_x86_emulator_cache
:
9759 kmem_cache_destroy(x86_emulator_cache
);
9763 int kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
)
9767 mutex_lock(&vendor_module_lock
);
9768 r
= __kvm_x86_vendor_init(ops
);
9769 mutex_unlock(&vendor_module_lock
);
9773 EXPORT_SYMBOL_GPL(kvm_x86_vendor_init
);
9775 void kvm_x86_vendor_exit(void)
9777 kvm_unregister_perf_callbacks();
9779 #ifdef CONFIG_X86_64
9780 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9781 clear_hv_tscchange_cb();
9785 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9786 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
9787 CPUFREQ_TRANSITION_NOTIFIER
);
9788 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
9790 #ifdef CONFIG_X86_64
9791 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
9792 irq_work_sync(&pvclock_irq_work
);
9793 cancel_work_sync(&pvclock_gtod_work
);
9795 static_call(kvm_x86_hardware_unsetup
)();
9796 kvm_mmu_vendor_module_exit();
9797 free_percpu(user_return_msrs
);
9798 kmem_cache_destroy(x86_emulator_cache
);
9799 #ifdef CONFIG_KVM_XEN
9800 static_key_deferred_flush(&kvm_xen_enabled
);
9801 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
9803 mutex_lock(&vendor_module_lock
);
9804 kvm_x86_ops
.hardware_enable
= NULL
;
9805 mutex_unlock(&vendor_module_lock
);
9807 EXPORT_SYMBOL_GPL(kvm_x86_vendor_exit
);
9809 static int __kvm_emulate_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
9812 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9813 * local APIC is in-kernel, the run loop will detect the non-runnable
9814 * state and halt the vCPU. Exit to userspace if the local APIC is
9815 * managed by userspace, in which case userspace is responsible for
9816 * handling wake events.
9818 ++vcpu
->stat
.halt_exits
;
9819 if (lapic_in_kernel(vcpu
)) {
9820 vcpu
->arch
.mp_state
= state
;
9823 vcpu
->run
->exit_reason
= reason
;
9828 int kvm_emulate_halt_noskip(struct kvm_vcpu
*vcpu
)
9830 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
9832 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip
);
9834 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
9836 int ret
= kvm_skip_emulated_instruction(vcpu
);
9838 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9839 * KVM_EXIT_DEBUG here.
9841 return kvm_emulate_halt_noskip(vcpu
) && ret
;
9843 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
9845 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
9847 int ret
= kvm_skip_emulated_instruction(vcpu
);
9849 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
,
9850 KVM_EXIT_AP_RESET_HOLD
) && ret
;
9852 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
9854 #ifdef CONFIG_X86_64
9855 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
9856 unsigned long clock_type
)
9858 struct kvm_clock_pairing clock_pairing
;
9859 struct timespec64 ts
;
9863 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
9864 return -KVM_EOPNOTSUPP
;
9867 * When tsc is in permanent catchup mode guests won't be able to use
9868 * pvclock_read_retry loop to get consistent view of pvclock
9870 if (vcpu
->arch
.tsc_always_catchup
)
9871 return -KVM_EOPNOTSUPP
;
9873 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
9874 return -KVM_EOPNOTSUPP
;
9876 clock_pairing
.sec
= ts
.tv_sec
;
9877 clock_pairing
.nsec
= ts
.tv_nsec
;
9878 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
9879 clock_pairing
.flags
= 0;
9880 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
9883 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
9884 sizeof(struct kvm_clock_pairing
)))
9892 * kvm_pv_kick_cpu_op: Kick a vcpu.
9894 * @apicid - apicid of vcpu to be kicked.
9896 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, int apicid
)
9899 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
9900 * common code, e.g. for tracing. Defer initialization to the compiler.
9902 struct kvm_lapic_irq lapic_irq
= {
9903 .delivery_mode
= APIC_DM_REMRD
,
9904 .dest_mode
= APIC_DEST_PHYSICAL
,
9905 .shorthand
= APIC_DEST_NOSHORT
,
9909 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
9912 bool kvm_apicv_activated(struct kvm
*kvm
)
9914 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
9916 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
9918 bool kvm_vcpu_apicv_activated(struct kvm_vcpu
*vcpu
)
9920 ulong vm_reasons
= READ_ONCE(vcpu
->kvm
->arch
.apicv_inhibit_reasons
);
9921 ulong vcpu_reasons
= static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons
)(vcpu
);
9923 return (vm_reasons
| vcpu_reasons
) == 0;
9925 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated
);
9927 static void set_or_clear_apicv_inhibit(unsigned long *inhibits
,
9928 enum kvm_apicv_inhibit reason
, bool set
)
9931 __set_bit(reason
, inhibits
);
9933 __clear_bit(reason
, inhibits
);
9935 trace_kvm_apicv_inhibit_changed(reason
, set
, *inhibits
);
9938 static void kvm_apicv_init(struct kvm
*kvm
)
9940 unsigned long *inhibits
= &kvm
->arch
.apicv_inhibit_reasons
;
9942 init_rwsem(&kvm
->arch
.apicv_update_lock
);
9944 set_or_clear_apicv_inhibit(inhibits
, APICV_INHIBIT_REASON_ABSENT
, true);
9947 set_or_clear_apicv_inhibit(inhibits
,
9948 APICV_INHIBIT_REASON_DISABLE
, true);
9951 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
9953 struct kvm_vcpu
*target
= NULL
;
9954 struct kvm_apic_map
*map
;
9956 vcpu
->stat
.directed_yield_attempted
++;
9958 if (single_task_running())
9962 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
9964 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
9965 target
= map
->phys_map
[dest_id
]->vcpu
;
9969 if (!target
|| !READ_ONCE(target
->ready
))
9972 /* Ignore requests to yield to self */
9976 if (kvm_vcpu_yield_to(target
) <= 0)
9979 vcpu
->stat
.directed_yield_successful
++;
9985 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
9987 u64 ret
= vcpu
->run
->hypercall
.ret
;
9989 if (!is_64_bit_mode(vcpu
))
9991 kvm_rax_write(vcpu
, ret
);
9992 ++vcpu
->stat
.hypercalls
;
9993 return kvm_skip_emulated_instruction(vcpu
);
9996 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
9998 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
10001 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
10002 return kvm_xen_hypercall(vcpu
);
10004 if (kvm_hv_hypercall_enabled(vcpu
))
10005 return kvm_hv_hypercall(vcpu
);
10007 nr
= kvm_rax_read(vcpu
);
10008 a0
= kvm_rbx_read(vcpu
);
10009 a1
= kvm_rcx_read(vcpu
);
10010 a2
= kvm_rdx_read(vcpu
);
10011 a3
= kvm_rsi_read(vcpu
);
10013 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
10015 op_64_bit
= is_64_bit_hypercall(vcpu
);
10024 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
10032 case KVM_HC_VAPIC_POLL_IRQ
:
10035 case KVM_HC_KICK_CPU
:
10036 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
10039 kvm_pv_kick_cpu_op(vcpu
->kvm
, a1
);
10040 kvm_sched_yield(vcpu
, a1
);
10043 #ifdef CONFIG_X86_64
10044 case KVM_HC_CLOCK_PAIRING
:
10045 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
10048 case KVM_HC_SEND_IPI
:
10049 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
10052 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
10054 case KVM_HC_SCHED_YIELD
:
10055 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
10058 kvm_sched_yield(vcpu
, a0
);
10061 case KVM_HC_MAP_GPA_RANGE
: {
10062 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
10065 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
10068 if (!PAGE_ALIGNED(gpa
) || !npages
||
10069 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
10074 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
10075 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
10076 vcpu
->run
->hypercall
.args
[0] = gpa
;
10077 vcpu
->run
->hypercall
.args
[1] = npages
;
10078 vcpu
->run
->hypercall
.args
[2] = attrs
;
10079 vcpu
->run
->hypercall
.flags
= 0;
10081 vcpu
->run
->hypercall
.flags
|= KVM_EXIT_HYPERCALL_LONG_MODE
;
10083 WARN_ON_ONCE(vcpu
->run
->hypercall
.flags
& KVM_EXIT_HYPERCALL_MBZ
);
10084 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
10094 kvm_rax_write(vcpu
, ret
);
10096 ++vcpu
->stat
.hypercalls
;
10097 return kvm_skip_emulated_instruction(vcpu
);
10099 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
10101 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
10103 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
10104 char instruction
[3];
10105 unsigned long rip
= kvm_rip_read(vcpu
);
10108 * If the quirk is disabled, synthesize a #UD and let the guest pick up
10111 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_FIX_HYPERCALL_INSN
)) {
10112 ctxt
->exception
.error_code_valid
= false;
10113 ctxt
->exception
.vector
= UD_VECTOR
;
10114 ctxt
->have_exception
= true;
10115 return X86EMUL_PROPAGATE_FAULT
;
10118 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
10120 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
10124 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
10126 return vcpu
->run
->request_interrupt_window
&&
10127 likely(!pic_in_kernel(vcpu
->kvm
));
10130 /* Called within kvm->srcu read side. */
10131 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
10133 struct kvm_run
*kvm_run
= vcpu
->run
;
10135 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
10136 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
10137 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
10139 kvm_run
->ready_for_interrupt_injection
=
10140 pic_in_kernel(vcpu
->kvm
) ||
10141 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
10144 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
10147 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
10151 if (!kvm_x86_ops
.update_cr8_intercept
)
10154 if (!lapic_in_kernel(vcpu
))
10157 if (vcpu
->arch
.apic
->apicv_active
)
10160 if (!vcpu
->arch
.apic
->vapic_addr
)
10161 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
10168 tpr
= kvm_lapic_get_cr8(vcpu
);
10170 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
10174 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
10176 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10177 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
10181 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
10184 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
10187 * Suppress the error code if the vCPU is in Real Mode, as Real Mode
10188 * exceptions don't report error codes. The presence of an error code
10189 * is carried with the exception and only stripped when the exception
10190 * is injected as intercepted #PF VM-Exits for AMD's Paged Real Mode do
10191 * report an error code despite the CPU being in Real Mode.
10193 vcpu
->arch
.exception
.has_error_code
&= is_protmode(vcpu
);
10195 trace_kvm_inj_exception(vcpu
->arch
.exception
.vector
,
10196 vcpu
->arch
.exception
.has_error_code
,
10197 vcpu
->arch
.exception
.error_code
,
10198 vcpu
->arch
.exception
.injected
);
10200 static_call(kvm_x86_inject_exception
)(vcpu
);
10204 * Check for any event (interrupt or exception) that is ready to be injected,
10205 * and if there is at least one event, inject the event with the highest
10206 * priority. This handles both "pending" events, i.e. events that have never
10207 * been injected into the guest, and "injected" events, i.e. events that were
10208 * injected as part of a previous VM-Enter, but weren't successfully delivered
10209 * and need to be re-injected.
10211 * Note, this is not guaranteed to be invoked on a guest instruction boundary,
10212 * i.e. doesn't guarantee that there's an event window in the guest. KVM must
10213 * be able to inject exceptions in the "middle" of an instruction, and so must
10214 * also be able to re-inject NMIs and IRQs in the middle of an instruction.
10215 * I.e. for exceptions and re-injected events, NOT invoking this on instruction
10216 * boundaries is necessary and correct.
10218 * For simplicity, KVM uses a single path to inject all events (except events
10219 * that are injected directly from L1 to L2) and doesn't explicitly track
10220 * instruction boundaries for asynchronous events. However, because VM-Exits
10221 * that can occur during instruction execution typically result in KVM skipping
10222 * the instruction or injecting an exception, e.g. instruction and exception
10223 * intercepts, and because pending exceptions have higher priority than pending
10224 * interrupts, KVM still honors instruction boundaries in most scenarios.
10226 * But, if a VM-Exit occurs during instruction execution, and KVM does NOT skip
10227 * the instruction or inject an exception, then KVM can incorrecty inject a new
10228 * asynchronous event if the event became pending after the CPU fetched the
10229 * instruction (in the guest). E.g. if a page fault (#PF, #NPF, EPT violation)
10230 * occurs and is resolved by KVM, a coincident NMI, SMI, IRQ, etc... can be
10231 * injected on the restarted instruction instead of being deferred until the
10232 * instruction completes.
10234 * In practice, this virtualization hole is unlikely to be observed by the
10235 * guest, and even less likely to cause functional problems. To detect the
10236 * hole, the guest would have to trigger an event on a side effect of an early
10237 * phase of instruction execution, e.g. on the instruction fetch from memory.
10238 * And for it to be a functional problem, the guest would need to depend on the
10239 * ordering between that side effect, the instruction completing, _and_ the
10240 * delivery of the asynchronous event.
10242 static int kvm_check_and_inject_events(struct kvm_vcpu
*vcpu
,
10243 bool *req_immediate_exit
)
10249 * Process nested events first, as nested VM-Exit supersedes event
10250 * re-injection. If there's an event queued for re-injection, it will
10251 * be saved into the appropriate vmc{b,s}12 fields on nested VM-Exit.
10253 if (is_guest_mode(vcpu
))
10254 r
= kvm_check_nested_events(vcpu
);
10259 * Re-inject exceptions and events *especially* if immediate entry+exit
10260 * to/from L2 is needed, as any event that has already been injected
10261 * into L2 needs to complete its lifecycle before injecting a new event.
10263 * Don't re-inject an NMI or interrupt if there is a pending exception.
10264 * This collision arises if an exception occurred while vectoring the
10265 * injected event, KVM intercepted said exception, and KVM ultimately
10266 * determined the fault belongs to the guest and queues the exception
10267 * for injection back into the guest.
10269 * "Injected" interrupts can also collide with pending exceptions if
10270 * userspace ignores the "ready for injection" flag and blindly queues
10271 * an interrupt. In that case, prioritizing the exception is correct,
10272 * as the exception "occurred" before the exit to userspace. Trap-like
10273 * exceptions, e.g. most #DBs, have higher priority than interrupts.
10274 * And while fault-like exceptions, e.g. #GP and #PF, are the lowest
10275 * priority, they're only generated (pended) during instruction
10276 * execution, and interrupts are recognized at instruction boundaries.
10277 * Thus a pending fault-like exception means the fault occurred on the
10278 * *previous* instruction and must be serviced prior to recognizing any
10279 * new events in order to fully complete the previous instruction.
10281 if (vcpu
->arch
.exception
.injected
)
10282 kvm_inject_exception(vcpu
);
10283 else if (kvm_is_exception_pending(vcpu
))
10285 else if (vcpu
->arch
.nmi_injected
)
10286 static_call(kvm_x86_inject_nmi
)(vcpu
);
10287 else if (vcpu
->arch
.interrupt
.injected
)
10288 static_call(kvm_x86_inject_irq
)(vcpu
, true);
10291 * Exceptions that morph to VM-Exits are handled above, and pending
10292 * exceptions on top of injected exceptions that do not VM-Exit should
10293 * either morph to #DF or, sadly, override the injected exception.
10295 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
10296 vcpu
->arch
.exception
.pending
);
10299 * Bail if immediate entry+exit to/from the guest is needed to complete
10300 * nested VM-Enter or event re-injection so that a different pending
10301 * event can be serviced (or if KVM needs to exit to userspace).
10303 * Otherwise, continue processing events even if VM-Exit occurred. The
10304 * VM-Exit will have cleared exceptions that were meant for L2, but
10305 * there may now be events that can be injected into L1.
10311 * A pending exception VM-Exit should either result in nested VM-Exit
10312 * or force an immediate re-entry and exit to/from L2, and exception
10313 * VM-Exits cannot be injected (flag should _never_ be set).
10315 WARN_ON_ONCE(vcpu
->arch
.exception_vmexit
.injected
||
10316 vcpu
->arch
.exception_vmexit
.pending
);
10319 * New events, other than exceptions, cannot be injected if KVM needs
10320 * to re-inject a previous event. See above comments on re-injecting
10321 * for why pending exceptions get priority.
10323 can_inject
= !kvm_event_needs_reinjection(vcpu
);
10325 if (vcpu
->arch
.exception
.pending
) {
10327 * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
10328 * value pushed on the stack. Trap-like exception and all #DBs
10329 * leave RF as-is (KVM follows Intel's behavior in this regard;
10330 * AMD states that code breakpoint #DBs excplitly clear RF=0).
10332 * Note, most versions of Intel's SDM and AMD's APM incorrectly
10333 * describe the behavior of General Detect #DBs, which are
10334 * fault-like. They do _not_ set RF, a la code breakpoints.
10336 if (exception_type(vcpu
->arch
.exception
.vector
) == EXCPT_FAULT
)
10337 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
10340 if (vcpu
->arch
.exception
.vector
== DB_VECTOR
) {
10341 kvm_deliver_exception_payload(vcpu
, &vcpu
->arch
.exception
);
10342 if (vcpu
->arch
.dr7
& DR7_GD
) {
10343 vcpu
->arch
.dr7
&= ~DR7_GD
;
10344 kvm_update_dr7(vcpu
);
10348 kvm_inject_exception(vcpu
);
10350 vcpu
->arch
.exception
.pending
= false;
10351 vcpu
->arch
.exception
.injected
= true;
10353 can_inject
= false;
10356 /* Don't inject interrupts if the user asked to avoid doing so */
10357 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
10361 * Finally, inject interrupt events. If an event cannot be injected
10362 * due to architectural conditions (e.g. IF=0) a window-open exit
10363 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
10364 * and can architecturally be injected, but we cannot do it right now:
10365 * an interrupt could have arrived just now and we have to inject it
10366 * as a vmexit, or there could already an event in the queue, which is
10367 * indicated by can_inject. In that case we request an immediate exit
10368 * in order to make progress and get back here for another iteration.
10369 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
10371 #ifdef CONFIG_KVM_SMM
10372 if (vcpu
->arch
.smi_pending
) {
10373 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
10377 vcpu
->arch
.smi_pending
= false;
10378 ++vcpu
->arch
.smi_count
;
10380 can_inject
= false;
10382 static_call(kvm_x86_enable_smi_window
)(vcpu
);
10386 if (vcpu
->arch
.nmi_pending
) {
10387 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
10391 --vcpu
->arch
.nmi_pending
;
10392 vcpu
->arch
.nmi_injected
= true;
10393 static_call(kvm_x86_inject_nmi
)(vcpu
);
10394 can_inject
= false;
10395 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
10397 if (vcpu
->arch
.nmi_pending
)
10398 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
10401 if (kvm_cpu_has_injectable_intr(vcpu
)) {
10402 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
10406 int irq
= kvm_cpu_get_interrupt(vcpu
);
10408 if (!WARN_ON_ONCE(irq
== -1)) {
10409 kvm_queue_interrupt(vcpu
, irq
, false);
10410 static_call(kvm_x86_inject_irq
)(vcpu
, false);
10411 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
10414 if (kvm_cpu_has_injectable_intr(vcpu
))
10415 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10418 if (is_guest_mode(vcpu
) &&
10419 kvm_x86_ops
.nested_ops
->has_events
&&
10420 kvm_x86_ops
.nested_ops
->has_events(vcpu
))
10421 *req_immediate_exit
= true;
10424 * KVM must never queue a new exception while injecting an event; KVM
10425 * is done emulating and should only propagate the to-be-injected event
10426 * to the VMCS/VMCB. Queueing a new exception can put the vCPU into an
10427 * infinite loop as KVM will bail from VM-Enter to inject the pending
10428 * exception and start the cycle all over.
10430 * Exempt triple faults as they have special handling and won't put the
10431 * vCPU into an infinite loop. Triple fault can be queued when running
10432 * VMX without unrestricted guest, as that requires KVM to emulate Real
10433 * Mode events (see kvm_inject_realmode_interrupt()).
10435 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
||
10436 vcpu
->arch
.exception_vmexit
.pending
);
10441 *req_immediate_exit
= true;
10447 static void process_nmi(struct kvm_vcpu
*vcpu
)
10449 unsigned int limit
;
10452 * x86 is limited to one NMI pending, but because KVM can't react to
10453 * incoming NMIs as quickly as bare metal, e.g. if the vCPU is
10454 * scheduled out, KVM needs to play nice with two queued NMIs showing
10455 * up at the same time. To handle this scenario, allow two NMIs to be
10456 * (temporarily) pending so long as NMIs are not blocked and KVM is not
10457 * waiting for a previous NMI injection to complete (which effectively
10458 * blocks NMIs). KVM will immediately inject one of the two NMIs, and
10459 * will request an NMI window to handle the second NMI.
10461 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
10467 * Adjust the limit to account for pending virtual NMIs, which aren't
10468 * tracked in vcpu->arch.nmi_pending.
10470 if (static_call(kvm_x86_is_vnmi_pending
)(vcpu
))
10473 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
10474 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
10476 if (vcpu
->arch
.nmi_pending
&&
10477 (static_call(kvm_x86_set_vnmi_pending
)(vcpu
)))
10478 vcpu
->arch
.nmi_pending
--;
10480 if (vcpu
->arch
.nmi_pending
)
10481 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10484 /* Return total number of NMIs pending injection to the VM */
10485 int kvm_get_nr_pending_nmis(struct kvm_vcpu
*vcpu
)
10487 return vcpu
->arch
.nmi_pending
+
10488 static_call(kvm_x86_is_vnmi_pending
)(vcpu
);
10491 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
10492 unsigned long *vcpu_bitmap
)
10494 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
, vcpu_bitmap
);
10497 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
10499 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
10502 void __kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
10504 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
10507 if (!lapic_in_kernel(vcpu
))
10510 down_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
10513 /* Do not activate APICV when APIC is disabled */
10514 activate
= kvm_vcpu_apicv_activated(vcpu
) &&
10515 (kvm_get_apic_mode(vcpu
) != LAPIC_MODE_DISABLED
);
10517 if (apic
->apicv_active
== activate
)
10520 apic
->apicv_active
= activate
;
10521 kvm_apic_update_apicv(vcpu
);
10522 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
10525 * When APICv gets disabled, we may still have injected interrupts
10526 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
10527 * still active when the interrupt got accepted. Make sure
10528 * kvm_check_and_inject_events() is called to check for that.
10530 if (!apic
->apicv_active
)
10531 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10535 up_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
10537 EXPORT_SYMBOL_GPL(__kvm_vcpu_update_apicv
);
10539 static void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
10541 if (!lapic_in_kernel(vcpu
))
10545 * Due to sharing page tables across vCPUs, the xAPIC memslot must be
10546 * deleted if any vCPU has xAPIC virtualization and x2APIC enabled, but
10547 * and hardware doesn't support x2APIC virtualization. E.g. some AMD
10548 * CPUs support AVIC but not x2APIC. KVM still allows enabling AVIC in
10549 * this case so that KVM can the AVIC doorbell to inject interrupts to
10550 * running vCPUs, but KVM must not create SPTEs for the APIC base as
10551 * the vCPU would incorrectly be able to access the vAPIC page via MMIO
10552 * despite being in x2APIC mode. For simplicity, inhibiting the APIC
10553 * access page is sticky.
10555 if (apic_x2apic_mode(vcpu
->arch
.apic
) &&
10556 kvm_x86_ops
.allow_apicv_in_x2apic_without_x2apic_virtualization
)
10557 kvm_inhibit_apic_access_page(vcpu
);
10559 __kvm_vcpu_update_apicv(vcpu
);
10562 void __kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
10563 enum kvm_apicv_inhibit reason
, bool set
)
10565 unsigned long old
, new;
10567 lockdep_assert_held_write(&kvm
->arch
.apicv_update_lock
);
10569 if (!(kvm_x86_ops
.required_apicv_inhibits
& BIT(reason
)))
10572 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
10574 set_or_clear_apicv_inhibit(&new, reason
, set
);
10576 if (!!old
!= !!new) {
10578 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
10579 * false positives in the sanity check WARN in svm_vcpu_run().
10580 * This task will wait for all vCPUs to ack the kick IRQ before
10581 * updating apicv_inhibit_reasons, and all other vCPUs will
10582 * block on acquiring apicv_update_lock so that vCPUs can't
10583 * redo svm_vcpu_run() without seeing the new inhibit state.
10585 * Note, holding apicv_update_lock and taking it in the read
10586 * side (handling the request) also prevents other vCPUs from
10587 * servicing the request with a stale apicv_inhibit_reasons.
10589 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
10590 kvm
->arch
.apicv_inhibit_reasons
= new;
10592 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
10593 int idx
= srcu_read_lock(&kvm
->srcu
);
10595 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
10596 srcu_read_unlock(&kvm
->srcu
, idx
);
10599 kvm
->arch
.apicv_inhibit_reasons
= new;
10603 void kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
10604 enum kvm_apicv_inhibit reason
, bool set
)
10609 down_write(&kvm
->arch
.apicv_update_lock
);
10610 __kvm_set_or_clear_apicv_inhibit(kvm
, reason
, set
);
10611 up_write(&kvm
->arch
.apicv_update_lock
);
10613 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit
);
10615 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
10617 if (!kvm_apic_present(vcpu
))
10620 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
10622 if (irqchip_split(vcpu
->kvm
))
10623 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
10625 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10626 if (ioapic_in_kernel(vcpu
->kvm
))
10627 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
10630 if (is_guest_mode(vcpu
))
10631 vcpu
->arch
.load_eoi_exitmap_pending
= true;
10633 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
10636 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
10638 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
10641 #ifdef CONFIG_KVM_HYPERV
10642 if (to_hv_vcpu(vcpu
)) {
10643 u64 eoi_exit_bitmap
[4];
10645 bitmap_or((ulong
*)eoi_exit_bitmap
,
10646 vcpu
->arch
.ioapic_handled_vectors
,
10647 to_hv_synic(vcpu
)->vec_bitmap
, 256);
10648 static_call_cond(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
10652 static_call_cond(kvm_x86_load_eoi_exitmap
)(
10653 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
10656 void kvm_arch_guest_memory_reclaimed(struct kvm
*kvm
)
10658 static_call_cond(kvm_x86_guest_memory_reclaimed
)(kvm
);
10661 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
10663 if (!lapic_in_kernel(vcpu
))
10666 static_call_cond(kvm_x86_set_apic_access_page_addr
)(vcpu
);
10669 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
10671 smp_send_reschedule(vcpu
->cpu
);
10673 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
10676 * Called within kvm->srcu read side.
10677 * Returns 1 to let vcpu_run() continue the guest execution loop without
10678 * exiting to the userspace. Otherwise, the value will be returned to the
10681 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
10685 dm_request_for_irq_injection(vcpu
) &&
10686 kvm_cpu_accept_dm_intr(vcpu
);
10687 fastpath_t exit_fastpath
;
10689 bool req_immediate_exit
= false;
10691 if (kvm_request_pending(vcpu
)) {
10692 if (kvm_check_request(KVM_REQ_VM_DEAD
, vcpu
)) {
10697 if (kvm_dirty_ring_check_request(vcpu
)) {
10702 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
10703 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
10708 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS
, vcpu
))
10709 kvm_mmu_free_obsolete_roots(vcpu
);
10710 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
10711 __kvm_migrate_timers(vcpu
);
10712 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
10713 kvm_update_masterclock(vcpu
->kvm
);
10714 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
10715 kvm_gen_kvmclock_update(vcpu
);
10716 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
10717 r
= kvm_guest_time_update(vcpu
);
10721 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
10722 kvm_mmu_sync_roots(vcpu
);
10723 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
10724 kvm_mmu_load_pgd(vcpu
);
10727 * Note, the order matters here, as flushing "all" TLB entries
10728 * also flushes the "current" TLB entries, i.e. servicing the
10729 * flush "all" will clear any request to flush "current".
10731 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
10732 kvm_vcpu_flush_tlb_all(vcpu
);
10734 kvm_service_local_tlb_flush_requests(vcpu
);
10737 * Fall back to a "full" guest flush if Hyper-V's precise
10738 * flushing fails. Note, Hyper-V's flushing is per-vCPU, but
10739 * the flushes are considered "remote" and not "local" because
10740 * the requests can be initiated from other vCPUs.
10742 #ifdef CONFIG_KVM_HYPERV
10743 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH
, vcpu
) &&
10744 kvm_hv_vcpu_flush_tlb(vcpu
))
10745 kvm_vcpu_flush_tlb_guest(vcpu
);
10748 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
10749 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
10753 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10754 if (is_guest_mode(vcpu
))
10755 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
10757 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10758 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
10759 vcpu
->mmio_needed
= 0;
10764 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
10765 /* Page is swapped out. Do synthetic halt */
10766 vcpu
->arch
.apf
.halted
= true;
10770 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
10771 record_steal_time(vcpu
);
10772 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
10773 kvm_pmu_handle_event(vcpu
);
10774 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
10775 kvm_pmu_deliver_pmi(vcpu
);
10776 #ifdef CONFIG_KVM_SMM
10777 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
10780 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
10782 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
10783 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
10784 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
10785 vcpu
->arch
.ioapic_handled_vectors
)) {
10786 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
10787 vcpu
->run
->eoi
.vector
=
10788 vcpu
->arch
.pending_ioapic_eoi
;
10793 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
10794 vcpu_scan_ioapic(vcpu
);
10795 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
10796 vcpu_load_eoi_exitmap(vcpu
);
10797 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
10798 kvm_vcpu_reload_apic_access_page(vcpu
);
10799 #ifdef CONFIG_KVM_HYPERV
10800 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
10801 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10802 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
10803 vcpu
->run
->system_event
.ndata
= 0;
10807 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
10808 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10809 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
10810 vcpu
->run
->system_event
.ndata
= 0;
10814 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
10815 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
10817 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
10818 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
10824 * KVM_REQ_HV_STIMER has to be processed after
10825 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10826 * depend on the guest clock being up-to-date
10828 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
10829 kvm_hv_process_stimers(vcpu
);
10831 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
10832 kvm_vcpu_update_apicv(vcpu
);
10833 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
10834 kvm_check_async_pf_completion(vcpu
);
10835 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
10836 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
10838 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
10839 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
10842 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
10843 kvm_xen_has_interrupt(vcpu
)) {
10844 ++vcpu
->stat
.req_event
;
10845 r
= kvm_apic_accept_events(vcpu
);
10850 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
10855 r
= kvm_check_and_inject_events(vcpu
, &req_immediate_exit
);
10861 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10863 if (kvm_lapic_enabled(vcpu
)) {
10864 update_cr8_intercept(vcpu
);
10865 kvm_lapic_sync_to_vapic(vcpu
);
10869 r
= kvm_mmu_reload(vcpu
);
10871 goto cancel_injection
;
10876 static_call(kvm_x86_prepare_switch_to_guest
)(vcpu
);
10879 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10880 * IPI are then delayed after guest entry, which ensures that they
10881 * result in virtual interrupt delivery.
10883 local_irq_disable();
10885 /* Store vcpu->apicv_active before vcpu->mode. */
10886 smp_store_release(&vcpu
->mode
, IN_GUEST_MODE
);
10888 kvm_vcpu_srcu_read_unlock(vcpu
);
10891 * 1) We should set ->mode before checking ->requests. Please see
10892 * the comment in kvm_vcpu_exiting_guest_mode().
10894 * 2) For APICv, we should set ->mode before checking PID.ON. This
10895 * pairs with the memory barrier implicit in pi_test_and_set_on
10896 * (see vmx_deliver_posted_interrupt).
10898 * 3) This also orders the write to mode from any reads to the page
10899 * tables done while the VCPU is running. Please see the comment
10900 * in kvm_flush_remote_tlbs.
10902 smp_mb__after_srcu_read_unlock();
10905 * Process pending posted interrupts to handle the case where the
10906 * notification IRQ arrived in the host, or was never sent (because the
10907 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10908 * status, KVM doesn't update assigned devices when APICv is inhibited,
10909 * i.e. they can post interrupts even if APICv is temporarily disabled.
10911 if (kvm_lapic_enabled(vcpu
))
10912 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10914 if (kvm_vcpu_exit_request(vcpu
)) {
10915 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10917 local_irq_enable();
10919 kvm_vcpu_srcu_read_lock(vcpu
);
10921 goto cancel_injection
;
10924 if (req_immediate_exit
) {
10925 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10926 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
10929 fpregs_assert_state_consistent();
10930 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10931 switch_fpu_return();
10933 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10934 wrmsrl(MSR_IA32_XFD_ERR
, vcpu
->arch
.guest_fpu
.xfd_err
);
10936 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
10937 set_debugreg(0, 7);
10938 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
10939 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
10940 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
10941 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
10942 } else if (unlikely(hw_breakpoint_active())) {
10943 set_debugreg(0, 7);
10946 guest_timing_enter_irqoff();
10950 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10951 * update must kick and wait for all vCPUs before toggling the
10952 * per-VM state, and responding vCPUs must wait for the update
10953 * to complete before servicing KVM_REQ_APICV_UPDATE.
10955 WARN_ON_ONCE((kvm_vcpu_apicv_activated(vcpu
) != kvm_vcpu_apicv_active(vcpu
)) &&
10956 (kvm_get_apic_mode(vcpu
) != LAPIC_MODE_DISABLED
));
10958 exit_fastpath
= static_call(kvm_x86_vcpu_run
)(vcpu
);
10959 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
10962 if (kvm_lapic_enabled(vcpu
))
10963 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10965 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
10966 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
10970 /* Note, VM-Exits that go down the "slow" path are accounted below. */
10971 ++vcpu
->stat
.exits
;
10975 * Do this here before restoring debug registers on the host. And
10976 * since we do this before handling the vmexit, a DR access vmexit
10977 * can (a) read the correct value of the debug registers, (b) set
10978 * KVM_DEBUGREG_WONT_EXIT again.
10980 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
10981 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
10982 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
10983 kvm_update_dr0123(vcpu
);
10984 kvm_update_dr7(vcpu
);
10988 * If the guest has used debug registers, at least dr7
10989 * will be disabled while returning to the host.
10990 * If we don't have active breakpoints in the host, we don't
10991 * care about the messed up debug address registers. But if
10992 * we have some of them active, restore the old state.
10994 if (hw_breakpoint_active())
10995 hw_breakpoint_restore();
10997 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
10998 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
11000 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
11004 * Sync xfd before calling handle_exit_irqoff() which may
11005 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
11006 * in #NM irqoff handler).
11008 if (vcpu
->arch
.xfd_no_write_intercept
)
11009 fpu_sync_guest_vmexit_xfd_state();
11011 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
11013 if (vcpu
->arch
.guest_fpu
.xfd_err
)
11014 wrmsrl(MSR_IA32_XFD_ERR
, 0);
11017 * Consume any pending interrupts, including the possible source of
11018 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
11019 * An instruction is required after local_irq_enable() to fully unblock
11020 * interrupts on processors that implement an interrupt shadow, the
11021 * stat.exits increment will do nicely.
11023 kvm_before_interrupt(vcpu
, KVM_HANDLING_IRQ
);
11024 local_irq_enable();
11025 ++vcpu
->stat
.exits
;
11026 local_irq_disable();
11027 kvm_after_interrupt(vcpu
);
11030 * Wait until after servicing IRQs to account guest time so that any
11031 * ticks that occurred while running the guest are properly accounted
11032 * to the guest. Waiting until IRQs are enabled degrades the accuracy
11033 * of accounting via context tracking, but the loss of accuracy is
11034 * acceptable for all known use cases.
11036 guest_timing_exit_irqoff();
11038 local_irq_enable();
11041 kvm_vcpu_srcu_read_lock(vcpu
);
11044 * Profile KVM exit RIPs:
11046 if (unlikely(prof_on
== KVM_PROFILING
)) {
11047 unsigned long rip
= kvm_rip_read(vcpu
);
11048 profile_hit(KVM_PROFILING
, (void *)rip
);
11051 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
11052 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11054 if (vcpu
->arch
.apic_attention
)
11055 kvm_lapic_sync_from_vapic(vcpu
);
11057 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
11061 if (req_immediate_exit
)
11062 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11063 static_call(kvm_x86_cancel_injection
)(vcpu
);
11064 if (unlikely(vcpu
->arch
.apic_attention
))
11065 kvm_lapic_sync_from_vapic(vcpu
);
11070 /* Called within kvm->srcu read side. */
11071 static inline int vcpu_block(struct kvm_vcpu
*vcpu
)
11075 if (!kvm_arch_vcpu_runnable(vcpu
)) {
11077 * Switch to the software timer before halt-polling/blocking as
11078 * the guest's timer may be a break event for the vCPU, and the
11079 * hypervisor timer runs only when the CPU is in guest mode.
11080 * Switch before halt-polling so that KVM recognizes an expired
11081 * timer before blocking.
11083 hv_timer
= kvm_lapic_hv_timer_in_use(vcpu
);
11085 kvm_lapic_switch_to_sw_timer(vcpu
);
11087 kvm_vcpu_srcu_read_unlock(vcpu
);
11088 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
)
11089 kvm_vcpu_halt(vcpu
);
11091 kvm_vcpu_block(vcpu
);
11092 kvm_vcpu_srcu_read_lock(vcpu
);
11095 kvm_lapic_switch_to_hv_timer(vcpu
);
11098 * If the vCPU is not runnable, a signal or another host event
11099 * of some kind is pending; service it without changing the
11100 * vCPU's activity state.
11102 if (!kvm_arch_vcpu_runnable(vcpu
))
11107 * Evaluate nested events before exiting the halted state. This allows
11108 * the halt state to be recorded properly in the VMCS12's activity
11109 * state field (AMD does not have a similar field and a VM-Exit always
11110 * causes a spurious wakeup from HLT).
11112 if (is_guest_mode(vcpu
)) {
11113 if (kvm_check_nested_events(vcpu
) < 0)
11117 if (kvm_apic_accept_events(vcpu
) < 0)
11119 switch(vcpu
->arch
.mp_state
) {
11120 case KVM_MP_STATE_HALTED
:
11121 case KVM_MP_STATE_AP_RESET_HOLD
:
11122 vcpu
->arch
.pv
.pv_unhalted
= false;
11123 vcpu
->arch
.mp_state
=
11124 KVM_MP_STATE_RUNNABLE
;
11126 case KVM_MP_STATE_RUNNABLE
:
11127 vcpu
->arch
.apf
.halted
= false;
11129 case KVM_MP_STATE_INIT_RECEIVED
:
11138 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
11140 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
11141 !vcpu
->arch
.apf
.halted
);
11144 /* Called within kvm->srcu read side. */
11145 static int vcpu_run(struct kvm_vcpu
*vcpu
)
11149 vcpu
->run
->exit_reason
= KVM_EXIT_UNKNOWN
;
11150 vcpu
->arch
.l1tf_flush_l1d
= true;
11154 * If another guest vCPU requests a PV TLB flush in the middle
11155 * of instruction emulation, the rest of the emulation could
11156 * use a stale page translation. Assume that any code after
11157 * this point can start executing an instruction.
11159 vcpu
->arch
.at_instruction_boundary
= false;
11160 if (kvm_vcpu_running(vcpu
)) {
11161 r
= vcpu_enter_guest(vcpu
);
11163 r
= vcpu_block(vcpu
);
11169 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
11170 if (kvm_xen_has_pending_events(vcpu
))
11171 kvm_xen_inject_pending_events(vcpu
);
11173 if (kvm_cpu_has_pending_timer(vcpu
))
11174 kvm_inject_pending_timer_irqs(vcpu
);
11176 if (dm_request_for_irq_injection(vcpu
) &&
11177 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
11179 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
11180 ++vcpu
->stat
.request_irq_exits
;
11184 if (__xfer_to_guest_mode_work_pending()) {
11185 kvm_vcpu_srcu_read_unlock(vcpu
);
11186 r
= xfer_to_guest_mode_handle_work(vcpu
);
11187 kvm_vcpu_srcu_read_lock(vcpu
);
11196 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
11198 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
11201 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
11203 BUG_ON(!vcpu
->arch
.pio
.count
);
11205 return complete_emulated_io(vcpu
);
11209 * Implements the following, as a state machine:
11212 * for each fragment
11213 * for each mmio piece in the fragment
11220 * for each fragment
11221 * for each mmio piece in the fragment
11226 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
11228 struct kvm_run
*run
= vcpu
->run
;
11229 struct kvm_mmio_fragment
*frag
;
11232 BUG_ON(!vcpu
->mmio_needed
);
11234 /* Complete previous fragment */
11235 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11236 len
= min(8u, frag
->len
);
11237 if (!vcpu
->mmio_is_write
)
11238 memcpy(frag
->data
, run
->mmio
.data
, len
);
11240 if (frag
->len
<= 8) {
11241 /* Switch to the next fragment. */
11243 vcpu
->mmio_cur_fragment
++;
11245 /* Go forward to the next mmio piece. */
11251 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11252 vcpu
->mmio_needed
= 0;
11254 /* FIXME: return into emulator if single-stepping. */
11255 if (vcpu
->mmio_is_write
)
11257 vcpu
->mmio_read_completed
= 1;
11258 return complete_emulated_io(vcpu
);
11261 run
->exit_reason
= KVM_EXIT_MMIO
;
11262 run
->mmio
.phys_addr
= frag
->gpa
;
11263 if (vcpu
->mmio_is_write
)
11264 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11265 run
->mmio
.len
= min(8u, frag
->len
);
11266 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11267 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
11271 /* Swap (qemu) user FPU context for the guest FPU context. */
11272 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
11274 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
11275 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, true);
11279 /* When vcpu_run ends, restore user space FPU context. */
11280 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
11282 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, false);
11283 ++vcpu
->stat
.fpu_reload
;
11287 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
11289 struct kvm_queued_exception
*ex
= &vcpu
->arch
.exception
;
11290 struct kvm_run
*kvm_run
= vcpu
->run
;
11294 kvm_sigset_activate(vcpu
);
11295 kvm_run
->flags
= 0;
11296 kvm_load_guest_fpu(vcpu
);
11298 kvm_vcpu_srcu_read_lock(vcpu
);
11299 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
11300 if (kvm_run
->immediate_exit
) {
11306 * Don't bother switching APIC timer emulation from the
11307 * hypervisor timer to the software timer, the only way for the
11308 * APIC timer to be active is if userspace stuffed vCPU state,
11309 * i.e. put the vCPU into a nonsensical state. Only an INIT
11310 * will transition the vCPU out of UNINITIALIZED (without more
11311 * state stuffing from userspace), which will reset the local
11312 * APIC and thus cancel the timer or drop the IRQ (if the timer
11313 * already expired).
11315 kvm_vcpu_srcu_read_unlock(vcpu
);
11316 kvm_vcpu_block(vcpu
);
11317 kvm_vcpu_srcu_read_lock(vcpu
);
11319 if (kvm_apic_accept_events(vcpu
) < 0) {
11324 if (signal_pending(current
)) {
11326 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
11327 ++vcpu
->stat
.signal_exits
;
11332 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
11333 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
11338 if (kvm_run
->kvm_dirty_regs
) {
11339 r
= sync_regs(vcpu
);
11344 /* re-sync apic's tpr */
11345 if (!lapic_in_kernel(vcpu
)) {
11346 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
11353 * If userspace set a pending exception and L2 is active, convert it to
11354 * a pending VM-Exit if L1 wants to intercept the exception.
11356 if (vcpu
->arch
.exception_from_userspace
&& is_guest_mode(vcpu
) &&
11357 kvm_x86_ops
.nested_ops
->is_exception_vmexit(vcpu
, ex
->vector
,
11359 kvm_queue_exception_vmexit(vcpu
, ex
->vector
,
11360 ex
->has_error_code
, ex
->error_code
,
11361 ex
->has_payload
, ex
->payload
);
11362 ex
->injected
= false;
11363 ex
->pending
= false;
11365 vcpu
->arch
.exception_from_userspace
= false;
11367 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
11368 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
11369 vcpu
->arch
.complete_userspace_io
= NULL
;
11374 WARN_ON_ONCE(vcpu
->arch
.pio
.count
);
11375 WARN_ON_ONCE(vcpu
->mmio_needed
);
11378 if (kvm_run
->immediate_exit
) {
11383 r
= static_call(kvm_x86_vcpu_pre_run
)(vcpu
);
11387 r
= vcpu_run(vcpu
);
11390 kvm_put_guest_fpu(vcpu
);
11391 if (kvm_run
->kvm_valid_regs
)
11393 post_kvm_run_save(vcpu
);
11394 kvm_vcpu_srcu_read_unlock(vcpu
);
11396 kvm_sigset_deactivate(vcpu
);
11401 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11403 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
11405 * We are here if userspace calls get_regs() in the middle of
11406 * instruction emulation. Registers state needs to be copied
11407 * back from emulation context to vcpu. Userspace shouldn't do
11408 * that usually, but some bad designed PV devices (vmware
11409 * backdoor interface) need this to work
11411 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
11412 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
11414 regs
->rax
= kvm_rax_read(vcpu
);
11415 regs
->rbx
= kvm_rbx_read(vcpu
);
11416 regs
->rcx
= kvm_rcx_read(vcpu
);
11417 regs
->rdx
= kvm_rdx_read(vcpu
);
11418 regs
->rsi
= kvm_rsi_read(vcpu
);
11419 regs
->rdi
= kvm_rdi_read(vcpu
);
11420 regs
->rsp
= kvm_rsp_read(vcpu
);
11421 regs
->rbp
= kvm_rbp_read(vcpu
);
11422 #ifdef CONFIG_X86_64
11423 regs
->r8
= kvm_r8_read(vcpu
);
11424 regs
->r9
= kvm_r9_read(vcpu
);
11425 regs
->r10
= kvm_r10_read(vcpu
);
11426 regs
->r11
= kvm_r11_read(vcpu
);
11427 regs
->r12
= kvm_r12_read(vcpu
);
11428 regs
->r13
= kvm_r13_read(vcpu
);
11429 regs
->r14
= kvm_r14_read(vcpu
);
11430 regs
->r15
= kvm_r15_read(vcpu
);
11433 regs
->rip
= kvm_rip_read(vcpu
);
11434 regs
->rflags
= kvm_get_rflags(vcpu
);
11437 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11440 __get_regs(vcpu
, regs
);
11445 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11447 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
11448 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
11450 kvm_rax_write(vcpu
, regs
->rax
);
11451 kvm_rbx_write(vcpu
, regs
->rbx
);
11452 kvm_rcx_write(vcpu
, regs
->rcx
);
11453 kvm_rdx_write(vcpu
, regs
->rdx
);
11454 kvm_rsi_write(vcpu
, regs
->rsi
);
11455 kvm_rdi_write(vcpu
, regs
->rdi
);
11456 kvm_rsp_write(vcpu
, regs
->rsp
);
11457 kvm_rbp_write(vcpu
, regs
->rbp
);
11458 #ifdef CONFIG_X86_64
11459 kvm_r8_write(vcpu
, regs
->r8
);
11460 kvm_r9_write(vcpu
, regs
->r9
);
11461 kvm_r10_write(vcpu
, regs
->r10
);
11462 kvm_r11_write(vcpu
, regs
->r11
);
11463 kvm_r12_write(vcpu
, regs
->r12
);
11464 kvm_r13_write(vcpu
, regs
->r13
);
11465 kvm_r14_write(vcpu
, regs
->r14
);
11466 kvm_r15_write(vcpu
, regs
->r15
);
11469 kvm_rip_write(vcpu
, regs
->rip
);
11470 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
11472 vcpu
->arch
.exception
.pending
= false;
11473 vcpu
->arch
.exception_vmexit
.pending
= false;
11475 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11478 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11481 __set_regs(vcpu
, regs
);
11486 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11488 struct desc_ptr dt
;
11490 if (vcpu
->arch
.guest_state_protected
)
11491 goto skip_protected_regs
;
11493 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
11494 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
11495 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
11496 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
11497 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
11498 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
11500 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
11501 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11503 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
11504 sregs
->idt
.limit
= dt
.size
;
11505 sregs
->idt
.base
= dt
.address
;
11506 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
11507 sregs
->gdt
.limit
= dt
.size
;
11508 sregs
->gdt
.base
= dt
.address
;
11510 sregs
->cr2
= vcpu
->arch
.cr2
;
11511 sregs
->cr3
= kvm_read_cr3(vcpu
);
11513 skip_protected_regs
:
11514 sregs
->cr0
= kvm_read_cr0(vcpu
);
11515 sregs
->cr4
= kvm_read_cr4(vcpu
);
11516 sregs
->cr8
= kvm_get_cr8(vcpu
);
11517 sregs
->efer
= vcpu
->arch
.efer
;
11518 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
11521 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11523 __get_sregs_common(vcpu
, sregs
);
11525 if (vcpu
->arch
.guest_state_protected
)
11528 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
11529 set_bit(vcpu
->arch
.interrupt
.nr
,
11530 (unsigned long *)sregs
->interrupt_bitmap
);
11533 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11537 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
11539 if (vcpu
->arch
.guest_state_protected
)
11542 if (is_pae_paging(vcpu
)) {
11543 for (i
= 0 ; i
< 4 ; i
++)
11544 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
11545 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11549 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
11550 struct kvm_sregs
*sregs
)
11553 __get_sregs(vcpu
, sregs
);
11558 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
11559 struct kvm_mp_state
*mp_state
)
11564 if (kvm_mpx_supported())
11565 kvm_load_guest_fpu(vcpu
);
11567 r
= kvm_apic_accept_events(vcpu
);
11572 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
11573 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
11574 vcpu
->arch
.pv
.pv_unhalted
)
11575 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
11577 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
11580 if (kvm_mpx_supported())
11581 kvm_put_guest_fpu(vcpu
);
11586 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
11587 struct kvm_mp_state
*mp_state
)
11593 switch (mp_state
->mp_state
) {
11594 case KVM_MP_STATE_UNINITIALIZED
:
11595 case KVM_MP_STATE_HALTED
:
11596 case KVM_MP_STATE_AP_RESET_HOLD
:
11597 case KVM_MP_STATE_INIT_RECEIVED
:
11598 case KVM_MP_STATE_SIPI_RECEIVED
:
11599 if (!lapic_in_kernel(vcpu
))
11603 case KVM_MP_STATE_RUNNABLE
:
11611 * Pending INITs are reported using KVM_SET_VCPU_EVENTS, disallow
11612 * forcing the guest into INIT/SIPI if those events are supposed to be
11613 * blocked. KVM prioritizes SMI over INIT, so reject INIT/SIPI state
11614 * if an SMI is pending as well.
11616 if ((!kvm_apic_init_sipi_allowed(vcpu
) || vcpu
->arch
.smi_pending
) &&
11617 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
11618 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
11621 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
11622 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
11623 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
11625 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
11626 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11634 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
11635 int reason
, bool has_error_code
, u32 error_code
)
11637 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
11640 init_emulate_ctxt(vcpu
);
11642 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
11643 has_error_code
, error_code
);
11645 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11646 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11647 vcpu
->run
->internal
.ndata
= 0;
11651 kvm_rip_write(vcpu
, ctxt
->eip
);
11652 kvm_set_rflags(vcpu
, ctxt
->eflags
);
11655 EXPORT_SYMBOL_GPL(kvm_task_switch
);
11657 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11659 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
11661 * When EFER.LME and CR0.PG are set, the processor is in
11662 * 64-bit mode (though maybe in a 32-bit code segment).
11663 * CR4.PAE and EFER.LMA must be set.
11665 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
11667 if (!kvm_vcpu_is_legal_cr3(vcpu
, sregs
->cr3
))
11671 * Not in 64-bit mode: EFER.LMA is clear and the code
11672 * segment cannot be 64-bit.
11674 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
11678 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
) &&
11679 kvm_is_valid_cr0(vcpu
, sregs
->cr0
);
11682 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
11683 int *mmu_reset_needed
, bool update_pdptrs
)
11685 struct msr_data apic_base_msr
;
11687 struct desc_ptr dt
;
11689 if (!kvm_is_valid_sregs(vcpu
, sregs
))
11692 apic_base_msr
.data
= sregs
->apic_base
;
11693 apic_base_msr
.host_initiated
= true;
11694 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
11697 if (vcpu
->arch
.guest_state_protected
)
11700 dt
.size
= sregs
->idt
.limit
;
11701 dt
.address
= sregs
->idt
.base
;
11702 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
11703 dt
.size
= sregs
->gdt
.limit
;
11704 dt
.address
= sregs
->gdt
.base
;
11705 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
11707 vcpu
->arch
.cr2
= sregs
->cr2
;
11708 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
11709 vcpu
->arch
.cr3
= sregs
->cr3
;
11710 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11711 static_call_cond(kvm_x86_post_set_cr3
)(vcpu
, sregs
->cr3
);
11713 kvm_set_cr8(vcpu
, sregs
->cr8
);
11715 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
11716 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
11718 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
11719 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
11721 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
11722 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
11724 if (update_pdptrs
) {
11725 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11726 if (is_pae_paging(vcpu
)) {
11727 load_pdptrs(vcpu
, kvm_read_cr3(vcpu
));
11728 *mmu_reset_needed
= 1;
11730 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11733 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
11734 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
11735 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
11736 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
11737 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
11738 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
11740 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
11741 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11743 update_cr8_intercept(vcpu
);
11745 /* Older userspace won't unhalt the vcpu on reset. */
11746 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
11747 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
11748 !is_protmode(vcpu
))
11749 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11754 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11756 int pending_vec
, max_bits
;
11757 int mmu_reset_needed
= 0;
11758 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
11763 if (mmu_reset_needed
) {
11764 kvm_mmu_reset_context(vcpu
);
11765 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11768 max_bits
= KVM_NR_INTERRUPTS
;
11769 pending_vec
= find_first_bit(
11770 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
11772 if (pending_vec
< max_bits
) {
11773 kvm_queue_interrupt(vcpu
, pending_vec
, false);
11774 pr_debug("Set back pending irq %d\n", pending_vec
);
11775 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11780 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11782 int mmu_reset_needed
= 0;
11783 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11784 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
11785 !(sregs2
->efer
& EFER_LMA
);
11788 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
11791 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
11794 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
11795 &mmu_reset_needed
, !valid_pdptrs
);
11799 if (valid_pdptrs
) {
11800 for (i
= 0; i
< 4 ; i
++)
11801 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
11803 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
11804 mmu_reset_needed
= 1;
11805 vcpu
->arch
.pdptrs_from_userspace
= true;
11807 if (mmu_reset_needed
) {
11808 kvm_mmu_reset_context(vcpu
);
11809 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11814 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
11815 struct kvm_sregs
*sregs
)
11820 ret
= __set_sregs(vcpu
, sregs
);
11825 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm
*kvm
)
11828 struct kvm_vcpu
*vcpu
;
11834 down_write(&kvm
->arch
.apicv_update_lock
);
11836 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11837 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
) {
11842 __kvm_set_or_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_BLOCKIRQ
, set
);
11843 up_write(&kvm
->arch
.apicv_update_lock
);
11846 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
11847 struct kvm_guest_debug
*dbg
)
11849 unsigned long rflags
;
11852 if (vcpu
->arch
.guest_state_protected
)
11857 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
11859 if (kvm_is_exception_pending(vcpu
))
11861 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
11862 kvm_queue_exception(vcpu
, DB_VECTOR
);
11864 kvm_queue_exception(vcpu
, BP_VECTOR
);
11868 * Read rflags as long as potentially injected trace flags are still
11871 rflags
= kvm_get_rflags(vcpu
);
11873 vcpu
->guest_debug
= dbg
->control
;
11874 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
11875 vcpu
->guest_debug
= 0;
11877 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
11878 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
11879 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
11880 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
11882 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
11883 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
11885 kvm_update_dr7(vcpu
);
11887 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11888 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
11891 * Trigger an rflags update that will inject or remove the trace
11894 kvm_set_rflags(vcpu
, rflags
);
11896 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11898 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu
->kvm
);
11908 * Translate a guest virtual address to a guest physical address.
11910 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
11911 struct kvm_translation
*tr
)
11913 unsigned long vaddr
= tr
->linear_address
;
11919 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11920 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
11921 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11922 tr
->physical_address
= gpa
;
11923 tr
->valid
= gpa
!= INVALID_GPA
;
11931 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11933 struct fxregs_state
*fxsave
;
11935 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11940 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11941 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
11942 fpu
->fcw
= fxsave
->cwd
;
11943 fpu
->fsw
= fxsave
->swd
;
11944 fpu
->ftwx
= fxsave
->twd
;
11945 fpu
->last_opcode
= fxsave
->fop
;
11946 fpu
->last_ip
= fxsave
->rip
;
11947 fpu
->last_dp
= fxsave
->rdp
;
11948 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
11954 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11956 struct fxregs_state
*fxsave
;
11958 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11963 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11965 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
11966 fxsave
->cwd
= fpu
->fcw
;
11967 fxsave
->swd
= fpu
->fsw
;
11968 fxsave
->twd
= fpu
->ftwx
;
11969 fxsave
->fop
= fpu
->last_opcode
;
11970 fxsave
->rip
= fpu
->last_ip
;
11971 fxsave
->rdp
= fpu
->last_dp
;
11972 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
11978 static void store_regs(struct kvm_vcpu
*vcpu
)
11980 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
11982 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
11983 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11985 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
11986 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
11988 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
11989 kvm_vcpu_ioctl_x86_get_vcpu_events(
11990 vcpu
, &vcpu
->run
->s
.regs
.events
);
11993 static int sync_regs(struct kvm_vcpu
*vcpu
)
11995 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
11996 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11997 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
12000 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
12001 struct kvm_sregs sregs
= vcpu
->run
->s
.regs
.sregs
;
12003 if (__set_sregs(vcpu
, &sregs
))
12006 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
12009 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
12010 struct kvm_vcpu_events events
= vcpu
->run
->s
.regs
.events
;
12012 if (kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
))
12015 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
12021 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
12023 if (kvm_check_tsc_unstable() && kvm
->created_vcpus
)
12024 pr_warn_once("SMP vm created on host with unstable TSC; "
12025 "guest TSC will not be reliable\n");
12027 if (!kvm
->arch
.max_vcpu_ids
)
12028 kvm
->arch
.max_vcpu_ids
= KVM_MAX_VCPU_IDS
;
12030 if (id
>= kvm
->arch
.max_vcpu_ids
)
12033 return static_call(kvm_x86_vcpu_precreate
)(kvm
);
12036 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
12041 vcpu
->arch
.last_vmentry_cpu
= -1;
12042 vcpu
->arch
.regs_avail
= ~0;
12043 vcpu
->arch
.regs_dirty
= ~0;
12045 kvm_gpc_init(&vcpu
->arch
.pv_time
, vcpu
->kvm
, vcpu
, KVM_HOST_USES_PFN
);
12047 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
12048 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12050 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
12052 r
= kvm_mmu_create(vcpu
);
12056 if (irqchip_in_kernel(vcpu
->kvm
)) {
12057 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
12059 goto fail_mmu_destroy
;
12062 * Defer evaluating inhibits until the vCPU is first run, as
12063 * this vCPU will not get notified of any changes until this
12064 * vCPU is visible to other vCPUs (marked online and added to
12065 * the set of vCPUs). Opportunistically mark APICv active as
12066 * VMX in particularly is highly unlikely to have inhibits.
12067 * Ignore the current per-VM APICv state so that vCPU creation
12068 * is guaranteed to run with a deterministic value, the request
12069 * will ensure the vCPU gets the correct state before VM-Entry.
12071 if (enable_apicv
) {
12072 vcpu
->arch
.apic
->apicv_active
= true;
12073 kvm_make_request(KVM_REQ_APICV_UPDATE
, vcpu
);
12076 static_branch_inc(&kvm_has_noapic_vcpu
);
12080 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
12082 goto fail_free_lapic
;
12083 vcpu
->arch
.pio_data
= page_address(page
);
12085 vcpu
->arch
.mce_banks
= kcalloc(KVM_MAX_MCE_BANKS
* 4, sizeof(u64
),
12086 GFP_KERNEL_ACCOUNT
);
12087 vcpu
->arch
.mci_ctl2_banks
= kcalloc(KVM_MAX_MCE_BANKS
, sizeof(u64
),
12088 GFP_KERNEL_ACCOUNT
);
12089 if (!vcpu
->arch
.mce_banks
|| !vcpu
->arch
.mci_ctl2_banks
)
12090 goto fail_free_mce_banks
;
12091 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
12093 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
12094 GFP_KERNEL_ACCOUNT
))
12095 goto fail_free_mce_banks
;
12097 if (!alloc_emulate_ctxt(vcpu
))
12098 goto free_wbinvd_dirty_mask
;
12100 if (!fpu_alloc_guest_fpstate(&vcpu
->arch
.guest_fpu
)) {
12101 pr_err("failed to allocate vcpu's fpu\n");
12102 goto free_emulate_ctxt
;
12105 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
12106 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
12108 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
12110 kvm_async_pf_hash_reset(vcpu
);
12112 vcpu
->arch
.perf_capabilities
= kvm_caps
.supported_perf_cap
;
12113 kvm_pmu_init(vcpu
);
12115 vcpu
->arch
.pending_external_vector
= -1;
12116 vcpu
->arch
.preempted_in_kernel
= false;
12118 #if IS_ENABLED(CONFIG_HYPERV)
12119 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
12122 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
12124 goto free_guest_fpu
;
12126 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
12127 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
12128 kvm_xen_init_vcpu(vcpu
);
12129 kvm_vcpu_mtrr_init(vcpu
);
12131 kvm_set_tsc_khz(vcpu
, vcpu
->kvm
->arch
.default_tsc_khz
);
12132 kvm_vcpu_reset(vcpu
, false);
12133 kvm_init_mmu(vcpu
);
12138 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
12140 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
12141 free_wbinvd_dirty_mask
:
12142 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
12143 fail_free_mce_banks
:
12144 kfree(vcpu
->arch
.mce_banks
);
12145 kfree(vcpu
->arch
.mci_ctl2_banks
);
12146 free_page((unsigned long)vcpu
->arch
.pio_data
);
12148 kvm_free_lapic(vcpu
);
12150 kvm_mmu_destroy(vcpu
);
12154 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
12156 struct kvm
*kvm
= vcpu
->kvm
;
12158 if (mutex_lock_killable(&vcpu
->mutex
))
12161 kvm_synchronize_tsc(vcpu
, NULL
);
12164 /* poll control enabled by default */
12165 vcpu
->arch
.msr_kvm_poll_control
= 1;
12167 mutex_unlock(&vcpu
->mutex
);
12169 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
12170 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
12171 KVMCLOCK_SYNC_PERIOD
);
12174 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
12178 kvmclock_reset(vcpu
);
12180 static_call(kvm_x86_vcpu_free
)(vcpu
);
12182 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
12183 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
12184 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
12186 kvm_xen_destroy_vcpu(vcpu
);
12187 kvm_hv_vcpu_uninit(vcpu
);
12188 kvm_pmu_destroy(vcpu
);
12189 kfree(vcpu
->arch
.mce_banks
);
12190 kfree(vcpu
->arch
.mci_ctl2_banks
);
12191 kvm_free_lapic(vcpu
);
12192 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
12193 kvm_mmu_destroy(vcpu
);
12194 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
12195 free_page((unsigned long)vcpu
->arch
.pio_data
);
12196 kvfree(vcpu
->arch
.cpuid_entries
);
12197 if (!lapic_in_kernel(vcpu
))
12198 static_branch_dec(&kvm_has_noapic_vcpu
);
12201 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
12203 struct kvm_cpuid_entry2
*cpuid_0x1
;
12204 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
12205 unsigned long new_cr0
;
12208 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
12209 * to handle side effects. RESET emulation hits those flows and relies
12210 * on emulated/virtualized registers, including those that are loaded
12211 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
12212 * to detect improper or missing initialization.
12214 WARN_ON_ONCE(!init_event
&&
12215 (old_cr0
|| kvm_read_cr3(vcpu
) || kvm_read_cr4(vcpu
)));
12218 * SVM doesn't unconditionally VM-Exit on INIT and SHUTDOWN, thus it's
12219 * possible to INIT the vCPU while L2 is active. Force the vCPU back
12220 * into L1 as EFER.SVME is cleared on INIT (along with all other EFER
12221 * bits), i.e. virtualization is disabled.
12223 if (is_guest_mode(vcpu
))
12224 kvm_leave_nested(vcpu
);
12226 kvm_lapic_reset(vcpu
, init_event
);
12228 WARN_ON_ONCE(is_guest_mode(vcpu
) || is_smm(vcpu
));
12229 vcpu
->arch
.hflags
= 0;
12231 vcpu
->arch
.smi_pending
= 0;
12232 vcpu
->arch
.smi_count
= 0;
12233 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
12234 vcpu
->arch
.nmi_pending
= 0;
12235 vcpu
->arch
.nmi_injected
= false;
12236 kvm_clear_interrupt_queue(vcpu
);
12237 kvm_clear_exception_queue(vcpu
);
12239 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
12240 kvm_update_dr0123(vcpu
);
12241 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
12242 vcpu
->arch
.dr7
= DR7_FIXED_1
;
12243 kvm_update_dr7(vcpu
);
12245 vcpu
->arch
.cr2
= 0;
12247 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
12248 vcpu
->arch
.apf
.msr_en_val
= 0;
12249 vcpu
->arch
.apf
.msr_int_val
= 0;
12250 vcpu
->arch
.st
.msr_val
= 0;
12252 kvmclock_reset(vcpu
);
12254 kvm_clear_async_pf_completion_queue(vcpu
);
12255 kvm_async_pf_hash_reset(vcpu
);
12256 vcpu
->arch
.apf
.halted
= false;
12258 if (vcpu
->arch
.guest_fpu
.fpstate
&& kvm_mpx_supported()) {
12259 struct fpstate
*fpstate
= vcpu
->arch
.guest_fpu
.fpstate
;
12262 * All paths that lead to INIT are required to load the guest's
12263 * FPU state (because most paths are buried in KVM_RUN).
12266 kvm_put_guest_fpu(vcpu
);
12268 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDREGS
);
12269 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDCSR
);
12272 kvm_load_guest_fpu(vcpu
);
12276 vcpu
->arch
.smbase
= 0x30000;
12278 vcpu
->arch
.msr_misc_features_enables
= 0;
12279 vcpu
->arch
.ia32_misc_enable_msr
= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL
|
12280 MSR_IA32_MISC_ENABLE_BTS_UNAVAIL
;
12282 __kvm_set_xcr(vcpu
, 0, XFEATURE_MASK_FP
);
12283 __kvm_set_msr(vcpu
, MSR_IA32_XSS
, 0, true);
12286 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
12287 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
12288 kvm_register_mark_dirty(vcpu
, VCPU_REGS_RSP
);
12291 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
12292 * if no CPUID match is found. Note, it's impossible to get a match at
12293 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
12294 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
12295 * on RESET. But, go through the motions in case that's ever remedied.
12297 cpuid_0x1
= kvm_find_cpuid_entry(vcpu
, 1);
12298 kvm_rdx_write(vcpu
, cpuid_0x1
? cpuid_0x1
->eax
: 0x600);
12300 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
12302 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
12303 kvm_rip_write(vcpu
, 0xfff0);
12305 vcpu
->arch
.cr3
= 0;
12306 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
12309 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
12310 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
12311 * (or qualify) that with a footnote stating that CD/NW are preserved.
12313 new_cr0
= X86_CR0_ET
;
12315 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
12317 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
12319 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
12320 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
12321 static_call(kvm_x86_set_efer
)(vcpu
, 0);
12322 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
12325 * On the standard CR0/CR4/EFER modification paths, there are several
12326 * complex conditions determining whether the MMU has to be reset and/or
12327 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
12328 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
12329 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
12330 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
12332 if (old_cr0
& X86_CR0_PG
) {
12333 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12334 kvm_mmu_reset_context(vcpu
);
12338 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
12339 * APM states the TLBs are untouched by INIT, but it also states that
12340 * the TLBs are flushed on "External initialization of the processor."
12341 * Flush the guest TLB regardless of vendor, there is no meaningful
12342 * benefit in relying on the guest to flush the TLB immediately after
12343 * INIT. A spurious TLB flush is benign and likely negligible from a
12344 * performance perspective.
12347 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12349 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
12351 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
12353 struct kvm_segment cs
;
12355 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
12356 cs
.selector
= vector
<< 8;
12357 cs
.base
= vector
<< 12;
12358 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
12359 kvm_rip_write(vcpu
, 0);
12361 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
12363 int kvm_arch_hardware_enable(void)
12366 struct kvm_vcpu
*vcpu
;
12371 bool stable
, backwards_tsc
= false;
12373 kvm_user_return_msr_cpu_online();
12375 ret
= kvm_x86_check_processor_compatibility();
12379 ret
= static_call(kvm_x86_hardware_enable
)();
12383 local_tsc
= rdtsc();
12384 stable
= !kvm_check_tsc_unstable();
12385 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
12386 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12387 if (!stable
&& vcpu
->cpu
== smp_processor_id())
12388 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
12389 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
12390 backwards_tsc
= true;
12391 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
12392 max_tsc
= vcpu
->arch
.last_host_tsc
;
12398 * Sometimes, even reliable TSCs go backwards. This happens on
12399 * platforms that reset TSC during suspend or hibernate actions, but
12400 * maintain synchronization. We must compensate. Fortunately, we can
12401 * detect that condition here, which happens early in CPU bringup,
12402 * before any KVM threads can be running. Unfortunately, we can't
12403 * bring the TSCs fully up to date with real time, as we aren't yet far
12404 * enough into CPU bringup that we know how much real time has actually
12405 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
12406 * variables that haven't been updated yet.
12408 * So we simply find the maximum observed TSC above, then record the
12409 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
12410 * the adjustment will be applied. Note that we accumulate
12411 * adjustments, in case multiple suspend cycles happen before some VCPU
12412 * gets a chance to run again. In the event that no KVM threads get a
12413 * chance to run, we will miss the entire elapsed period, as we'll have
12414 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
12415 * loose cycle time. This isn't too big a deal, since the loss will be
12416 * uniform across all VCPUs (not to mention the scenario is extremely
12417 * unlikely). It is possible that a second hibernate recovery happens
12418 * much faster than a first, causing the observed TSC here to be
12419 * smaller; this would require additional padding adjustment, which is
12420 * why we set last_host_tsc to the local tsc observed here.
12422 * N.B. - this code below runs only on platforms with reliable TSC,
12423 * as that is the only way backwards_tsc is set above. Also note
12424 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
12425 * have the same delta_cyc adjustment applied if backwards_tsc
12426 * is detected. Note further, this adjustment is only done once,
12427 * as we reset last_host_tsc on all VCPUs to stop this from being
12428 * called multiple times (one for each physical CPU bringup).
12430 * Platforms with unreliable TSCs don't have to deal with this, they
12431 * will be compensated by the logic in vcpu_load, which sets the TSC to
12432 * catchup mode. This will catchup all VCPUs to real time, but cannot
12433 * guarantee that they stay in perfect synchronization.
12435 if (backwards_tsc
) {
12436 u64 delta_cyc
= max_tsc
- local_tsc
;
12437 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
12438 kvm
->arch
.backwards_tsc_observed
= true;
12439 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12440 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
12441 vcpu
->arch
.last_host_tsc
= local_tsc
;
12442 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
12446 * We have to disable TSC offset matching.. if you were
12447 * booting a VM while issuing an S4 host suspend....
12448 * you may have some problem. Solving this issue is
12449 * left as an exercise to the reader.
12451 kvm
->arch
.last_tsc_nsec
= 0;
12452 kvm
->arch
.last_tsc_write
= 0;
12459 void kvm_arch_hardware_disable(void)
12461 static_call(kvm_x86_hardware_disable
)();
12462 drop_user_return_notifiers();
12465 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
12467 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
12470 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
12472 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
12475 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
12476 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
12478 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
12480 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
12482 vcpu
->arch
.l1tf_flush_l1d
= true;
12483 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
12484 pmu
->need_cleanup
= true;
12485 kvm_make_request(KVM_REQ_PMU
, vcpu
);
12487 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
12490 void kvm_arch_free_vm(struct kvm
*kvm
)
12492 #if IS_ENABLED(CONFIG_HYPERV)
12493 kfree(kvm
->arch
.hv_pa_pg
);
12495 __kvm_arch_free_vm(kvm
);
12499 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
12502 unsigned long flags
;
12504 if (!kvm_is_vm_type_supported(type
))
12507 kvm
->arch
.vm_type
= type
;
12509 ret
= kvm_page_track_init(kvm
);
12513 kvm_mmu_init_vm(kvm
);
12515 ret
= static_call(kvm_x86_vm_init
)(kvm
);
12517 goto out_uninit_mmu
;
12519 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
12520 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
12522 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
12523 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
12524 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
12525 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
12526 &kvm
->arch
.irq_sources_bitmap
);
12528 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
12529 mutex_init(&kvm
->arch
.apic_map_lock
);
12530 seqcount_raw_spinlock_init(&kvm
->arch
.pvclock_sc
, &kvm
->arch
.tsc_write_lock
);
12531 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
12533 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
12534 pvclock_update_vm_gtod_copy(kvm
);
12535 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
12537 kvm
->arch
.default_tsc_khz
= max_tsc_khz
? : tsc_khz
;
12538 kvm
->arch
.guest_can_read_msr_platform_info
= true;
12539 kvm
->arch
.enable_pmu
= enable_pmu
;
12541 #if IS_ENABLED(CONFIG_HYPERV)
12542 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
12543 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
12546 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
12547 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
12549 kvm_apicv_init(kvm
);
12550 kvm_hv_init_vm(kvm
);
12551 kvm_xen_init_vm(kvm
);
12556 kvm_mmu_uninit_vm(kvm
);
12557 kvm_page_track_cleanup(kvm
);
12562 int kvm_arch_post_init_vm(struct kvm
*kvm
)
12564 return kvm_mmu_post_init_vm(kvm
);
12567 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
12570 kvm_mmu_unload(vcpu
);
12574 static void kvm_unload_vcpu_mmus(struct kvm
*kvm
)
12577 struct kvm_vcpu
*vcpu
;
12579 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12580 kvm_clear_async_pf_completion_queue(vcpu
);
12581 kvm_unload_vcpu_mmu(vcpu
);
12585 void kvm_arch_sync_events(struct kvm
*kvm
)
12587 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
12588 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
12593 * __x86_set_memory_region: Setup KVM internal memory slot
12595 * @kvm: the kvm pointer to the VM.
12596 * @id: the slot ID to setup.
12597 * @gpa: the GPA to install the slot (unused when @size == 0).
12598 * @size: the size of the slot. Set to zero to uninstall a slot.
12600 * This function helps to setup a KVM internal memory slot. Specify
12601 * @size > 0 to install a new slot, while @size == 0 to uninstall a
12602 * slot. The return code can be one of the following:
12604 * HVA: on success (uninstall will return a bogus HVA)
12607 * The caller should always use IS_ERR() to check the return value
12608 * before use. Note, the KVM internal memory slots are guaranteed to
12609 * remain valid and unchanged until the VM is destroyed, i.e., the
12610 * GPA->HVA translation will not change. However, the HVA is a user
12611 * address, i.e. its accessibility is not guaranteed, and must be
12612 * accessed via __copy_{to,from}_user().
12614 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
12618 unsigned long hva
, old_npages
;
12619 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
12620 struct kvm_memory_slot
*slot
;
12622 /* Called with kvm->slots_lock held. */
12623 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
12624 return ERR_PTR_USR(-EINVAL
);
12626 slot
= id_to_memslot(slots
, id
);
12628 if (slot
&& slot
->npages
)
12629 return ERR_PTR_USR(-EEXIST
);
12632 * MAP_SHARED to prevent internal slot pages from being moved
12635 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
12636 MAP_SHARED
| MAP_ANONYMOUS
, 0);
12637 if (IS_ERR_VALUE(hva
))
12638 return (void __user
*)hva
;
12640 if (!slot
|| !slot
->npages
)
12643 old_npages
= slot
->npages
;
12644 hva
= slot
->userspace_addr
;
12647 for (i
= 0; i
< kvm_arch_nr_memslot_as_ids(kvm
); i
++) {
12648 struct kvm_userspace_memory_region2 m
;
12650 m
.slot
= id
| (i
<< 16);
12652 m
.guest_phys_addr
= gpa
;
12653 m
.userspace_addr
= hva
;
12654 m
.memory_size
= size
;
12655 r
= __kvm_set_memory_region(kvm
, &m
);
12657 return ERR_PTR_USR(r
);
12661 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
12663 return (void __user
*)hva
;
12665 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
12667 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
12669 kvm_mmu_pre_destroy_vm(kvm
);
12672 void kvm_arch_destroy_vm(struct kvm
*kvm
)
12674 if (current
->mm
== kvm
->mm
) {
12676 * Free memory regions allocated on behalf of userspace,
12677 * unless the memory map has changed due to process exit
12680 mutex_lock(&kvm
->slots_lock
);
12681 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
12683 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
12685 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
12686 mutex_unlock(&kvm
->slots_lock
);
12688 kvm_unload_vcpu_mmus(kvm
);
12689 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
12690 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
12691 kvm_pic_destroy(kvm
);
12692 kvm_ioapic_destroy(kvm
);
12693 kvm_destroy_vcpus(kvm
);
12694 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
12695 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
12696 kvm_mmu_uninit_vm(kvm
);
12697 kvm_page_track_cleanup(kvm
);
12698 kvm_xen_destroy_vm(kvm
);
12699 kvm_hv_destroy_vm(kvm
);
12702 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
12706 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12707 kvfree(slot
->arch
.rmap
[i
]);
12708 slot
->arch
.rmap
[i
] = NULL
;
12712 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
12716 memslot_rmap_free(slot
);
12718 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12719 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12720 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12723 kvm_page_track_free_memslot(slot
);
12726 int memslot_rmap_alloc(struct kvm_memory_slot
*slot
, unsigned long npages
)
12728 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
12731 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12733 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12735 if (slot
->arch
.rmap
[i
])
12738 slot
->arch
.rmap
[i
] = __vcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
12739 if (!slot
->arch
.rmap
[i
]) {
12740 memslot_rmap_free(slot
);
12748 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
12749 struct kvm_memory_slot
*slot
)
12751 unsigned long npages
= slot
->npages
;
12755 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12756 * old arrays will be freed by __kvm_set_memory_region() if installing
12757 * the new memslot is successful.
12759 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
12761 if (kvm_memslots_have_rmaps(kvm
)) {
12762 r
= memslot_rmap_alloc(slot
, npages
);
12767 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12768 struct kvm_lpage_info
*linfo
;
12769 unsigned long ugfn
;
12773 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12775 linfo
= __vcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
12779 slot
->arch
.lpage_info
[i
- 1] = linfo
;
12781 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
12782 linfo
[0].disallow_lpage
= 1;
12783 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
12784 linfo
[lpages
- 1].disallow_lpage
= 1;
12785 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
12787 * If the gfn and userspace address are not aligned wrt each
12788 * other, disable large page support for this slot.
12790 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
12793 for (j
= 0; j
< lpages
; ++j
)
12794 linfo
[j
].disallow_lpage
= 1;
12798 #ifdef CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES
12799 kvm_mmu_init_memslot_memory_attributes(kvm
, slot
);
12802 if (kvm_page_track_create_memslot(kvm
, slot
, npages
))
12808 memslot_rmap_free(slot
);
12810 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12811 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12812 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12817 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
12819 struct kvm_vcpu
*vcpu
;
12823 * memslots->generation has been incremented.
12824 * mmio generation may have reached its maximum value.
12826 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
12828 /* Force re-initialization of steal_time cache */
12829 kvm_for_each_vcpu(i
, vcpu
, kvm
)
12830 kvm_vcpu_kick(vcpu
);
12833 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
12834 const struct kvm_memory_slot
*old
,
12835 struct kvm_memory_slot
*new,
12836 enum kvm_mr_change change
)
12839 * KVM doesn't support moving memslots when there are external page
12840 * trackers attached to the VM, i.e. if KVMGT is in use.
12842 if (change
== KVM_MR_MOVE
&& kvm_page_track_has_external_user(kvm
))
12845 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
) {
12846 if ((new->base_gfn
+ new->npages
- 1) > kvm_mmu_max_gfn())
12849 return kvm_alloc_memslot_metadata(kvm
, new);
12852 if (change
== KVM_MR_FLAGS_ONLY
)
12853 memcpy(&new->arch
, &old
->arch
, sizeof(old
->arch
));
12854 else if (WARN_ON_ONCE(change
!= KVM_MR_DELETE
))
12861 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
12865 if (!kvm_x86_ops
.cpu_dirty_log_size
)
12868 nr_slots
= atomic_read(&kvm
->nr_memslots_dirty_logging
);
12869 if ((enable
&& nr_slots
== 1) || !nr_slots
)
12870 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
12873 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
12874 struct kvm_memory_slot
*old
,
12875 const struct kvm_memory_slot
*new,
12876 enum kvm_mr_change change
)
12878 u32 old_flags
= old
? old
->flags
: 0;
12879 u32 new_flags
= new ? new->flags
: 0;
12880 bool log_dirty_pages
= new_flags
& KVM_MEM_LOG_DIRTY_PAGES
;
12883 * Update CPU dirty logging if dirty logging is being toggled. This
12884 * applies to all operations.
12886 if ((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
12887 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
12890 * Nothing more to do for RO slots (which can't be dirtied and can't be
12891 * made writable) or CREATE/MOVE/DELETE of a slot.
12893 * For a memslot with dirty logging disabled:
12894 * CREATE: No dirty mappings will already exist.
12895 * MOVE/DELETE: The old mappings will already have been cleaned up by
12896 * kvm_arch_flush_shadow_memslot()
12898 * For a memslot with dirty logging enabled:
12899 * CREATE: No shadow pages exist, thus nothing to write-protect
12900 * and no dirty bits to clear.
12901 * MOVE/DELETE: The old mappings will already have been cleaned up by
12902 * kvm_arch_flush_shadow_memslot().
12904 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new_flags
& KVM_MEM_READONLY
))
12908 * READONLY and non-flags changes were filtered out above, and the only
12909 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12910 * logging isn't being toggled on or off.
12912 if (WARN_ON_ONCE(!((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
12915 if (!log_dirty_pages
) {
12917 * Dirty logging tracks sptes in 4k granularity, meaning that
12918 * large sptes have to be split. If live migration succeeds,
12919 * the guest in the source machine will be destroyed and large
12920 * sptes will be created in the destination. However, if the
12921 * guest continues to run in the source machine (for example if
12922 * live migration fails), small sptes will remain around and
12923 * cause bad performance.
12925 * Scan sptes if dirty logging has been stopped, dropping those
12926 * which can be collapsed into a single large-page spte. Later
12927 * page faults will create the large-page sptes.
12929 kvm_mmu_zap_collapsible_sptes(kvm
, new);
12932 * Initially-all-set does not require write protecting any page,
12933 * because they're all assumed to be dirty.
12935 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
12938 if (READ_ONCE(eager_page_split
))
12939 kvm_mmu_slot_try_split_huge_pages(kvm
, new, PG_LEVEL_4K
);
12941 if (kvm_x86_ops
.cpu_dirty_log_size
) {
12942 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
12943 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
12945 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
12949 * Unconditionally flush the TLBs after enabling dirty logging.
12950 * A flush is almost always going to be necessary (see below),
12951 * and unconditionally flushing allows the helpers to omit
12952 * the subtly complex checks when removing write access.
12954 * Do the flush outside of mmu_lock to reduce the amount of
12955 * time mmu_lock is held. Flushing after dropping mmu_lock is
12956 * safe as KVM only needs to guarantee the slot is fully
12957 * write-protected before returning to userspace, i.e. before
12958 * userspace can consume the dirty status.
12960 * Flushing outside of mmu_lock requires KVM to be careful when
12961 * making decisions based on writable status of an SPTE, e.g. a
12962 * !writable SPTE doesn't guarantee a CPU can't perform writes.
12964 * Specifically, KVM also write-protects guest page tables to
12965 * monitor changes when using shadow paging, and must guarantee
12966 * no CPUs can write to those page before mmu_lock is dropped.
12967 * Because CPUs may have stale TLB entries at this point, a
12968 * !writable SPTE doesn't guarantee CPUs can't perform writes.
12970 * KVM also allows making SPTES writable outside of mmu_lock,
12971 * e.g. to allow dirty logging without taking mmu_lock.
12973 * To handle these scenarios, KVM uses a separate software-only
12974 * bit (MMU-writable) to track if a SPTE is !writable due to
12975 * a guest page table being write-protected (KVM clears the
12976 * MMU-writable flag when write-protecting for shadow paging).
12978 * The use of MMU-writable is also the primary motivation for
12979 * the unconditional flush. Because KVM must guarantee that a
12980 * CPU doesn't contain stale, writable TLB entries for a
12981 * !MMU-writable SPTE, KVM must flush if it encounters any
12982 * MMU-writable SPTE regardless of whether the actual hardware
12983 * writable bit was set. I.e. KVM is almost guaranteed to need
12984 * to flush, while unconditionally flushing allows the "remove
12985 * write access" helpers to ignore MMU-writable entirely.
12987 * See is_writable_pte() for more details (the case involving
12988 * access-tracked SPTEs is particularly relevant).
12990 kvm_flush_remote_tlbs_memslot(kvm
, new);
12994 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
12995 struct kvm_memory_slot
*old
,
12996 const struct kvm_memory_slot
*new,
12997 enum kvm_mr_change change
)
12999 if (change
== KVM_MR_DELETE
)
13000 kvm_page_track_delete_slot(kvm
, old
);
13002 if (!kvm
->arch
.n_requested_mmu_pages
&&
13003 (change
== KVM_MR_CREATE
|| change
== KVM_MR_DELETE
)) {
13004 unsigned long nr_mmu_pages
;
13006 nr_mmu_pages
= kvm
->nr_memslot_pages
/ KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO
;
13007 nr_mmu_pages
= max(nr_mmu_pages
, KVM_MIN_ALLOC_MMU_PAGES
);
13008 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
13011 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
13013 /* Free the arrays associated with the old memslot. */
13014 if (change
== KVM_MR_MOVE
)
13015 kvm_arch_free_memslot(kvm
, old
);
13018 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
13020 return (is_guest_mode(vcpu
) &&
13021 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
13024 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
13026 if (!list_empty_careful(&vcpu
->async_pf
.done
))
13029 if (kvm_apic_has_pending_init_or_sipi(vcpu
) &&
13030 kvm_apic_init_sipi_allowed(vcpu
))
13033 if (vcpu
->arch
.pv
.pv_unhalted
)
13036 if (kvm_is_exception_pending(vcpu
))
13039 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
13040 (vcpu
->arch
.nmi_pending
&&
13041 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
13044 #ifdef CONFIG_KVM_SMM
13045 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
13046 (vcpu
->arch
.smi_pending
&&
13047 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
13051 if (kvm_test_request(KVM_REQ_PMI
, vcpu
))
13054 if (kvm_arch_interrupt_allowed(vcpu
) &&
13055 (kvm_cpu_has_interrupt(vcpu
) ||
13056 kvm_guest_apic_has_interrupt(vcpu
)))
13059 if (kvm_hv_has_stimer_pending(vcpu
))
13062 if (is_guest_mode(vcpu
) &&
13063 kvm_x86_ops
.nested_ops
->has_events
&&
13064 kvm_x86_ops
.nested_ops
->has_events(vcpu
))
13067 if (kvm_xen_has_pending_events(vcpu
))
13073 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
13075 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
13078 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
13080 if (kvm_vcpu_apicv_active(vcpu
) &&
13081 static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
13087 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
13089 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
13092 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
13093 #ifdef CONFIG_KVM_SMM
13094 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
13096 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
13099 return kvm_arch_dy_has_pending_interrupt(vcpu
);
13102 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
13104 if (vcpu
->arch
.guest_state_protected
)
13107 if (vcpu
!= kvm_get_running_vcpu())
13108 return vcpu
->arch
.preempted_in_kernel
;
13110 return static_call(kvm_x86_get_cpl
)(vcpu
) == 0;
13113 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu
*vcpu
)
13115 return kvm_rip_read(vcpu
);
13118 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
13120 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
13123 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
13125 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
13128 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
13130 /* Can't read the RIP when guest state is protected, just return 0 */
13131 if (vcpu
->arch
.guest_state_protected
)
13134 if (is_64_bit_mode(vcpu
))
13135 return kvm_rip_read(vcpu
);
13136 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
13137 kvm_rip_read(vcpu
));
13139 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
13141 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
13143 return kvm_get_linear_rip(vcpu
) == linear_rip
;
13145 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
13147 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
13149 unsigned long rflags
;
13151 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
13152 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
13153 rflags
&= ~X86_EFLAGS_TF
;
13156 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
13158 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
13160 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
13161 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
13162 rflags
|= X86_EFLAGS_TF
;
13163 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
13166 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
13168 __kvm_set_rflags(vcpu
, rflags
);
13169 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
13171 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
13173 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
13175 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
13177 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
13180 static inline u32
kvm_async_pf_next_probe(u32 key
)
13182 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
13185 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13187 u32 key
= kvm_async_pf_hash_fn(gfn
);
13189 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
13190 key
= kvm_async_pf_next_probe(key
);
13192 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
13195 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13198 u32 key
= kvm_async_pf_hash_fn(gfn
);
13200 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
13201 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
13202 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
13203 key
= kvm_async_pf_next_probe(key
);
13208 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13210 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
13213 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13217 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
13219 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
13223 vcpu
->arch
.apf
.gfns
[i
] = ~0;
13225 j
= kvm_async_pf_next_probe(j
);
13226 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
13228 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
13230 * k lies cyclically in ]i,j]
13232 * |....j i.k.| or |.k..j i...|
13234 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
13235 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
13240 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
13242 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
13244 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
13248 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
13250 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
13252 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
13253 &token
, offset
, sizeof(token
));
13256 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
13258 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
13261 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
13262 &val
, offset
, sizeof(val
)))
13268 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
13271 if (!kvm_pv_async_pf_enabled(vcpu
))
13274 if (vcpu
->arch
.apf
.send_user_only
&&
13275 static_call(kvm_x86_get_cpl
)(vcpu
) == 0)
13278 if (is_guest_mode(vcpu
)) {
13280 * L1 needs to opt into the special #PF vmexits that are
13281 * used to deliver async page faults.
13283 return vcpu
->arch
.apf
.delivery_as_pf_vmexit
;
13286 * Play it safe in case the guest temporarily disables paging.
13287 * The real mode IDT in particular is unlikely to have a #PF
13290 return is_paging(vcpu
);
13294 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
13296 if (unlikely(!lapic_in_kernel(vcpu
) ||
13297 kvm_event_needs_reinjection(vcpu
) ||
13298 kvm_is_exception_pending(vcpu
)))
13301 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
13305 * If interrupts are off we cannot even use an artificial
13308 return kvm_arch_interrupt_allowed(vcpu
);
13311 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
13312 struct kvm_async_pf
*work
)
13314 struct x86_exception fault
;
13316 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
13317 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
13319 if (kvm_can_deliver_async_pf(vcpu
) &&
13320 !apf_put_user_notpresent(vcpu
)) {
13321 fault
.vector
= PF_VECTOR
;
13322 fault
.error_code_valid
= true;
13323 fault
.error_code
= 0;
13324 fault
.nested_page_fault
= false;
13325 fault
.address
= work
->arch
.token
;
13326 fault
.async_page_fault
= true;
13327 kvm_inject_page_fault(vcpu
, &fault
);
13331 * It is not possible to deliver a paravirtualized asynchronous
13332 * page fault, but putting the guest in an artificial halt state
13333 * can be beneficial nevertheless: if an interrupt arrives, we
13334 * can deliver it timely and perhaps the guest will schedule
13335 * another process. When the instruction that triggered a page
13336 * fault is retried, hopefully the page will be ready in the host.
13338 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
13343 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
13344 struct kvm_async_pf
*work
)
13346 struct kvm_lapic_irq irq
= {
13347 .delivery_mode
= APIC_DM_FIXED
,
13348 .vector
= vcpu
->arch
.apf
.vec
13351 if (work
->wakeup_all
)
13352 work
->arch
.token
= ~0; /* broadcast wakeup */
13354 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
13355 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
13357 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
13358 kvm_pv_async_pf_enabled(vcpu
) &&
13359 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
13360 vcpu
->arch
.apf
.pageready_pending
= true;
13361 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
13364 vcpu
->arch
.apf
.halted
= false;
13365 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
13368 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
13370 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
13371 if (!vcpu
->arch
.apf
.pageready_pending
)
13372 kvm_vcpu_kick(vcpu
);
13375 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
13377 if (!kvm_pv_async_pf_enabled(vcpu
))
13380 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
13383 void kvm_arch_start_assignment(struct kvm
*kvm
)
13385 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
13386 static_call_cond(kvm_x86_pi_start_assignment
)(kvm
);
13388 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
13390 void kvm_arch_end_assignment(struct kvm
*kvm
)
13392 atomic_dec(&kvm
->arch
.assigned_device_count
);
13394 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
13396 bool noinstr
kvm_arch_has_assigned_device(struct kvm
*kvm
)
13398 return raw_atomic_read(&kvm
->arch
.assigned_device_count
);
13400 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
13402 static void kvm_noncoherent_dma_assignment_start_or_stop(struct kvm
*kvm
)
13405 * Non-coherent DMA assignment and de-assignment will affect
13406 * whether KVM honors guest MTRRs and cause changes in memtypes
13408 * So, pass %true unconditionally to indicate non-coherent DMA was,
13409 * or will be involved, and that zapping SPTEs might be necessary.
13411 if (__kvm_mmu_honors_guest_mtrrs(true))
13412 kvm_zap_gfn_range(kvm
, gpa_to_gfn(0), gpa_to_gfn(~0ULL));
13415 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
13417 if (atomic_inc_return(&kvm
->arch
.noncoherent_dma_count
) == 1)
13418 kvm_noncoherent_dma_assignment_start_or_stop(kvm
);
13420 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
13422 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
13424 if (!atomic_dec_return(&kvm
->arch
.noncoherent_dma_count
))
13425 kvm_noncoherent_dma_assignment_start_or_stop(kvm
);
13427 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
13429 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
13431 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
13433 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
13435 bool kvm_arch_has_irq_bypass(void)
13437 return enable_apicv
&& irq_remapping_cap(IRQ_POSTING_CAP
);
13440 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
13441 struct irq_bypass_producer
*prod
)
13443 struct kvm_kernel_irqfd
*irqfd
=
13444 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
13447 irqfd
->producer
= prod
;
13448 kvm_arch_start_assignment(irqfd
->kvm
);
13449 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
,
13450 prod
->irq
, irqfd
->gsi
, 1);
13453 kvm_arch_end_assignment(irqfd
->kvm
);
13458 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
13459 struct irq_bypass_producer
*prod
)
13462 struct kvm_kernel_irqfd
*irqfd
=
13463 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
13465 WARN_ON(irqfd
->producer
!= prod
);
13466 irqfd
->producer
= NULL
;
13469 * When producer of consumer is unregistered, we change back to
13470 * remapped mode, so we can re-use the current implementation
13471 * when the irq is masked/disabled or the consumer side (KVM
13472 * int this case doesn't want to receive the interrupts.
13474 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
13476 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
13477 " fails: %d\n", irqfd
->consumer
.token
, ret
);
13479 kvm_arch_end_assignment(irqfd
->kvm
);
13482 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
13483 uint32_t guest_irq
, bool set
)
13485 return static_call(kvm_x86_pi_update_irte
)(kvm
, host_irq
, guest_irq
, set
);
13488 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry
*old
,
13489 struct kvm_kernel_irq_routing_entry
*new)
13491 if (new->type
!= KVM_IRQ_ROUTING_MSI
)
13494 return !!memcmp(&old
->msi
, &new->msi
, sizeof(new->msi
));
13497 bool kvm_vector_hashing_enabled(void)
13499 return vector_hashing
;
13502 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
13504 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
13506 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
13509 int kvm_spec_ctrl_test_value(u64 value
)
13512 * test that setting IA32_SPEC_CTRL to given value
13513 * is allowed by the host processor
13517 unsigned long flags
;
13520 local_irq_save(flags
);
13522 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
13524 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
13527 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
13529 local_irq_restore(flags
);
13533 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
13535 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
13537 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
13538 struct x86_exception fault
;
13539 u64 access
= error_code
&
13540 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
13542 if (!(error_code
& PFERR_PRESENT_MASK
) ||
13543 mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, &fault
) != INVALID_GPA
) {
13545 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
13546 * tables probably do not match the TLB. Just proceed
13547 * with the error code that the processor gave.
13549 fault
.vector
= PF_VECTOR
;
13550 fault
.error_code_valid
= true;
13551 fault
.error_code
= error_code
;
13552 fault
.nested_page_fault
= false;
13553 fault
.address
= gva
;
13554 fault
.async_page_fault
= false;
13556 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
13558 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
13561 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
13562 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
13563 * indicates whether exit to userspace is needed.
13565 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
13566 struct x86_exception
*e
)
13568 if (r
== X86EMUL_PROPAGATE_FAULT
) {
13569 if (KVM_BUG_ON(!e
, vcpu
->kvm
))
13572 kvm_inject_emulated_page_fault(vcpu
, e
);
13577 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
13578 * while handling a VMX instruction KVM could've handled the request
13579 * correctly by exiting to userspace and performing I/O but there
13580 * doesn't seem to be a real use-case behind such requests, just return
13581 * KVM_EXIT_INTERNAL_ERROR for now.
13583 kvm_prepare_emulation_failure_exit(vcpu
);
13587 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
13589 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
13592 struct x86_exception e
;
13599 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
13600 if (r
!= X86EMUL_CONTINUE
)
13601 return kvm_handle_memory_failure(vcpu
, r
, &e
);
13603 if (operand
.pcid
>> 12 != 0) {
13604 kvm_inject_gp(vcpu
, 0);
13608 pcid_enabled
= kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
);
13611 case INVPCID_TYPE_INDIV_ADDR
:
13613 * LAM doesn't apply to addresses that are inputs to TLB
13616 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
13617 is_noncanonical_address(operand
.gla
, vcpu
)) {
13618 kvm_inject_gp(vcpu
, 0);
13621 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
13622 return kvm_skip_emulated_instruction(vcpu
);
13624 case INVPCID_TYPE_SINGLE_CTXT
:
13625 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
13626 kvm_inject_gp(vcpu
, 0);
13630 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
13631 return kvm_skip_emulated_instruction(vcpu
);
13633 case INVPCID_TYPE_ALL_NON_GLOBAL
:
13635 * Currently, KVM doesn't mark global entries in the shadow
13636 * page tables, so a non-global flush just degenerates to a
13637 * global flush. If needed, we could optimize this later by
13638 * keeping track of global entries in shadow page tables.
13642 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
13643 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
13644 return kvm_skip_emulated_instruction(vcpu
);
13647 kvm_inject_gp(vcpu
, 0);
13651 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
13653 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
13655 struct kvm_run
*run
= vcpu
->run
;
13656 struct kvm_mmio_fragment
*frag
;
13659 BUG_ON(!vcpu
->mmio_needed
);
13661 /* Complete previous fragment */
13662 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
13663 len
= min(8u, frag
->len
);
13664 if (!vcpu
->mmio_is_write
)
13665 memcpy(frag
->data
, run
->mmio
.data
, len
);
13667 if (frag
->len
<= 8) {
13668 /* Switch to the next fragment. */
13670 vcpu
->mmio_cur_fragment
++;
13672 /* Go forward to the next mmio piece. */
13678 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
13679 vcpu
->mmio_needed
= 0;
13681 // VMG change, at this point, we're always done
13682 // RIP has already been advanced
13686 // More MMIO is needed
13687 run
->mmio
.phys_addr
= frag
->gpa
;
13688 run
->mmio
.len
= min(8u, frag
->len
);
13689 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
13690 if (run
->mmio
.is_write
)
13691 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
13692 run
->exit_reason
= KVM_EXIT_MMIO
;
13694 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13699 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
13703 struct kvm_mmio_fragment
*frag
;
13708 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
13709 if (handled
== bytes
)
13716 /*TODO: Check if need to increment number of frags */
13717 frag
= vcpu
->mmio_fragments
;
13718 vcpu
->mmio_nr_fragments
= 1;
13723 vcpu
->mmio_needed
= 1;
13724 vcpu
->mmio_cur_fragment
= 0;
13726 vcpu
->run
->mmio
.phys_addr
= gpa
;
13727 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
13728 vcpu
->run
->mmio
.is_write
= 1;
13729 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
13730 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
13732 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13736 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
13738 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
13742 struct kvm_mmio_fragment
*frag
;
13747 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
13748 if (handled
== bytes
)
13755 /*TODO: Check if need to increment number of frags */
13756 frag
= vcpu
->mmio_fragments
;
13757 vcpu
->mmio_nr_fragments
= 1;
13762 vcpu
->mmio_needed
= 1;
13763 vcpu
->mmio_cur_fragment
= 0;
13765 vcpu
->run
->mmio
.phys_addr
= gpa
;
13766 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
13767 vcpu
->run
->mmio
.is_write
= 0;
13768 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
13770 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13774 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
13776 static void advance_sev_es_emulated_pio(struct kvm_vcpu
*vcpu
, unsigned count
, int size
)
13778 vcpu
->arch
.sev_pio_count
-= count
;
13779 vcpu
->arch
.sev_pio_data
+= count
* size
;
13782 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13783 unsigned int port
);
13785 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
13787 int size
= vcpu
->arch
.pio
.size
;
13788 int port
= vcpu
->arch
.pio
.port
;
13790 vcpu
->arch
.pio
.count
= 0;
13791 if (vcpu
->arch
.sev_pio_count
)
13792 return kvm_sev_es_outs(vcpu
, size
, port
);
13796 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13800 unsigned int count
=
13801 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13802 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
13804 /* memcpy done already by emulator_pio_out. */
13805 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13809 /* Emulation done by the kernel. */
13810 if (!vcpu
->arch
.sev_pio_count
)
13814 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
13818 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13819 unsigned int port
);
13821 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
13823 unsigned count
= vcpu
->arch
.pio
.count
;
13824 int size
= vcpu
->arch
.pio
.size
;
13825 int port
= vcpu
->arch
.pio
.port
;
13827 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
13828 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13829 if (vcpu
->arch
.sev_pio_count
)
13830 return kvm_sev_es_ins(vcpu
, size
, port
);
13834 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13838 unsigned int count
=
13839 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13840 if (!emulator_pio_in(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
))
13843 /* Emulation done by the kernel. */
13844 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13845 if (!vcpu
->arch
.sev_pio_count
)
13849 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
13853 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
13854 unsigned int port
, void *data
, unsigned int count
,
13857 vcpu
->arch
.sev_pio_data
= data
;
13858 vcpu
->arch
.sev_pio_count
= count
;
13859 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
13860 : kvm_sev_es_outs(vcpu
, size
, port
);
13862 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
13864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
13865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
13866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
13867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
13868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
13869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
13870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
13871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter
);
13872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
13873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
13874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
13875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
13876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
13877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
13878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
13879 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
13880 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
13881 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
13882 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
13883 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
13884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
13885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
13886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath
);
13887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_doorbell
);
13888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq
);
13889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
13890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
13891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
13892 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);
13894 static int __init
kvm_x86_init(void)
13896 kvm_mmu_x86_module_init();
13897 mitigate_smt_rsb
&= boot_cpu_has_bug(X86_BUG_SMT_RSB
) && cpu_smt_possible();
13900 module_init(kvm_x86_init
);
13902 static void __exit
kvm_x86_exit(void)
13905 * If module_init() is implemented, module_exit() must also be
13906 * implemented to allow module unload.
13909 module_exit(kvm_x86_exit
);