1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/export.h>
38 #include <linux/moduleparam.h>
39 #include <linux/mman.h>
40 #include <linux/highmem.h>
41 #include <linux/iommu.h>
42 #include <linux/intel-iommu.h>
43 #include <linux/cpufreq.h>
44 #include <linux/user-return-notifier.h>
45 #include <linux/srcu.h>
46 #include <linux/slab.h>
47 #include <linux/perf_event.h>
48 #include <linux/uaccess.h>
49 #include <linux/hash.h>
50 #include <linux/pci.h>
51 #include <linux/timekeeper_internal.h>
52 #include <linux/pvclock_gtod.h>
53 #include <linux/kvm_irqfd.h>
54 #include <linux/irqbypass.h>
55 #include <linux/sched/stat.h>
56 #include <linux/sched/isolation.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
70 #include <asm/mshyperv.h>
71 #include <asm/hypervisor.h>
72 #include <asm/intel_pt.h>
73 #include <asm/emulate_prefix.h>
74 #include <clocksource/hyperv_timer.h>
76 #define CREATE_TRACE_POINTS
79 #define MAX_IO_MSRS 256
80 #define KVM_MAX_MCE_BANKS 32
81 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
82 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
84 #define emul_to_vcpu(ctxt) \
85 ((struct kvm_vcpu *)(ctxt)->vcpu)
88 * - enable syscall per default because its emulated by KVM
89 * - enable LME and LMA per default on 64 bit KVM
93 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
95 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
98 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
100 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
101 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
104 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
106 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
107 static void process_nmi(struct kvm_vcpu
*vcpu
);
108 static void enter_smm(struct kvm_vcpu
*vcpu
);
109 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
110 static void store_regs(struct kvm_vcpu
*vcpu
);
111 static int sync_regs(struct kvm_vcpu
*vcpu
);
113 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
114 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
116 static bool __read_mostly ignore_msrs
= 0;
117 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
119 static bool __read_mostly report_ignored_msrs
= true;
120 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
122 unsigned int min_timer_period_us
= 200;
123 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
125 static bool __read_mostly kvmclock_periodic_sync
= true;
126 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
128 bool __read_mostly kvm_has_tsc_control
;
129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
130 u32 __read_mostly kvm_max_guest_tsc_khz
;
131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
132 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
134 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
136 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
140 static u32 __read_mostly tsc_tolerance_ppm
= 250;
141 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
144 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
145 * adaptive tuning starting from default advancment of 1000ns. '0' disables
146 * advancement entirely. Any other value is used as-is and disables adaptive
147 * tuning, i.e. allows priveleged userspace to set an exact advancement time.
149 static int __read_mostly lapic_timer_advance_ns
= -1;
150 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
152 static bool __read_mostly vector_hashing
= true;
153 module_param(vector_hashing
, bool, S_IRUGO
);
155 bool __read_mostly enable_vmware_backdoor
= false;
156 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
159 static bool __read_mostly force_emulation_prefix
= false;
160 module_param(force_emulation_prefix
, bool, S_IRUGO
);
162 int __read_mostly pi_inject_timer
= -1;
163 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
165 #define KVM_NR_SHARED_MSRS 16
167 struct kvm_shared_msrs_global
{
169 u32 msrs
[KVM_NR_SHARED_MSRS
];
172 struct kvm_shared_msrs
{
173 struct user_return_notifier urn
;
175 struct kvm_shared_msr_values
{
178 } values
[KVM_NR_SHARED_MSRS
];
181 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
182 static struct kvm_shared_msrs __percpu
*shared_msrs
;
184 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
185 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
186 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
187 | XFEATURE_MASK_PKRU)
189 u64 __read_mostly host_efer
;
190 EXPORT_SYMBOL_GPL(host_efer
);
192 static u64 __read_mostly host_xss
;
193 u64 __read_mostly supported_xss
;
194 EXPORT_SYMBOL_GPL(supported_xss
);
196 struct kvm_stats_debugfs_item debugfs_entries
[] = {
197 { "pf_fixed", VCPU_STAT(pf_fixed
) },
198 { "pf_guest", VCPU_STAT(pf_guest
) },
199 { "tlb_flush", VCPU_STAT(tlb_flush
) },
200 { "invlpg", VCPU_STAT(invlpg
) },
201 { "exits", VCPU_STAT(exits
) },
202 { "io_exits", VCPU_STAT(io_exits
) },
203 { "mmio_exits", VCPU_STAT(mmio_exits
) },
204 { "signal_exits", VCPU_STAT(signal_exits
) },
205 { "irq_window", VCPU_STAT(irq_window_exits
) },
206 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
207 { "halt_exits", VCPU_STAT(halt_exits
) },
208 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
209 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
210 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
211 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
212 { "hypercalls", VCPU_STAT(hypercalls
) },
213 { "request_irq", VCPU_STAT(request_irq_exits
) },
214 { "irq_exits", VCPU_STAT(irq_exits
) },
215 { "host_state_reload", VCPU_STAT(host_state_reload
) },
216 { "fpu_reload", VCPU_STAT(fpu_reload
) },
217 { "insn_emulation", VCPU_STAT(insn_emulation
) },
218 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
219 { "irq_injections", VCPU_STAT(irq_injections
) },
220 { "nmi_injections", VCPU_STAT(nmi_injections
) },
221 { "req_event", VCPU_STAT(req_event
) },
222 { "l1d_flush", VCPU_STAT(l1d_flush
) },
223 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
224 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
225 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
226 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
227 { "mmu_flooded", VM_STAT(mmu_flooded
) },
228 { "mmu_recycled", VM_STAT(mmu_recycled
) },
229 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
230 { "mmu_unsync", VM_STAT(mmu_unsync
) },
231 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
232 { "largepages", VM_STAT(lpages
, .mode
= 0444) },
233 { "nx_largepages_splitted", VM_STAT(nx_lpage_splits
, .mode
= 0444) },
234 { "max_mmu_page_hash_collisions",
235 VM_STAT(max_mmu_page_hash_collisions
) },
239 u64 __read_mostly host_xcr0
;
240 u64 __read_mostly supported_xcr0
;
241 EXPORT_SYMBOL_GPL(supported_xcr0
);
243 struct kmem_cache
*x86_fpu_cache
;
244 EXPORT_SYMBOL_GPL(x86_fpu_cache
);
246 static struct kmem_cache
*x86_emulator_cache
;
248 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
250 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
251 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
253 return kmem_cache_create_usercopy("x86_emulator", size
,
254 __alignof__(struct x86_emulate_ctxt
),
255 SLAB_ACCOUNT
, useroffset
,
256 size
- useroffset
, NULL
);
259 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
261 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
264 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
265 vcpu
->arch
.apf
.gfns
[i
] = ~0;
268 static void kvm_on_user_return(struct user_return_notifier
*urn
)
271 struct kvm_shared_msrs
*locals
272 = container_of(urn
, struct kvm_shared_msrs
, urn
);
273 struct kvm_shared_msr_values
*values
;
277 * Disabling irqs at this point since the following code could be
278 * interrupted and executed through kvm_arch_hardware_disable()
280 local_irq_save(flags
);
281 if (locals
->registered
) {
282 locals
->registered
= false;
283 user_return_notifier_unregister(urn
);
285 local_irq_restore(flags
);
286 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
287 values
= &locals
->values
[slot
];
288 if (values
->host
!= values
->curr
) {
289 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
290 values
->curr
= values
->host
;
295 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
297 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
298 shared_msrs_global
.msrs
[slot
] = msr
;
299 if (slot
>= shared_msrs_global
.nr
)
300 shared_msrs_global
.nr
= slot
+ 1;
302 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
304 static void kvm_shared_msr_cpu_online(void)
306 unsigned int cpu
= smp_processor_id();
307 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
311 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
) {
312 rdmsrl_safe(shared_msrs_global
.msrs
[i
], &value
);
313 smsr
->values
[i
].host
= value
;
314 smsr
->values
[i
].curr
= value
;
318 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
320 unsigned int cpu
= smp_processor_id();
321 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
324 value
= (value
& mask
) | (smsr
->values
[slot
].host
& ~mask
);
325 if (value
== smsr
->values
[slot
].curr
)
327 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
331 smsr
->values
[slot
].curr
= value
;
332 if (!smsr
->registered
) {
333 smsr
->urn
.on_user_return
= kvm_on_user_return
;
334 user_return_notifier_register(&smsr
->urn
);
335 smsr
->registered
= true;
339 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
341 static void drop_user_return_notifiers(void)
343 unsigned int cpu
= smp_processor_id();
344 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
346 if (smsr
->registered
)
347 kvm_on_user_return(&smsr
->urn
);
350 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
352 return vcpu
->arch
.apic_base
;
354 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
356 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
358 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
360 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
362 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
364 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
365 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
366 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
367 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
369 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
371 if (!msr_info
->host_initiated
) {
372 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
374 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
378 kvm_lapic_set_base(vcpu
, msr_info
->data
);
379 kvm_recalculate_apic_map(vcpu
->kvm
);
382 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
384 asmlinkage __visible
void kvm_spurious_fault(void)
386 /* Fault while not rebooting. We want the trace. */
387 BUG_ON(!kvm_rebooting
);
389 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
391 #define EXCPT_BENIGN 0
392 #define EXCPT_CONTRIBUTORY 1
395 static int exception_class(int vector
)
405 return EXCPT_CONTRIBUTORY
;
412 #define EXCPT_FAULT 0
414 #define EXCPT_ABORT 2
415 #define EXCPT_INTERRUPT 3
417 static int exception_type(int vector
)
421 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
422 return EXCPT_INTERRUPT
;
426 /* #DB is trap, as instruction watchpoints are handled elsewhere */
427 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
430 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
433 /* Reserved exceptions will result in fault */
437 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
439 unsigned nr
= vcpu
->arch
.exception
.nr
;
440 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
441 unsigned long payload
= vcpu
->arch
.exception
.payload
;
449 * "Certain debug exceptions may clear bit 0-3. The
450 * remaining contents of the DR6 register are never
451 * cleared by the processor".
453 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
455 * DR6.RTM is set by all #DB exceptions that don't clear it.
457 vcpu
->arch
.dr6
|= DR6_RTM
;
458 vcpu
->arch
.dr6
|= payload
;
460 * Bit 16 should be set in the payload whenever the #DB
461 * exception should clear DR6.RTM. This makes the payload
462 * compatible with the pending debug exceptions under VMX.
463 * Though not currently documented in the SDM, this also
464 * makes the payload compatible with the exit qualification
465 * for #DB exceptions under VMX.
467 vcpu
->arch
.dr6
^= payload
& DR6_RTM
;
470 * The #DB payload is defined as compatible with the 'pending
471 * debug exceptions' field under VMX, not DR6. While bit 12 is
472 * defined in the 'pending debug exceptions' field (enabled
473 * breakpoint), it is reserved and must be zero in DR6.
475 vcpu
->arch
.dr6
&= ~BIT(12);
478 vcpu
->arch
.cr2
= payload
;
482 vcpu
->arch
.exception
.has_payload
= false;
483 vcpu
->arch
.exception
.payload
= 0;
485 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
487 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
488 unsigned nr
, bool has_error
, u32 error_code
,
489 bool has_payload
, unsigned long payload
, bool reinject
)
494 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
496 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
498 if (has_error
&& !is_protmode(vcpu
))
502 * On vmentry, vcpu->arch.exception.pending is only
503 * true if an event injection was blocked by
504 * nested_run_pending. In that case, however,
505 * vcpu_enter_guest requests an immediate exit,
506 * and the guest shouldn't proceed far enough to
509 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
510 vcpu
->arch
.exception
.injected
= true;
511 if (WARN_ON_ONCE(has_payload
)) {
513 * A reinjected event has already
514 * delivered its payload.
520 vcpu
->arch
.exception
.pending
= true;
521 vcpu
->arch
.exception
.injected
= false;
523 vcpu
->arch
.exception
.has_error_code
= has_error
;
524 vcpu
->arch
.exception
.nr
= nr
;
525 vcpu
->arch
.exception
.error_code
= error_code
;
526 vcpu
->arch
.exception
.has_payload
= has_payload
;
527 vcpu
->arch
.exception
.payload
= payload
;
528 if (!is_guest_mode(vcpu
))
529 kvm_deliver_exception_payload(vcpu
);
533 /* to check exception */
534 prev_nr
= vcpu
->arch
.exception
.nr
;
535 if (prev_nr
== DF_VECTOR
) {
536 /* triple fault -> shutdown */
537 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
540 class1
= exception_class(prev_nr
);
541 class2
= exception_class(nr
);
542 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
543 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
545 * Generate double fault per SDM Table 5-5. Set
546 * exception.pending = true so that the double fault
547 * can trigger a nested vmexit.
549 vcpu
->arch
.exception
.pending
= true;
550 vcpu
->arch
.exception
.injected
= false;
551 vcpu
->arch
.exception
.has_error_code
= true;
552 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
553 vcpu
->arch
.exception
.error_code
= 0;
554 vcpu
->arch
.exception
.has_payload
= false;
555 vcpu
->arch
.exception
.payload
= 0;
557 /* replace previous exception with a new one in a hope
558 that instruction re-execution will regenerate lost
563 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
565 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
567 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
569 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
571 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
573 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
575 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
576 unsigned long payload
)
578 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
580 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
582 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
583 u32 error_code
, unsigned long payload
)
585 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
586 true, payload
, false);
589 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
592 kvm_inject_gp(vcpu
, 0);
594 return kvm_skip_emulated_instruction(vcpu
);
598 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
600 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
602 ++vcpu
->stat
.pf_guest
;
603 vcpu
->arch
.exception
.nested_apf
=
604 is_guest_mode(vcpu
) && fault
->async_page_fault
;
605 if (vcpu
->arch
.exception
.nested_apf
) {
606 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
607 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
609 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
613 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
615 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
617 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
618 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
620 vcpu
->arch
.mmu
->inject_page_fault(vcpu
, fault
);
622 return fault
->nested_page_fault
;
625 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
627 atomic_inc(&vcpu
->arch
.nmi_queued
);
628 kvm_make_request(KVM_REQ_NMI
, vcpu
);
630 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
632 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
634 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
636 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
638 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
640 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
642 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
645 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
646 * a #GP and return false.
648 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
650 if (kvm_x86_ops
.get_cpl(vcpu
) <= required_cpl
)
652 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
655 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
657 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
659 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
662 kvm_queue_exception(vcpu
, UD_VECTOR
);
665 EXPORT_SYMBOL_GPL(kvm_require_dr
);
668 * This function will be used to read from the physical memory of the currently
669 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
670 * can read from guest physical or from the guest's guest physical memory.
672 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
673 gfn_t ngfn
, void *data
, int offset
, int len
,
676 struct x86_exception exception
;
680 ngpa
= gfn_to_gpa(ngfn
);
681 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
682 if (real_gfn
== UNMAPPED_GVA
)
685 real_gfn
= gpa_to_gfn(real_gfn
);
687 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
689 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
691 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
692 void *data
, int offset
, int len
, u32 access
)
694 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
695 data
, offset
, len
, access
);
698 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
700 return rsvd_bits(cpuid_maxphyaddr(vcpu
), 63) | rsvd_bits(5, 8) |
705 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
707 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
709 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
710 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
713 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
715 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
716 offset
* sizeof(u64
), sizeof(pdpte
),
717 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
722 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
723 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
724 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
731 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
732 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
738 EXPORT_SYMBOL_GPL(load_pdptrs
);
740 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
742 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
747 if (!is_pae_paging(vcpu
))
750 if (!kvm_register_is_available(vcpu
, VCPU_EXREG_PDPTR
))
753 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
754 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
755 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
756 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
760 return memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
762 EXPORT_SYMBOL_GPL(pdptrs_changed
);
764 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
766 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
767 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
772 if (cr0
& 0xffffffff00000000UL
)
776 cr0
&= ~CR0_RESERVED_BITS
;
778 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
781 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
784 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
786 if ((vcpu
->arch
.efer
& EFER_LME
)) {
791 kvm_x86_ops
.get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
796 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
801 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
804 kvm_x86_ops
.set_cr0(vcpu
, cr0
);
806 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
807 kvm_clear_async_pf_completion_queue(vcpu
);
808 kvm_async_pf_hash_reset(vcpu
);
811 if ((cr0
^ old_cr0
) & update_bits
)
812 kvm_mmu_reset_context(vcpu
);
814 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
815 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
816 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
817 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
821 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
823 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
825 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
827 EXPORT_SYMBOL_GPL(kvm_lmsw
);
829 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
831 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
833 if (vcpu
->arch
.xcr0
!= host_xcr0
)
834 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
836 if (vcpu
->arch
.xsaves_enabled
&&
837 vcpu
->arch
.ia32_xss
!= host_xss
)
838 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
841 if (static_cpu_has(X86_FEATURE_PKU
) &&
842 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
843 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
844 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
845 __write_pkru(vcpu
->arch
.pkru
);
847 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
849 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
851 if (static_cpu_has(X86_FEATURE_PKU
) &&
852 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
853 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
854 vcpu
->arch
.pkru
= rdpkru();
855 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
856 __write_pkru(vcpu
->arch
.host_pkru
);
859 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
861 if (vcpu
->arch
.xcr0
!= host_xcr0
)
862 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
864 if (vcpu
->arch
.xsaves_enabled
&&
865 vcpu
->arch
.ia32_xss
!= host_xss
)
866 wrmsrl(MSR_IA32_XSS
, host_xss
);
870 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
872 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
875 u64 old_xcr0
= vcpu
->arch
.xcr0
;
878 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
879 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
881 if (!(xcr0
& XFEATURE_MASK_FP
))
883 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
887 * Do not allow the guest to set bits that we do not support
888 * saving. However, xcr0 bit 0 is always set, even if the
889 * emulated CPU does not support XSAVE (see fx_init).
891 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
892 if (xcr0
& ~valid_bits
)
895 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
896 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
899 if (xcr0
& XFEATURE_MASK_AVX512
) {
900 if (!(xcr0
& XFEATURE_MASK_YMM
))
902 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
905 vcpu
->arch
.xcr0
= xcr0
;
907 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
908 kvm_update_cpuid(vcpu
);
912 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
914 if (kvm_x86_ops
.get_cpl(vcpu
) != 0 ||
915 __kvm_set_xcr(vcpu
, index
, xcr
)) {
916 kvm_inject_gp(vcpu
, 0);
921 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
923 #define __cr4_reserved_bits(__cpu_has, __c) \
925 u64 __reserved_bits = CR4_RESERVED_BITS; \
927 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \
928 __reserved_bits |= X86_CR4_OSXSAVE; \
929 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \
930 __reserved_bits |= X86_CR4_SMEP; \
931 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \
932 __reserved_bits |= X86_CR4_SMAP; \
933 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \
934 __reserved_bits |= X86_CR4_FSGSBASE; \
935 if (!__cpu_has(__c, X86_FEATURE_PKU)) \
936 __reserved_bits |= X86_CR4_PKE; \
937 if (!__cpu_has(__c, X86_FEATURE_LA57)) \
938 __reserved_bits |= X86_CR4_LA57; \
939 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \
940 __reserved_bits |= X86_CR4_UMIP; \
944 static int kvm_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
946 if (cr4
& cr4_reserved_bits
)
949 if (cr4
& __cr4_reserved_bits(guest_cpuid_has
, vcpu
))
955 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
957 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
958 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
959 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
961 if (kvm_valid_cr4(vcpu
, cr4
))
964 if (is_long_mode(vcpu
)) {
965 if (!(cr4
& X86_CR4_PAE
))
967 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
968 && ((cr4
^ old_cr4
) & pdptr_bits
)
969 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
973 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
974 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
977 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
978 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
982 if (kvm_x86_ops
.set_cr4(vcpu
, cr4
))
985 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
986 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
987 kvm_mmu_reset_context(vcpu
);
989 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
990 kvm_update_cpuid(vcpu
);
994 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
996 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
998 bool skip_tlb_flush
= false;
1000 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1003 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1004 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1008 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
1009 if (!skip_tlb_flush
) {
1010 kvm_mmu_sync_roots(vcpu
);
1011 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
1016 if (is_long_mode(vcpu
) &&
1017 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
1019 else if (is_pae_paging(vcpu
) &&
1020 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1023 kvm_mmu_new_cr3(vcpu
, cr3
, skip_tlb_flush
);
1024 vcpu
->arch
.cr3
= cr3
;
1025 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1029 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1031 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1033 if (cr8
& CR8_RESERVED_BITS
)
1035 if (lapic_in_kernel(vcpu
))
1036 kvm_lapic_set_tpr(vcpu
, cr8
);
1038 vcpu
->arch
.cr8
= cr8
;
1041 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1043 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1045 if (lapic_in_kernel(vcpu
))
1046 return kvm_lapic_get_cr8(vcpu
);
1048 return vcpu
->arch
.cr8
;
1050 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1052 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1056 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1057 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1058 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1059 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
1063 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1067 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1068 dr7
= vcpu
->arch
.guest_debug_dr7
;
1070 dr7
= vcpu
->arch
.dr7
;
1071 kvm_x86_ops
.set_dr7(vcpu
, dr7
);
1072 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1073 if (dr7
& DR7_BP_EN_MASK
)
1074 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1077 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1079 u64 fixed
= DR6_FIXED_1
;
1081 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1086 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1088 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1092 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1093 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1094 vcpu
->arch
.eff_db
[dr
] = val
;
1099 if (val
& 0xffffffff00000000ULL
)
1100 return -1; /* #GP */
1101 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1106 if (!kvm_dr7_valid(val
))
1107 return -1; /* #GP */
1108 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1109 kvm_update_dr7(vcpu
);
1116 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1118 if (__kvm_set_dr(vcpu
, dr
, val
)) {
1119 kvm_inject_gp(vcpu
, 0);
1124 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1126 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1128 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1132 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1137 *val
= vcpu
->arch
.dr6
;
1142 *val
= vcpu
->arch
.dr7
;
1147 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1149 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
1151 u32 ecx
= kvm_rcx_read(vcpu
);
1155 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
1158 kvm_rax_write(vcpu
, (u32
)data
);
1159 kvm_rdx_write(vcpu
, data
>> 32);
1162 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1165 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1166 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1168 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1169 * extract the supported MSRs from the related const lists.
1170 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1171 * capabilities of the host cpu. This capabilities test skips MSRs that are
1172 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1173 * may depend on host virtualization features rather than host cpu features.
1176 static const u32 msrs_to_save_all
[] = {
1177 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1179 #ifdef CONFIG_X86_64
1180 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1182 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1183 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1185 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1186 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1187 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1188 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1189 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1190 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1191 MSR_IA32_UMWAIT_CONTROL
,
1193 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1194 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1195 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1196 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1197 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1198 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1199 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1200 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1201 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1202 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1203 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1204 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1205 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1206 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1207 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1208 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1209 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1210 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1211 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1212 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1213 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1214 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1217 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1218 static unsigned num_msrs_to_save
;
1220 static const u32 emulated_msrs_all
[] = {
1221 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1222 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1223 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1224 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1225 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1226 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1227 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1229 HV_X64_MSR_VP_INDEX
,
1230 HV_X64_MSR_VP_RUNTIME
,
1231 HV_X64_MSR_SCONTROL
,
1232 HV_X64_MSR_STIMER0_CONFIG
,
1233 HV_X64_MSR_VP_ASSIST_PAGE
,
1234 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1235 HV_X64_MSR_TSC_EMULATION_STATUS
,
1237 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1240 MSR_IA32_TSC_ADJUST
,
1241 MSR_IA32_TSCDEADLINE
,
1242 MSR_IA32_ARCH_CAPABILITIES
,
1243 MSR_IA32_MISC_ENABLE
,
1244 MSR_IA32_MCG_STATUS
,
1246 MSR_IA32_MCG_EXT_CTL
,
1250 MSR_MISC_FEATURES_ENABLES
,
1251 MSR_AMD64_VIRT_SPEC_CTRL
,
1256 * The following list leaves out MSRs whose values are determined
1257 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1258 * We always support the "true" VMX control MSRs, even if the host
1259 * processor does not, so I am putting these registers here rather
1260 * than in msrs_to_save_all.
1263 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1264 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1265 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1266 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1268 MSR_IA32_VMX_CR0_FIXED0
,
1269 MSR_IA32_VMX_CR4_FIXED0
,
1270 MSR_IA32_VMX_VMCS_ENUM
,
1271 MSR_IA32_VMX_PROCBASED_CTLS2
,
1272 MSR_IA32_VMX_EPT_VPID_CAP
,
1273 MSR_IA32_VMX_VMFUNC
,
1276 MSR_KVM_POLL_CONTROL
,
1279 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1280 static unsigned num_emulated_msrs
;
1283 * List of msr numbers which are used to expose MSR-based features that
1284 * can be used by a hypervisor to validate requested CPU features.
1286 static const u32 msr_based_features_all
[] = {
1288 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1289 MSR_IA32_VMX_PINBASED_CTLS
,
1290 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1291 MSR_IA32_VMX_PROCBASED_CTLS
,
1292 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1293 MSR_IA32_VMX_EXIT_CTLS
,
1294 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1295 MSR_IA32_VMX_ENTRY_CTLS
,
1297 MSR_IA32_VMX_CR0_FIXED0
,
1298 MSR_IA32_VMX_CR0_FIXED1
,
1299 MSR_IA32_VMX_CR4_FIXED0
,
1300 MSR_IA32_VMX_CR4_FIXED1
,
1301 MSR_IA32_VMX_VMCS_ENUM
,
1302 MSR_IA32_VMX_PROCBASED_CTLS2
,
1303 MSR_IA32_VMX_EPT_VPID_CAP
,
1304 MSR_IA32_VMX_VMFUNC
,
1308 MSR_IA32_ARCH_CAPABILITIES
,
1311 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1312 static unsigned int num_msr_based_features
;
1314 static u64
kvm_get_arch_capabilities(void)
1318 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1319 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1322 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1323 * the nested hypervisor runs with NX huge pages. If it is not,
1324 * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1325 * L1 guests, so it need not worry about its own (L2) guests.
1327 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1330 * If we're doing cache flushes (either "always" or "cond")
1331 * we will do one whenever the guest does a vmlaunch/vmresume.
1332 * If an outer hypervisor is doing the cache flush for us
1333 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1334 * capability to the guest too, and if EPT is disabled we're not
1335 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1336 * require a nested hypervisor to do a flush of its own.
1338 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1339 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1341 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1342 data
|= ARCH_CAP_RDCL_NO
;
1343 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1344 data
|= ARCH_CAP_SSB_NO
;
1345 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1346 data
|= ARCH_CAP_MDS_NO
;
1349 * On TAA affected systems:
1350 * - nothing to do if TSX is disabled on the host.
1351 * - we emulate TSX_CTRL if present on the host.
1352 * This lets the guest use VERW to clear CPU buffers.
1354 if (!boot_cpu_has(X86_FEATURE_RTM
))
1355 data
&= ~(ARCH_CAP_TAA_NO
| ARCH_CAP_TSX_CTRL_MSR
);
1356 else if (!boot_cpu_has_bug(X86_BUG_TAA
))
1357 data
|= ARCH_CAP_TAA_NO
;
1362 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1364 switch (msr
->index
) {
1365 case MSR_IA32_ARCH_CAPABILITIES
:
1366 msr
->data
= kvm_get_arch_capabilities();
1368 case MSR_IA32_UCODE_REV
:
1369 rdmsrl_safe(msr
->index
, &msr
->data
);
1372 if (kvm_x86_ops
.get_msr_feature(msr
))
1378 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1380 struct kvm_msr_entry msr
;
1384 r
= kvm_get_msr_feature(&msr
);
1393 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1395 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1398 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1401 if (efer
& (EFER_LME
| EFER_LMA
) &&
1402 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1405 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1411 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1413 if (efer
& efer_reserved_bits
)
1416 return __kvm_valid_efer(vcpu
, efer
);
1418 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1420 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1422 u64 old_efer
= vcpu
->arch
.efer
;
1423 u64 efer
= msr_info
->data
;
1425 if (efer
& efer_reserved_bits
)
1428 if (!msr_info
->host_initiated
) {
1429 if (!__kvm_valid_efer(vcpu
, efer
))
1432 if (is_paging(vcpu
) &&
1433 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1438 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1440 kvm_x86_ops
.set_efer(vcpu
, efer
);
1442 /* Update reserved bits */
1443 if ((efer
^ old_efer
) & EFER_NX
)
1444 kvm_mmu_reset_context(vcpu
);
1449 void kvm_enable_efer_bits(u64 mask
)
1451 efer_reserved_bits
&= ~mask
;
1453 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1456 * Write @data into the MSR specified by @index. Select MSR specific fault
1457 * checks are bypassed if @host_initiated is %true.
1458 * Returns 0 on success, non-0 otherwise.
1459 * Assumes vcpu_load() was already called.
1461 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1462 bool host_initiated
)
1464 struct msr_data msr
;
1469 case MSR_KERNEL_GS_BASE
:
1472 if (is_noncanonical_address(data
, vcpu
))
1475 case MSR_IA32_SYSENTER_EIP
:
1476 case MSR_IA32_SYSENTER_ESP
:
1478 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1479 * non-canonical address is written on Intel but not on
1480 * AMD (which ignores the top 32-bits, because it does
1481 * not implement 64-bit SYSENTER).
1483 * 64-bit code should hence be able to write a non-canonical
1484 * value on AMD. Making the address canonical ensures that
1485 * vmentry does not fail on Intel after writing a non-canonical
1486 * value, and that something deterministic happens if the guest
1487 * invokes 64-bit SYSENTER.
1489 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1494 msr
.host_initiated
= host_initiated
;
1496 return kvm_x86_ops
.set_msr(vcpu
, &msr
);
1500 * Read the MSR specified by @index into @data. Select MSR specific fault
1501 * checks are bypassed if @host_initiated is %true.
1502 * Returns 0 on success, non-0 otherwise.
1503 * Assumes vcpu_load() was already called.
1505 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1506 bool host_initiated
)
1508 struct msr_data msr
;
1512 msr
.host_initiated
= host_initiated
;
1514 ret
= kvm_x86_ops
.get_msr(vcpu
, &msr
);
1520 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1522 return __kvm_get_msr(vcpu
, index
, data
, false);
1524 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1526 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1528 return __kvm_set_msr(vcpu
, index
, data
, false);
1530 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1532 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1534 u32 ecx
= kvm_rcx_read(vcpu
);
1537 if (kvm_get_msr(vcpu
, ecx
, &data
)) {
1538 trace_kvm_msr_read_ex(ecx
);
1539 kvm_inject_gp(vcpu
, 0);
1543 trace_kvm_msr_read(ecx
, data
);
1545 kvm_rax_write(vcpu
, data
& -1u);
1546 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1547 return kvm_skip_emulated_instruction(vcpu
);
1549 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1551 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1553 u32 ecx
= kvm_rcx_read(vcpu
);
1554 u64 data
= kvm_read_edx_eax(vcpu
);
1556 if (kvm_set_msr(vcpu
, ecx
, data
)) {
1557 trace_kvm_msr_write_ex(ecx
, data
);
1558 kvm_inject_gp(vcpu
, 0);
1562 trace_kvm_msr_write(ecx
, data
);
1563 return kvm_skip_emulated_instruction(vcpu
);
1565 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1568 * The fast path for frequent and performance sensitive wrmsr emulation,
1569 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1570 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1571 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1572 * other cases which must be called after interrupts are enabled on the host.
1574 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1576 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1579 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1580 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1581 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1582 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1585 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1586 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1587 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1588 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1595 enum exit_fastpath_completion
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1597 u32 msr
= kvm_rcx_read(vcpu
);
1602 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1603 data
= kvm_read_edx_eax(vcpu
);
1604 ret
= handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
);
1607 return EXIT_FASTPATH_NONE
;
1611 trace_kvm_msr_write(msr
, data
);
1612 return EXIT_FASTPATH_SKIP_EMUL_INS
;
1615 return EXIT_FASTPATH_NONE
;
1617 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
1620 * Adapt set_msr() to msr_io()'s calling convention
1622 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1624 return __kvm_get_msr(vcpu
, index
, data
, true);
1627 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1629 return __kvm_set_msr(vcpu
, index
, *data
, true);
1632 #ifdef CONFIG_X86_64
1633 struct pvclock_clock
{
1643 struct pvclock_gtod_data
{
1646 struct pvclock_clock clock
; /* extract of a clocksource struct */
1647 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
1653 static struct pvclock_gtod_data pvclock_gtod_data
;
1655 static void update_pvclock_gtod(struct timekeeper
*tk
)
1657 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1659 write_seqcount_begin(&vdata
->seq
);
1661 /* copy pvclock gtod data */
1662 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
1663 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1664 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1665 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1666 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1667 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
1668 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
1670 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
1671 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
1672 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
1673 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
1674 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
1675 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
1676 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
1678 vdata
->wall_time_sec
= tk
->xtime_sec
;
1680 vdata
->offs_boot
= tk
->offs_boot
;
1682 write_seqcount_end(&vdata
->seq
);
1685 static s64
get_kvmclock_base_ns(void)
1687 /* Count up from boot time, but with the frequency of the raw clock. */
1688 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
1691 static s64
get_kvmclock_base_ns(void)
1693 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
1694 return ktime_get_boottime_ns();
1698 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1700 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1701 kvm_vcpu_kick(vcpu
);
1704 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1708 struct pvclock_wall_clock wc
;
1714 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1719 ++version
; /* first time write, random junk */
1723 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1727 * The guest calculates current wall clock time by adding
1728 * system time (updated by kvm_guest_time_update below) to the
1729 * wall clock specified here. We do the reverse here.
1731 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
1733 wc
.nsec
= do_div(wall_nsec
, 1000000000);
1734 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
1735 wc
.version
= version
;
1737 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1740 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1743 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1745 do_shl32_div32(dividend
, divisor
);
1749 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1750 s8
*pshift
, u32
*pmultiplier
)
1758 scaled64
= scaled_hz
;
1759 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1764 tps32
= (uint32_t)tps64
;
1765 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1766 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1774 *pmultiplier
= div_frac(scaled64
, tps32
);
1777 #ifdef CONFIG_X86_64
1778 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1781 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1782 static unsigned long max_tsc_khz
;
1784 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1786 u64 v
= (u64
)khz
* (1000000 + ppm
);
1791 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1795 /* Guest TSC same frequency as host TSC? */
1797 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1801 /* TSC scaling supported? */
1802 if (!kvm_has_tsc_control
) {
1803 if (user_tsc_khz
> tsc_khz
) {
1804 vcpu
->arch
.tsc_catchup
= 1;
1805 vcpu
->arch
.tsc_always_catchup
= 1;
1808 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1813 /* TSC scaling required - calculate ratio */
1814 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1815 user_tsc_khz
, tsc_khz
);
1817 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1818 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1823 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1827 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1829 u32 thresh_lo
, thresh_hi
;
1830 int use_scaling
= 0;
1832 /* tsc_khz can be zero if TSC calibration fails */
1833 if (user_tsc_khz
== 0) {
1834 /* set tsc_scaling_ratio to a safe value */
1835 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1839 /* Compute a scale to convert nanoseconds in TSC cycles */
1840 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1841 &vcpu
->arch
.virtual_tsc_shift
,
1842 &vcpu
->arch
.virtual_tsc_mult
);
1843 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1846 * Compute the variation in TSC rate which is acceptable
1847 * within the range of tolerance and decide if the
1848 * rate being applied is within that bounds of the hardware
1849 * rate. If so, no scaling or compensation need be done.
1851 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1852 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1853 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1854 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1857 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1860 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1862 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1863 vcpu
->arch
.virtual_tsc_mult
,
1864 vcpu
->arch
.virtual_tsc_shift
);
1865 tsc
+= vcpu
->arch
.this_tsc_write
;
1869 static inline int gtod_is_based_on_tsc(int mode
)
1871 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
1874 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1876 #ifdef CONFIG_X86_64
1878 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1879 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1881 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1882 atomic_read(&vcpu
->kvm
->online_vcpus
));
1885 * Once the masterclock is enabled, always perform request in
1886 * order to update it.
1888 * In order to enable masterclock, the host clocksource must be TSC
1889 * and the vcpus need to have matched TSCs. When that happens,
1890 * perform request to enable masterclock.
1892 if (ka
->use_master_clock
||
1893 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
1894 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1896 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1897 atomic_read(&vcpu
->kvm
->online_vcpus
),
1898 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1902 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1904 u64 curr_offset
= kvm_x86_ops
.read_l1_tsc_offset(vcpu
);
1905 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1909 * Multiply tsc by a fixed point number represented by ratio.
1911 * The most significant 64-N bits (mult) of ratio represent the
1912 * integral part of the fixed point number; the remaining N bits
1913 * (frac) represent the fractional part, ie. ratio represents a fixed
1914 * point number (mult + frac * 2^(-N)).
1916 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1918 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1920 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1923 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1926 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1928 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1929 _tsc
= __scale_tsc(ratio
, tsc
);
1933 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1935 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1939 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1941 return target_tsc
- tsc
;
1944 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1946 u64 tsc_offset
= kvm_x86_ops
.read_l1_tsc_offset(vcpu
);
1948 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1950 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1952 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1954 vcpu
->arch
.tsc_offset
= kvm_x86_ops
.write_l1_tsc_offset(vcpu
, offset
);
1957 static inline bool kvm_check_tsc_unstable(void)
1959 #ifdef CONFIG_X86_64
1961 * TSC is marked unstable when we're running on Hyper-V,
1962 * 'TSC page' clocksource is good.
1964 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
1967 return check_tsc_unstable();
1970 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1972 struct kvm
*kvm
= vcpu
->kvm
;
1973 u64 offset
, ns
, elapsed
;
1974 unsigned long flags
;
1976 bool already_matched
;
1977 u64 data
= msr
->data
;
1978 bool synchronizing
= false;
1980 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1981 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1982 ns
= get_kvmclock_base_ns();
1983 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1985 if (vcpu
->arch
.virtual_tsc_khz
) {
1986 if (data
== 0 && msr
->host_initiated
) {
1988 * detection of vcpu initialization -- need to sync
1989 * with other vCPUs. This particularly helps to keep
1990 * kvm_clock stable after CPU hotplug
1992 synchronizing
= true;
1994 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1995 nsec_to_cycles(vcpu
, elapsed
);
1996 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1998 * Special case: TSC write with a small delta (1 second)
1999 * of virtual cycle time against real time is
2000 * interpreted as an attempt to synchronize the CPU.
2002 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2003 data
+ tsc_hz
> tsc_exp
;
2008 * For a reliable TSC, we can match TSC offsets, and for an unstable
2009 * TSC, we add elapsed time in this computation. We could let the
2010 * compensation code attempt to catch up if we fall behind, but
2011 * it's better to try to match offsets from the beginning.
2013 if (synchronizing
&&
2014 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2015 if (!kvm_check_tsc_unstable()) {
2016 offset
= kvm
->arch
.cur_tsc_offset
;
2018 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2020 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2023 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2026 * We split periods of matched TSC writes into generations.
2027 * For each generation, we track the original measured
2028 * nanosecond time, offset, and write, so if TSCs are in
2029 * sync, we can match exact offset, and if not, we can match
2030 * exact software computation in compute_guest_tsc()
2032 * These values are tracked in kvm->arch.cur_xxx variables.
2034 kvm
->arch
.cur_tsc_generation
++;
2035 kvm
->arch
.cur_tsc_nsec
= ns
;
2036 kvm
->arch
.cur_tsc_write
= data
;
2037 kvm
->arch
.cur_tsc_offset
= offset
;
2042 * We also track th most recent recorded KHZ, write and time to
2043 * allow the matching interval to be extended at each write.
2045 kvm
->arch
.last_tsc_nsec
= ns
;
2046 kvm
->arch
.last_tsc_write
= data
;
2047 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2049 vcpu
->arch
.last_guest_tsc
= data
;
2051 /* Keep track of which generation this VCPU has synchronized to */
2052 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2053 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2054 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2056 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
2057 update_ia32_tsc_adjust_msr(vcpu
, offset
);
2059 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2060 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2062 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2064 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2065 } else if (!already_matched
) {
2066 kvm
->arch
.nr_vcpus_matched_tsc
++;
2069 kvm_track_tsc_matching(vcpu
);
2070 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
2073 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
2075 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2078 u64 tsc_offset
= kvm_x86_ops
.read_l1_tsc_offset(vcpu
);
2079 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2082 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2084 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2085 WARN_ON(adjustment
< 0);
2086 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
2087 adjust_tsc_offset_guest(vcpu
, adjustment
);
2090 #ifdef CONFIG_X86_64
2092 static u64
read_tsc(void)
2094 u64 ret
= (u64
)rdtsc_ordered();
2095 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2097 if (likely(ret
>= last
))
2101 * GCC likes to generate cmov here, but this branch is extremely
2102 * predictable (it's just a function of time and the likely is
2103 * very likely) and there's a data dependence, so force GCC
2104 * to generate a branch instead. I don't barrier() because
2105 * we don't actually need a barrier, and if this function
2106 * ever gets inlined it will generate worse code.
2112 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2118 switch (clock
->vclock_mode
) {
2119 case VDSO_CLOCKMODE_HVCLOCK
:
2120 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2122 if (tsc_pg_val
!= U64_MAX
) {
2123 /* TSC page valid */
2124 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2125 v
= (tsc_pg_val
- clock
->cycle_last
) &
2128 /* TSC page invalid */
2129 *mode
= VDSO_CLOCKMODE_NONE
;
2132 case VDSO_CLOCKMODE_TSC
:
2133 *mode
= VDSO_CLOCKMODE_TSC
;
2134 *tsc_timestamp
= read_tsc();
2135 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2139 *mode
= VDSO_CLOCKMODE_NONE
;
2142 if (*mode
== VDSO_CLOCKMODE_NONE
)
2143 *tsc_timestamp
= v
= 0;
2145 return v
* clock
->mult
;
2148 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2150 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2156 seq
= read_seqcount_begin(>od
->seq
);
2157 ns
= gtod
->raw_clock
.base_cycles
;
2158 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2159 ns
>>= gtod
->raw_clock
.shift
;
2160 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2161 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2167 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2169 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2175 seq
= read_seqcount_begin(>od
->seq
);
2176 ts
->tv_sec
= gtod
->wall_time_sec
;
2177 ns
= gtod
->clock
.base_cycles
;
2178 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2179 ns
>>= gtod
->clock
.shift
;
2180 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2182 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2188 /* returns true if host is using TSC based clocksource */
2189 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2191 /* checked again under seqlock below */
2192 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2195 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2199 /* returns true if host is using TSC based clocksource */
2200 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2203 /* checked again under seqlock below */
2204 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2207 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2213 * Assuming a stable TSC across physical CPUS, and a stable TSC
2214 * across virtual CPUs, the following condition is possible.
2215 * Each numbered line represents an event visible to both
2216 * CPUs at the next numbered event.
2218 * "timespecX" represents host monotonic time. "tscX" represents
2221 * VCPU0 on CPU0 | VCPU1 on CPU1
2223 * 1. read timespec0,tsc0
2224 * 2. | timespec1 = timespec0 + N
2226 * 3. transition to guest | transition to guest
2227 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2228 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2229 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2231 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2234 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2236 * - 0 < N - M => M < N
2238 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2239 * always the case (the difference between two distinct xtime instances
2240 * might be smaller then the difference between corresponding TSC reads,
2241 * when updating guest vcpus pvclock areas).
2243 * To avoid that problem, do not allow visibility of distinct
2244 * system_timestamp/tsc_timestamp values simultaneously: use a master
2245 * copy of host monotonic time values. Update that master copy
2248 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2252 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2254 #ifdef CONFIG_X86_64
2255 struct kvm_arch
*ka
= &kvm
->arch
;
2257 bool host_tsc_clocksource
, vcpus_matched
;
2259 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2260 atomic_read(&kvm
->online_vcpus
));
2263 * If the host uses TSC clock, then passthrough TSC as stable
2266 host_tsc_clocksource
= kvm_get_time_and_clockread(
2267 &ka
->master_kernel_ns
,
2268 &ka
->master_cycle_now
);
2270 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2271 && !ka
->backwards_tsc_observed
2272 && !ka
->boot_vcpu_runs_old_kvmclock
;
2274 if (ka
->use_master_clock
)
2275 atomic_set(&kvm_guest_has_master_clock
, 1);
2277 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2278 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2283 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2285 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2288 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2290 #ifdef CONFIG_X86_64
2292 struct kvm_vcpu
*vcpu
;
2293 struct kvm_arch
*ka
= &kvm
->arch
;
2295 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2296 kvm_make_mclock_inprogress_request(kvm
);
2297 /* no guest entries from this point */
2298 pvclock_update_vm_gtod_copy(kvm
);
2300 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2301 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2303 /* guest entries allowed */
2304 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2305 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2307 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2311 u64
get_kvmclock_ns(struct kvm
*kvm
)
2313 struct kvm_arch
*ka
= &kvm
->arch
;
2314 struct pvclock_vcpu_time_info hv_clock
;
2317 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2318 if (!ka
->use_master_clock
) {
2319 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2320 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2323 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2324 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2325 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2327 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2330 if (__this_cpu_read(cpu_tsc_khz
)) {
2331 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2332 &hv_clock
.tsc_shift
,
2333 &hv_clock
.tsc_to_system_mul
);
2334 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2336 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2343 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
2345 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2346 struct pvclock_vcpu_time_info guest_hv_clock
;
2348 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2349 &guest_hv_clock
, sizeof(guest_hv_clock
))))
2352 /* This VCPU is paused, but it's legal for a guest to read another
2353 * VCPU's kvmclock, so we really have to follow the specification where
2354 * it says that version is odd if data is being modified, and even after
2357 * Version field updates must be kept separate. This is because
2358 * kvm_write_guest_cached might use a "rep movs" instruction, and
2359 * writes within a string instruction are weakly ordered. So there
2360 * are three writes overall.
2362 * As a small optimization, only write the version field in the first
2363 * and third write. The vcpu->pv_time cache is still valid, because the
2364 * version field is the first in the struct.
2366 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2368 if (guest_hv_clock
.version
& 1)
2369 ++guest_hv_clock
.version
; /* first time write, random junk */
2371 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2372 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2374 sizeof(vcpu
->hv_clock
.version
));
2378 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2379 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2381 if (vcpu
->pvclock_set_guest_stopped_request
) {
2382 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2383 vcpu
->pvclock_set_guest_stopped_request
= false;
2386 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2388 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2390 sizeof(vcpu
->hv_clock
));
2394 vcpu
->hv_clock
.version
++;
2395 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2397 sizeof(vcpu
->hv_clock
.version
));
2400 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2402 unsigned long flags
, tgt_tsc_khz
;
2403 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2404 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2406 u64 tsc_timestamp
, host_tsc
;
2408 bool use_master_clock
;
2414 * If the host uses TSC clock, then passthrough TSC as stable
2417 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2418 use_master_clock
= ka
->use_master_clock
;
2419 if (use_master_clock
) {
2420 host_tsc
= ka
->master_cycle_now
;
2421 kernel_ns
= ka
->master_kernel_ns
;
2423 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2425 /* Keep irq disabled to prevent changes to the clock */
2426 local_irq_save(flags
);
2427 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2428 if (unlikely(tgt_tsc_khz
== 0)) {
2429 local_irq_restore(flags
);
2430 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2433 if (!use_master_clock
) {
2435 kernel_ns
= get_kvmclock_base_ns();
2438 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2441 * We may have to catch up the TSC to match elapsed wall clock
2442 * time for two reasons, even if kvmclock is used.
2443 * 1) CPU could have been running below the maximum TSC rate
2444 * 2) Broken TSC compensation resets the base at each VCPU
2445 * entry to avoid unknown leaps of TSC even when running
2446 * again on the same CPU. This may cause apparent elapsed
2447 * time to disappear, and the guest to stand still or run
2450 if (vcpu
->tsc_catchup
) {
2451 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2452 if (tsc
> tsc_timestamp
) {
2453 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2454 tsc_timestamp
= tsc
;
2458 local_irq_restore(flags
);
2460 /* With all the info we got, fill in the values */
2462 if (kvm_has_tsc_control
)
2463 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2465 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2466 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2467 &vcpu
->hv_clock
.tsc_shift
,
2468 &vcpu
->hv_clock
.tsc_to_system_mul
);
2469 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2472 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2473 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2474 vcpu
->last_guest_tsc
= tsc_timestamp
;
2476 /* If the host uses TSC clocksource, then it is stable */
2478 if (use_master_clock
)
2479 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2481 vcpu
->hv_clock
.flags
= pvclock_flags
;
2483 if (vcpu
->pv_time_enabled
)
2484 kvm_setup_pvclock_page(v
);
2485 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2486 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2491 * kvmclock updates which are isolated to a given vcpu, such as
2492 * vcpu->cpu migration, should not allow system_timestamp from
2493 * the rest of the vcpus to remain static. Otherwise ntp frequency
2494 * correction applies to one vcpu's system_timestamp but not
2497 * So in those cases, request a kvmclock update for all vcpus.
2498 * We need to rate-limit these requests though, as they can
2499 * considerably slow guests that have a large number of vcpus.
2500 * The time for a remote vcpu to update its kvmclock is bound
2501 * by the delay we use to rate-limit the updates.
2504 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2506 static void kvmclock_update_fn(struct work_struct
*work
)
2509 struct delayed_work
*dwork
= to_delayed_work(work
);
2510 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2511 kvmclock_update_work
);
2512 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2513 struct kvm_vcpu
*vcpu
;
2515 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2516 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2517 kvm_vcpu_kick(vcpu
);
2521 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2523 struct kvm
*kvm
= v
->kvm
;
2525 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2526 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2527 KVMCLOCK_UPDATE_DELAY
);
2530 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2532 static void kvmclock_sync_fn(struct work_struct
*work
)
2534 struct delayed_work
*dwork
= to_delayed_work(work
);
2535 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2536 kvmclock_sync_work
);
2537 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2539 if (!kvmclock_periodic_sync
)
2542 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2543 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2544 KVMCLOCK_SYNC_PERIOD
);
2548 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2550 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
2552 /* McStatusWrEn enabled? */
2553 if (guest_cpuid_is_amd_or_hygon(vcpu
))
2554 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
2559 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2561 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2562 unsigned bank_num
= mcg_cap
& 0xff;
2563 u32 msr
= msr_info
->index
;
2564 u64 data
= msr_info
->data
;
2567 case MSR_IA32_MCG_STATUS
:
2568 vcpu
->arch
.mcg_status
= data
;
2570 case MSR_IA32_MCG_CTL
:
2571 if (!(mcg_cap
& MCG_CTL_P
) &&
2572 (data
|| !msr_info
->host_initiated
))
2574 if (data
!= 0 && data
!= ~(u64
)0)
2576 vcpu
->arch
.mcg_ctl
= data
;
2579 if (msr
>= MSR_IA32_MC0_CTL
&&
2580 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2581 u32 offset
= array_index_nospec(
2582 msr
- MSR_IA32_MC0_CTL
,
2583 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
2585 /* only 0 or all 1s can be written to IA32_MCi_CTL
2586 * some Linux kernels though clear bit 10 in bank 4 to
2587 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2588 * this to avoid an uncatched #GP in the guest
2590 if ((offset
& 0x3) == 0 &&
2591 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2595 if (!msr_info
->host_initiated
&&
2596 (offset
& 0x3) == 1 && data
!= 0) {
2597 if (!can_set_mci_status(vcpu
))
2601 vcpu
->arch
.mce_banks
[offset
] = data
;
2609 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2611 struct kvm
*kvm
= vcpu
->kvm
;
2612 int lm
= is_long_mode(vcpu
);
2613 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2614 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2615 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2616 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2617 u32 page_num
= data
& ~PAGE_MASK
;
2618 u64 page_addr
= data
& PAGE_MASK
;
2623 if (page_num
>= blob_size
)
2626 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2631 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2640 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2642 gpa_t gpa
= data
& ~0x3f;
2644 /* Bits 3:5 are reserved, Should be zero */
2648 vcpu
->arch
.apf
.msr_val
= data
;
2650 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2651 kvm_clear_async_pf_completion_queue(vcpu
);
2652 kvm_async_pf_hash_reset(vcpu
);
2656 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2660 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2661 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2662 kvm_async_pf_wakeup_all(vcpu
);
2666 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2668 vcpu
->arch
.pv_time_enabled
= false;
2669 vcpu
->arch
.time
= 0;
2672 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
, bool invalidate_gpa
)
2674 ++vcpu
->stat
.tlb_flush
;
2675 kvm_x86_ops
.tlb_flush(vcpu
, invalidate_gpa
);
2678 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2680 struct kvm_host_map map
;
2681 struct kvm_steal_time
*st
;
2683 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2686 /* -EAGAIN is returned in atomic context so we can just return. */
2687 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
,
2688 &map
, &vcpu
->arch
.st
.cache
, false))
2692 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
2695 * Doing a TLB flush here, on the guest's behalf, can avoid
2698 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
2699 st
->preempted
& KVM_VCPU_FLUSH_TLB
);
2700 if (xchg(&st
->preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
2701 kvm_vcpu_flush_tlb(vcpu
, false);
2703 vcpu
->arch
.st
.preempted
= 0;
2705 if (st
->version
& 1)
2706 st
->version
+= 1; /* first time write, random junk */
2712 st
->steal
+= current
->sched_info
.run_delay
-
2713 vcpu
->arch
.st
.last_steal
;
2714 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2720 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, false);
2723 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2726 u32 msr
= msr_info
->index
;
2727 u64 data
= msr_info
->data
;
2730 case MSR_AMD64_NB_CFG
:
2731 case MSR_IA32_UCODE_WRITE
:
2732 case MSR_VM_HSAVE_PA
:
2733 case MSR_AMD64_PATCH_LOADER
:
2734 case MSR_AMD64_BU_CFG2
:
2735 case MSR_AMD64_DC_CFG
:
2736 case MSR_F15H_EX_CFG
:
2739 case MSR_IA32_UCODE_REV
:
2740 if (msr_info
->host_initiated
)
2741 vcpu
->arch
.microcode_version
= data
;
2743 case MSR_IA32_ARCH_CAPABILITIES
:
2744 if (!msr_info
->host_initiated
)
2746 vcpu
->arch
.arch_capabilities
= data
;
2749 return set_efer(vcpu
, msr_info
);
2751 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2752 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2753 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2755 /* Handle McStatusWrEn */
2756 if (data
== BIT_ULL(18)) {
2757 vcpu
->arch
.msr_hwcr
= data
;
2758 } else if (data
!= 0) {
2759 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2764 case MSR_FAM10H_MMIO_CONF_BASE
:
2766 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2771 case MSR_IA32_DEBUGCTLMSR
:
2773 /* We support the non-activated case already */
2775 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2776 /* Values other than LBR and BTF are vendor-specific,
2777 thus reserved and should throw a #GP */
2780 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2783 case 0x200 ... 0x2ff:
2784 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2785 case MSR_IA32_APICBASE
:
2786 return kvm_set_apic_base(vcpu
, msr_info
);
2787 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2788 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2789 case MSR_IA32_TSCDEADLINE
:
2790 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2792 case MSR_IA32_TSC_ADJUST
:
2793 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2794 if (!msr_info
->host_initiated
) {
2795 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2796 adjust_tsc_offset_guest(vcpu
, adj
);
2798 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2801 case MSR_IA32_MISC_ENABLE
:
2802 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
2803 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
2804 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
2806 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2807 kvm_update_cpuid(vcpu
);
2809 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2812 case MSR_IA32_SMBASE
:
2813 if (!msr_info
->host_initiated
)
2815 vcpu
->arch
.smbase
= data
;
2817 case MSR_IA32_POWER_CTL
:
2818 vcpu
->arch
.msr_ia32_power_ctl
= data
;
2821 kvm_write_tsc(vcpu
, msr_info
);
2824 if (!msr_info
->host_initiated
&&
2825 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
2828 * KVM supports exposing PT to the guest, but does not support
2829 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
2830 * XSAVES/XRSTORS to save/restore PT MSRs.
2832 if (data
& ~supported_xss
)
2834 vcpu
->arch
.ia32_xss
= data
;
2837 if (!msr_info
->host_initiated
)
2839 vcpu
->arch
.smi_count
= data
;
2841 case MSR_KVM_WALL_CLOCK_NEW
:
2842 case MSR_KVM_WALL_CLOCK
:
2843 vcpu
->kvm
->arch
.wall_clock
= data
;
2844 kvm_write_wall_clock(vcpu
->kvm
, data
);
2846 case MSR_KVM_SYSTEM_TIME_NEW
:
2847 case MSR_KVM_SYSTEM_TIME
: {
2848 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2850 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2851 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2853 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2854 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2856 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2859 vcpu
->arch
.time
= data
;
2860 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2862 /* we verify if the enable bit is set... */
2863 vcpu
->arch
.pv_time_enabled
= false;
2867 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2868 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2869 sizeof(struct pvclock_vcpu_time_info
)))
2870 vcpu
->arch
.pv_time_enabled
= true;
2874 case MSR_KVM_ASYNC_PF_EN
:
2875 if (kvm_pv_enable_async_pf(vcpu
, data
))
2878 case MSR_KVM_STEAL_TIME
:
2880 if (unlikely(!sched_info_on()))
2883 if (data
& KVM_STEAL_RESERVED_MASK
)
2886 vcpu
->arch
.st
.msr_val
= data
;
2888 if (!(data
& KVM_MSR_ENABLED
))
2891 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2894 case MSR_KVM_PV_EOI_EN
:
2895 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
2899 case MSR_KVM_POLL_CONTROL
:
2900 /* only enable bit supported */
2901 if (data
& (-1ULL << 1))
2904 vcpu
->arch
.msr_kvm_poll_control
= data
;
2907 case MSR_IA32_MCG_CTL
:
2908 case MSR_IA32_MCG_STATUS
:
2909 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2910 return set_msr_mce(vcpu
, msr_info
);
2912 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2913 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2914 pr
= true; /* fall through */
2915 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2916 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2917 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2918 return kvm_pmu_set_msr(vcpu
, msr_info
);
2920 if (pr
|| data
!= 0)
2921 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2922 "0x%x data 0x%llx\n", msr
, data
);
2924 case MSR_K7_CLK_CTL
:
2926 * Ignore all writes to this no longer documented MSR.
2927 * Writes are only relevant for old K7 processors,
2928 * all pre-dating SVM, but a recommended workaround from
2929 * AMD for these chips. It is possible to specify the
2930 * affected processor models on the command line, hence
2931 * the need to ignore the workaround.
2934 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2935 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2936 case HV_X64_MSR_CRASH_CTL
:
2937 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2938 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
2939 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
2940 case HV_X64_MSR_TSC_EMULATION_STATUS
:
2941 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2942 msr_info
->host_initiated
);
2943 case MSR_IA32_BBL_CR_CTL3
:
2944 /* Drop writes to this legacy MSR -- see rdmsr
2945 * counterpart for further detail.
2947 if (report_ignored_msrs
)
2948 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2951 case MSR_AMD64_OSVW_ID_LENGTH
:
2952 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2954 vcpu
->arch
.osvw
.length
= data
;
2956 case MSR_AMD64_OSVW_STATUS
:
2957 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2959 vcpu
->arch
.osvw
.status
= data
;
2961 case MSR_PLATFORM_INFO
:
2962 if (!msr_info
->host_initiated
||
2963 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2964 cpuid_fault_enabled(vcpu
)))
2966 vcpu
->arch
.msr_platform_info
= data
;
2968 case MSR_MISC_FEATURES_ENABLES
:
2969 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2970 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2971 !supports_cpuid_fault(vcpu
)))
2973 vcpu
->arch
.msr_misc_features_enables
= data
;
2976 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2977 return xen_hvm_config(vcpu
, data
);
2978 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2979 return kvm_pmu_set_msr(vcpu
, msr_info
);
2981 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2985 if (report_ignored_msrs
)
2987 "ignored wrmsr: 0x%x data 0x%llx\n",
2994 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2996 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
2999 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3000 unsigned bank_num
= mcg_cap
& 0xff;
3003 case MSR_IA32_P5_MC_ADDR
:
3004 case MSR_IA32_P5_MC_TYPE
:
3007 case MSR_IA32_MCG_CAP
:
3008 data
= vcpu
->arch
.mcg_cap
;
3010 case MSR_IA32_MCG_CTL
:
3011 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3013 data
= vcpu
->arch
.mcg_ctl
;
3015 case MSR_IA32_MCG_STATUS
:
3016 data
= vcpu
->arch
.mcg_status
;
3019 if (msr
>= MSR_IA32_MC0_CTL
&&
3020 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3021 u32 offset
= array_index_nospec(
3022 msr
- MSR_IA32_MC0_CTL
,
3023 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3025 data
= vcpu
->arch
.mce_banks
[offset
];
3034 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3036 switch (msr_info
->index
) {
3037 case MSR_IA32_PLATFORM_ID
:
3038 case MSR_IA32_EBL_CR_POWERON
:
3039 case MSR_IA32_DEBUGCTLMSR
:
3040 case MSR_IA32_LASTBRANCHFROMIP
:
3041 case MSR_IA32_LASTBRANCHTOIP
:
3042 case MSR_IA32_LASTINTFROMIP
:
3043 case MSR_IA32_LASTINTTOIP
:
3045 case MSR_K8_TSEG_ADDR
:
3046 case MSR_K8_TSEG_MASK
:
3047 case MSR_VM_HSAVE_PA
:
3048 case MSR_K8_INT_PENDING_MSG
:
3049 case MSR_AMD64_NB_CFG
:
3050 case MSR_FAM10H_MMIO_CONF_BASE
:
3051 case MSR_AMD64_BU_CFG2
:
3052 case MSR_IA32_PERF_CTL
:
3053 case MSR_AMD64_DC_CFG
:
3054 case MSR_F15H_EX_CFG
:
3056 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3057 * limit) MSRs. Just return 0, as we do not want to expose the host
3058 * data here. Do not conditionalize this on CPUID, as KVM does not do
3059 * so for existing CPU-specific MSRs.
3061 case MSR_RAPL_POWER_UNIT
:
3062 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3063 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3064 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3065 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3068 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3069 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3070 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3071 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3072 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3073 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3074 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3077 case MSR_IA32_UCODE_REV
:
3078 msr_info
->data
= vcpu
->arch
.microcode_version
;
3080 case MSR_IA32_ARCH_CAPABILITIES
:
3081 if (!msr_info
->host_initiated
&&
3082 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3084 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3086 case MSR_IA32_POWER_CTL
:
3087 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3090 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
3093 case 0x200 ... 0x2ff:
3094 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3095 case 0xcd: /* fsb frequency */
3099 * MSR_EBC_FREQUENCY_ID
3100 * Conservative value valid for even the basic CPU models.
3101 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3102 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3103 * and 266MHz for model 3, or 4. Set Core Clock
3104 * Frequency to System Bus Frequency Ratio to 1 (bits
3105 * 31:24) even though these are only valid for CPU
3106 * models > 2, however guests may end up dividing or
3107 * multiplying by zero otherwise.
3109 case MSR_EBC_FREQUENCY_ID
:
3110 msr_info
->data
= 1 << 24;
3112 case MSR_IA32_APICBASE
:
3113 msr_info
->data
= kvm_get_apic_base(vcpu
);
3115 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
3116 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3117 case MSR_IA32_TSCDEADLINE
:
3118 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3120 case MSR_IA32_TSC_ADJUST
:
3121 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3123 case MSR_IA32_MISC_ENABLE
:
3124 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3126 case MSR_IA32_SMBASE
:
3127 if (!msr_info
->host_initiated
)
3129 msr_info
->data
= vcpu
->arch
.smbase
;
3132 msr_info
->data
= vcpu
->arch
.smi_count
;
3134 case MSR_IA32_PERF_STATUS
:
3135 /* TSC increment by tick */
3136 msr_info
->data
= 1000ULL;
3137 /* CPU multiplier */
3138 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3141 msr_info
->data
= vcpu
->arch
.efer
;
3143 case MSR_KVM_WALL_CLOCK
:
3144 case MSR_KVM_WALL_CLOCK_NEW
:
3145 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3147 case MSR_KVM_SYSTEM_TIME
:
3148 case MSR_KVM_SYSTEM_TIME_NEW
:
3149 msr_info
->data
= vcpu
->arch
.time
;
3151 case MSR_KVM_ASYNC_PF_EN
:
3152 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
3154 case MSR_KVM_STEAL_TIME
:
3155 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3157 case MSR_KVM_PV_EOI_EN
:
3158 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3160 case MSR_KVM_POLL_CONTROL
:
3161 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3163 case MSR_IA32_P5_MC_ADDR
:
3164 case MSR_IA32_P5_MC_TYPE
:
3165 case MSR_IA32_MCG_CAP
:
3166 case MSR_IA32_MCG_CTL
:
3167 case MSR_IA32_MCG_STATUS
:
3168 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3169 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3170 msr_info
->host_initiated
);
3172 if (!msr_info
->host_initiated
&&
3173 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3175 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3177 case MSR_K7_CLK_CTL
:
3179 * Provide expected ramp-up count for K7. All other
3180 * are set to zero, indicating minimum divisors for
3183 * This prevents guest kernels on AMD host with CPU
3184 * type 6, model 8 and higher from exploding due to
3185 * the rdmsr failing.
3187 msr_info
->data
= 0x20000000;
3189 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3190 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3191 case HV_X64_MSR_CRASH_CTL
:
3192 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3193 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3194 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3195 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3196 return kvm_hv_get_msr_common(vcpu
,
3197 msr_info
->index
, &msr_info
->data
,
3198 msr_info
->host_initiated
);
3199 case MSR_IA32_BBL_CR_CTL3
:
3200 /* This legacy MSR exists but isn't fully documented in current
3201 * silicon. It is however accessed by winxp in very narrow
3202 * scenarios where it sets bit #19, itself documented as
3203 * a "reserved" bit. Best effort attempt to source coherent
3204 * read data here should the balance of the register be
3205 * interpreted by the guest:
3207 * L2 cache control register 3: 64GB range, 256KB size,
3208 * enabled, latency 0x1, configured
3210 msr_info
->data
= 0xbe702111;
3212 case MSR_AMD64_OSVW_ID_LENGTH
:
3213 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3215 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3217 case MSR_AMD64_OSVW_STATUS
:
3218 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3220 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3222 case MSR_PLATFORM_INFO
:
3223 if (!msr_info
->host_initiated
&&
3224 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3226 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3228 case MSR_MISC_FEATURES_ENABLES
:
3229 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3232 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3235 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3236 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3238 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
3242 if (report_ignored_msrs
)
3243 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
3251 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3254 * Read or write a bunch of msrs. All parameters are kernel addresses.
3256 * @return number of msrs set successfully.
3258 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3259 struct kvm_msr_entry
*entries
,
3260 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3261 unsigned index
, u64
*data
))
3265 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3266 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3273 * Read or write a bunch of msrs. Parameters are user addresses.
3275 * @return number of msrs set successfully.
3277 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3278 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3279 unsigned index
, u64
*data
),
3282 struct kvm_msrs msrs
;
3283 struct kvm_msr_entry
*entries
;
3288 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3292 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3295 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3296 entries
= memdup_user(user_msrs
->entries
, size
);
3297 if (IS_ERR(entries
)) {
3298 r
= PTR_ERR(entries
);
3302 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3307 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3318 static inline bool kvm_can_mwait_in_guest(void)
3320 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3321 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3322 boot_cpu_has(X86_FEATURE_ARAT
);
3325 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
3330 case KVM_CAP_IRQCHIP
:
3332 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
3333 case KVM_CAP_SET_TSS_ADDR
:
3334 case KVM_CAP_EXT_CPUID
:
3335 case KVM_CAP_EXT_EMUL_CPUID
:
3336 case KVM_CAP_CLOCKSOURCE
:
3338 case KVM_CAP_NOP_IO_DELAY
:
3339 case KVM_CAP_MP_STATE
:
3340 case KVM_CAP_SYNC_MMU
:
3341 case KVM_CAP_USER_NMI
:
3342 case KVM_CAP_REINJECT_CONTROL
:
3343 case KVM_CAP_IRQ_INJECT_STATUS
:
3344 case KVM_CAP_IOEVENTFD
:
3345 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
3347 case KVM_CAP_PIT_STATE2
:
3348 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
3349 case KVM_CAP_XEN_HVM
:
3350 case KVM_CAP_VCPU_EVENTS
:
3351 case KVM_CAP_HYPERV
:
3352 case KVM_CAP_HYPERV_VAPIC
:
3353 case KVM_CAP_HYPERV_SPIN
:
3354 case KVM_CAP_HYPERV_SYNIC
:
3355 case KVM_CAP_HYPERV_SYNIC2
:
3356 case KVM_CAP_HYPERV_VP_INDEX
:
3357 case KVM_CAP_HYPERV_EVENTFD
:
3358 case KVM_CAP_HYPERV_TLBFLUSH
:
3359 case KVM_CAP_HYPERV_SEND_IPI
:
3360 case KVM_CAP_HYPERV_CPUID
:
3361 case KVM_CAP_PCI_SEGMENT
:
3362 case KVM_CAP_DEBUGREGS
:
3363 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
3365 case KVM_CAP_ASYNC_PF
:
3366 case KVM_CAP_GET_TSC_KHZ
:
3367 case KVM_CAP_KVMCLOCK_CTRL
:
3368 case KVM_CAP_READONLY_MEM
:
3369 case KVM_CAP_HYPERV_TIME
:
3370 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
3371 case KVM_CAP_TSC_DEADLINE_TIMER
:
3372 case KVM_CAP_DISABLE_QUIRKS
:
3373 case KVM_CAP_SET_BOOT_CPU_ID
:
3374 case KVM_CAP_SPLIT_IRQCHIP
:
3375 case KVM_CAP_IMMEDIATE_EXIT
:
3376 case KVM_CAP_PMU_EVENT_FILTER
:
3377 case KVM_CAP_GET_MSR_FEATURES
:
3378 case KVM_CAP_MSR_PLATFORM_INFO
:
3379 case KVM_CAP_EXCEPTION_PAYLOAD
:
3380 case KVM_CAP_SET_GUEST_DEBUG
:
3383 case KVM_CAP_SYNC_REGS
:
3384 r
= KVM_SYNC_X86_VALID_FIELDS
;
3386 case KVM_CAP_ADJUST_CLOCK
:
3387 r
= KVM_CLOCK_TSC_STABLE
;
3389 case KVM_CAP_X86_DISABLE_EXITS
:
3390 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
3391 KVM_X86_DISABLE_EXITS_CSTATE
;
3392 if(kvm_can_mwait_in_guest())
3393 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
3395 case KVM_CAP_X86_SMM
:
3396 /* SMBASE is usually relocated above 1M on modern chipsets,
3397 * and SMM handlers might indeed rely on 4G segment limits,
3398 * so do not report SMM to be available if real mode is
3399 * emulated via vm86 mode. Still, do not go to great lengths
3400 * to avoid userspace's usage of the feature, because it is a
3401 * fringe case that is not enabled except via specific settings
3402 * of the module parameters.
3404 r
= kvm_x86_ops
.has_emulated_msr(MSR_IA32_SMBASE
);
3407 r
= !kvm_x86_ops
.cpu_has_accelerated_tpr();
3409 case KVM_CAP_NR_VCPUS
:
3410 r
= KVM_SOFT_MAX_VCPUS
;
3412 case KVM_CAP_MAX_VCPUS
:
3415 case KVM_CAP_MAX_VCPU_ID
:
3416 r
= KVM_MAX_VCPU_ID
;
3418 case KVM_CAP_PV_MMU
: /* obsolete */
3422 r
= KVM_MAX_MCE_BANKS
;
3425 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
3427 case KVM_CAP_TSC_CONTROL
:
3428 r
= kvm_has_tsc_control
;
3430 case KVM_CAP_X2APIC_API
:
3431 r
= KVM_X2APIC_API_VALID_FLAGS
;
3433 case KVM_CAP_NESTED_STATE
:
3434 r
= kvm_x86_ops
.get_nested_state
?
3435 kvm_x86_ops
.get_nested_state(NULL
, NULL
, 0) : 0;
3437 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
3438 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
3440 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
3441 r
= kvm_x86_ops
.nested_enable_evmcs
!= NULL
;
3450 long kvm_arch_dev_ioctl(struct file
*filp
,
3451 unsigned int ioctl
, unsigned long arg
)
3453 void __user
*argp
= (void __user
*)arg
;
3457 case KVM_GET_MSR_INDEX_LIST
: {
3458 struct kvm_msr_list __user
*user_msr_list
= argp
;
3459 struct kvm_msr_list msr_list
;
3463 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3466 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
3467 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3470 if (n
< msr_list
.nmsrs
)
3473 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
3474 num_msrs_to_save
* sizeof(u32
)))
3476 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
3478 num_emulated_msrs
* sizeof(u32
)))
3483 case KVM_GET_SUPPORTED_CPUID
:
3484 case KVM_GET_EMULATED_CPUID
: {
3485 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3486 struct kvm_cpuid2 cpuid
;
3489 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3492 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
3498 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3503 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
3505 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
3506 sizeof(kvm_mce_cap_supported
)))
3510 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
3511 struct kvm_msr_list __user
*user_msr_list
= argp
;
3512 struct kvm_msr_list msr_list
;
3516 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3519 msr_list
.nmsrs
= num_msr_based_features
;
3520 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3523 if (n
< msr_list
.nmsrs
)
3526 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
3527 num_msr_based_features
* sizeof(u32
)))
3533 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3543 static void wbinvd_ipi(void *garbage
)
3548 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3550 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3553 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3555 /* Address WBINVD may be executed by guest */
3556 if (need_emulate_wbinvd(vcpu
)) {
3557 if (kvm_x86_ops
.has_wbinvd_exit())
3558 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3559 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3560 smp_call_function_single(vcpu
->cpu
,
3561 wbinvd_ipi
, NULL
, 1);
3564 kvm_x86_ops
.vcpu_load(vcpu
, cpu
);
3566 /* Save host pkru register if supported */
3567 vcpu
->arch
.host_pkru
= read_pkru();
3569 /* Apply any externally detected TSC adjustments (due to suspend) */
3570 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3571 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3572 vcpu
->arch
.tsc_offset_adjustment
= 0;
3573 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3576 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3577 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3578 rdtsc() - vcpu
->arch
.last_host_tsc
;
3580 mark_tsc_unstable("KVM discovered backwards TSC");
3582 if (kvm_check_tsc_unstable()) {
3583 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3584 vcpu
->arch
.last_guest_tsc
);
3585 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3586 vcpu
->arch
.tsc_catchup
= 1;
3589 if (kvm_lapic_hv_timer_in_use(vcpu
))
3590 kvm_lapic_restart_hv_timer(vcpu
);
3593 * On a host with synchronized TSC, there is no need to update
3594 * kvmclock on vcpu->cpu migration
3596 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3597 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3598 if (vcpu
->cpu
!= cpu
)
3599 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3603 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3606 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3608 struct kvm_host_map map
;
3609 struct kvm_steal_time
*st
;
3611 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3614 if (vcpu
->arch
.st
.preempted
)
3617 if (kvm_map_gfn(vcpu
, vcpu
->arch
.st
.msr_val
>> PAGE_SHIFT
, &map
,
3618 &vcpu
->arch
.st
.cache
, true))
3622 offset_in_page(vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
);
3624 st
->preempted
= vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
3626 kvm_unmap_gfn(vcpu
, &map
, &vcpu
->arch
.st
.cache
, true, true);
3629 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3633 if (vcpu
->preempted
)
3634 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
.get_cpl(vcpu
);
3637 * Disable page faults because we're in atomic context here.
3638 * kvm_write_guest_offset_cached() would call might_fault()
3639 * that relies on pagefault_disable() to tell if there's a
3640 * bug. NOTE: the write to guest memory may not go through if
3641 * during postcopy live migration or if there's heavy guest
3644 pagefault_disable();
3646 * kvm_memslots() will be called by
3647 * kvm_write_guest_offset_cached() so take the srcu lock.
3649 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3650 kvm_steal_time_set_preempted(vcpu
);
3651 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3653 kvm_x86_ops
.vcpu_put(vcpu
);
3654 vcpu
->arch
.last_host_tsc
= rdtsc();
3656 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3657 * on every vmexit, but if not, we might have a stale dr6 from the
3658 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3663 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3664 struct kvm_lapic_state
*s
)
3666 if (vcpu
->arch
.apicv_active
)
3667 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
3669 return kvm_apic_get_state(vcpu
, s
);
3672 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3673 struct kvm_lapic_state
*s
)
3677 r
= kvm_apic_set_state(vcpu
, s
);
3680 update_cr8_intercept(vcpu
);
3685 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3687 return (!lapic_in_kernel(vcpu
) ||
3688 kvm_apic_accept_pic_intr(vcpu
));
3692 * if userspace requested an interrupt window, check that the
3693 * interrupt window is open.
3695 * No need to exit to userspace if we already have an interrupt queued.
3697 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3699 return kvm_arch_interrupt_allowed(vcpu
) &&
3700 !kvm_cpu_has_interrupt(vcpu
) &&
3701 !kvm_event_needs_reinjection(vcpu
) &&
3702 kvm_cpu_accept_dm_intr(vcpu
);
3705 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3706 struct kvm_interrupt
*irq
)
3708 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3711 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3712 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3713 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3718 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3719 * fail for in-kernel 8259.
3721 if (pic_in_kernel(vcpu
->kvm
))
3724 if (vcpu
->arch
.pending_external_vector
!= -1)
3727 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3728 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3732 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3734 kvm_inject_nmi(vcpu
);
3739 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3741 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3746 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3747 struct kvm_tpr_access_ctl
*tac
)
3751 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3755 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3759 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3762 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
3764 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3767 vcpu
->arch
.mcg_cap
= mcg_cap
;
3768 /* Init IA32_MCG_CTL to all 1s */
3769 if (mcg_cap
& MCG_CTL_P
)
3770 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3771 /* Init IA32_MCi_CTL to all 1s */
3772 for (bank
= 0; bank
< bank_num
; bank
++)
3773 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3775 kvm_x86_ops
.setup_mce(vcpu
);
3780 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3781 struct kvm_x86_mce
*mce
)
3783 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3784 unsigned bank_num
= mcg_cap
& 0xff;
3785 u64
*banks
= vcpu
->arch
.mce_banks
;
3787 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3790 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3791 * reporting is disabled
3793 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3794 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3796 banks
+= 4 * mce
->bank
;
3798 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3799 * reporting is disabled for the bank
3801 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3803 if (mce
->status
& MCI_STATUS_UC
) {
3804 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3805 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3806 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3809 if (banks
[1] & MCI_STATUS_VAL
)
3810 mce
->status
|= MCI_STATUS_OVER
;
3811 banks
[2] = mce
->addr
;
3812 banks
[3] = mce
->misc
;
3813 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3814 banks
[1] = mce
->status
;
3815 kvm_queue_exception(vcpu
, MC_VECTOR
);
3816 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3817 || !(banks
[1] & MCI_STATUS_UC
)) {
3818 if (banks
[1] & MCI_STATUS_VAL
)
3819 mce
->status
|= MCI_STATUS_OVER
;
3820 banks
[2] = mce
->addr
;
3821 banks
[3] = mce
->misc
;
3822 banks
[1] = mce
->status
;
3824 banks
[1] |= MCI_STATUS_OVER
;
3828 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3829 struct kvm_vcpu_events
*events
)
3834 * In guest mode, payload delivery should be deferred,
3835 * so that the L1 hypervisor can intercept #PF before
3836 * CR2 is modified (or intercept #DB before DR6 is
3837 * modified under nVMX). Unless the per-VM capability,
3838 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
3839 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
3840 * opportunistically defer the exception payload, deliver it if the
3841 * capability hasn't been requested before processing a
3842 * KVM_GET_VCPU_EVENTS.
3844 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
3845 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
3846 kvm_deliver_exception_payload(vcpu
);
3849 * The API doesn't provide the instruction length for software
3850 * exceptions, so don't report them. As long as the guest RIP
3851 * isn't advanced, we should expect to encounter the exception
3854 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
3855 events
->exception
.injected
= 0;
3856 events
->exception
.pending
= 0;
3858 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
3859 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
3861 * For ABI compatibility, deliberately conflate
3862 * pending and injected exceptions when
3863 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3865 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
3866 events
->exception
.injected
|=
3867 vcpu
->arch
.exception
.pending
;
3869 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3870 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3871 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3872 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
3873 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
3875 events
->interrupt
.injected
=
3876 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
3877 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3878 events
->interrupt
.soft
= 0;
3879 events
->interrupt
.shadow
= kvm_x86_ops
.get_interrupt_shadow(vcpu
);
3881 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3882 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3883 events
->nmi
.masked
= kvm_x86_ops
.get_nmi_mask(vcpu
);
3884 events
->nmi
.pad
= 0;
3886 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3888 events
->smi
.smm
= is_smm(vcpu
);
3889 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3890 events
->smi
.smm_inside_nmi
=
3891 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3892 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3894 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3895 | KVM_VCPUEVENT_VALID_SHADOW
3896 | KVM_VCPUEVENT_VALID_SMM
);
3897 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
3898 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
3900 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3903 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
);
3905 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3906 struct kvm_vcpu_events
*events
)
3908 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3909 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3910 | KVM_VCPUEVENT_VALID_SHADOW
3911 | KVM_VCPUEVENT_VALID_SMM
3912 | KVM_VCPUEVENT_VALID_PAYLOAD
))
3915 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
3916 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
3918 if (events
->exception
.pending
)
3919 events
->exception
.injected
= 0;
3921 events
->exception_has_payload
= 0;
3923 events
->exception
.pending
= 0;
3924 events
->exception_has_payload
= 0;
3927 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
3928 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
3931 /* INITs are latched while in SMM */
3932 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3933 (events
->smi
.smm
|| events
->smi
.pending
) &&
3934 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3938 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
3939 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
3940 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3941 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3942 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3943 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
3944 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
3946 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
3947 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3948 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3949 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3950 kvm_x86_ops
.set_interrupt_shadow(vcpu
,
3951 events
->interrupt
.shadow
);
3953 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3954 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3955 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3956 kvm_x86_ops
.set_nmi_mask(vcpu
, events
->nmi
.masked
);
3958 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3959 lapic_in_kernel(vcpu
))
3960 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3962 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3963 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
3964 if (events
->smi
.smm
)
3965 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
3967 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
3968 kvm_smm_changed(vcpu
);
3971 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3973 if (events
->smi
.smm
) {
3974 if (events
->smi
.smm_inside_nmi
)
3975 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3977 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3980 if (lapic_in_kernel(vcpu
)) {
3981 if (events
->smi
.latched_init
)
3982 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3984 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3988 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3993 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3994 struct kvm_debugregs
*dbgregs
)
3998 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3999 kvm_get_dr(vcpu
, 6, &val
);
4001 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4003 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4006 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4007 struct kvm_debugregs
*dbgregs
)
4012 if (dbgregs
->dr6
& ~0xffffffffull
)
4014 if (dbgregs
->dr7
& ~0xffffffffull
)
4017 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4018 kvm_update_dr0123(vcpu
);
4019 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4020 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4021 kvm_update_dr7(vcpu
);
4026 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4028 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4030 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4031 u64 xstate_bv
= xsave
->header
.xfeatures
;
4035 * Copy legacy XSAVE area, to avoid complications with CPUID
4036 * leaves 0 and 1 in the loop below.
4038 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4041 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4042 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4045 * Copy each region from the possibly compacted offset to the
4046 * non-compacted offset.
4048 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4050 u64 xfeature_mask
= valid
& -valid
;
4051 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4052 void *src
= get_xsave_addr(xsave
, xfeature_nr
);
4055 u32 size
, offset
, ecx
, edx
;
4056 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4057 &size
, &offset
, &ecx
, &edx
);
4058 if (xfeature_nr
== XFEATURE_PKRU
)
4059 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4060 sizeof(vcpu
->arch
.pkru
));
4062 memcpy(dest
+ offset
, src
, size
);
4066 valid
-= xfeature_mask
;
4070 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4072 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4073 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4077 * Copy legacy XSAVE area, to avoid complications with CPUID
4078 * leaves 0 and 1 in the loop below.
4080 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4082 /* Set XSTATE_BV and possibly XCOMP_BV. */
4083 xsave
->header
.xfeatures
= xstate_bv
;
4084 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4085 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4088 * Copy each region from the non-compacted offset to the
4089 * possibly compacted offset.
4091 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4093 u64 xfeature_mask
= valid
& -valid
;
4094 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4095 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4098 u32 size
, offset
, ecx
, edx
;
4099 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4100 &size
, &offset
, &ecx
, &edx
);
4101 if (xfeature_nr
== XFEATURE_PKRU
)
4102 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4103 sizeof(vcpu
->arch
.pkru
));
4105 memcpy(dest
, src
+ offset
, size
);
4108 valid
-= xfeature_mask
;
4112 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4113 struct kvm_xsave
*guest_xsave
)
4115 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4116 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4117 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4119 memcpy(guest_xsave
->region
,
4120 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4121 sizeof(struct fxregs_state
));
4122 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4123 XFEATURE_MASK_FPSSE
;
4127 #define XSAVE_MXCSR_OFFSET 24
4129 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4130 struct kvm_xsave
*guest_xsave
)
4133 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4134 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4136 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4138 * Here we allow setting states that are not present in
4139 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4140 * with old userspace.
4142 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4144 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4146 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4147 mxcsr
& ~mxcsr_feature_mask
)
4149 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4150 guest_xsave
->region
, sizeof(struct fxregs_state
));
4155 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4156 struct kvm_xcrs
*guest_xcrs
)
4158 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4159 guest_xcrs
->nr_xcrs
= 0;
4163 guest_xcrs
->nr_xcrs
= 1;
4164 guest_xcrs
->flags
= 0;
4165 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4166 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4169 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4170 struct kvm_xcrs
*guest_xcrs
)
4174 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4177 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4180 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4181 /* Only support XCR0 currently */
4182 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4183 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4184 guest_xcrs
->xcrs
[i
].value
);
4193 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4194 * stopped by the hypervisor. This function will be called from the host only.
4195 * EINVAL is returned when the host attempts to set the flag for a guest that
4196 * does not support pv clocks.
4198 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4200 if (!vcpu
->arch
.pv_time_enabled
)
4202 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4203 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4207 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4208 struct kvm_enable_cap
*cap
)
4211 uint16_t vmcs_version
;
4212 void __user
*user_ptr
;
4218 case KVM_CAP_HYPERV_SYNIC2
:
4223 case KVM_CAP_HYPERV_SYNIC
:
4224 if (!irqchip_in_kernel(vcpu
->kvm
))
4226 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4227 KVM_CAP_HYPERV_SYNIC2
);
4228 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4229 if (!kvm_x86_ops
.nested_enable_evmcs
)
4231 r
= kvm_x86_ops
.nested_enable_evmcs(vcpu
, &vmcs_version
);
4233 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4234 if (copy_to_user(user_ptr
, &vmcs_version
,
4235 sizeof(vmcs_version
)))
4239 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4240 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4243 return kvm_x86_ops
.enable_direct_tlbflush(vcpu
);
4250 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4251 unsigned int ioctl
, unsigned long arg
)
4253 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4254 void __user
*argp
= (void __user
*)arg
;
4257 struct kvm_lapic_state
*lapic
;
4258 struct kvm_xsave
*xsave
;
4259 struct kvm_xcrs
*xcrs
;
4267 case KVM_GET_LAPIC
: {
4269 if (!lapic_in_kernel(vcpu
))
4271 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
4272 GFP_KERNEL_ACCOUNT
);
4277 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
4281 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
4286 case KVM_SET_LAPIC
: {
4288 if (!lapic_in_kernel(vcpu
))
4290 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
4291 if (IS_ERR(u
.lapic
)) {
4292 r
= PTR_ERR(u
.lapic
);
4296 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
4299 case KVM_INTERRUPT
: {
4300 struct kvm_interrupt irq
;
4303 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
4305 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
4309 r
= kvm_vcpu_ioctl_nmi(vcpu
);
4313 r
= kvm_vcpu_ioctl_smi(vcpu
);
4316 case KVM_SET_CPUID
: {
4317 struct kvm_cpuid __user
*cpuid_arg
= argp
;
4318 struct kvm_cpuid cpuid
;
4321 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4323 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4326 case KVM_SET_CPUID2
: {
4327 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4328 struct kvm_cpuid2 cpuid
;
4331 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4333 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
4334 cpuid_arg
->entries
);
4337 case KVM_GET_CPUID2
: {
4338 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4339 struct kvm_cpuid2 cpuid
;
4342 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4344 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
4345 cpuid_arg
->entries
);
4349 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4354 case KVM_GET_MSRS
: {
4355 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4356 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
4357 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4360 case KVM_SET_MSRS
: {
4361 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4362 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
4363 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4366 case KVM_TPR_ACCESS_REPORTING
: {
4367 struct kvm_tpr_access_ctl tac
;
4370 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
4372 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
4376 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
4381 case KVM_SET_VAPIC_ADDR
: {
4382 struct kvm_vapic_addr va
;
4386 if (!lapic_in_kernel(vcpu
))
4389 if (copy_from_user(&va
, argp
, sizeof(va
)))
4391 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4392 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
4393 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4396 case KVM_X86_SETUP_MCE
: {
4400 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
4402 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
4405 case KVM_X86_SET_MCE
: {
4406 struct kvm_x86_mce mce
;
4409 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
4411 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
4414 case KVM_GET_VCPU_EVENTS
: {
4415 struct kvm_vcpu_events events
;
4417 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
4420 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
4425 case KVM_SET_VCPU_EVENTS
: {
4426 struct kvm_vcpu_events events
;
4429 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
4432 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
4435 case KVM_GET_DEBUGREGS
: {
4436 struct kvm_debugregs dbgregs
;
4438 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
4441 if (copy_to_user(argp
, &dbgregs
,
4442 sizeof(struct kvm_debugregs
)))
4447 case KVM_SET_DEBUGREGS
: {
4448 struct kvm_debugregs dbgregs
;
4451 if (copy_from_user(&dbgregs
, argp
,
4452 sizeof(struct kvm_debugregs
)))
4455 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
4458 case KVM_GET_XSAVE
: {
4459 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
4464 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
4467 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
4472 case KVM_SET_XSAVE
: {
4473 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
4474 if (IS_ERR(u
.xsave
)) {
4475 r
= PTR_ERR(u
.xsave
);
4479 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
4482 case KVM_GET_XCRS
: {
4483 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
4488 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
4491 if (copy_to_user(argp
, u
.xcrs
,
4492 sizeof(struct kvm_xcrs
)))
4497 case KVM_SET_XCRS
: {
4498 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
4499 if (IS_ERR(u
.xcrs
)) {
4500 r
= PTR_ERR(u
.xcrs
);
4504 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
4507 case KVM_SET_TSC_KHZ
: {
4511 user_tsc_khz
= (u32
)arg
;
4513 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
4516 if (user_tsc_khz
== 0)
4517 user_tsc_khz
= tsc_khz
;
4519 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
4524 case KVM_GET_TSC_KHZ
: {
4525 r
= vcpu
->arch
.virtual_tsc_khz
;
4528 case KVM_KVMCLOCK_CTRL
: {
4529 r
= kvm_set_guest_paused(vcpu
);
4532 case KVM_ENABLE_CAP
: {
4533 struct kvm_enable_cap cap
;
4536 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4538 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
4541 case KVM_GET_NESTED_STATE
: {
4542 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4546 if (!kvm_x86_ops
.get_nested_state
)
4549 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
4551 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
4554 r
= kvm_x86_ops
.get_nested_state(vcpu
, user_kvm_nested_state
,
4559 if (r
> user_data_size
) {
4560 if (put_user(r
, &user_kvm_nested_state
->size
))
4570 case KVM_SET_NESTED_STATE
: {
4571 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4572 struct kvm_nested_state kvm_state
;
4576 if (!kvm_x86_ops
.set_nested_state
)
4580 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
4584 if (kvm_state
.size
< sizeof(kvm_state
))
4587 if (kvm_state
.flags
&
4588 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
4589 | KVM_STATE_NESTED_EVMCS
))
4592 /* nested_run_pending implies guest_mode. */
4593 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
4594 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
4597 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4598 r
= kvm_x86_ops
.set_nested_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
4599 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4602 case KVM_GET_SUPPORTED_HV_CPUID
: {
4603 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4604 struct kvm_cpuid2 cpuid
;
4607 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4610 r
= kvm_vcpu_ioctl_get_hv_cpuid(vcpu
, &cpuid
,
4611 cpuid_arg
->entries
);
4616 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4631 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
4633 return VM_FAULT_SIGBUS
;
4636 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
4640 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
4642 ret
= kvm_x86_ops
.set_tss_addr(kvm
, addr
);
4646 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
4649 return kvm_x86_ops
.set_identity_map_addr(kvm
, ident_addr
);
4652 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
4653 unsigned long kvm_nr_mmu_pages
)
4655 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
4658 mutex_lock(&kvm
->slots_lock
);
4660 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
4661 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
4663 mutex_unlock(&kvm
->slots_lock
);
4667 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
4669 return kvm
->arch
.n_max_mmu_pages
;
4672 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
4674 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4678 switch (chip
->chip_id
) {
4679 case KVM_IRQCHIP_PIC_MASTER
:
4680 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
4681 sizeof(struct kvm_pic_state
));
4683 case KVM_IRQCHIP_PIC_SLAVE
:
4684 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
4685 sizeof(struct kvm_pic_state
));
4687 case KVM_IRQCHIP_IOAPIC
:
4688 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
4697 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
4699 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4703 switch (chip
->chip_id
) {
4704 case KVM_IRQCHIP_PIC_MASTER
:
4705 spin_lock(&pic
->lock
);
4706 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
4707 sizeof(struct kvm_pic_state
));
4708 spin_unlock(&pic
->lock
);
4710 case KVM_IRQCHIP_PIC_SLAVE
:
4711 spin_lock(&pic
->lock
);
4712 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
4713 sizeof(struct kvm_pic_state
));
4714 spin_unlock(&pic
->lock
);
4716 case KVM_IRQCHIP_IOAPIC
:
4717 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
4723 kvm_pic_update_irq(pic
);
4727 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4729 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
4731 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
4733 mutex_lock(&kps
->lock
);
4734 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
4735 mutex_unlock(&kps
->lock
);
4739 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4742 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4744 mutex_lock(&pit
->pit_state
.lock
);
4745 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
4746 for (i
= 0; i
< 3; i
++)
4747 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
4748 mutex_unlock(&pit
->pit_state
.lock
);
4752 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4754 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
4755 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
4756 sizeof(ps
->channels
));
4757 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
4758 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
4759 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
4763 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4767 u32 prev_legacy
, cur_legacy
;
4768 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4770 mutex_lock(&pit
->pit_state
.lock
);
4771 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4772 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4773 if (!prev_legacy
&& cur_legacy
)
4775 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4776 sizeof(pit
->pit_state
.channels
));
4777 pit
->pit_state
.flags
= ps
->flags
;
4778 for (i
= 0; i
< 3; i
++)
4779 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4781 mutex_unlock(&pit
->pit_state
.lock
);
4785 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4786 struct kvm_reinject_control
*control
)
4788 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4790 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4791 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4792 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4794 mutex_lock(&pit
->pit_state
.lock
);
4795 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4796 mutex_unlock(&pit
->pit_state
.lock
);
4801 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
4804 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4806 if (kvm_x86_ops
.flush_log_dirty
)
4807 kvm_x86_ops
.flush_log_dirty(kvm
);
4810 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4813 if (!irqchip_in_kernel(kvm
))
4816 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4817 irq_event
->irq
, irq_event
->level
,
4822 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4823 struct kvm_enable_cap
*cap
)
4831 case KVM_CAP_DISABLE_QUIRKS
:
4832 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4835 case KVM_CAP_SPLIT_IRQCHIP
: {
4836 mutex_lock(&kvm
->lock
);
4838 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4839 goto split_irqchip_unlock
;
4841 if (irqchip_in_kernel(kvm
))
4842 goto split_irqchip_unlock
;
4843 if (kvm
->created_vcpus
)
4844 goto split_irqchip_unlock
;
4845 r
= kvm_setup_empty_irq_routing(kvm
);
4847 goto split_irqchip_unlock
;
4848 /* Pairs with irqchip_in_kernel. */
4850 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4851 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4853 split_irqchip_unlock
:
4854 mutex_unlock(&kvm
->lock
);
4857 case KVM_CAP_X2APIC_API
:
4859 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4862 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4863 kvm
->arch
.x2apic_format
= true;
4864 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4865 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4869 case KVM_CAP_X86_DISABLE_EXITS
:
4871 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
4874 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
4875 kvm_can_mwait_in_guest())
4876 kvm
->arch
.mwait_in_guest
= true;
4877 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
4878 kvm
->arch
.hlt_in_guest
= true;
4879 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
4880 kvm
->arch
.pause_in_guest
= true;
4881 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
4882 kvm
->arch
.cstate_in_guest
= true;
4885 case KVM_CAP_MSR_PLATFORM_INFO
:
4886 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
4889 case KVM_CAP_EXCEPTION_PAYLOAD
:
4890 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
4900 long kvm_arch_vm_ioctl(struct file
*filp
,
4901 unsigned int ioctl
, unsigned long arg
)
4903 struct kvm
*kvm
= filp
->private_data
;
4904 void __user
*argp
= (void __user
*)arg
;
4907 * This union makes it completely explicit to gcc-3.x
4908 * that these two variables' stack usage should be
4909 * combined, not added together.
4912 struct kvm_pit_state ps
;
4913 struct kvm_pit_state2 ps2
;
4914 struct kvm_pit_config pit_config
;
4918 case KVM_SET_TSS_ADDR
:
4919 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4921 case KVM_SET_IDENTITY_MAP_ADDR
: {
4924 mutex_lock(&kvm
->lock
);
4926 if (kvm
->created_vcpus
)
4927 goto set_identity_unlock
;
4929 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
4930 goto set_identity_unlock
;
4931 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4932 set_identity_unlock
:
4933 mutex_unlock(&kvm
->lock
);
4936 case KVM_SET_NR_MMU_PAGES
:
4937 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4939 case KVM_GET_NR_MMU_PAGES
:
4940 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4942 case KVM_CREATE_IRQCHIP
: {
4943 mutex_lock(&kvm
->lock
);
4946 if (irqchip_in_kernel(kvm
))
4947 goto create_irqchip_unlock
;
4950 if (kvm
->created_vcpus
)
4951 goto create_irqchip_unlock
;
4953 r
= kvm_pic_init(kvm
);
4955 goto create_irqchip_unlock
;
4957 r
= kvm_ioapic_init(kvm
);
4959 kvm_pic_destroy(kvm
);
4960 goto create_irqchip_unlock
;
4963 r
= kvm_setup_default_irq_routing(kvm
);
4965 kvm_ioapic_destroy(kvm
);
4966 kvm_pic_destroy(kvm
);
4967 goto create_irqchip_unlock
;
4969 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4971 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4972 create_irqchip_unlock
:
4973 mutex_unlock(&kvm
->lock
);
4976 case KVM_CREATE_PIT
:
4977 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4979 case KVM_CREATE_PIT2
:
4981 if (copy_from_user(&u
.pit_config
, argp
,
4982 sizeof(struct kvm_pit_config
)))
4985 mutex_lock(&kvm
->lock
);
4988 goto create_pit_unlock
;
4990 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4994 mutex_unlock(&kvm
->lock
);
4996 case KVM_GET_IRQCHIP
: {
4997 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4998 struct kvm_irqchip
*chip
;
5000 chip
= memdup_user(argp
, sizeof(*chip
));
5007 if (!irqchip_kernel(kvm
))
5008 goto get_irqchip_out
;
5009 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5011 goto get_irqchip_out
;
5013 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5014 goto get_irqchip_out
;
5020 case KVM_SET_IRQCHIP
: {
5021 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5022 struct kvm_irqchip
*chip
;
5024 chip
= memdup_user(argp
, sizeof(*chip
));
5031 if (!irqchip_kernel(kvm
))
5032 goto set_irqchip_out
;
5033 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
5040 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
5043 if (!kvm
->arch
.vpit
)
5045 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
5049 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
5056 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
5058 mutex_lock(&kvm
->lock
);
5060 if (!kvm
->arch
.vpit
)
5062 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
5064 mutex_unlock(&kvm
->lock
);
5067 case KVM_GET_PIT2
: {
5069 if (!kvm
->arch
.vpit
)
5071 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
5075 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
5080 case KVM_SET_PIT2
: {
5082 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
5084 mutex_lock(&kvm
->lock
);
5086 if (!kvm
->arch
.vpit
)
5088 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
5090 mutex_unlock(&kvm
->lock
);
5093 case KVM_REINJECT_CONTROL
: {
5094 struct kvm_reinject_control control
;
5096 if (copy_from_user(&control
, argp
, sizeof(control
)))
5099 if (!kvm
->arch
.vpit
)
5101 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
5104 case KVM_SET_BOOT_CPU_ID
:
5106 mutex_lock(&kvm
->lock
);
5107 if (kvm
->created_vcpus
)
5110 kvm
->arch
.bsp_vcpu_id
= arg
;
5111 mutex_unlock(&kvm
->lock
);
5113 case KVM_XEN_HVM_CONFIG
: {
5114 struct kvm_xen_hvm_config xhc
;
5116 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
5121 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
5125 case KVM_SET_CLOCK
: {
5126 struct kvm_clock_data user_ns
;
5130 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
5139 * TODO: userspace has to take care of races with VCPU_RUN, so
5140 * kvm_gen_update_masterclock() can be cut down to locked
5141 * pvclock_update_vm_gtod_copy().
5143 kvm_gen_update_masterclock(kvm
);
5144 now_ns
= get_kvmclock_ns(kvm
);
5145 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
5146 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
5149 case KVM_GET_CLOCK
: {
5150 struct kvm_clock_data user_ns
;
5153 now_ns
= get_kvmclock_ns(kvm
);
5154 user_ns
.clock
= now_ns
;
5155 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
5156 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
5159 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
5164 case KVM_MEMORY_ENCRYPT_OP
: {
5166 if (kvm_x86_ops
.mem_enc_op
)
5167 r
= kvm_x86_ops
.mem_enc_op(kvm
, argp
);
5170 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
5171 struct kvm_enc_region region
;
5174 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5178 if (kvm_x86_ops
.mem_enc_reg_region
)
5179 r
= kvm_x86_ops
.mem_enc_reg_region(kvm
, ®ion
);
5182 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
5183 struct kvm_enc_region region
;
5186 if (copy_from_user(®ion
, argp
, sizeof(region
)))
5190 if (kvm_x86_ops
.mem_enc_unreg_region
)
5191 r
= kvm_x86_ops
.mem_enc_unreg_region(kvm
, ®ion
);
5194 case KVM_HYPERV_EVENTFD
: {
5195 struct kvm_hyperv_eventfd hvevfd
;
5198 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
5200 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
5203 case KVM_SET_PMU_EVENT_FILTER
:
5204 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
5213 static void kvm_init_msr_list(void)
5215 struct x86_pmu_capability x86_pmu
;
5219 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
5220 "Please update the fixed PMCs in msrs_to_saved_all[]");
5222 perf_get_x86_pmu_capability(&x86_pmu
);
5224 num_msrs_to_save
= 0;
5225 num_emulated_msrs
= 0;
5226 num_msr_based_features
= 0;
5228 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
5229 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
5233 * Even MSRs that are valid in the host may not be exposed
5234 * to the guests in some cases.
5236 switch (msrs_to_save_all
[i
]) {
5237 case MSR_IA32_BNDCFGS
:
5238 if (!kvm_mpx_supported())
5242 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
))
5245 case MSR_IA32_RTIT_CTL
:
5246 case MSR_IA32_RTIT_STATUS
:
5247 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
5250 case MSR_IA32_RTIT_CR3_MATCH
:
5251 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5252 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
5255 case MSR_IA32_RTIT_OUTPUT_BASE
:
5256 case MSR_IA32_RTIT_OUTPUT_MASK
:
5257 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5258 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
5259 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
5262 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
: {
5263 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
5264 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
5265 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
5268 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
5269 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
5270 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5273 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
5274 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
5275 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
5282 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
5285 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
5286 if (!kvm_x86_ops
.has_emulated_msr(emulated_msrs_all
[i
]))
5289 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
5292 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
5293 struct kvm_msr_entry msr
;
5295 msr
.index
= msr_based_features_all
[i
];
5296 if (kvm_get_msr_feature(&msr
))
5299 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
5303 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
5311 if (!(lapic_in_kernel(vcpu
) &&
5312 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
5313 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5324 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
5331 if (!(lapic_in_kernel(vcpu
) &&
5332 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
5334 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5336 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
5346 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
5347 struct kvm_segment
*var
, int seg
)
5349 kvm_x86_ops
.set_segment(vcpu
, var
, seg
);
5352 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
5353 struct kvm_segment
*var
, int seg
)
5355 kvm_x86_ops
.get_segment(vcpu
, var
, seg
);
5358 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
5359 struct x86_exception
*exception
)
5363 BUG_ON(!mmu_is_nested(vcpu
));
5365 /* NPT walks are always user-walks */
5366 access
|= PFERR_USER_MASK
;
5367 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
5372 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
5373 struct x86_exception
*exception
)
5375 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5376 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5379 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
5380 struct x86_exception
*exception
)
5382 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5383 access
|= PFERR_FETCH_MASK
;
5384 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5387 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
5388 struct x86_exception
*exception
)
5390 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5391 access
|= PFERR_WRITE_MASK
;
5392 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5395 /* uses this to access any guest's mapped memory without checking CPL */
5396 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
5397 struct x86_exception
*exception
)
5399 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
5402 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5403 struct kvm_vcpu
*vcpu
, u32 access
,
5404 struct x86_exception
*exception
)
5407 int r
= X86EMUL_CONTINUE
;
5410 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
5412 unsigned offset
= addr
& (PAGE_SIZE
-1);
5413 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5416 if (gpa
== UNMAPPED_GVA
)
5417 return X86EMUL_PROPAGATE_FAULT
;
5418 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
5421 r
= X86EMUL_IO_NEEDED
;
5433 /* used for instruction fetching */
5434 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
5435 gva_t addr
, void *val
, unsigned int bytes
,
5436 struct x86_exception
*exception
)
5438 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5439 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5443 /* Inline kvm_read_guest_virt_helper for speed. */
5444 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
5446 if (unlikely(gpa
== UNMAPPED_GVA
))
5447 return X86EMUL_PROPAGATE_FAULT
;
5449 offset
= addr
& (PAGE_SIZE
-1);
5450 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
5451 bytes
= (unsigned)PAGE_SIZE
- offset
;
5452 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
5454 if (unlikely(ret
< 0))
5455 return X86EMUL_IO_NEEDED
;
5457 return X86EMUL_CONTINUE
;
5460 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
5461 gva_t addr
, void *val
, unsigned int bytes
,
5462 struct x86_exception
*exception
)
5464 u32 access
= (kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5467 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5468 * is returned, but our callers are not ready for that and they blindly
5469 * call kvm_inject_page_fault. Ensure that they at least do not leak
5470 * uninitialized kernel stack memory into cr2 and error code.
5472 memset(exception
, 0, sizeof(*exception
));
5473 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
5476 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
5478 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
5479 gva_t addr
, void *val
, unsigned int bytes
,
5480 struct x86_exception
*exception
, bool system
)
5482 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5485 if (!system
&& kvm_x86_ops
.get_cpl(vcpu
) == 3)
5486 access
|= PFERR_USER_MASK
;
5488 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
5491 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
5492 unsigned long addr
, void *val
, unsigned int bytes
)
5494 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5495 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
5497 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
5500 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5501 struct kvm_vcpu
*vcpu
, u32 access
,
5502 struct x86_exception
*exception
)
5505 int r
= X86EMUL_CONTINUE
;
5508 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
5511 unsigned offset
= addr
& (PAGE_SIZE
-1);
5512 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5515 if (gpa
== UNMAPPED_GVA
)
5516 return X86EMUL_PROPAGATE_FAULT
;
5517 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
5519 r
= X86EMUL_IO_NEEDED
;
5531 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
5532 unsigned int bytes
, struct x86_exception
*exception
,
5535 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5536 u32 access
= PFERR_WRITE_MASK
;
5538 if (!system
&& kvm_x86_ops
.get_cpl(vcpu
) == 3)
5539 access
|= PFERR_USER_MASK
;
5541 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
5545 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
5546 unsigned int bytes
, struct x86_exception
*exception
)
5548 /* kvm_write_guest_virt_system can pull in tons of pages. */
5549 vcpu
->arch
.l1tf_flush_l1d
= true;
5552 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5553 * is returned, but our callers are not ready for that and they blindly
5554 * call kvm_inject_page_fault. Ensure that they at least do not leak
5555 * uninitialized kernel stack memory into cr2 and error code.
5557 memset(exception
, 0, sizeof(*exception
));
5558 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
5559 PFERR_WRITE_MASK
, exception
);
5561 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
5563 int handle_ud(struct kvm_vcpu
*vcpu
)
5565 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
5566 int emul_type
= EMULTYPE_TRAP_UD
;
5567 char sig
[5]; /* ud2; .ascii "kvm" */
5568 struct x86_exception e
;
5570 if (force_emulation_prefix
&&
5571 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
5572 sig
, sizeof(sig
), &e
) == 0 &&
5573 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
5574 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
5575 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
5578 return kvm_emulate_instruction(vcpu
, emul_type
);
5580 EXPORT_SYMBOL_GPL(handle_ud
);
5582 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
5583 gpa_t gpa
, bool write
)
5585 /* For APIC access vmexit */
5586 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5589 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
5590 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
5597 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
5598 gpa_t
*gpa
, struct x86_exception
*exception
,
5601 u32 access
= ((kvm_x86_ops
.get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
5602 | (write
? PFERR_WRITE_MASK
: 0);
5605 * currently PKRU is only applied to ept enabled guest so
5606 * there is no pkey in EPT page table for L1 guest or EPT
5607 * shadow page table for L2 guest.
5609 if (vcpu_match_mmio_gva(vcpu
, gva
)
5610 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
5611 vcpu
->arch
.mmio_access
, 0, access
)) {
5612 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
5613 (gva
& (PAGE_SIZE
- 1));
5614 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
5618 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5620 if (*gpa
== UNMAPPED_GVA
)
5623 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
5626 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5627 const void *val
, int bytes
)
5631 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
5634 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
5638 struct read_write_emulator_ops
{
5639 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
5641 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5642 void *val
, int bytes
);
5643 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5644 int bytes
, void *val
);
5645 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5646 void *val
, int bytes
);
5650 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
5652 if (vcpu
->mmio_read_completed
) {
5653 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
5654 vcpu
->mmio_fragments
[0].gpa
, val
);
5655 vcpu
->mmio_read_completed
= 0;
5662 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5663 void *val
, int bytes
)
5665 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
5668 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5669 void *val
, int bytes
)
5671 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
5674 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
5676 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
5677 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
5680 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5681 void *val
, int bytes
)
5683 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
5684 return X86EMUL_IO_NEEDED
;
5687 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5688 void *val
, int bytes
)
5690 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
5692 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
5693 return X86EMUL_CONTINUE
;
5696 static const struct read_write_emulator_ops read_emultor
= {
5697 .read_write_prepare
= read_prepare
,
5698 .read_write_emulate
= read_emulate
,
5699 .read_write_mmio
= vcpu_mmio_read
,
5700 .read_write_exit_mmio
= read_exit_mmio
,
5703 static const struct read_write_emulator_ops write_emultor
= {
5704 .read_write_emulate
= write_emulate
,
5705 .read_write_mmio
= write_mmio
,
5706 .read_write_exit_mmio
= write_exit_mmio
,
5710 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
5712 struct x86_exception
*exception
,
5713 struct kvm_vcpu
*vcpu
,
5714 const struct read_write_emulator_ops
*ops
)
5718 bool write
= ops
->write
;
5719 struct kvm_mmio_fragment
*frag
;
5720 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
5723 * If the exit was due to a NPF we may already have a GPA.
5724 * If the GPA is present, use it to avoid the GVA to GPA table walk.
5725 * Note, this cannot be used on string operations since string
5726 * operation using rep will only have the initial GPA from the NPF
5729 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
5730 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
5731 gpa
= ctxt
->gpa_val
;
5732 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
5734 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
5736 return X86EMUL_PROPAGATE_FAULT
;
5739 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
5740 return X86EMUL_CONTINUE
;
5743 * Is this MMIO handled locally?
5745 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
5746 if (handled
== bytes
)
5747 return X86EMUL_CONTINUE
;
5753 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
5754 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
5758 return X86EMUL_CONTINUE
;
5761 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
5763 void *val
, unsigned int bytes
,
5764 struct x86_exception
*exception
,
5765 const struct read_write_emulator_ops
*ops
)
5767 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5771 if (ops
->read_write_prepare
&&
5772 ops
->read_write_prepare(vcpu
, val
, bytes
))
5773 return X86EMUL_CONTINUE
;
5775 vcpu
->mmio_nr_fragments
= 0;
5777 /* Crossing a page boundary? */
5778 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
5781 now
= -addr
& ~PAGE_MASK
;
5782 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
5785 if (rc
!= X86EMUL_CONTINUE
)
5788 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
5794 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
5796 if (rc
!= X86EMUL_CONTINUE
)
5799 if (!vcpu
->mmio_nr_fragments
)
5802 gpa
= vcpu
->mmio_fragments
[0].gpa
;
5804 vcpu
->mmio_needed
= 1;
5805 vcpu
->mmio_cur_fragment
= 0;
5807 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
5808 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
5809 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
5810 vcpu
->run
->mmio
.phys_addr
= gpa
;
5812 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
5815 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
5819 struct x86_exception
*exception
)
5821 return emulator_read_write(ctxt
, addr
, val
, bytes
,
5822 exception
, &read_emultor
);
5825 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
5829 struct x86_exception
*exception
)
5831 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
5832 exception
, &write_emultor
);
5835 #define CMPXCHG_TYPE(t, ptr, old, new) \
5836 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5838 #ifdef CONFIG_X86_64
5839 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5841 # define CMPXCHG64(ptr, old, new) \
5842 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5845 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5850 struct x86_exception
*exception
)
5852 struct kvm_host_map map
;
5853 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5859 /* guests cmpxchg8b have to be emulated atomically */
5860 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5863 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5865 if (gpa
== UNMAPPED_GVA
||
5866 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5870 * Emulate the atomic as a straight write to avoid #AC if SLD is
5871 * enabled in the host and the access splits a cache line.
5873 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
5874 page_line_mask
= ~(cache_line_size() - 1);
5876 page_line_mask
= PAGE_MASK
;
5878 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
5881 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
5884 kaddr
= map
.hva
+ offset_in_page(gpa
);
5888 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5891 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5894 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5897 exchanged
= CMPXCHG64(kaddr
, old
, new);
5903 kvm_vcpu_unmap(vcpu
, &map
, true);
5906 return X86EMUL_CMPXCHG_FAILED
;
5908 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5910 return X86EMUL_CONTINUE
;
5913 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5915 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5918 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5922 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5923 if (vcpu
->arch
.pio
.in
)
5924 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5925 vcpu
->arch
.pio
.size
, pd
);
5927 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5928 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5932 pd
+= vcpu
->arch
.pio
.size
;
5937 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5938 unsigned short port
, void *val
,
5939 unsigned int count
, bool in
)
5941 vcpu
->arch
.pio
.port
= port
;
5942 vcpu
->arch
.pio
.in
= in
;
5943 vcpu
->arch
.pio
.count
= count
;
5944 vcpu
->arch
.pio
.size
= size
;
5946 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5947 vcpu
->arch
.pio
.count
= 0;
5951 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5952 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5953 vcpu
->run
->io
.size
= size
;
5954 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5955 vcpu
->run
->io
.count
= count
;
5956 vcpu
->run
->io
.port
= port
;
5961 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
5962 unsigned short port
, void *val
, unsigned int count
)
5966 if (vcpu
->arch
.pio
.count
)
5969 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5971 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5974 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5975 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5976 vcpu
->arch
.pio
.count
= 0;
5983 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5984 int size
, unsigned short port
, void *val
,
5987 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
5991 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
5992 unsigned short port
, const void *val
,
5995 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5996 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5997 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
6000 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
6001 int size
, unsigned short port
,
6002 const void *val
, unsigned int count
)
6004 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6007 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
6009 return kvm_x86_ops
.get_segment_base(vcpu
, seg
);
6012 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
6014 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
6017 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
6019 if (!need_emulate_wbinvd(vcpu
))
6020 return X86EMUL_CONTINUE
;
6022 if (kvm_x86_ops
.has_wbinvd_exit()) {
6023 int cpu
= get_cpu();
6025 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
6026 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
6027 wbinvd_ipi
, NULL
, 1);
6029 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
6032 return X86EMUL_CONTINUE
;
6035 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
6037 kvm_emulate_wbinvd_noskip(vcpu
);
6038 return kvm_skip_emulated_instruction(vcpu
);
6040 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
6044 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
6046 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
6049 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6050 unsigned long *dest
)
6052 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
6055 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6056 unsigned long value
)
6059 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
6062 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
6064 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
6067 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
6069 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6070 unsigned long value
;
6074 value
= kvm_read_cr0(vcpu
);
6077 value
= vcpu
->arch
.cr2
;
6080 value
= kvm_read_cr3(vcpu
);
6083 value
= kvm_read_cr4(vcpu
);
6086 value
= kvm_get_cr8(vcpu
);
6089 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6096 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
6098 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6103 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
6106 vcpu
->arch
.cr2
= val
;
6109 res
= kvm_set_cr3(vcpu
, val
);
6112 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
6115 res
= kvm_set_cr8(vcpu
, val
);
6118 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6125 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
6127 return kvm_x86_ops
.get_cpl(emul_to_vcpu(ctxt
));
6130 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6132 kvm_x86_ops
.get_gdt(emul_to_vcpu(ctxt
), dt
);
6135 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6137 kvm_x86_ops
.get_idt(emul_to_vcpu(ctxt
), dt
);
6140 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6142 kvm_x86_ops
.set_gdt(emul_to_vcpu(ctxt
), dt
);
6145 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
6147 kvm_x86_ops
.set_idt(emul_to_vcpu(ctxt
), dt
);
6150 static unsigned long emulator_get_cached_segment_base(
6151 struct x86_emulate_ctxt
*ctxt
, int seg
)
6153 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
6156 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
6157 struct desc_struct
*desc
, u32
*base3
,
6160 struct kvm_segment var
;
6162 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
6163 *selector
= var
.selector
;
6166 memset(desc
, 0, sizeof(*desc
));
6174 set_desc_limit(desc
, var
.limit
);
6175 set_desc_base(desc
, (unsigned long)var
.base
);
6176 #ifdef CONFIG_X86_64
6178 *base3
= var
.base
>> 32;
6180 desc
->type
= var
.type
;
6182 desc
->dpl
= var
.dpl
;
6183 desc
->p
= var
.present
;
6184 desc
->avl
= var
.avl
;
6192 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
6193 struct desc_struct
*desc
, u32 base3
,
6196 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6197 struct kvm_segment var
;
6199 var
.selector
= selector
;
6200 var
.base
= get_desc_base(desc
);
6201 #ifdef CONFIG_X86_64
6202 var
.base
|= ((u64
)base3
) << 32;
6204 var
.limit
= get_desc_limit(desc
);
6206 var
.limit
= (var
.limit
<< 12) | 0xfff;
6207 var
.type
= desc
->type
;
6208 var
.dpl
= desc
->dpl
;
6213 var
.avl
= desc
->avl
;
6214 var
.present
= desc
->p
;
6215 var
.unusable
= !var
.present
;
6218 kvm_set_segment(vcpu
, &var
, seg
);
6222 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
6223 u32 msr_index
, u64
*pdata
)
6225 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
6228 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
6229 u32 msr_index
, u64 data
)
6231 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
6234 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
6236 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6238 return vcpu
->arch
.smbase
;
6241 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
6243 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6245 vcpu
->arch
.smbase
= smbase
;
6248 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
6251 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
6254 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
6255 u32 pmc
, u64
*pdata
)
6257 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
6260 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
6262 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
6265 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
6266 struct x86_instruction_info
*info
,
6267 enum x86_intercept_stage stage
)
6269 return kvm_x86_ops
.check_intercept(emul_to_vcpu(ctxt
), info
, stage
,
6273 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
6274 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
6277 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
6280 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
6282 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
6285 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
6287 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
6290 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
6292 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
6295 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
6297 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
6300 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
6302 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
6305 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
6307 kvm_x86_ops
.set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
6310 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
6312 return emul_to_vcpu(ctxt
)->arch
.hflags
;
6315 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
6317 emul_to_vcpu(ctxt
)->arch
.hflags
= emul_flags
;
6320 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
,
6321 const char *smstate
)
6323 return kvm_x86_ops
.pre_leave_smm(emul_to_vcpu(ctxt
), smstate
);
6326 static void emulator_post_leave_smm(struct x86_emulate_ctxt
*ctxt
)
6328 kvm_smm_changed(emul_to_vcpu(ctxt
));
6331 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
6333 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
6336 static const struct x86_emulate_ops emulate_ops
= {
6337 .read_gpr
= emulator_read_gpr
,
6338 .write_gpr
= emulator_write_gpr
,
6339 .read_std
= emulator_read_std
,
6340 .write_std
= emulator_write_std
,
6341 .read_phys
= kvm_read_guest_phys_system
,
6342 .fetch
= kvm_fetch_guest_virt
,
6343 .read_emulated
= emulator_read_emulated
,
6344 .write_emulated
= emulator_write_emulated
,
6345 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
6346 .invlpg
= emulator_invlpg
,
6347 .pio_in_emulated
= emulator_pio_in_emulated
,
6348 .pio_out_emulated
= emulator_pio_out_emulated
,
6349 .get_segment
= emulator_get_segment
,
6350 .set_segment
= emulator_set_segment
,
6351 .get_cached_segment_base
= emulator_get_cached_segment_base
,
6352 .get_gdt
= emulator_get_gdt
,
6353 .get_idt
= emulator_get_idt
,
6354 .set_gdt
= emulator_set_gdt
,
6355 .set_idt
= emulator_set_idt
,
6356 .get_cr
= emulator_get_cr
,
6357 .set_cr
= emulator_set_cr
,
6358 .cpl
= emulator_get_cpl
,
6359 .get_dr
= emulator_get_dr
,
6360 .set_dr
= emulator_set_dr
,
6361 .get_smbase
= emulator_get_smbase
,
6362 .set_smbase
= emulator_set_smbase
,
6363 .set_msr
= emulator_set_msr
,
6364 .get_msr
= emulator_get_msr
,
6365 .check_pmc
= emulator_check_pmc
,
6366 .read_pmc
= emulator_read_pmc
,
6367 .halt
= emulator_halt
,
6368 .wbinvd
= emulator_wbinvd
,
6369 .fix_hypercall
= emulator_fix_hypercall
,
6370 .intercept
= emulator_intercept
,
6371 .get_cpuid
= emulator_get_cpuid
,
6372 .guest_has_long_mode
= emulator_guest_has_long_mode
,
6373 .guest_has_movbe
= emulator_guest_has_movbe
,
6374 .guest_has_fxsr
= emulator_guest_has_fxsr
,
6375 .set_nmi_mask
= emulator_set_nmi_mask
,
6376 .get_hflags
= emulator_get_hflags
,
6377 .set_hflags
= emulator_set_hflags
,
6378 .pre_leave_smm
= emulator_pre_leave_smm
,
6379 .post_leave_smm
= emulator_post_leave_smm
,
6380 .set_xcr
= emulator_set_xcr
,
6383 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
6385 u32 int_shadow
= kvm_x86_ops
.get_interrupt_shadow(vcpu
);
6387 * an sti; sti; sequence only disable interrupts for the first
6388 * instruction. So, if the last instruction, be it emulated or
6389 * not, left the system with the INT_STI flag enabled, it
6390 * means that the last instruction is an sti. We should not
6391 * leave the flag on in this case. The same goes for mov ss
6393 if (int_shadow
& mask
)
6395 if (unlikely(int_shadow
|| mask
)) {
6396 kvm_x86_ops
.set_interrupt_shadow(vcpu
, mask
);
6398 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6402 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
6404 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6405 if (ctxt
->exception
.vector
== PF_VECTOR
)
6406 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
6408 if (ctxt
->exception
.error_code_valid
)
6409 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
6410 ctxt
->exception
.error_code
);
6412 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
6416 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6418 struct x86_emulate_ctxt
*ctxt
;
6420 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
6422 pr_err("kvm: failed to allocate vcpu's emulator\n");
6427 ctxt
->ops
= &emulate_ops
;
6428 vcpu
->arch
.emulate_ctxt
= ctxt
;
6433 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6435 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6438 kvm_x86_ops
.get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
6440 ctxt
->gpa_available
= false;
6441 ctxt
->eflags
= kvm_get_rflags(vcpu
);
6442 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
6444 ctxt
->eip
= kvm_rip_read(vcpu
);
6445 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
6446 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
6447 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
6448 cs_db
? X86EMUL_MODE_PROT32
:
6449 X86EMUL_MODE_PROT16
;
6450 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
6451 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
6452 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
6454 init_decode_cache(ctxt
);
6455 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
6458 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
6460 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6463 init_emulate_ctxt(vcpu
);
6467 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
6468 ret
= emulate_int_real(ctxt
, irq
);
6470 if (ret
!= X86EMUL_CONTINUE
) {
6471 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
6473 ctxt
->eip
= ctxt
->_eip
;
6474 kvm_rip_write(vcpu
, ctxt
->eip
);
6475 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6478 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
6480 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
6482 ++vcpu
->stat
.insn_emulation_fail
;
6483 trace_kvm_emulate_insn_failed(vcpu
);
6485 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
6486 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
6490 if (emulation_type
& EMULTYPE_SKIP
) {
6491 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
6492 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
6493 vcpu
->run
->internal
.ndata
= 0;
6497 kvm_queue_exception(vcpu
, UD_VECTOR
);
6499 if (!is_guest_mode(vcpu
) && kvm_x86_ops
.get_cpl(vcpu
) == 0) {
6500 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
6501 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
6502 vcpu
->run
->internal
.ndata
= 0;
6509 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
6510 bool write_fault_to_shadow_pgtable
,
6513 gpa_t gpa
= cr2_or_gpa
;
6516 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
6519 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
6520 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
6523 if (!vcpu
->arch
.mmu
->direct_map
) {
6525 * Write permission should be allowed since only
6526 * write access need to be emulated.
6528 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
6531 * If the mapping is invalid in guest, let cpu retry
6532 * it to generate fault.
6534 if (gpa
== UNMAPPED_GVA
)
6539 * Do not retry the unhandleable instruction if it faults on the
6540 * readonly host memory, otherwise it will goto a infinite loop:
6541 * retry instruction -> write #PF -> emulation fail -> retry
6542 * instruction -> ...
6544 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
6547 * If the instruction failed on the error pfn, it can not be fixed,
6548 * report the error to userspace.
6550 if (is_error_noslot_pfn(pfn
))
6553 kvm_release_pfn_clean(pfn
);
6555 /* The instructions are well-emulated on direct mmu. */
6556 if (vcpu
->arch
.mmu
->direct_map
) {
6557 unsigned int indirect_shadow_pages
;
6559 spin_lock(&vcpu
->kvm
->mmu_lock
);
6560 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
6561 spin_unlock(&vcpu
->kvm
->mmu_lock
);
6563 if (indirect_shadow_pages
)
6564 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
6570 * if emulation was due to access to shadowed page table
6571 * and it failed try to unshadow page and re-enter the
6572 * guest to let CPU execute the instruction.
6574 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
6577 * If the access faults on its page table, it can not
6578 * be fixed by unprotecting shadow page and it should
6579 * be reported to userspace.
6581 return !write_fault_to_shadow_pgtable
;
6584 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
6585 gpa_t cr2_or_gpa
, int emulation_type
)
6587 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6588 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
6590 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
6591 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
6594 * If the emulation is caused by #PF and it is non-page_table
6595 * writing instruction, it means the VM-EXIT is caused by shadow
6596 * page protected, we can zap the shadow page and retry this
6597 * instruction directly.
6599 * Note: if the guest uses a non-page-table modifying instruction
6600 * on the PDE that points to the instruction, then we will unmap
6601 * the instruction and go to an infinite loop. So, we cache the
6602 * last retried eip and the last fault address, if we meet the eip
6603 * and the address again, we can break out of the potential infinite
6606 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
6608 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
6611 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
6612 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
6615 if (x86_page_table_writing_insn(ctxt
))
6618 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
6621 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
6622 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
6624 if (!vcpu
->arch
.mmu
->direct_map
)
6625 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
6627 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
6632 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
6633 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
6635 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
6637 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
6638 /* This is a good place to trace that we are exiting SMM. */
6639 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
6641 /* Process a latched INIT or SMI, if any. */
6642 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6645 kvm_mmu_reset_context(vcpu
);
6648 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
6657 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
6658 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
6663 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
6665 struct kvm_run
*kvm_run
= vcpu
->run
;
6667 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
6668 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
6669 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
6670 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
6671 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
6674 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
6678 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
6680 unsigned long rflags
= kvm_x86_ops
.get_rflags(vcpu
);
6683 r
= kvm_x86_ops
.skip_emulated_instruction(vcpu
);
6688 * rflags is the old, "raw" value of the flags. The new value has
6689 * not been saved yet.
6691 * This is correct even for TF set by the guest, because "the
6692 * processor will not generate this exception after the instruction
6693 * that sets the TF flag".
6695 if (unlikely(rflags
& X86_EFLAGS_TF
))
6696 r
= kvm_vcpu_do_singlestep(vcpu
);
6699 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
6701 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
6703 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
6704 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
6705 struct kvm_run
*kvm_run
= vcpu
->run
;
6706 unsigned long eip
= kvm_get_linear_rip(vcpu
);
6707 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
6708 vcpu
->arch
.guest_debug_dr7
,
6712 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
6713 kvm_run
->debug
.arch
.pc
= eip
;
6714 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
6715 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
6721 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
6722 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
6723 unsigned long eip
= kvm_get_linear_rip(vcpu
);
6724 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
6729 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
6738 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
6740 switch (ctxt
->opcode_len
) {
6747 case 0xe6: /* OUT */
6751 case 0x6c: /* INS */
6753 case 0x6e: /* OUTS */
6760 case 0x33: /* RDPMC */
6769 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
6770 int emulation_type
, void *insn
, int insn_len
)
6773 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6774 bool writeback
= true;
6775 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
6777 vcpu
->arch
.l1tf_flush_l1d
= true;
6780 * Clear write_fault_to_shadow_pgtable here to ensure it is
6783 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
6784 kvm_clear_exception_queue(vcpu
);
6786 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
6787 init_emulate_ctxt(vcpu
);
6790 * We will reenter on the same instruction since
6791 * we do not set complete_userspace_io. This does not
6792 * handle watchpoints yet, those would be handled in
6795 if (!(emulation_type
& EMULTYPE_SKIP
) &&
6796 kvm_vcpu_check_breakpoint(vcpu
, &r
))
6799 ctxt
->interruptibility
= 0;
6800 ctxt
->have_exception
= false;
6801 ctxt
->exception
.vector
= -1;
6802 ctxt
->perm_ok
= false;
6804 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
6806 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
6808 trace_kvm_emulate_insn_start(vcpu
);
6809 ++vcpu
->stat
.insn_emulation
;
6810 if (r
!= EMULATION_OK
) {
6811 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
6812 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
6813 kvm_queue_exception(vcpu
, UD_VECTOR
);
6816 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
6820 if (ctxt
->have_exception
) {
6822 * #UD should result in just EMULATION_FAILED, and trap-like
6823 * exception should not be encountered during decode.
6825 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
6826 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
6827 inject_emulated_exception(vcpu
);
6830 return handle_emulation_failure(vcpu
, emulation_type
);
6834 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
6835 !is_vmware_backdoor_opcode(ctxt
)) {
6836 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
6841 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6842 * for kvm_skip_emulated_instruction(). The caller is responsible for
6843 * updating interruptibility state and injecting single-step #DBs.
6845 if (emulation_type
& EMULTYPE_SKIP
) {
6846 kvm_rip_write(vcpu
, ctxt
->_eip
);
6847 if (ctxt
->eflags
& X86_EFLAGS_RF
)
6848 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
6852 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
6855 /* this is needed for vmware backdoor interface to work since it
6856 changes registers values during IO operation */
6857 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
6858 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
6859 emulator_invalidate_register_cache(ctxt
);
6863 if (emulation_type
& EMULTYPE_PF
) {
6864 /* Save the faulting GPA (cr2) in the address field */
6865 ctxt
->exception
.address
= cr2_or_gpa
;
6867 /* With shadow page tables, cr2 contains a GVA or nGPA. */
6868 if (vcpu
->arch
.mmu
->direct_map
) {
6869 ctxt
->gpa_available
= true;
6870 ctxt
->gpa_val
= cr2_or_gpa
;
6873 /* Sanitize the address out of an abundance of paranoia. */
6874 ctxt
->exception
.address
= 0;
6877 r
= x86_emulate_insn(ctxt
);
6879 if (r
== EMULATION_INTERCEPTED
)
6882 if (r
== EMULATION_FAILED
) {
6883 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
6887 return handle_emulation_failure(vcpu
, emulation_type
);
6890 if (ctxt
->have_exception
) {
6892 if (inject_emulated_exception(vcpu
))
6894 } else if (vcpu
->arch
.pio
.count
) {
6895 if (!vcpu
->arch
.pio
.in
) {
6896 /* FIXME: return into emulator if single-stepping. */
6897 vcpu
->arch
.pio
.count
= 0;
6900 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
6903 } else if (vcpu
->mmio_needed
) {
6904 ++vcpu
->stat
.mmio_exits
;
6906 if (!vcpu
->mmio_is_write
)
6909 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6910 } else if (r
== EMULATION_RESTART
)
6916 unsigned long rflags
= kvm_x86_ops
.get_rflags(vcpu
);
6917 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
6918 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6919 if (!ctxt
->have_exception
||
6920 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
6921 kvm_rip_write(vcpu
, ctxt
->eip
);
6923 r
= kvm_vcpu_do_singlestep(vcpu
);
6924 if (kvm_x86_ops
.update_emulated_instruction
)
6925 kvm_x86_ops
.update_emulated_instruction(vcpu
);
6926 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
6930 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6931 * do nothing, and it will be requested again as soon as
6932 * the shadow expires. But we still need to check here,
6933 * because POPF has no interrupt shadow.
6935 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
6936 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6938 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
6943 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
6945 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
6947 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
6949 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
6950 void *insn
, int insn_len
)
6952 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
6954 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
6956 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
6958 vcpu
->arch
.pio
.count
= 0;
6962 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
6964 vcpu
->arch
.pio
.count
= 0;
6966 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
6969 return kvm_skip_emulated_instruction(vcpu
);
6972 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6973 unsigned short port
)
6975 unsigned long val
= kvm_rax_read(vcpu
);
6976 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
6982 * Workaround userspace that relies on old KVM behavior of %rip being
6983 * incremented prior to exiting to userspace to handle "OUT 0x7e".
6986 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
6987 vcpu
->arch
.complete_userspace_io
=
6988 complete_fast_pio_out_port_0x7e
;
6989 kvm_skip_emulated_instruction(vcpu
);
6991 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
6992 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
6997 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
7001 /* We should only ever be called with arch.pio.count equal to 1 */
7002 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
7004 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
7005 vcpu
->arch
.pio
.count
= 0;
7009 /* For size less than 4 we merge, else we zero extend */
7010 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
7013 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7014 * the copy and tracing
7016 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
7017 kvm_rax_write(vcpu
, val
);
7019 return kvm_skip_emulated_instruction(vcpu
);
7022 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7023 unsigned short port
)
7028 /* For size less than 4 we merge, else we zero extend */
7029 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
7031 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
7033 kvm_rax_write(vcpu
, val
);
7037 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7038 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
7043 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
7048 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
7050 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
7051 return ret
&& kvm_skip_emulated_instruction(vcpu
);
7053 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
7055 static int kvmclock_cpu_down_prep(unsigned int cpu
)
7057 __this_cpu_write(cpu_tsc_khz
, 0);
7061 static void tsc_khz_changed(void *data
)
7063 struct cpufreq_freqs
*freq
= data
;
7064 unsigned long khz
= 0;
7068 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7069 khz
= cpufreq_quick_get(raw_smp_processor_id());
7072 __this_cpu_write(cpu_tsc_khz
, khz
);
7075 #ifdef CONFIG_X86_64
7076 static void kvm_hyperv_tsc_notifier(void)
7079 struct kvm_vcpu
*vcpu
;
7082 mutex_lock(&kvm_lock
);
7083 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7084 kvm_make_mclock_inprogress_request(kvm
);
7086 hyperv_stop_tsc_emulation();
7088 /* TSC frequency always matches when on Hyper-V */
7089 for_each_present_cpu(cpu
)
7090 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
7091 kvm_max_guest_tsc_khz
= tsc_khz
;
7093 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7094 struct kvm_arch
*ka
= &kvm
->arch
;
7096 spin_lock(&ka
->pvclock_gtod_sync_lock
);
7098 pvclock_update_vm_gtod_copy(kvm
);
7100 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7101 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7103 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
7104 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
7106 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
7108 mutex_unlock(&kvm_lock
);
7112 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
7115 struct kvm_vcpu
*vcpu
;
7116 int i
, send_ipi
= 0;
7119 * We allow guests to temporarily run on slowing clocks,
7120 * provided we notify them after, or to run on accelerating
7121 * clocks, provided we notify them before. Thus time never
7124 * However, we have a problem. We can't atomically update
7125 * the frequency of a given CPU from this function; it is
7126 * merely a notifier, which can be called from any CPU.
7127 * Changing the TSC frequency at arbitrary points in time
7128 * requires a recomputation of local variables related to
7129 * the TSC for each VCPU. We must flag these local variables
7130 * to be updated and be sure the update takes place with the
7131 * new frequency before any guests proceed.
7133 * Unfortunately, the combination of hotplug CPU and frequency
7134 * change creates an intractable locking scenario; the order
7135 * of when these callouts happen is undefined with respect to
7136 * CPU hotplug, and they can race with each other. As such,
7137 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7138 * undefined; you can actually have a CPU frequency change take
7139 * place in between the computation of X and the setting of the
7140 * variable. To protect against this problem, all updates of
7141 * the per_cpu tsc_khz variable are done in an interrupt
7142 * protected IPI, and all callers wishing to update the value
7143 * must wait for a synchronous IPI to complete (which is trivial
7144 * if the caller is on the CPU already). This establishes the
7145 * necessary total order on variable updates.
7147 * Note that because a guest time update may take place
7148 * anytime after the setting of the VCPU's request bit, the
7149 * correct TSC value must be set before the request. However,
7150 * to ensure the update actually makes it to any guest which
7151 * starts running in hardware virtualization between the set
7152 * and the acquisition of the spinlock, we must also ping the
7153 * CPU after setting the request bit.
7157 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7159 mutex_lock(&kvm_lock
);
7160 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7161 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7162 if (vcpu
->cpu
!= cpu
)
7164 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7165 if (vcpu
->cpu
!= raw_smp_processor_id())
7169 mutex_unlock(&kvm_lock
);
7171 if (freq
->old
< freq
->new && send_ipi
) {
7173 * We upscale the frequency. Must make the guest
7174 * doesn't see old kvmclock values while running with
7175 * the new frequency, otherwise we risk the guest sees
7176 * time go backwards.
7178 * In case we update the frequency for another cpu
7179 * (which might be in guest context) send an interrupt
7180 * to kick the cpu out of guest context. Next time
7181 * guest context is entered kvmclock will be updated,
7182 * so the guest will not see stale values.
7184 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
7188 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
7191 struct cpufreq_freqs
*freq
= data
;
7194 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
7196 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
7199 for_each_cpu(cpu
, freq
->policy
->cpus
)
7200 __kvmclock_cpufreq_notifier(freq
, cpu
);
7205 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
7206 .notifier_call
= kvmclock_cpufreq_notifier
7209 static int kvmclock_cpu_online(unsigned int cpu
)
7211 tsc_khz_changed(NULL
);
7215 static void kvm_timer_init(void)
7217 max_tsc_khz
= tsc_khz
;
7219 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
7220 #ifdef CONFIG_CPU_FREQ
7221 struct cpufreq_policy
*policy
;
7225 policy
= cpufreq_cpu_get(cpu
);
7227 if (policy
->cpuinfo
.max_freq
)
7228 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
7229 cpufreq_cpu_put(policy
);
7233 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
7234 CPUFREQ_TRANSITION_NOTIFIER
);
7237 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
7238 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
7241 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
7242 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
7244 int kvm_is_in_guest(void)
7246 return __this_cpu_read(current_vcpu
) != NULL
;
7249 static int kvm_is_user_mode(void)
7253 if (__this_cpu_read(current_vcpu
))
7254 user_mode
= kvm_x86_ops
.get_cpl(__this_cpu_read(current_vcpu
));
7256 return user_mode
!= 0;
7259 static unsigned long kvm_get_guest_ip(void)
7261 unsigned long ip
= 0;
7263 if (__this_cpu_read(current_vcpu
))
7264 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
7269 static void kvm_handle_intel_pt_intr(void)
7271 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
7273 kvm_make_request(KVM_REQ_PMI
, vcpu
);
7274 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
7275 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
7278 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
7279 .is_in_guest
= kvm_is_in_guest
,
7280 .is_user_mode
= kvm_is_user_mode
,
7281 .get_guest_ip
= kvm_get_guest_ip
,
7282 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
7285 #ifdef CONFIG_X86_64
7286 static void pvclock_gtod_update_fn(struct work_struct
*work
)
7290 struct kvm_vcpu
*vcpu
;
7293 mutex_lock(&kvm_lock
);
7294 list_for_each_entry(kvm
, &vm_list
, vm_list
)
7295 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7296 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7297 atomic_set(&kvm_guest_has_master_clock
, 0);
7298 mutex_unlock(&kvm_lock
);
7301 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
7304 * Notification about pvclock gtod data update.
7306 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
7309 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
7310 struct timekeeper
*tk
= priv
;
7312 update_pvclock_gtod(tk
);
7314 /* disable master clock if host does not trust, or does not
7315 * use, TSC based clocksource.
7317 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
7318 atomic_read(&kvm_guest_has_master_clock
) != 0)
7319 queue_work(system_long_wq
, &pvclock_gtod_work
);
7324 static struct notifier_block pvclock_gtod_notifier
= {
7325 .notifier_call
= pvclock_gtod_notify
,
7329 int kvm_arch_init(void *opaque
)
7331 struct kvm_x86_init_ops
*ops
= opaque
;
7334 if (kvm_x86_ops
.hardware_enable
) {
7335 printk(KERN_ERR
"kvm: already loaded the other module\n");
7340 if (!ops
->cpu_has_kvm_support()) {
7341 pr_err_ratelimited("kvm: no hardware support\n");
7345 if (ops
->disabled_by_bios()) {
7346 pr_err_ratelimited("kvm: disabled by bios\n");
7352 * KVM explicitly assumes that the guest has an FPU and
7353 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7354 * vCPU's FPU state as a fxregs_state struct.
7356 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
7357 printk(KERN_ERR
"kvm: inadequate fpu\n");
7363 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
7364 __alignof__(struct fpu
), SLAB_ACCOUNT
,
7366 if (!x86_fpu_cache
) {
7367 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
7371 x86_emulator_cache
= kvm_alloc_emulator_cache();
7372 if (!x86_emulator_cache
) {
7373 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7374 goto out_free_x86_fpu_cache
;
7377 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
7379 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
7380 goto out_free_x86_emulator_cache
;
7383 r
= kvm_mmu_module_init();
7385 goto out_free_percpu
;
7387 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
7388 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
7389 PT_PRESENT_MASK
, 0, sme_me_mask
);
7392 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
7394 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
7395 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
7396 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
7400 if (pi_inject_timer
== -1)
7401 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
7402 #ifdef CONFIG_X86_64
7403 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
7405 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7406 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
7412 free_percpu(shared_msrs
);
7413 out_free_x86_emulator_cache
:
7414 kmem_cache_destroy(x86_emulator_cache
);
7415 out_free_x86_fpu_cache
:
7416 kmem_cache_destroy(x86_fpu_cache
);
7421 void kvm_arch_exit(void)
7423 #ifdef CONFIG_X86_64
7424 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7425 clear_hv_tscchange_cb();
7428 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
7430 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7431 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
7432 CPUFREQ_TRANSITION_NOTIFIER
);
7433 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
7434 #ifdef CONFIG_X86_64
7435 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
7437 kvm_x86_ops
.hardware_enable
= NULL
;
7438 kvm_mmu_module_exit();
7439 free_percpu(shared_msrs
);
7440 kmem_cache_destroy(x86_fpu_cache
);
7443 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
7445 ++vcpu
->stat
.halt_exits
;
7446 if (lapic_in_kernel(vcpu
)) {
7447 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
7450 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
7454 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
7456 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
7458 int ret
= kvm_skip_emulated_instruction(vcpu
);
7460 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7461 * KVM_EXIT_DEBUG here.
7463 return kvm_vcpu_halt(vcpu
) && ret
;
7465 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
7467 #ifdef CONFIG_X86_64
7468 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
7469 unsigned long clock_type
)
7471 struct kvm_clock_pairing clock_pairing
;
7472 struct timespec64 ts
;
7476 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
7477 return -KVM_EOPNOTSUPP
;
7479 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
7480 return -KVM_EOPNOTSUPP
;
7482 clock_pairing
.sec
= ts
.tv_sec
;
7483 clock_pairing
.nsec
= ts
.tv_nsec
;
7484 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
7485 clock_pairing
.flags
= 0;
7486 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
7489 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
7490 sizeof(struct kvm_clock_pairing
)))
7498 * kvm_pv_kick_cpu_op: Kick a vcpu.
7500 * @apicid - apicid of vcpu to be kicked.
7502 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
7504 struct kvm_lapic_irq lapic_irq
;
7506 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
7507 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
7508 lapic_irq
.level
= 0;
7509 lapic_irq
.dest_id
= apicid
;
7510 lapic_irq
.msi_redir_hint
= false;
7512 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
7513 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
7516 bool kvm_apicv_activated(struct kvm
*kvm
)
7518 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
7520 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
7522 void kvm_apicv_init(struct kvm
*kvm
, bool enable
)
7525 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
7526 &kvm
->arch
.apicv_inhibit_reasons
);
7528 set_bit(APICV_INHIBIT_REASON_DISABLE
,
7529 &kvm
->arch
.apicv_inhibit_reasons
);
7531 EXPORT_SYMBOL_GPL(kvm_apicv_init
);
7533 static void kvm_sched_yield(struct kvm
*kvm
, unsigned long dest_id
)
7535 struct kvm_vcpu
*target
= NULL
;
7536 struct kvm_apic_map
*map
;
7539 map
= rcu_dereference(kvm
->arch
.apic_map
);
7541 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
7542 target
= map
->phys_map
[dest_id
]->vcpu
;
7546 if (target
&& READ_ONCE(target
->ready
))
7547 kvm_vcpu_yield_to(target
);
7550 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
7552 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
7555 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
7556 return kvm_hv_hypercall(vcpu
);
7558 nr
= kvm_rax_read(vcpu
);
7559 a0
= kvm_rbx_read(vcpu
);
7560 a1
= kvm_rcx_read(vcpu
);
7561 a2
= kvm_rdx_read(vcpu
);
7562 a3
= kvm_rsi_read(vcpu
);
7564 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
7566 op_64_bit
= is_64_bit_mode(vcpu
);
7575 if (kvm_x86_ops
.get_cpl(vcpu
) != 0) {
7581 case KVM_HC_VAPIC_POLL_IRQ
:
7584 case KVM_HC_KICK_CPU
:
7585 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
7586 kvm_sched_yield(vcpu
->kvm
, a1
);
7589 #ifdef CONFIG_X86_64
7590 case KVM_HC_CLOCK_PAIRING
:
7591 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
7594 case KVM_HC_SEND_IPI
:
7595 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
7597 case KVM_HC_SCHED_YIELD
:
7598 kvm_sched_yield(vcpu
->kvm
, a0
);
7608 kvm_rax_write(vcpu
, ret
);
7610 ++vcpu
->stat
.hypercalls
;
7611 return kvm_skip_emulated_instruction(vcpu
);
7613 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
7615 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
7617 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7618 char instruction
[3];
7619 unsigned long rip
= kvm_rip_read(vcpu
);
7621 kvm_x86_ops
.patch_hypercall(vcpu
, instruction
);
7623 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
7627 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
7629 return vcpu
->run
->request_interrupt_window
&&
7630 likely(!pic_in_kernel(vcpu
->kvm
));
7633 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
7635 struct kvm_run
*kvm_run
= vcpu
->run
;
7637 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
7638 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
7639 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
7640 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
7641 kvm_run
->ready_for_interrupt_injection
=
7642 pic_in_kernel(vcpu
->kvm
) ||
7643 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
7646 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
7650 if (!kvm_x86_ops
.update_cr8_intercept
)
7653 if (!lapic_in_kernel(vcpu
))
7656 if (vcpu
->arch
.apicv_active
)
7659 if (!vcpu
->arch
.apic
->vapic_addr
)
7660 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
7667 tpr
= kvm_lapic_get_cr8(vcpu
);
7669 kvm_x86_ops
.update_cr8_intercept(vcpu
, tpr
, max_irr
);
7672 static int inject_pending_event(struct kvm_vcpu
*vcpu
)
7676 /* try to reinject previous events if any */
7678 if (vcpu
->arch
.exception
.injected
)
7679 kvm_x86_ops
.queue_exception(vcpu
);
7681 * Do not inject an NMI or interrupt if there is a pending
7682 * exception. Exceptions and interrupts are recognized at
7683 * instruction boundaries, i.e. the start of an instruction.
7684 * Trap-like exceptions, e.g. #DB, have higher priority than
7685 * NMIs and interrupts, i.e. traps are recognized before an
7686 * NMI/interrupt that's pending on the same instruction.
7687 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7688 * priority, but are only generated (pended) during instruction
7689 * execution, i.e. a pending fault-like exception means the
7690 * fault occurred on the *previous* instruction and must be
7691 * serviced prior to recognizing any new events in order to
7692 * fully complete the previous instruction.
7694 else if (!vcpu
->arch
.exception
.pending
) {
7695 if (vcpu
->arch
.nmi_injected
)
7696 kvm_x86_ops
.set_nmi(vcpu
);
7697 else if (vcpu
->arch
.interrupt
.injected
)
7698 kvm_x86_ops
.set_irq(vcpu
);
7702 * Call check_nested_events() even if we reinjected a previous event
7703 * in order for caller to determine if it should require immediate-exit
7704 * from L2 to L1 due to pending L1 events which require exit
7707 if (is_guest_mode(vcpu
) && kvm_x86_ops
.check_nested_events
) {
7708 r
= kvm_x86_ops
.check_nested_events(vcpu
);
7713 /* try to inject new event if pending */
7714 if (vcpu
->arch
.exception
.pending
) {
7715 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
7716 vcpu
->arch
.exception
.has_error_code
,
7717 vcpu
->arch
.exception
.error_code
);
7719 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
);
7720 vcpu
->arch
.exception
.pending
= false;
7721 vcpu
->arch
.exception
.injected
= true;
7723 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
7724 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
7727 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
7729 * This code assumes that nSVM doesn't use
7730 * check_nested_events(). If it does, the
7731 * DR6/DR7 changes should happen before L1
7732 * gets a #VMEXIT for an intercepted #DB in
7733 * L2. (Under VMX, on the other hand, the
7734 * DR6/DR7 changes should not happen in the
7735 * event of a VM-exit to L1 for an intercepted
7738 kvm_deliver_exception_payload(vcpu
);
7739 if (vcpu
->arch
.dr7
& DR7_GD
) {
7740 vcpu
->arch
.dr7
&= ~DR7_GD
;
7741 kvm_update_dr7(vcpu
);
7745 kvm_x86_ops
.queue_exception(vcpu
);
7748 /* Don't consider new event if we re-injected an event */
7749 if (kvm_event_needs_reinjection(vcpu
))
7752 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) &&
7753 kvm_x86_ops
.smi_allowed(vcpu
)) {
7754 vcpu
->arch
.smi_pending
= false;
7755 ++vcpu
->arch
.smi_count
;
7757 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
.nmi_allowed(vcpu
)) {
7758 --vcpu
->arch
.nmi_pending
;
7759 vcpu
->arch
.nmi_injected
= true;
7760 kvm_x86_ops
.set_nmi(vcpu
);
7761 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
7763 * Because interrupts can be injected asynchronously, we are
7764 * calling check_nested_events again here to avoid a race condition.
7765 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7766 * proposal and current concerns. Perhaps we should be setting
7767 * KVM_REQ_EVENT only on certain events and not unconditionally?
7769 if (is_guest_mode(vcpu
) && kvm_x86_ops
.check_nested_events
) {
7770 r
= kvm_x86_ops
.check_nested_events(vcpu
);
7774 if (kvm_x86_ops
.interrupt_allowed(vcpu
)) {
7775 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
7777 kvm_x86_ops
.set_irq(vcpu
);
7784 static void process_nmi(struct kvm_vcpu
*vcpu
)
7789 * x86 is limited to one NMI running, and one NMI pending after it.
7790 * If an NMI is already in progress, limit further NMIs to just one.
7791 * Otherwise, allow two (and we'll inject the first one immediately).
7793 if (kvm_x86_ops
.get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
7796 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
7797 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
7798 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7801 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
7804 flags
|= seg
->g
<< 23;
7805 flags
|= seg
->db
<< 22;
7806 flags
|= seg
->l
<< 21;
7807 flags
|= seg
->avl
<< 20;
7808 flags
|= seg
->present
<< 15;
7809 flags
|= seg
->dpl
<< 13;
7810 flags
|= seg
->s
<< 12;
7811 flags
|= seg
->type
<< 8;
7815 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
7817 struct kvm_segment seg
;
7820 kvm_get_segment(vcpu
, &seg
, n
);
7821 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
7824 offset
= 0x7f84 + n
* 12;
7826 offset
= 0x7f2c + (n
- 3) * 12;
7828 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
7829 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
7830 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
7833 #ifdef CONFIG_X86_64
7834 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
7836 struct kvm_segment seg
;
7840 kvm_get_segment(vcpu
, &seg
, n
);
7841 offset
= 0x7e00 + n
* 16;
7843 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
7844 put_smstate(u16
, buf
, offset
, seg
.selector
);
7845 put_smstate(u16
, buf
, offset
+ 2, flags
);
7846 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
7847 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
7851 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
7854 struct kvm_segment seg
;
7858 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
7859 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
7860 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
7861 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
7863 for (i
= 0; i
< 8; i
++)
7864 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
7866 kvm_get_dr(vcpu
, 6, &val
);
7867 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
7868 kvm_get_dr(vcpu
, 7, &val
);
7869 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
7871 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
7872 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
7873 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
7874 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
7875 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
7877 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
7878 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
7879 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
7880 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
7881 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
7883 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
7884 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
7885 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
7887 kvm_x86_ops
.get_idt(vcpu
, &dt
);
7888 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
7889 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
7891 for (i
= 0; i
< 6; i
++)
7892 enter_smm_save_seg_32(vcpu
, buf
, i
);
7894 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
7897 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
7898 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
7901 #ifdef CONFIG_X86_64
7902 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
7905 struct kvm_segment seg
;
7909 for (i
= 0; i
< 16; i
++)
7910 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
7912 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
7913 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
7915 kvm_get_dr(vcpu
, 6, &val
);
7916 put_smstate(u64
, buf
, 0x7f68, val
);
7917 kvm_get_dr(vcpu
, 7, &val
);
7918 put_smstate(u64
, buf
, 0x7f60, val
);
7920 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
7921 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
7922 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
7924 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
7927 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
7929 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
7931 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
7932 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
7933 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
7934 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
7935 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
7937 kvm_x86_ops
.get_idt(vcpu
, &dt
);
7938 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
7939 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
7941 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
7942 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
7943 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
7944 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
7945 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
7947 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
7948 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
7949 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
7951 for (i
= 0; i
< 6; i
++)
7952 enter_smm_save_seg_64(vcpu
, buf
, i
);
7956 static void enter_smm(struct kvm_vcpu
*vcpu
)
7958 struct kvm_segment cs
, ds
;
7963 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
7964 memset(buf
, 0, 512);
7965 #ifdef CONFIG_X86_64
7966 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
7967 enter_smm_save_state_64(vcpu
, buf
);
7970 enter_smm_save_state_32(vcpu
, buf
);
7973 * Give pre_enter_smm() a chance to make ISA-specific changes to the
7974 * vCPU state (e.g. leave guest mode) after we've saved the state into
7975 * the SMM state-save area.
7977 kvm_x86_ops
.pre_enter_smm(vcpu
, buf
);
7979 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7980 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
7982 if (kvm_x86_ops
.get_nmi_mask(vcpu
))
7983 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
7985 kvm_x86_ops
.set_nmi_mask(vcpu
, true);
7987 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
7988 kvm_rip_write(vcpu
, 0x8000);
7990 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
7991 kvm_x86_ops
.set_cr0(vcpu
, cr0
);
7992 vcpu
->arch
.cr0
= cr0
;
7994 kvm_x86_ops
.set_cr4(vcpu
, 0);
7996 /* Undocumented: IDT limit is set to zero on entry to SMM. */
7997 dt
.address
= dt
.size
= 0;
7998 kvm_x86_ops
.set_idt(vcpu
, &dt
);
8000 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
8002 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
8003 cs
.base
= vcpu
->arch
.smbase
;
8008 cs
.limit
= ds
.limit
= 0xffffffff;
8009 cs
.type
= ds
.type
= 0x3;
8010 cs
.dpl
= ds
.dpl
= 0;
8015 cs
.avl
= ds
.avl
= 0;
8016 cs
.present
= ds
.present
= 1;
8017 cs
.unusable
= ds
.unusable
= 0;
8018 cs
.padding
= ds
.padding
= 0;
8020 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8021 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
8022 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
8023 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
8024 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
8025 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
8027 #ifdef CONFIG_X86_64
8028 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
8029 kvm_x86_ops
.set_efer(vcpu
, 0);
8032 kvm_update_cpuid(vcpu
);
8033 kvm_mmu_reset_context(vcpu
);
8036 static void process_smi(struct kvm_vcpu
*vcpu
)
8038 vcpu
->arch
.smi_pending
= true;
8039 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8042 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
8043 unsigned long *vcpu_bitmap
)
8047 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
8049 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
8050 NULL
, vcpu_bitmap
, cpus
);
8052 free_cpumask_var(cpus
);
8055 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
8057 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
8060 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
8062 if (!lapic_in_kernel(vcpu
))
8065 vcpu
->arch
.apicv_active
= kvm_apicv_activated(vcpu
->kvm
);
8066 kvm_apic_update_apicv(vcpu
);
8067 kvm_x86_ops
.refresh_apicv_exec_ctrl(vcpu
);
8069 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
8072 * NOTE: Do not hold any lock prior to calling this.
8074 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8075 * locked, because it calls __x86_set_memory_region() which does
8076 * synchronize_srcu(&kvm->srcu).
8078 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
8080 struct kvm_vcpu
*except
;
8081 unsigned long old
, new, expected
;
8083 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
8084 !kvm_x86_ops
.check_apicv_inhibit_reasons(bit
))
8087 old
= READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
);
8089 expected
= new = old
;
8091 __clear_bit(bit
, &new);
8093 __set_bit(bit
, &new);
8096 old
= cmpxchg(&kvm
->arch
.apicv_inhibit_reasons
, expected
, new);
8097 } while (old
!= expected
);
8102 trace_kvm_apicv_update_request(activate
, bit
);
8103 if (kvm_x86_ops
.pre_update_apicv_exec_ctrl
)
8104 kvm_x86_ops
.pre_update_apicv_exec_ctrl(kvm
, activate
);
8107 * Sending request to update APICV for all other vcpus,
8108 * while update the calling vcpu immediately instead of
8109 * waiting for another #VMEXIT to handle the request.
8111 except
= kvm_get_running_vcpu();
8112 kvm_make_all_cpus_request_except(kvm
, KVM_REQ_APICV_UPDATE
,
8115 kvm_vcpu_update_apicv(except
);
8117 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
8119 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
8121 if (!kvm_apic_present(vcpu
))
8124 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
8126 if (irqchip_split(vcpu
->kvm
))
8127 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8129 if (vcpu
->arch
.apicv_active
)
8130 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
8131 if (ioapic_in_kernel(vcpu
->kvm
))
8132 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
8135 if (is_guest_mode(vcpu
))
8136 vcpu
->arch
.load_eoi_exitmap_pending
= true;
8138 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
8141 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
8143 u64 eoi_exit_bitmap
[4];
8145 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
8148 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
8149 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
8150 kvm_x86_ops
.load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
8153 int kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
8154 unsigned long start
, unsigned long end
,
8157 unsigned long apic_address
;
8160 * The physical address of apic access page is stored in the VMCS.
8161 * Update it when it becomes invalid.
8163 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
8164 if (start
<= apic_address
&& apic_address
< end
)
8165 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
8170 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
8172 struct page
*page
= NULL
;
8174 if (!lapic_in_kernel(vcpu
))
8177 if (!kvm_x86_ops
.set_apic_access_page_addr
)
8180 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
8181 if (is_error_page(page
))
8183 kvm_x86_ops
.set_apic_access_page_addr(vcpu
, page_to_phys(page
));
8186 * Do not pin apic access page in memory, the MMU notifier
8187 * will call us again if it is migrated or swapped out.
8192 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
8194 smp_send_reschedule(vcpu
->cpu
);
8196 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
8199 * Returns 1 to let vcpu_run() continue the guest execution loop without
8200 * exiting to the userspace. Otherwise, the value will be returned to the
8203 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
8207 dm_request_for_irq_injection(vcpu
) &&
8208 kvm_cpu_accept_dm_intr(vcpu
);
8209 enum exit_fastpath_completion exit_fastpath
= EXIT_FASTPATH_NONE
;
8211 bool req_immediate_exit
= false;
8213 if (kvm_request_pending(vcpu
)) {
8214 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES
, vcpu
)) {
8215 if (unlikely(!kvm_x86_ops
.get_vmcs12_pages(vcpu
))) {
8220 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
8221 kvm_mmu_unload(vcpu
);
8222 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
8223 __kvm_migrate_timers(vcpu
);
8224 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
8225 kvm_gen_update_masterclock(vcpu
->kvm
);
8226 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
8227 kvm_gen_kvmclock_update(vcpu
);
8228 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
8229 r
= kvm_guest_time_update(vcpu
);
8233 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
8234 kvm_mmu_sync_roots(vcpu
);
8235 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
8236 kvm_mmu_load_pgd(vcpu
);
8237 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
8238 kvm_vcpu_flush_tlb(vcpu
, true);
8239 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
8240 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
8244 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8245 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
8246 vcpu
->mmio_needed
= 0;
8250 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
8251 /* Page is swapped out. Do synthetic halt */
8252 vcpu
->arch
.apf
.halted
= true;
8256 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
8257 record_steal_time(vcpu
);
8258 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
8260 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
8262 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
8263 kvm_pmu_handle_event(vcpu
);
8264 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
8265 kvm_pmu_deliver_pmi(vcpu
);
8266 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
8267 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
8268 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
8269 vcpu
->arch
.ioapic_handled_vectors
)) {
8270 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
8271 vcpu
->run
->eoi
.vector
=
8272 vcpu
->arch
.pending_ioapic_eoi
;
8277 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
8278 vcpu_scan_ioapic(vcpu
);
8279 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
8280 vcpu_load_eoi_exitmap(vcpu
);
8281 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
8282 kvm_vcpu_reload_apic_access_page(vcpu
);
8283 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
8284 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8285 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
8289 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
8290 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
8291 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
8295 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
8296 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
8297 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
8303 * KVM_REQ_HV_STIMER has to be processed after
8304 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8305 * depend on the guest clock being up-to-date
8307 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
8308 kvm_hv_process_stimers(vcpu
);
8309 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
8310 kvm_vcpu_update_apicv(vcpu
);
8313 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
8314 ++vcpu
->stat
.req_event
;
8315 kvm_apic_accept_events(vcpu
);
8316 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
8321 if (inject_pending_event(vcpu
) != 0)
8322 req_immediate_exit
= true;
8324 /* Enable SMI/NMI/IRQ window open exits if needed.
8326 * SMIs have three cases:
8327 * 1) They can be nested, and then there is nothing to
8328 * do here because RSM will cause a vmexit anyway.
8329 * 2) There is an ISA-specific reason why SMI cannot be
8330 * injected, and the moment when this changes can be
8332 * 3) Or the SMI can be pending because
8333 * inject_pending_event has completed the injection
8334 * of an IRQ or NMI from the previous vmexit, and
8335 * then we request an immediate exit to inject the
8338 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
8339 if (!kvm_x86_ops
.enable_smi_window(vcpu
))
8340 req_immediate_exit
= true;
8341 if (vcpu
->arch
.nmi_pending
)
8342 kvm_x86_ops
.enable_nmi_window(vcpu
);
8343 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
8344 kvm_x86_ops
.enable_irq_window(vcpu
);
8345 WARN_ON(vcpu
->arch
.exception
.pending
);
8348 if (kvm_lapic_enabled(vcpu
)) {
8349 update_cr8_intercept(vcpu
);
8350 kvm_lapic_sync_to_vapic(vcpu
);
8354 r
= kvm_mmu_reload(vcpu
);
8356 goto cancel_injection
;
8361 kvm_x86_ops
.prepare_guest_switch(vcpu
);
8364 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
8365 * IPI are then delayed after guest entry, which ensures that they
8366 * result in virtual interrupt delivery.
8368 local_irq_disable();
8369 vcpu
->mode
= IN_GUEST_MODE
;
8371 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8374 * 1) We should set ->mode before checking ->requests. Please see
8375 * the comment in kvm_vcpu_exiting_guest_mode().
8377 * 2) For APICv, we should set ->mode before checking PID.ON. This
8378 * pairs with the memory barrier implicit in pi_test_and_set_on
8379 * (see vmx_deliver_posted_interrupt).
8381 * 3) This also orders the write to mode from any reads to the page
8382 * tables done while the VCPU is running. Please see the comment
8383 * in kvm_flush_remote_tlbs.
8385 smp_mb__after_srcu_read_unlock();
8388 * This handles the case where a posted interrupt was
8389 * notified with kvm_vcpu_kick.
8391 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
8392 kvm_x86_ops
.sync_pir_to_irr(vcpu
);
8394 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
8395 || need_resched() || signal_pending(current
)) {
8396 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
8400 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8402 goto cancel_injection
;
8405 if (req_immediate_exit
) {
8406 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8407 kvm_x86_ops
.request_immediate_exit(vcpu
);
8410 trace_kvm_entry(vcpu
->vcpu_id
);
8411 guest_enter_irqoff();
8413 fpregs_assert_state_consistent();
8414 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
8415 switch_fpu_return();
8417 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
8419 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
8420 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
8421 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
8422 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
8423 set_debugreg(vcpu
->arch
.dr6
, 6);
8424 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
8427 kvm_x86_ops
.run(vcpu
);
8430 * Do this here before restoring debug registers on the host. And
8431 * since we do this before handling the vmexit, a DR access vmexit
8432 * can (a) read the correct value of the debug registers, (b) set
8433 * KVM_DEBUGREG_WONT_EXIT again.
8435 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
8436 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
8437 kvm_x86_ops
.sync_dirty_debug_regs(vcpu
);
8438 kvm_update_dr0123(vcpu
);
8439 kvm_update_dr7(vcpu
);
8440 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
8444 * If the guest has used debug registers, at least dr7
8445 * will be disabled while returning to the host.
8446 * If we don't have active breakpoints in the host, we don't
8447 * care about the messed up debug address registers. But if
8448 * we have some of them active, restore the old state.
8450 if (hw_breakpoint_active())
8451 hw_breakpoint_restore();
8453 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
8455 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
8458 kvm_x86_ops
.handle_exit_irqoff(vcpu
, &exit_fastpath
);
8461 * Consume any pending interrupts, including the possible source of
8462 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8463 * An instruction is required after local_irq_enable() to fully unblock
8464 * interrupts on processors that implement an interrupt shadow, the
8465 * stat.exits increment will do nicely.
8467 kvm_before_interrupt(vcpu
);
8470 local_irq_disable();
8471 kvm_after_interrupt(vcpu
);
8473 guest_exit_irqoff();
8474 if (lapic_in_kernel(vcpu
)) {
8475 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
8476 if (delta
!= S64_MIN
) {
8477 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
8478 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
8485 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8488 * Profile KVM exit RIPs:
8490 if (unlikely(prof_on
== KVM_PROFILING
)) {
8491 unsigned long rip
= kvm_rip_read(vcpu
);
8492 profile_hit(KVM_PROFILING
, (void *)rip
);
8495 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
8496 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8498 if (vcpu
->arch
.apic_attention
)
8499 kvm_lapic_sync_from_vapic(vcpu
);
8501 r
= kvm_x86_ops
.handle_exit(vcpu
, exit_fastpath
);
8505 kvm_x86_ops
.cancel_injection(vcpu
);
8506 if (unlikely(vcpu
->arch
.apic_attention
))
8507 kvm_lapic_sync_from_vapic(vcpu
);
8512 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
8514 if (!kvm_arch_vcpu_runnable(vcpu
) &&
8515 (!kvm_x86_ops
.pre_block
|| kvm_x86_ops
.pre_block(vcpu
) == 0)) {
8516 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
8517 kvm_vcpu_block(vcpu
);
8518 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
8520 if (kvm_x86_ops
.post_block
)
8521 kvm_x86_ops
.post_block(vcpu
);
8523 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
8527 kvm_apic_accept_events(vcpu
);
8528 switch(vcpu
->arch
.mp_state
) {
8529 case KVM_MP_STATE_HALTED
:
8530 vcpu
->arch
.pv
.pv_unhalted
= false;
8531 vcpu
->arch
.mp_state
=
8532 KVM_MP_STATE_RUNNABLE
;
8534 case KVM_MP_STATE_RUNNABLE
:
8535 vcpu
->arch
.apf
.halted
= false;
8537 case KVM_MP_STATE_INIT_RECEIVED
:
8545 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
8547 if (is_guest_mode(vcpu
) && kvm_x86_ops
.check_nested_events
)
8548 kvm_x86_ops
.check_nested_events(vcpu
);
8550 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
8551 !vcpu
->arch
.apf
.halted
);
8554 static int vcpu_run(struct kvm_vcpu
*vcpu
)
8557 struct kvm
*kvm
= vcpu
->kvm
;
8559 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
8560 vcpu
->arch
.l1tf_flush_l1d
= true;
8563 if (kvm_vcpu_running(vcpu
)) {
8564 r
= vcpu_enter_guest(vcpu
);
8566 r
= vcpu_block(kvm
, vcpu
);
8572 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
8573 if (kvm_cpu_has_pending_timer(vcpu
))
8574 kvm_inject_pending_timer_irqs(vcpu
);
8576 if (dm_request_for_irq_injection(vcpu
) &&
8577 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
8579 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
8580 ++vcpu
->stat
.request_irq_exits
;
8584 kvm_check_async_pf_completion(vcpu
);
8586 if (signal_pending(current
)) {
8588 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
8589 ++vcpu
->stat
.signal_exits
;
8592 if (need_resched()) {
8593 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
8595 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
8599 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
8604 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
8608 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8609 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
8610 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8614 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
8616 BUG_ON(!vcpu
->arch
.pio
.count
);
8618 return complete_emulated_io(vcpu
);
8622 * Implements the following, as a state machine:
8626 * for each mmio piece in the fragment
8634 * for each mmio piece in the fragment
8639 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
8641 struct kvm_run
*run
= vcpu
->run
;
8642 struct kvm_mmio_fragment
*frag
;
8645 BUG_ON(!vcpu
->mmio_needed
);
8647 /* Complete previous fragment */
8648 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
8649 len
= min(8u, frag
->len
);
8650 if (!vcpu
->mmio_is_write
)
8651 memcpy(frag
->data
, run
->mmio
.data
, len
);
8653 if (frag
->len
<= 8) {
8654 /* Switch to the next fragment. */
8656 vcpu
->mmio_cur_fragment
++;
8658 /* Go forward to the next mmio piece. */
8664 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
8665 vcpu
->mmio_needed
= 0;
8667 /* FIXME: return into emulator if single-stepping. */
8668 if (vcpu
->mmio_is_write
)
8670 vcpu
->mmio_read_completed
= 1;
8671 return complete_emulated_io(vcpu
);
8674 run
->exit_reason
= KVM_EXIT_MMIO
;
8675 run
->mmio
.phys_addr
= frag
->gpa
;
8676 if (vcpu
->mmio_is_write
)
8677 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
8678 run
->mmio
.len
= min(8u, frag
->len
);
8679 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
8680 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8684 static void kvm_save_current_fpu(struct fpu
*fpu
)
8687 * If the target FPU state is not resident in the CPU registers, just
8688 * memcpy() from current, else save CPU state directly to the target.
8690 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
8691 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
8692 fpu_kernel_xstate_size
);
8694 copy_fpregs_to_fpstate(fpu
);
8697 /* Swap (qemu) user FPU context for the guest FPU context. */
8698 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
8702 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
8704 /* PKRU is separately restored in kvm_x86_ops.run. */
8705 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
->state
,
8706 ~XFEATURE_MASK_PKRU
);
8708 fpregs_mark_activate();
8714 /* When vcpu_run ends, restore user space FPU context. */
8715 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
8719 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
8721 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
->state
);
8723 fpregs_mark_activate();
8726 ++vcpu
->stat
.fpu_reload
;
8730 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
8735 kvm_sigset_activate(vcpu
);
8736 kvm_load_guest_fpu(vcpu
);
8738 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
8739 if (kvm_run
->immediate_exit
) {
8743 kvm_vcpu_block(vcpu
);
8744 kvm_apic_accept_events(vcpu
);
8745 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
8747 if (signal_pending(current
)) {
8749 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
8750 ++vcpu
->stat
.signal_exits
;
8755 if (vcpu
->run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
8760 if (vcpu
->run
->kvm_dirty_regs
) {
8761 r
= sync_regs(vcpu
);
8766 /* re-sync apic's tpr */
8767 if (!lapic_in_kernel(vcpu
)) {
8768 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
8774 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
8775 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
8776 vcpu
->arch
.complete_userspace_io
= NULL
;
8781 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
8783 if (kvm_run
->immediate_exit
)
8789 kvm_put_guest_fpu(vcpu
);
8790 if (vcpu
->run
->kvm_valid_regs
)
8792 post_kvm_run_save(vcpu
);
8793 kvm_sigset_deactivate(vcpu
);
8799 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8801 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
8803 * We are here if userspace calls get_regs() in the middle of
8804 * instruction emulation. Registers state needs to be copied
8805 * back from emulation context to vcpu. Userspace shouldn't do
8806 * that usually, but some bad designed PV devices (vmware
8807 * backdoor interface) need this to work
8809 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
8810 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8812 regs
->rax
= kvm_rax_read(vcpu
);
8813 regs
->rbx
= kvm_rbx_read(vcpu
);
8814 regs
->rcx
= kvm_rcx_read(vcpu
);
8815 regs
->rdx
= kvm_rdx_read(vcpu
);
8816 regs
->rsi
= kvm_rsi_read(vcpu
);
8817 regs
->rdi
= kvm_rdi_read(vcpu
);
8818 regs
->rsp
= kvm_rsp_read(vcpu
);
8819 regs
->rbp
= kvm_rbp_read(vcpu
);
8820 #ifdef CONFIG_X86_64
8821 regs
->r8
= kvm_r8_read(vcpu
);
8822 regs
->r9
= kvm_r9_read(vcpu
);
8823 regs
->r10
= kvm_r10_read(vcpu
);
8824 regs
->r11
= kvm_r11_read(vcpu
);
8825 regs
->r12
= kvm_r12_read(vcpu
);
8826 regs
->r13
= kvm_r13_read(vcpu
);
8827 regs
->r14
= kvm_r14_read(vcpu
);
8828 regs
->r15
= kvm_r15_read(vcpu
);
8831 regs
->rip
= kvm_rip_read(vcpu
);
8832 regs
->rflags
= kvm_get_rflags(vcpu
);
8835 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8838 __get_regs(vcpu
, regs
);
8843 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8845 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
8846 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8848 kvm_rax_write(vcpu
, regs
->rax
);
8849 kvm_rbx_write(vcpu
, regs
->rbx
);
8850 kvm_rcx_write(vcpu
, regs
->rcx
);
8851 kvm_rdx_write(vcpu
, regs
->rdx
);
8852 kvm_rsi_write(vcpu
, regs
->rsi
);
8853 kvm_rdi_write(vcpu
, regs
->rdi
);
8854 kvm_rsp_write(vcpu
, regs
->rsp
);
8855 kvm_rbp_write(vcpu
, regs
->rbp
);
8856 #ifdef CONFIG_X86_64
8857 kvm_r8_write(vcpu
, regs
->r8
);
8858 kvm_r9_write(vcpu
, regs
->r9
);
8859 kvm_r10_write(vcpu
, regs
->r10
);
8860 kvm_r11_write(vcpu
, regs
->r11
);
8861 kvm_r12_write(vcpu
, regs
->r12
);
8862 kvm_r13_write(vcpu
, regs
->r13
);
8863 kvm_r14_write(vcpu
, regs
->r14
);
8864 kvm_r15_write(vcpu
, regs
->r15
);
8867 kvm_rip_write(vcpu
, regs
->rip
);
8868 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
8870 vcpu
->arch
.exception
.pending
= false;
8872 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8875 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8878 __set_regs(vcpu
, regs
);
8883 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
8885 struct kvm_segment cs
;
8887 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8891 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
8893 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
8897 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
8898 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
8899 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
8900 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
8901 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
8902 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
8904 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
8905 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
8907 kvm_x86_ops
.get_idt(vcpu
, &dt
);
8908 sregs
->idt
.limit
= dt
.size
;
8909 sregs
->idt
.base
= dt
.address
;
8910 kvm_x86_ops
.get_gdt(vcpu
, &dt
);
8911 sregs
->gdt
.limit
= dt
.size
;
8912 sregs
->gdt
.base
= dt
.address
;
8914 sregs
->cr0
= kvm_read_cr0(vcpu
);
8915 sregs
->cr2
= vcpu
->arch
.cr2
;
8916 sregs
->cr3
= kvm_read_cr3(vcpu
);
8917 sregs
->cr4
= kvm_read_cr4(vcpu
);
8918 sregs
->cr8
= kvm_get_cr8(vcpu
);
8919 sregs
->efer
= vcpu
->arch
.efer
;
8920 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
8922 memset(sregs
->interrupt_bitmap
, 0, sizeof(sregs
->interrupt_bitmap
));
8924 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
8925 set_bit(vcpu
->arch
.interrupt
.nr
,
8926 (unsigned long *)sregs
->interrupt_bitmap
);
8929 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
8930 struct kvm_sregs
*sregs
)
8933 __get_sregs(vcpu
, sregs
);
8938 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
8939 struct kvm_mp_state
*mp_state
)
8942 if (kvm_mpx_supported())
8943 kvm_load_guest_fpu(vcpu
);
8945 kvm_apic_accept_events(vcpu
);
8946 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
8947 vcpu
->arch
.pv
.pv_unhalted
)
8948 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
8950 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
8952 if (kvm_mpx_supported())
8953 kvm_put_guest_fpu(vcpu
);
8958 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
8959 struct kvm_mp_state
*mp_state
)
8965 if (!lapic_in_kernel(vcpu
) &&
8966 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
8970 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
8971 * INIT state; latched init should be reported using
8972 * KVM_SET_VCPU_EVENTS, so reject it here.
8974 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
8975 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
8976 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
8979 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
8980 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
8981 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
8983 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
8984 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8992 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
8993 int reason
, bool has_error_code
, u32 error_code
)
8995 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8998 init_emulate_ctxt(vcpu
);
9000 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
9001 has_error_code
, error_code
);
9003 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
9004 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
9005 vcpu
->run
->internal
.ndata
= 0;
9009 kvm_rip_write(vcpu
, ctxt
->eip
);
9010 kvm_set_rflags(vcpu
, ctxt
->eflags
);
9013 EXPORT_SYMBOL_GPL(kvm_task_switch
);
9015 static int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9017 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
9019 * When EFER.LME and CR0.PG are set, the processor is in
9020 * 64-bit mode (though maybe in a 32-bit code segment).
9021 * CR4.PAE and EFER.LMA must be set.
9023 if (!(sregs
->cr4
& X86_CR4_PAE
)
9024 || !(sregs
->efer
& EFER_LMA
))
9028 * Not in 64-bit mode: EFER.LMA is clear and the code
9029 * segment cannot be 64-bit.
9031 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
9035 return kvm_valid_cr4(vcpu
, sregs
->cr4
);
9038 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9040 struct msr_data apic_base_msr
;
9041 int mmu_reset_needed
= 0;
9042 int cpuid_update_needed
= 0;
9043 int pending_vec
, max_bits
, idx
;
9047 if (kvm_valid_sregs(vcpu
, sregs
))
9050 apic_base_msr
.data
= sregs
->apic_base
;
9051 apic_base_msr
.host_initiated
= true;
9052 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
9055 dt
.size
= sregs
->idt
.limit
;
9056 dt
.address
= sregs
->idt
.base
;
9057 kvm_x86_ops
.set_idt(vcpu
, &dt
);
9058 dt
.size
= sregs
->gdt
.limit
;
9059 dt
.address
= sregs
->gdt
.base
;
9060 kvm_x86_ops
.set_gdt(vcpu
, &dt
);
9062 vcpu
->arch
.cr2
= sregs
->cr2
;
9063 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
9064 vcpu
->arch
.cr3
= sregs
->cr3
;
9065 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
9067 kvm_set_cr8(vcpu
, sregs
->cr8
);
9069 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
9070 kvm_x86_ops
.set_efer(vcpu
, sregs
->efer
);
9072 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
9073 kvm_x86_ops
.set_cr0(vcpu
, sregs
->cr0
);
9074 vcpu
->arch
.cr0
= sregs
->cr0
;
9076 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
9077 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
9078 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
9079 kvm_x86_ops
.set_cr4(vcpu
, sregs
->cr4
);
9080 if (cpuid_update_needed
)
9081 kvm_update_cpuid(vcpu
);
9083 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9084 if (is_pae_paging(vcpu
)) {
9085 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
9086 mmu_reset_needed
= 1;
9088 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9090 if (mmu_reset_needed
)
9091 kvm_mmu_reset_context(vcpu
);
9093 max_bits
= KVM_NR_INTERRUPTS
;
9094 pending_vec
= find_first_bit(
9095 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
9096 if (pending_vec
< max_bits
) {
9097 kvm_queue_interrupt(vcpu
, pending_vec
, false);
9098 pr_debug("Set back pending irq %d\n", pending_vec
);
9101 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9102 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9103 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9104 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9105 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9106 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9108 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9109 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9111 update_cr8_intercept(vcpu
);
9113 /* Older userspace won't unhalt the vcpu on reset. */
9114 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
9115 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
9117 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9119 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9126 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
9127 struct kvm_sregs
*sregs
)
9132 ret
= __set_sregs(vcpu
, sregs
);
9137 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
9138 struct kvm_guest_debug
*dbg
)
9140 unsigned long rflags
;
9145 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
9147 if (vcpu
->arch
.exception
.pending
)
9149 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
9150 kvm_queue_exception(vcpu
, DB_VECTOR
);
9152 kvm_queue_exception(vcpu
, BP_VECTOR
);
9156 * Read rflags as long as potentially injected trace flags are still
9159 rflags
= kvm_get_rflags(vcpu
);
9161 vcpu
->guest_debug
= dbg
->control
;
9162 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
9163 vcpu
->guest_debug
= 0;
9165 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
9166 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
9167 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
9168 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
9170 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
9171 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
9173 kvm_update_dr7(vcpu
);
9175 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
9176 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
9177 get_segment_base(vcpu
, VCPU_SREG_CS
);
9180 * Trigger an rflags update that will inject or remove the trace
9183 kvm_set_rflags(vcpu
, rflags
);
9185 kvm_x86_ops
.update_bp_intercept(vcpu
);
9195 * Translate a guest virtual address to a guest physical address.
9197 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
9198 struct kvm_translation
*tr
)
9200 unsigned long vaddr
= tr
->linear_address
;
9206 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9207 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
9208 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9209 tr
->physical_address
= gpa
;
9210 tr
->valid
= gpa
!= UNMAPPED_GVA
;
9218 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9220 struct fxregs_state
*fxsave
;
9224 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9225 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
9226 fpu
->fcw
= fxsave
->cwd
;
9227 fpu
->fsw
= fxsave
->swd
;
9228 fpu
->ftwx
= fxsave
->twd
;
9229 fpu
->last_opcode
= fxsave
->fop
;
9230 fpu
->last_ip
= fxsave
->rip
;
9231 fpu
->last_dp
= fxsave
->rdp
;
9232 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
9238 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
9240 struct fxregs_state
*fxsave
;
9244 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
9246 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
9247 fxsave
->cwd
= fpu
->fcw
;
9248 fxsave
->swd
= fpu
->fsw
;
9249 fxsave
->twd
= fpu
->ftwx
;
9250 fxsave
->fop
= fpu
->last_opcode
;
9251 fxsave
->rip
= fpu
->last_ip
;
9252 fxsave
->rdp
= fpu
->last_dp
;
9253 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
9259 static void store_regs(struct kvm_vcpu
*vcpu
)
9261 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
9263 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
9264 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9266 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
9267 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
9269 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
9270 kvm_vcpu_ioctl_x86_get_vcpu_events(
9271 vcpu
, &vcpu
->run
->s
.regs
.events
);
9274 static int sync_regs(struct kvm_vcpu
*vcpu
)
9276 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
9279 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
9280 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
9281 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
9283 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
9284 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
9286 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
9288 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
9289 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9290 vcpu
, &vcpu
->run
->s
.regs
.events
))
9292 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
9298 static void fx_init(struct kvm_vcpu
*vcpu
)
9300 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
9301 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9302 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
9303 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
9306 * Ensure guest xcr0 is valid for loading
9308 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
9310 vcpu
->arch
.cr0
|= X86_CR0_ET
;
9313 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
9315 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
9316 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9317 "guest TSC will not be reliable\n");
9322 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
9327 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
9328 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9330 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
9332 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
9334 r
= kvm_mmu_create(vcpu
);
9338 if (irqchip_in_kernel(vcpu
->kvm
)) {
9339 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
9341 goto fail_mmu_destroy
;
9342 if (kvm_apicv_activated(vcpu
->kvm
))
9343 vcpu
->arch
.apicv_active
= true;
9345 static_key_slow_inc(&kvm_no_apic_vcpu
);
9349 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
9351 goto fail_free_lapic
;
9352 vcpu
->arch
.pio_data
= page_address(page
);
9354 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
9355 GFP_KERNEL_ACCOUNT
);
9356 if (!vcpu
->arch
.mce_banks
)
9357 goto fail_free_pio_data
;
9358 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
9360 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
9361 GFP_KERNEL_ACCOUNT
))
9362 goto fail_free_mce_banks
;
9364 if (!alloc_emulate_ctxt(vcpu
))
9365 goto free_wbinvd_dirty_mask
;
9367 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
9368 GFP_KERNEL_ACCOUNT
);
9369 if (!vcpu
->arch
.user_fpu
) {
9370 pr_err("kvm: failed to allocate userspace's fpu\n");
9371 goto free_emulate_ctxt
;
9374 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
9375 GFP_KERNEL_ACCOUNT
);
9376 if (!vcpu
->arch
.guest_fpu
) {
9377 pr_err("kvm: failed to allocate vcpu's fpu\n");
9382 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
9384 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
9386 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
9388 kvm_async_pf_hash_reset(vcpu
);
9391 vcpu
->arch
.pending_external_vector
= -1;
9392 vcpu
->arch
.preempted_in_kernel
= false;
9394 kvm_hv_vcpu_init(vcpu
);
9396 r
= kvm_x86_ops
.vcpu_create(vcpu
);
9398 goto free_guest_fpu
;
9400 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
9401 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
9402 kvm_vcpu_mtrr_init(vcpu
);
9404 kvm_vcpu_reset(vcpu
, false);
9405 kvm_init_mmu(vcpu
, false);
9410 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
9412 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
9414 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
9415 free_wbinvd_dirty_mask
:
9416 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
9417 fail_free_mce_banks
:
9418 kfree(vcpu
->arch
.mce_banks
);
9420 free_page((unsigned long)vcpu
->arch
.pio_data
);
9422 kvm_free_lapic(vcpu
);
9424 kvm_mmu_destroy(vcpu
);
9428 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
9430 struct msr_data msr
;
9431 struct kvm
*kvm
= vcpu
->kvm
;
9433 kvm_hv_vcpu_postcreate(vcpu
);
9435 if (mutex_lock_killable(&vcpu
->mutex
))
9439 msr
.index
= MSR_IA32_TSC
;
9440 msr
.host_initiated
= true;
9441 kvm_write_tsc(vcpu
, &msr
);
9444 /* poll control enabled by default */
9445 vcpu
->arch
.msr_kvm_poll_control
= 1;
9447 mutex_unlock(&vcpu
->mutex
);
9449 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
9450 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
9451 KVMCLOCK_SYNC_PERIOD
);
9454 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
9456 struct gfn_to_pfn_cache
*cache
= &vcpu
->arch
.st
.cache
;
9459 kvm_release_pfn(cache
->pfn
, cache
->dirty
, cache
);
9461 kvmclock_reset(vcpu
);
9463 kvm_x86_ops
.vcpu_free(vcpu
);
9465 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
9466 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
9467 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
9468 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
9470 kvm_hv_vcpu_uninit(vcpu
);
9471 kvm_pmu_destroy(vcpu
);
9472 kfree(vcpu
->arch
.mce_banks
);
9473 kvm_free_lapic(vcpu
);
9474 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9475 kvm_mmu_destroy(vcpu
);
9476 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9477 free_page((unsigned long)vcpu
->arch
.pio_data
);
9478 if (!lapic_in_kernel(vcpu
))
9479 static_key_slow_dec(&kvm_no_apic_vcpu
);
9482 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
9484 kvm_lapic_reset(vcpu
, init_event
);
9486 vcpu
->arch
.hflags
= 0;
9488 vcpu
->arch
.smi_pending
= 0;
9489 vcpu
->arch
.smi_count
= 0;
9490 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
9491 vcpu
->arch
.nmi_pending
= 0;
9492 vcpu
->arch
.nmi_injected
= false;
9493 kvm_clear_interrupt_queue(vcpu
);
9494 kvm_clear_exception_queue(vcpu
);
9496 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
9497 kvm_update_dr0123(vcpu
);
9498 vcpu
->arch
.dr6
= DR6_INIT
;
9499 vcpu
->arch
.dr7
= DR7_FIXED_1
;
9500 kvm_update_dr7(vcpu
);
9504 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9505 vcpu
->arch
.apf
.msr_val
= 0;
9506 vcpu
->arch
.st
.msr_val
= 0;
9508 kvmclock_reset(vcpu
);
9510 kvm_clear_async_pf_completion_queue(vcpu
);
9511 kvm_async_pf_hash_reset(vcpu
);
9512 vcpu
->arch
.apf
.halted
= false;
9514 if (kvm_mpx_supported()) {
9515 void *mpx_state_buffer
;
9518 * To avoid have the INIT path from kvm_apic_has_events() that be
9519 * called with loaded FPU and does not let userspace fix the state.
9522 kvm_put_guest_fpu(vcpu
);
9523 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
9525 if (mpx_state_buffer
)
9526 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
9527 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
9529 if (mpx_state_buffer
)
9530 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
9532 kvm_load_guest_fpu(vcpu
);
9536 kvm_pmu_reset(vcpu
);
9537 vcpu
->arch
.smbase
= 0x30000;
9539 vcpu
->arch
.msr_misc_features_enables
= 0;
9541 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
9544 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
9545 vcpu
->arch
.regs_avail
= ~0;
9546 vcpu
->arch
.regs_dirty
= ~0;
9548 vcpu
->arch
.ia32_xss
= 0;
9550 kvm_x86_ops
.vcpu_reset(vcpu
, init_event
);
9553 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
9555 struct kvm_segment cs
;
9557 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9558 cs
.selector
= vector
<< 8;
9559 cs
.base
= vector
<< 12;
9560 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9561 kvm_rip_write(vcpu
, 0);
9564 int kvm_arch_hardware_enable(void)
9567 struct kvm_vcpu
*vcpu
;
9572 bool stable
, backwards_tsc
= false;
9574 kvm_shared_msr_cpu_online();
9575 ret
= kvm_x86_ops
.hardware_enable();
9579 local_tsc
= rdtsc();
9580 stable
= !kvm_check_tsc_unstable();
9581 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9582 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9583 if (!stable
&& vcpu
->cpu
== smp_processor_id())
9584 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9585 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
9586 backwards_tsc
= true;
9587 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
9588 max_tsc
= vcpu
->arch
.last_host_tsc
;
9594 * Sometimes, even reliable TSCs go backwards. This happens on
9595 * platforms that reset TSC during suspend or hibernate actions, but
9596 * maintain synchronization. We must compensate. Fortunately, we can
9597 * detect that condition here, which happens early in CPU bringup,
9598 * before any KVM threads can be running. Unfortunately, we can't
9599 * bring the TSCs fully up to date with real time, as we aren't yet far
9600 * enough into CPU bringup that we know how much real time has actually
9601 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9602 * variables that haven't been updated yet.
9604 * So we simply find the maximum observed TSC above, then record the
9605 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
9606 * the adjustment will be applied. Note that we accumulate
9607 * adjustments, in case multiple suspend cycles happen before some VCPU
9608 * gets a chance to run again. In the event that no KVM threads get a
9609 * chance to run, we will miss the entire elapsed period, as we'll have
9610 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9611 * loose cycle time. This isn't too big a deal, since the loss will be
9612 * uniform across all VCPUs (not to mention the scenario is extremely
9613 * unlikely). It is possible that a second hibernate recovery happens
9614 * much faster than a first, causing the observed TSC here to be
9615 * smaller; this would require additional padding adjustment, which is
9616 * why we set last_host_tsc to the local tsc observed here.
9618 * N.B. - this code below runs only on platforms with reliable TSC,
9619 * as that is the only way backwards_tsc is set above. Also note
9620 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9621 * have the same delta_cyc adjustment applied if backwards_tsc
9622 * is detected. Note further, this adjustment is only done once,
9623 * as we reset last_host_tsc on all VCPUs to stop this from being
9624 * called multiple times (one for each physical CPU bringup).
9626 * Platforms with unreliable TSCs don't have to deal with this, they
9627 * will be compensated by the logic in vcpu_load, which sets the TSC to
9628 * catchup mode. This will catchup all VCPUs to real time, but cannot
9629 * guarantee that they stay in perfect synchronization.
9631 if (backwards_tsc
) {
9632 u64 delta_cyc
= max_tsc
- local_tsc
;
9633 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9634 kvm
->arch
.backwards_tsc_observed
= true;
9635 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9636 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
9637 vcpu
->arch
.last_host_tsc
= local_tsc
;
9638 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
9642 * We have to disable TSC offset matching.. if you were
9643 * booting a VM while issuing an S4 host suspend....
9644 * you may have some problem. Solving this issue is
9645 * left as an exercise to the reader.
9647 kvm
->arch
.last_tsc_nsec
= 0;
9648 kvm
->arch
.last_tsc_write
= 0;
9655 void kvm_arch_hardware_disable(void)
9657 kvm_x86_ops
.hardware_disable();
9658 drop_user_return_notifiers();
9661 int kvm_arch_hardware_setup(void *opaque
)
9663 struct kvm_x86_init_ops
*ops
= opaque
;
9666 rdmsrl_safe(MSR_EFER
, &host_efer
);
9668 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9669 rdmsrl(MSR_IA32_XSS
, host_xss
);
9671 r
= ops
->hardware_setup();
9675 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
9677 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
9680 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
9681 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
9682 #undef __kvm_cpu_cap_has
9684 if (kvm_has_tsc_control
) {
9686 * Make sure the user can only configure tsc_khz values that
9687 * fit into a signed integer.
9688 * A min value is not calculated because it will always
9689 * be 1 on all machines.
9691 u64 max
= min(0x7fffffffULL
,
9692 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
9693 kvm_max_guest_tsc_khz
= max
;
9695 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
9698 kvm_init_msr_list();
9702 void kvm_arch_hardware_unsetup(void)
9704 kvm_x86_ops
.hardware_unsetup();
9707 int kvm_arch_check_processor_compat(void *opaque
)
9709 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
9710 struct kvm_x86_init_ops
*ops
= opaque
;
9712 WARN_ON(!irqs_disabled());
9714 if (__cr4_reserved_bits(cpu_has
, c
) !=
9715 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
9718 return ops
->check_processor_compatibility();
9721 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
9723 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
9725 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
9727 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
9729 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
9732 struct static_key kvm_no_apic_vcpu __read_mostly
;
9733 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
9735 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
9737 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
9739 vcpu
->arch
.l1tf_flush_l1d
= true;
9740 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
9741 pmu
->need_cleanup
= true;
9742 kvm_make_request(KVM_REQ_PMU
, vcpu
);
9744 kvm_x86_ops
.sched_in(vcpu
, cpu
);
9747 void kvm_arch_free_vm(struct kvm
*kvm
)
9749 kfree(kvm
->arch
.hyperv
.hv_pa_pg
);
9754 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
9759 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
9760 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
9761 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
9762 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
9763 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
9764 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
9766 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9767 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
9768 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9769 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
9770 &kvm
->arch
.irq_sources_bitmap
);
9772 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
9773 mutex_init(&kvm
->arch
.apic_map_lock
);
9774 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
9776 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
9777 pvclock_update_vm_gtod_copy(kvm
);
9779 kvm
->arch
.guest_can_read_msr_platform_info
= true;
9781 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
9782 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
9784 kvm_hv_init_vm(kvm
);
9785 kvm_page_track_init(kvm
);
9786 kvm_mmu_init_vm(kvm
);
9788 return kvm_x86_ops
.vm_init(kvm
);
9791 int kvm_arch_post_init_vm(struct kvm
*kvm
)
9793 return kvm_mmu_post_init_vm(kvm
);
9796 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
9799 kvm_mmu_unload(vcpu
);
9803 static void kvm_free_vcpus(struct kvm
*kvm
)
9806 struct kvm_vcpu
*vcpu
;
9809 * Unpin any mmu pages first.
9811 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9812 kvm_clear_async_pf_completion_queue(vcpu
);
9813 kvm_unload_vcpu_mmu(vcpu
);
9815 kvm_for_each_vcpu(i
, vcpu
, kvm
)
9816 kvm_vcpu_destroy(vcpu
);
9818 mutex_lock(&kvm
->lock
);
9819 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
9820 kvm
->vcpus
[i
] = NULL
;
9822 atomic_set(&kvm
->online_vcpus
, 0);
9823 mutex_unlock(&kvm
->lock
);
9826 void kvm_arch_sync_events(struct kvm
*kvm
)
9828 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
9829 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
9833 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
9836 unsigned long hva
, uninitialized_var(old_npages
);
9837 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
9838 struct kvm_memory_slot
*slot
;
9840 /* Called with kvm->slots_lock held. */
9841 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
9844 slot
= id_to_memslot(slots
, id
);
9846 if (slot
&& slot
->npages
)
9850 * MAP_SHARED to prevent internal slot pages from being moved
9853 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
9854 MAP_SHARED
| MAP_ANONYMOUS
, 0);
9855 if (IS_ERR((void *)hva
))
9856 return PTR_ERR((void *)hva
);
9858 if (!slot
|| !slot
->npages
)
9862 * Stuff a non-canonical value to catch use-after-delete. This
9863 * ends up being 0 on 32-bit KVM, but there's no better
9866 hva
= (unsigned long)(0xdeadull
<< 48);
9867 old_npages
= slot
->npages
;
9870 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
9871 struct kvm_userspace_memory_region m
;
9873 m
.slot
= id
| (i
<< 16);
9875 m
.guest_phys_addr
= gpa
;
9876 m
.userspace_addr
= hva
;
9877 m
.memory_size
= size
;
9878 r
= __kvm_set_memory_region(kvm
, &m
);
9884 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
9888 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
9890 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
9892 kvm_mmu_pre_destroy_vm(kvm
);
9895 void kvm_arch_destroy_vm(struct kvm
*kvm
)
9897 if (current
->mm
== kvm
->mm
) {
9899 * Free memory regions allocated on behalf of userspace,
9900 * unless the the memory map has changed due to process exit
9903 mutex_lock(&kvm
->slots_lock
);
9904 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
9906 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
9908 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
9909 mutex_unlock(&kvm
->slots_lock
);
9911 if (kvm_x86_ops
.vm_destroy
)
9912 kvm_x86_ops
.vm_destroy(kvm
);
9913 kvm_pic_destroy(kvm
);
9914 kvm_ioapic_destroy(kvm
);
9915 kvm_free_vcpus(kvm
);
9916 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
9917 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
9918 kvm_mmu_uninit_vm(kvm
);
9919 kvm_page_track_cleanup(kvm
);
9920 kvm_hv_destroy_vm(kvm
);
9923 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
9927 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
9928 kvfree(slot
->arch
.rmap
[i
]);
9929 slot
->arch
.rmap
[i
] = NULL
;
9934 kvfree(slot
->arch
.lpage_info
[i
- 1]);
9935 slot
->arch
.lpage_info
[i
- 1] = NULL
;
9938 kvm_page_track_free_memslot(slot
);
9941 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot
*slot
,
9942 unsigned long npages
)
9947 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
9948 * old arrays will be freed by __kvm_set_memory_region() if installing
9949 * the new memslot is successful.
9951 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
9953 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
9954 struct kvm_lpage_info
*linfo
;
9959 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
9960 slot
->base_gfn
, level
) + 1;
9962 slot
->arch
.rmap
[i
] =
9963 kvcalloc(lpages
, sizeof(*slot
->arch
.rmap
[i
]),
9964 GFP_KERNEL_ACCOUNT
);
9965 if (!slot
->arch
.rmap
[i
])
9970 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
9974 slot
->arch
.lpage_info
[i
- 1] = linfo
;
9976 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
9977 linfo
[0].disallow_lpage
= 1;
9978 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
9979 linfo
[lpages
- 1].disallow_lpage
= 1;
9980 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
9982 * If the gfn and userspace address are not aligned wrt each
9983 * other, disable large page support for this slot.
9985 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
9988 for (j
= 0; j
< lpages
; ++j
)
9989 linfo
[j
].disallow_lpage
= 1;
9993 if (kvm_page_track_create_memslot(slot
, npages
))
9999 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
10000 kvfree(slot
->arch
.rmap
[i
]);
10001 slot
->arch
.rmap
[i
] = NULL
;
10005 kvfree(slot
->arch
.lpage_info
[i
- 1]);
10006 slot
->arch
.lpage_info
[i
- 1] = NULL
;
10011 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
10013 struct kvm_vcpu
*vcpu
;
10017 * memslots->generation has been incremented.
10018 * mmio generation may have reached its maximum value.
10020 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
10022 /* Force re-initialization of steal_time cache */
10023 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10024 kvm_vcpu_kick(vcpu
);
10027 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
10028 struct kvm_memory_slot
*memslot
,
10029 const struct kvm_userspace_memory_region
*mem
,
10030 enum kvm_mr_change change
)
10032 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
10033 return kvm_alloc_memslot_metadata(memslot
,
10034 mem
->memory_size
>> PAGE_SHIFT
);
10038 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
10039 struct kvm_memory_slot
*new)
10041 /* Still write protect RO slot */
10042 if (new->flags
& KVM_MEM_READONLY
) {
10043 kvm_mmu_slot_remove_write_access(kvm
, new, PT_PAGE_TABLE_LEVEL
);
10048 * Call kvm_x86_ops dirty logging hooks when they are valid.
10050 * kvm_x86_ops.slot_disable_log_dirty is called when:
10052 * - KVM_MR_CREATE with dirty logging is disabled
10053 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
10055 * The reason is, in case of PML, we need to set D-bit for any slots
10056 * with dirty logging disabled in order to eliminate unnecessary GPA
10057 * logging in PML buffer (and potential PML buffer full VMEXIT). This
10058 * guarantees leaving PML enabled during guest's lifetime won't have
10059 * any additional overhead from PML when guest is running with dirty
10060 * logging disabled for memory slots.
10062 * kvm_x86_ops.slot_enable_log_dirty is called when switching new slot
10063 * to dirty logging mode.
10065 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
10067 * In case of write protect:
10069 * Write protect all pages for dirty logging.
10071 * All the sptes including the large sptes which point to this
10072 * slot are set to readonly. We can not create any new large
10073 * spte on this slot until the end of the logging.
10075 * See the comments in fast_page_fault().
10077 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
10078 if (kvm_x86_ops
.slot_enable_log_dirty
) {
10079 kvm_x86_ops
.slot_enable_log_dirty(kvm
, new);
10082 kvm_dirty_log_manual_protect_and_init_set(kvm
) ?
10083 PT_DIRECTORY_LEVEL
: PT_PAGE_TABLE_LEVEL
;
10086 * If we're with initial-all-set, we don't need
10087 * to write protect any small page because
10088 * they're reported as dirty already. However
10089 * we still need to write-protect huge pages
10090 * so that the page split can happen lazily on
10091 * the first write to the huge page.
10093 kvm_mmu_slot_remove_write_access(kvm
, new, level
);
10096 if (kvm_x86_ops
.slot_disable_log_dirty
)
10097 kvm_x86_ops
.slot_disable_log_dirty(kvm
, new);
10101 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
10102 const struct kvm_userspace_memory_region
*mem
,
10103 struct kvm_memory_slot
*old
,
10104 const struct kvm_memory_slot
*new,
10105 enum kvm_mr_change change
)
10107 if (!kvm
->arch
.n_requested_mmu_pages
)
10108 kvm_mmu_change_mmu_pages(kvm
,
10109 kvm_mmu_calculate_default_mmu_pages(kvm
));
10112 * Dirty logging tracks sptes in 4k granularity, meaning that large
10113 * sptes have to be split. If live migration is successful, the guest
10114 * in the source machine will be destroyed and large sptes will be
10115 * created in the destination. However, if the guest continues to run
10116 * in the source machine (for example if live migration fails), small
10117 * sptes will remain around and cause bad performance.
10119 * Scan sptes if dirty logging has been stopped, dropping those
10120 * which can be collapsed into a single large-page spte. Later
10121 * page faults will create the large-page sptes.
10123 * There is no need to do this in any of the following cases:
10124 * CREATE: No dirty mappings will already exist.
10125 * MOVE/DELETE: The old mappings will already have been cleaned up by
10126 * kvm_arch_flush_shadow_memslot()
10128 if (change
== KVM_MR_FLAGS_ONLY
&&
10129 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
10130 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
10131 kvm_mmu_zap_collapsible_sptes(kvm
, new);
10134 * Set up write protection and/or dirty logging for the new slot.
10136 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
10137 * been zapped so no dirty logging staff is needed for old slot. For
10138 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
10139 * new and it's also covered when dealing with the new slot.
10141 * FIXME: const-ify all uses of struct kvm_memory_slot.
10143 if (change
!= KVM_MR_DELETE
)
10144 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
10146 /* Free the arrays associated with the old memslot. */
10147 if (change
== KVM_MR_MOVE
)
10148 kvm_arch_free_memslot(kvm
, old
);
10151 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
10153 kvm_mmu_zap_all(kvm
);
10156 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
10157 struct kvm_memory_slot
*slot
)
10159 kvm_page_track_flush_slot(kvm
, slot
);
10162 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
10164 return (is_guest_mode(vcpu
) &&
10165 kvm_x86_ops
.guest_apic_has_interrupt
&&
10166 kvm_x86_ops
.guest_apic_has_interrupt(vcpu
));
10169 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
10171 if (!list_empty_careful(&vcpu
->async_pf
.done
))
10174 if (kvm_apic_has_events(vcpu
))
10177 if (vcpu
->arch
.pv
.pv_unhalted
)
10180 if (vcpu
->arch
.exception
.pending
)
10183 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10184 (vcpu
->arch
.nmi_pending
&&
10185 kvm_x86_ops
.nmi_allowed(vcpu
)))
10188 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10189 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
10192 if (kvm_arch_interrupt_allowed(vcpu
) &&
10193 (kvm_cpu_has_interrupt(vcpu
) ||
10194 kvm_guest_apic_has_interrupt(vcpu
)))
10197 if (kvm_hv_has_stimer_pending(vcpu
))
10203 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
10205 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
10208 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
10210 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
10213 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
10214 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
10215 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
10218 if (vcpu
->arch
.apicv_active
&& kvm_x86_ops
.dy_apicv_has_pending_interrupt(vcpu
))
10224 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
10226 return vcpu
->arch
.preempted_in_kernel
;
10229 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
10231 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
10234 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
10236 return kvm_x86_ops
.interrupt_allowed(vcpu
);
10239 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
10241 if (is_64_bit_mode(vcpu
))
10242 return kvm_rip_read(vcpu
);
10243 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
10244 kvm_rip_read(vcpu
));
10246 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
10248 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
10250 return kvm_get_linear_rip(vcpu
) == linear_rip
;
10252 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
10254 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
10256 unsigned long rflags
;
10258 rflags
= kvm_x86_ops
.get_rflags(vcpu
);
10259 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10260 rflags
&= ~X86_EFLAGS_TF
;
10263 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
10265 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10267 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
10268 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
10269 rflags
|= X86_EFLAGS_TF
;
10270 kvm_x86_ops
.set_rflags(vcpu
, rflags
);
10273 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
10275 __kvm_set_rflags(vcpu
, rflags
);
10276 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10278 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
10280 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
10284 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
10288 r
= kvm_mmu_reload(vcpu
);
10292 if (!vcpu
->arch
.mmu
->direct_map
&&
10293 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
10296 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
10299 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
10301 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
10304 static inline u32
kvm_async_pf_next_probe(u32 key
)
10306 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
10309 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10311 u32 key
= kvm_async_pf_hash_fn(gfn
);
10313 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
10314 key
= kvm_async_pf_next_probe(key
);
10316 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
10319 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10322 u32 key
= kvm_async_pf_hash_fn(gfn
);
10324 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
10325 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
10326 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
10327 key
= kvm_async_pf_next_probe(key
);
10332 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10334 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
10337 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
10341 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
10343 vcpu
->arch
.apf
.gfns
[i
] = ~0;
10345 j
= kvm_async_pf_next_probe(j
);
10346 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
10348 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
10350 * k lies cyclically in ]i,j]
10352 * |....j i.k.| or |.k..j i...|
10354 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
10355 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
10360 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
10363 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
10367 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
10370 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
10374 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
10376 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
10379 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
10380 (vcpu
->arch
.apf
.send_user_only
&&
10381 kvm_x86_ops
.get_cpl(vcpu
) == 0))
10387 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
10389 if (unlikely(!lapic_in_kernel(vcpu
) ||
10390 kvm_event_needs_reinjection(vcpu
) ||
10391 vcpu
->arch
.exception
.pending
))
10394 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
10398 * If interrupts are off we cannot even use an artificial
10401 return kvm_x86_ops
.interrupt_allowed(vcpu
);
10404 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
10405 struct kvm_async_pf
*work
)
10407 struct x86_exception fault
;
10409 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
10410 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
10412 if (kvm_can_deliver_async_pf(vcpu
) &&
10413 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
10414 fault
.vector
= PF_VECTOR
;
10415 fault
.error_code_valid
= true;
10416 fault
.error_code
= 0;
10417 fault
.nested_page_fault
= false;
10418 fault
.address
= work
->arch
.token
;
10419 fault
.async_page_fault
= true;
10420 kvm_inject_page_fault(vcpu
, &fault
);
10423 * It is not possible to deliver a paravirtualized asynchronous
10424 * page fault, but putting the guest in an artificial halt state
10425 * can be beneficial nevertheless: if an interrupt arrives, we
10426 * can deliver it timely and perhaps the guest will schedule
10427 * another process. When the instruction that triggered a page
10428 * fault is retried, hopefully the page will be ready in the host.
10430 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
10434 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
10435 struct kvm_async_pf
*work
)
10437 struct x86_exception fault
;
10440 if (work
->wakeup_all
)
10441 work
->arch
.token
= ~0; /* broadcast wakeup */
10443 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
10444 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
10446 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
10447 !apf_get_user(vcpu
, &val
)) {
10448 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
10449 vcpu
->arch
.exception
.pending
&&
10450 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
10451 !apf_put_user(vcpu
, 0)) {
10452 vcpu
->arch
.exception
.injected
= false;
10453 vcpu
->arch
.exception
.pending
= false;
10454 vcpu
->arch
.exception
.nr
= 0;
10455 vcpu
->arch
.exception
.has_error_code
= false;
10456 vcpu
->arch
.exception
.error_code
= 0;
10457 vcpu
->arch
.exception
.has_payload
= false;
10458 vcpu
->arch
.exception
.payload
= 0;
10459 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
10460 fault
.vector
= PF_VECTOR
;
10461 fault
.error_code_valid
= true;
10462 fault
.error_code
= 0;
10463 fault
.nested_page_fault
= false;
10464 fault
.address
= work
->arch
.token
;
10465 fault
.async_page_fault
= true;
10466 kvm_inject_page_fault(vcpu
, &fault
);
10469 vcpu
->arch
.apf
.halted
= false;
10470 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10473 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
10475 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
10478 return kvm_can_do_async_pf(vcpu
);
10481 void kvm_arch_start_assignment(struct kvm
*kvm
)
10483 atomic_inc(&kvm
->arch
.assigned_device_count
);
10485 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
10487 void kvm_arch_end_assignment(struct kvm
*kvm
)
10489 atomic_dec(&kvm
->arch
.assigned_device_count
);
10491 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
10493 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
10495 return atomic_read(&kvm
->arch
.assigned_device_count
);
10497 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
10499 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
10501 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
10503 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
10505 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
10507 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
10509 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
10511 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
10513 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
10515 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
10517 bool kvm_arch_has_irq_bypass(void)
10522 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
10523 struct irq_bypass_producer
*prod
)
10525 struct kvm_kernel_irqfd
*irqfd
=
10526 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
10528 irqfd
->producer
= prod
;
10530 return kvm_x86_ops
.update_pi_irte(irqfd
->kvm
,
10531 prod
->irq
, irqfd
->gsi
, 1);
10534 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
10535 struct irq_bypass_producer
*prod
)
10538 struct kvm_kernel_irqfd
*irqfd
=
10539 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
10541 WARN_ON(irqfd
->producer
!= prod
);
10542 irqfd
->producer
= NULL
;
10545 * When producer of consumer is unregistered, we change back to
10546 * remapped mode, so we can re-use the current implementation
10547 * when the irq is masked/disabled or the consumer side (KVM
10548 * int this case doesn't want to receive the interrupts.
10550 ret
= kvm_x86_ops
.update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
10552 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
10553 " fails: %d\n", irqfd
->consumer
.token
, ret
);
10556 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
10557 uint32_t guest_irq
, bool set
)
10559 return kvm_x86_ops
.update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
10562 bool kvm_vector_hashing_enabled(void)
10564 return vector_hashing
;
10567 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
10569 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
10571 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
10573 u64
kvm_spec_ctrl_valid_bits(struct kvm_vcpu
*vcpu
)
10575 uint64_t bits
= SPEC_CTRL_IBRS
| SPEC_CTRL_STIBP
| SPEC_CTRL_SSBD
;
10577 /* The STIBP bit doesn't fault even if it's not advertised */
10578 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SPEC_CTRL
) &&
10579 !guest_cpuid_has(vcpu
, X86_FEATURE_AMD_IBRS
))
10580 bits
&= ~(SPEC_CTRL_IBRS
| SPEC_CTRL_STIBP
);
10581 if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL
) &&
10582 !boot_cpu_has(X86_FEATURE_AMD_IBRS
))
10583 bits
&= ~(SPEC_CTRL_IBRS
| SPEC_CTRL_STIBP
);
10585 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SPEC_CTRL_SSBD
) &&
10586 !guest_cpuid_has(vcpu
, X86_FEATURE_AMD_SSBD
))
10587 bits
&= ~SPEC_CTRL_SSBD
;
10588 if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD
) &&
10589 !boot_cpu_has(X86_FEATURE_AMD_SSBD
))
10590 bits
&= ~SPEC_CTRL_SSBD
;
10594 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_valid_bits
);
10596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
10597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
10598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
10599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
10600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
10601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
10602 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
10603 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
10604 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
10605 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
10606 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
10607 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
10608 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
10609 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
10610 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
10611 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
10612 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
10613 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
10614 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
10615 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
10616 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
10617 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);