2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 #define KVM_NR_SHARED_MSRS 16
139 struct kvm_shared_msrs_global
{
141 u32 msrs
[KVM_NR_SHARED_MSRS
];
144 struct kvm_shared_msrs
{
145 struct user_return_notifier urn
;
147 struct kvm_shared_msr_values
{
150 } values
[KVM_NR_SHARED_MSRS
];
153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
154 static struct kvm_shared_msrs __percpu
*shared_msrs
;
156 struct kvm_stats_debugfs_item debugfs_entries
[] = {
157 { "pf_fixed", VCPU_STAT(pf_fixed
) },
158 { "pf_guest", VCPU_STAT(pf_guest
) },
159 { "tlb_flush", VCPU_STAT(tlb_flush
) },
160 { "invlpg", VCPU_STAT(invlpg
) },
161 { "exits", VCPU_STAT(exits
) },
162 { "io_exits", VCPU_STAT(io_exits
) },
163 { "mmio_exits", VCPU_STAT(mmio_exits
) },
164 { "signal_exits", VCPU_STAT(signal_exits
) },
165 { "irq_window", VCPU_STAT(irq_window_exits
) },
166 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
167 { "halt_exits", VCPU_STAT(halt_exits
) },
168 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
169 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
170 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
171 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
172 { "hypercalls", VCPU_STAT(hypercalls
) },
173 { "request_irq", VCPU_STAT(request_irq_exits
) },
174 { "irq_exits", VCPU_STAT(irq_exits
) },
175 { "host_state_reload", VCPU_STAT(host_state_reload
) },
176 { "efer_reload", VCPU_STAT(efer_reload
) },
177 { "fpu_reload", VCPU_STAT(fpu_reload
) },
178 { "insn_emulation", VCPU_STAT(insn_emulation
) },
179 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
180 { "irq_injections", VCPU_STAT(irq_injections
) },
181 { "nmi_injections", VCPU_STAT(nmi_injections
) },
182 { "req_event", VCPU_STAT(req_event
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
193 { "max_mmu_page_hash_collisions",
194 VM_STAT(max_mmu_page_hash_collisions
) },
198 u64 __read_mostly host_xcr0
;
200 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
205 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
206 vcpu
->arch
.apf
.gfns
[i
] = ~0;
209 static void kvm_on_user_return(struct user_return_notifier
*urn
)
212 struct kvm_shared_msrs
*locals
213 = container_of(urn
, struct kvm_shared_msrs
, urn
);
214 struct kvm_shared_msr_values
*values
;
218 * Disabling irqs at this point since the following code could be
219 * interrupted and executed through kvm_arch_hardware_disable()
221 local_irq_save(flags
);
222 if (locals
->registered
) {
223 locals
->registered
= false;
224 user_return_notifier_unregister(urn
);
226 local_irq_restore(flags
);
227 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
228 values
= &locals
->values
[slot
];
229 if (values
->host
!= values
->curr
) {
230 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
231 values
->curr
= values
->host
;
236 static void shared_msr_update(unsigned slot
, u32 msr
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
242 /* only read, and nobody should modify it at this time,
243 * so don't need lock */
244 if (slot
>= shared_msrs_global
.nr
) {
245 printk(KERN_ERR
"kvm: invalid MSR slot!");
248 rdmsrl_safe(msr
, &value
);
249 smsr
->values
[slot
].host
= value
;
250 smsr
->values
[slot
].curr
= value
;
253 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
255 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
256 shared_msrs_global
.msrs
[slot
] = msr
;
257 if (slot
>= shared_msrs_global
.nr
)
258 shared_msrs_global
.nr
= slot
+ 1;
260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
262 static void kvm_shared_msr_cpu_online(void)
266 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
267 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
270 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
276 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
278 smsr
->values
[slot
].curr
= value
;
279 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
283 if (!smsr
->registered
) {
284 smsr
->urn
.on_user_return
= kvm_on_user_return
;
285 user_return_notifier_register(&smsr
->urn
);
286 smsr
->registered
= true;
290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
292 static void drop_user_return_notifiers(void)
294 unsigned int cpu
= smp_processor_id();
295 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
297 if (smsr
->registered
)
298 kvm_on_user_return(&smsr
->urn
);
301 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
303 return vcpu
->arch
.apic_base
;
305 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
307 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
309 u64 old_state
= vcpu
->arch
.apic_base
&
310 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
311 u64 new_state
= msr_info
->data
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
314 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
316 if (!msr_info
->host_initiated
&&
317 ((msr_info
->data
& reserved_bits
) != 0 ||
318 new_state
== X2APIC_ENABLE
||
319 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
320 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
321 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
325 kvm_lapic_set_base(vcpu
, msr_info
->data
);
328 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
330 asmlinkage __visible
void kvm_spurious_fault(void)
332 /* Fault while not rebooting. We want the trace. */
335 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
337 #define EXCPT_BENIGN 0
338 #define EXCPT_CONTRIBUTORY 1
341 static int exception_class(int vector
)
351 return EXCPT_CONTRIBUTORY
;
358 #define EXCPT_FAULT 0
360 #define EXCPT_ABORT 2
361 #define EXCPT_INTERRUPT 3
363 static int exception_type(int vector
)
367 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
368 return EXCPT_INTERRUPT
;
372 /* #DB is trap, as instruction watchpoints are handled elsewhere */
373 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
376 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
379 /* Reserved exceptions will result in fault */
383 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
384 unsigned nr
, bool has_error
, u32 error_code
,
390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
392 if (!vcpu
->arch
.exception
.pending
) {
394 if (has_error
&& !is_protmode(vcpu
))
396 vcpu
->arch
.exception
.pending
= true;
397 vcpu
->arch
.exception
.has_error_code
= has_error
;
398 vcpu
->arch
.exception
.nr
= nr
;
399 vcpu
->arch
.exception
.error_code
= error_code
;
400 vcpu
->arch
.exception
.reinject
= reinject
;
404 /* to check exception */
405 prev_nr
= vcpu
->arch
.exception
.nr
;
406 if (prev_nr
== DF_VECTOR
) {
407 /* triple fault -> shutdown */
408 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
411 class1
= exception_class(prev_nr
);
412 class2
= exception_class(nr
);
413 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
414 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
415 /* generate double fault per SDM Table 5-5 */
416 vcpu
->arch
.exception
.pending
= true;
417 vcpu
->arch
.exception
.has_error_code
= true;
418 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
419 vcpu
->arch
.exception
.error_code
= 0;
421 /* replace previous exception with a new one in a hope
422 that instruction re-execution will regenerate lost
427 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
429 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
431 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
433 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
435 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
437 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
439 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
442 kvm_inject_gp(vcpu
, 0);
444 return kvm_skip_emulated_instruction(vcpu
);
448 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
450 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
452 ++vcpu
->stat
.pf_guest
;
453 vcpu
->arch
.cr2
= fault
->address
;
454 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
456 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
458 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
460 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
461 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
463 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
465 return fault
->nested_page_fault
;
468 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
470 atomic_inc(&vcpu
->arch
.nmi_queued
);
471 kvm_make_request(KVM_REQ_NMI
, vcpu
);
473 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
475 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
477 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
479 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
481 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
483 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
485 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
488 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
489 * a #GP and return false.
491 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
493 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
495 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
498 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
500 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
502 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
505 kvm_queue_exception(vcpu
, UD_VECTOR
);
508 EXPORT_SYMBOL_GPL(kvm_require_dr
);
511 * This function will be used to read from the physical memory of the currently
512 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
513 * can read from guest physical or from the guest's guest physical memory.
515 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
516 gfn_t ngfn
, void *data
, int offset
, int len
,
519 struct x86_exception exception
;
523 ngpa
= gfn_to_gpa(ngfn
);
524 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
525 if (real_gfn
== UNMAPPED_GVA
)
528 real_gfn
= gpa_to_gfn(real_gfn
);
530 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
532 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
534 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
535 void *data
, int offset
, int len
, u32 access
)
537 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
538 data
, offset
, len
, access
);
542 * Load the pae pdptrs. Return true is they are all valid.
544 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
546 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
547 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
550 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
552 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
553 offset
* sizeof(u64
), sizeof(pdpte
),
554 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
559 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
560 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
562 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
569 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
570 __set_bit(VCPU_EXREG_PDPTR
,
571 (unsigned long *)&vcpu
->arch
.regs_avail
);
572 __set_bit(VCPU_EXREG_PDPTR
,
573 (unsigned long *)&vcpu
->arch
.regs_dirty
);
578 EXPORT_SYMBOL_GPL(load_pdptrs
);
580 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
582 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
588 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
591 if (!test_bit(VCPU_EXREG_PDPTR
,
592 (unsigned long *)&vcpu
->arch
.regs_avail
))
595 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
596 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
597 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
598 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
601 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
606 EXPORT_SYMBOL_GPL(pdptrs_changed
);
608 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
610 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
611 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
616 if (cr0
& 0xffffffff00000000UL
)
620 cr0
&= ~CR0_RESERVED_BITS
;
622 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
625 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
628 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
630 if ((vcpu
->arch
.efer
& EFER_LME
)) {
635 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
640 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
645 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
648 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
650 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
651 kvm_clear_async_pf_completion_queue(vcpu
);
652 kvm_async_pf_hash_reset(vcpu
);
655 if ((cr0
^ old_cr0
) & update_bits
)
656 kvm_mmu_reset_context(vcpu
);
658 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
659 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
660 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
661 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
665 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
667 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
669 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
671 EXPORT_SYMBOL_GPL(kvm_lmsw
);
673 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
675 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
676 !vcpu
->guest_xcr0_loaded
) {
677 /* kvm_set_xcr() also depends on this */
678 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
679 vcpu
->guest_xcr0_loaded
= 1;
683 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
685 if (vcpu
->guest_xcr0_loaded
) {
686 if (vcpu
->arch
.xcr0
!= host_xcr0
)
687 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
688 vcpu
->guest_xcr0_loaded
= 0;
692 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
695 u64 old_xcr0
= vcpu
->arch
.xcr0
;
698 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
699 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
701 if (!(xcr0
& XFEATURE_MASK_FP
))
703 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
707 * Do not allow the guest to set bits that we do not support
708 * saving. However, xcr0 bit 0 is always set, even if the
709 * emulated CPU does not support XSAVE (see fx_init).
711 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
712 if (xcr0
& ~valid_bits
)
715 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
716 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
719 if (xcr0
& XFEATURE_MASK_AVX512
) {
720 if (!(xcr0
& XFEATURE_MASK_YMM
))
722 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
725 vcpu
->arch
.xcr0
= xcr0
;
727 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
728 kvm_update_cpuid(vcpu
);
732 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
734 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
735 __kvm_set_xcr(vcpu
, index
, xcr
)) {
736 kvm_inject_gp(vcpu
, 0);
741 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
743 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
745 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
746 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
747 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
749 if (cr4
& CR4_RESERVED_BITS
)
752 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
755 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
758 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
761 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
764 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
767 if (is_long_mode(vcpu
)) {
768 if (!(cr4
& X86_CR4_PAE
))
770 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
771 && ((cr4
^ old_cr4
) & pdptr_bits
)
772 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
776 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
777 if (!guest_cpuid_has_pcid(vcpu
))
780 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
781 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
785 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
788 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
789 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
790 kvm_mmu_reset_context(vcpu
);
792 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
793 kvm_update_cpuid(vcpu
);
797 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
799 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
802 cr3
&= ~CR3_PCID_INVD
;
805 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
806 kvm_mmu_sync_roots(vcpu
);
807 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
811 if (is_long_mode(vcpu
)) {
812 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
814 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
815 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
818 vcpu
->arch
.cr3
= cr3
;
819 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
820 kvm_mmu_new_cr3(vcpu
);
823 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
825 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
827 if (cr8
& CR8_RESERVED_BITS
)
829 if (lapic_in_kernel(vcpu
))
830 kvm_lapic_set_tpr(vcpu
, cr8
);
832 vcpu
->arch
.cr8
= cr8
;
835 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
837 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
839 if (lapic_in_kernel(vcpu
))
840 return kvm_lapic_get_cr8(vcpu
);
842 return vcpu
->arch
.cr8
;
844 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
846 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
850 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
851 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
852 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
853 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
857 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
859 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
860 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
863 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
867 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
868 dr7
= vcpu
->arch
.guest_debug_dr7
;
870 dr7
= vcpu
->arch
.dr7
;
871 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
872 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
873 if (dr7
& DR7_BP_EN_MASK
)
874 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
877 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
879 u64 fixed
= DR6_FIXED_1
;
881 if (!guest_cpuid_has_rtm(vcpu
))
886 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
890 vcpu
->arch
.db
[dr
] = val
;
891 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
892 vcpu
->arch
.eff_db
[dr
] = val
;
897 if (val
& 0xffffffff00000000ULL
)
899 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
900 kvm_update_dr6(vcpu
);
905 if (val
& 0xffffffff00000000ULL
)
907 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
908 kvm_update_dr7(vcpu
);
915 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
917 if (__kvm_set_dr(vcpu
, dr
, val
)) {
918 kvm_inject_gp(vcpu
, 0);
923 EXPORT_SYMBOL_GPL(kvm_set_dr
);
925 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
929 *val
= vcpu
->arch
.db
[dr
];
934 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
935 *val
= vcpu
->arch
.dr6
;
937 *val
= kvm_x86_ops
->get_dr6(vcpu
);
942 *val
= vcpu
->arch
.dr7
;
947 EXPORT_SYMBOL_GPL(kvm_get_dr
);
949 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
951 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
955 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
958 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
959 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
962 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
965 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
966 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
968 * This list is modified at module load time to reflect the
969 * capabilities of the host cpu. This capabilities test skips MSRs that are
970 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
971 * may depend on host virtualization features rather than host cpu features.
974 static u32 msrs_to_save
[] = {
975 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
978 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
980 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
981 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
984 static unsigned num_msrs_to_save
;
986 static u32 emulated_msrs
[] = {
987 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
988 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
989 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
990 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
991 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
992 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
995 HV_X64_MSR_VP_RUNTIME
,
997 HV_X64_MSR_STIMER0_CONFIG
,
998 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1001 MSR_IA32_TSC_ADJUST
,
1002 MSR_IA32_TSCDEADLINE
,
1003 MSR_IA32_MISC_ENABLE
,
1004 MSR_IA32_MCG_STATUS
,
1006 MSR_IA32_MCG_EXT_CTL
,
1009 MSR_MISC_FEATURES_ENABLES
,
1012 static unsigned num_emulated_msrs
;
1014 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1016 if (efer
& efer_reserved_bits
)
1019 if (efer
& EFER_FFXSR
) {
1020 struct kvm_cpuid_entry2
*feat
;
1022 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1023 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1027 if (efer
& EFER_SVME
) {
1028 struct kvm_cpuid_entry2
*feat
;
1030 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1031 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1037 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1039 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1041 u64 old_efer
= vcpu
->arch
.efer
;
1043 if (!kvm_valid_efer(vcpu
, efer
))
1047 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1051 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1053 kvm_x86_ops
->set_efer(vcpu
, efer
);
1055 /* Update reserved bits */
1056 if ((efer
^ old_efer
) & EFER_NX
)
1057 kvm_mmu_reset_context(vcpu
);
1062 void kvm_enable_efer_bits(u64 mask
)
1064 efer_reserved_bits
&= ~mask
;
1066 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1069 * Writes msr value into into the appropriate "register".
1070 * Returns 0 on success, non-0 otherwise.
1071 * Assumes vcpu_load() was already called.
1073 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1075 switch (msr
->index
) {
1078 case MSR_KERNEL_GS_BASE
:
1081 if (is_noncanonical_address(msr
->data
))
1084 case MSR_IA32_SYSENTER_EIP
:
1085 case MSR_IA32_SYSENTER_ESP
:
1087 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1088 * non-canonical address is written on Intel but not on
1089 * AMD (which ignores the top 32-bits, because it does
1090 * not implement 64-bit SYSENTER).
1092 * 64-bit code should hence be able to write a non-canonical
1093 * value on AMD. Making the address canonical ensures that
1094 * vmentry does not fail on Intel after writing a non-canonical
1095 * value, and that something deterministic happens if the guest
1096 * invokes 64-bit SYSENTER.
1098 msr
->data
= get_canonical(msr
->data
);
1100 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1102 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1105 * Adapt set_msr() to msr_io()'s calling convention
1107 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1109 struct msr_data msr
;
1113 msr
.host_initiated
= true;
1114 r
= kvm_get_msr(vcpu
, &msr
);
1122 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1124 struct msr_data msr
;
1128 msr
.host_initiated
= true;
1129 return kvm_set_msr(vcpu
, &msr
);
1132 #ifdef CONFIG_X86_64
1133 struct pvclock_gtod_data
{
1136 struct { /* extract of a clocksource struct */
1149 static struct pvclock_gtod_data pvclock_gtod_data
;
1151 static void update_pvclock_gtod(struct timekeeper
*tk
)
1153 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1156 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1158 write_seqcount_begin(&vdata
->seq
);
1160 /* copy pvclock gtod data */
1161 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1162 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1163 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1164 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1165 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1167 vdata
->boot_ns
= boot_ns
;
1168 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1170 vdata
->wall_time_sec
= tk
->xtime_sec
;
1172 write_seqcount_end(&vdata
->seq
);
1176 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1179 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1180 * vcpu_enter_guest. This function is only called from
1181 * the physical CPU that is running vcpu.
1183 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1186 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1190 struct pvclock_wall_clock wc
;
1191 struct timespec64 boot
;
1196 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1201 ++version
; /* first time write, random junk */
1205 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1209 * The guest calculates current wall clock time by adding
1210 * system time (updated by kvm_guest_time_update below) to the
1211 * wall clock specified here. guest system time equals host
1212 * system time for us, thus we must fill in host boot time here.
1214 getboottime64(&boot
);
1216 if (kvm
->arch
.kvmclock_offset
) {
1217 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1218 boot
= timespec64_sub(boot
, ts
);
1220 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1221 wc
.nsec
= boot
.tv_nsec
;
1222 wc
.version
= version
;
1224 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1227 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1230 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1232 do_shl32_div32(dividend
, divisor
);
1236 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1237 s8
*pshift
, u32
*pmultiplier
)
1245 scaled64
= scaled_hz
;
1246 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1251 tps32
= (uint32_t)tps64
;
1252 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1253 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1261 *pmultiplier
= div_frac(scaled64
, tps32
);
1263 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1264 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1267 #ifdef CONFIG_X86_64
1268 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1271 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1272 static unsigned long max_tsc_khz
;
1274 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1276 u64 v
= (u64
)khz
* (1000000 + ppm
);
1281 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1285 /* Guest TSC same frequency as host TSC? */
1287 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1291 /* TSC scaling supported? */
1292 if (!kvm_has_tsc_control
) {
1293 if (user_tsc_khz
> tsc_khz
) {
1294 vcpu
->arch
.tsc_catchup
= 1;
1295 vcpu
->arch
.tsc_always_catchup
= 1;
1298 WARN(1, "user requested TSC rate below hardware speed\n");
1303 /* TSC scaling required - calculate ratio */
1304 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1305 user_tsc_khz
, tsc_khz
);
1307 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1308 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1313 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1317 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1319 u32 thresh_lo
, thresh_hi
;
1320 int use_scaling
= 0;
1322 /* tsc_khz can be zero if TSC calibration fails */
1323 if (user_tsc_khz
== 0) {
1324 /* set tsc_scaling_ratio to a safe value */
1325 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1329 /* Compute a scale to convert nanoseconds in TSC cycles */
1330 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1331 &vcpu
->arch
.virtual_tsc_shift
,
1332 &vcpu
->arch
.virtual_tsc_mult
);
1333 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1336 * Compute the variation in TSC rate which is acceptable
1337 * within the range of tolerance and decide if the
1338 * rate being applied is within that bounds of the hardware
1339 * rate. If so, no scaling or compensation need be done.
1341 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1342 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1343 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1344 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1347 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1350 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1352 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1353 vcpu
->arch
.virtual_tsc_mult
,
1354 vcpu
->arch
.virtual_tsc_shift
);
1355 tsc
+= vcpu
->arch
.this_tsc_write
;
1359 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1361 #ifdef CONFIG_X86_64
1363 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1364 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1366 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1367 atomic_read(&vcpu
->kvm
->online_vcpus
));
1370 * Once the masterclock is enabled, always perform request in
1371 * order to update it.
1373 * In order to enable masterclock, the host clocksource must be TSC
1374 * and the vcpus need to have matched TSCs. When that happens,
1375 * perform request to enable masterclock.
1377 if (ka
->use_master_clock
||
1378 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1379 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1381 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1382 atomic_read(&vcpu
->kvm
->online_vcpus
),
1383 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1387 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1389 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1390 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1394 * Multiply tsc by a fixed point number represented by ratio.
1396 * The most significant 64-N bits (mult) of ratio represent the
1397 * integral part of the fixed point number; the remaining N bits
1398 * (frac) represent the fractional part, ie. ratio represents a fixed
1399 * point number (mult + frac * 2^(-N)).
1401 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1403 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1405 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1408 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1411 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1413 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1414 _tsc
= __scale_tsc(ratio
, tsc
);
1418 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1420 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1424 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1426 return target_tsc
- tsc
;
1429 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1431 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1433 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1435 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1437 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1438 vcpu
->arch
.tsc_offset
= offset
;
1441 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1443 struct kvm
*kvm
= vcpu
->kvm
;
1444 u64 offset
, ns
, elapsed
;
1445 unsigned long flags
;
1447 bool already_matched
;
1448 u64 data
= msr
->data
;
1449 bool synchronizing
= false;
1451 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1452 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1453 ns
= ktime_get_boot_ns();
1454 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1456 if (vcpu
->arch
.virtual_tsc_khz
) {
1457 if (data
== 0 && msr
->host_initiated
) {
1459 * detection of vcpu initialization -- need to sync
1460 * with other vCPUs. This particularly helps to keep
1461 * kvm_clock stable after CPU hotplug
1463 synchronizing
= true;
1465 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1466 nsec_to_cycles(vcpu
, elapsed
);
1467 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1469 * Special case: TSC write with a small delta (1 second)
1470 * of virtual cycle time against real time is
1471 * interpreted as an attempt to synchronize the CPU.
1473 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1474 data
+ tsc_hz
> tsc_exp
;
1479 * For a reliable TSC, we can match TSC offsets, and for an unstable
1480 * TSC, we add elapsed time in this computation. We could let the
1481 * compensation code attempt to catch up if we fall behind, but
1482 * it's better to try to match offsets from the beginning.
1484 if (synchronizing
&&
1485 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1486 if (!check_tsc_unstable()) {
1487 offset
= kvm
->arch
.cur_tsc_offset
;
1488 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1490 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1492 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1493 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1496 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1499 * We split periods of matched TSC writes into generations.
1500 * For each generation, we track the original measured
1501 * nanosecond time, offset, and write, so if TSCs are in
1502 * sync, we can match exact offset, and if not, we can match
1503 * exact software computation in compute_guest_tsc()
1505 * These values are tracked in kvm->arch.cur_xxx variables.
1507 kvm
->arch
.cur_tsc_generation
++;
1508 kvm
->arch
.cur_tsc_nsec
= ns
;
1509 kvm
->arch
.cur_tsc_write
= data
;
1510 kvm
->arch
.cur_tsc_offset
= offset
;
1512 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1513 kvm
->arch
.cur_tsc_generation
, data
);
1517 * We also track th most recent recorded KHZ, write and time to
1518 * allow the matching interval to be extended at each write.
1520 kvm
->arch
.last_tsc_nsec
= ns
;
1521 kvm
->arch
.last_tsc_write
= data
;
1522 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1524 vcpu
->arch
.last_guest_tsc
= data
;
1526 /* Keep track of which generation this VCPU has synchronized to */
1527 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1528 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1529 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1531 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1532 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1533 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1534 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1536 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1538 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1539 } else if (!already_matched
) {
1540 kvm
->arch
.nr_vcpus_matched_tsc
++;
1543 kvm_track_tsc_matching(vcpu
);
1544 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1547 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1549 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1552 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1555 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1557 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1558 WARN_ON(adjustment
< 0);
1559 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1560 adjust_tsc_offset_guest(vcpu
, adjustment
);
1563 #ifdef CONFIG_X86_64
1565 static u64
read_tsc(void)
1567 u64 ret
= (u64
)rdtsc_ordered();
1568 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1570 if (likely(ret
>= last
))
1574 * GCC likes to generate cmov here, but this branch is extremely
1575 * predictable (it's just a function of time and the likely is
1576 * very likely) and there's a data dependence, so force GCC
1577 * to generate a branch instead. I don't barrier() because
1578 * we don't actually need a barrier, and if this function
1579 * ever gets inlined it will generate worse code.
1585 static inline u64
vgettsc(u64
*cycle_now
)
1588 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1590 *cycle_now
= read_tsc();
1592 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1593 return v
* gtod
->clock
.mult
;
1596 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1598 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1604 seq
= read_seqcount_begin(>od
->seq
);
1605 mode
= gtod
->clock
.vclock_mode
;
1606 ns
= gtod
->nsec_base
;
1607 ns
+= vgettsc(cycle_now
);
1608 ns
>>= gtod
->clock
.shift
;
1609 ns
+= gtod
->boot_ns
;
1610 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1616 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1618 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1624 seq
= read_seqcount_begin(>od
->seq
);
1625 mode
= gtod
->clock
.vclock_mode
;
1626 ts
->tv_sec
= gtod
->wall_time_sec
;
1627 ns
= gtod
->nsec_base
;
1628 ns
+= vgettsc(cycle_now
);
1629 ns
>>= gtod
->clock
.shift
;
1630 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1632 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1638 /* returns true if host is using tsc clocksource */
1639 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1641 /* checked again under seqlock below */
1642 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1645 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1648 /* returns true if host is using tsc clocksource */
1649 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1652 /* checked again under seqlock below */
1653 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1656 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1662 * Assuming a stable TSC across physical CPUS, and a stable TSC
1663 * across virtual CPUs, the following condition is possible.
1664 * Each numbered line represents an event visible to both
1665 * CPUs at the next numbered event.
1667 * "timespecX" represents host monotonic time. "tscX" represents
1670 * VCPU0 on CPU0 | VCPU1 on CPU1
1672 * 1. read timespec0,tsc0
1673 * 2. | timespec1 = timespec0 + N
1675 * 3. transition to guest | transition to guest
1676 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1677 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1678 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1680 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1683 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1685 * - 0 < N - M => M < N
1687 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1688 * always the case (the difference between two distinct xtime instances
1689 * might be smaller then the difference between corresponding TSC reads,
1690 * when updating guest vcpus pvclock areas).
1692 * To avoid that problem, do not allow visibility of distinct
1693 * system_timestamp/tsc_timestamp values simultaneously: use a master
1694 * copy of host monotonic time values. Update that master copy
1697 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1701 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1703 #ifdef CONFIG_X86_64
1704 struct kvm_arch
*ka
= &kvm
->arch
;
1706 bool host_tsc_clocksource
, vcpus_matched
;
1708 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1709 atomic_read(&kvm
->online_vcpus
));
1712 * If the host uses TSC clock, then passthrough TSC as stable
1715 host_tsc_clocksource
= kvm_get_time_and_clockread(
1716 &ka
->master_kernel_ns
,
1717 &ka
->master_cycle_now
);
1719 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1720 && !ka
->backwards_tsc_observed
1721 && !ka
->boot_vcpu_runs_old_kvmclock
;
1723 if (ka
->use_master_clock
)
1724 atomic_set(&kvm_guest_has_master_clock
, 1);
1726 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1727 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1732 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1734 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1737 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1739 #ifdef CONFIG_X86_64
1741 struct kvm_vcpu
*vcpu
;
1742 struct kvm_arch
*ka
= &kvm
->arch
;
1744 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1745 kvm_make_mclock_inprogress_request(kvm
);
1746 /* no guest entries from this point */
1747 pvclock_update_vm_gtod_copy(kvm
);
1749 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1750 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1752 /* guest entries allowed */
1753 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1754 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1756 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1760 u64
get_kvmclock_ns(struct kvm
*kvm
)
1762 struct kvm_arch
*ka
= &kvm
->arch
;
1763 struct pvclock_vcpu_time_info hv_clock
;
1766 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1767 if (!ka
->use_master_clock
) {
1768 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1769 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1772 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1773 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1774 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1776 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1779 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1780 &hv_clock
.tsc_shift
,
1781 &hv_clock
.tsc_to_system_mul
);
1782 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1789 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1791 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1792 struct pvclock_vcpu_time_info guest_hv_clock
;
1794 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1795 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1798 /* This VCPU is paused, but it's legal for a guest to read another
1799 * VCPU's kvmclock, so we really have to follow the specification where
1800 * it says that version is odd if data is being modified, and even after
1803 * Version field updates must be kept separate. This is because
1804 * kvm_write_guest_cached might use a "rep movs" instruction, and
1805 * writes within a string instruction are weakly ordered. So there
1806 * are three writes overall.
1808 * As a small optimization, only write the version field in the first
1809 * and third write. The vcpu->pv_time cache is still valid, because the
1810 * version field is the first in the struct.
1812 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1814 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1815 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1817 sizeof(vcpu
->hv_clock
.version
));
1821 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1822 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1824 if (vcpu
->pvclock_set_guest_stopped_request
) {
1825 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1826 vcpu
->pvclock_set_guest_stopped_request
= false;
1829 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1831 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1833 sizeof(vcpu
->hv_clock
));
1837 vcpu
->hv_clock
.version
++;
1838 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1840 sizeof(vcpu
->hv_clock
.version
));
1843 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1845 unsigned long flags
, tgt_tsc_khz
;
1846 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1847 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1849 u64 tsc_timestamp
, host_tsc
;
1851 bool use_master_clock
;
1857 * If the host uses TSC clock, then passthrough TSC as stable
1860 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1861 use_master_clock
= ka
->use_master_clock
;
1862 if (use_master_clock
) {
1863 host_tsc
= ka
->master_cycle_now
;
1864 kernel_ns
= ka
->master_kernel_ns
;
1866 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1868 /* Keep irq disabled to prevent changes to the clock */
1869 local_irq_save(flags
);
1870 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1871 if (unlikely(tgt_tsc_khz
== 0)) {
1872 local_irq_restore(flags
);
1873 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1876 if (!use_master_clock
) {
1878 kernel_ns
= ktime_get_boot_ns();
1881 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1884 * We may have to catch up the TSC to match elapsed wall clock
1885 * time for two reasons, even if kvmclock is used.
1886 * 1) CPU could have been running below the maximum TSC rate
1887 * 2) Broken TSC compensation resets the base at each VCPU
1888 * entry to avoid unknown leaps of TSC even when running
1889 * again on the same CPU. This may cause apparent elapsed
1890 * time to disappear, and the guest to stand still or run
1893 if (vcpu
->tsc_catchup
) {
1894 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1895 if (tsc
> tsc_timestamp
) {
1896 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1897 tsc_timestamp
= tsc
;
1901 local_irq_restore(flags
);
1903 /* With all the info we got, fill in the values */
1905 if (kvm_has_tsc_control
)
1906 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1908 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1909 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1910 &vcpu
->hv_clock
.tsc_shift
,
1911 &vcpu
->hv_clock
.tsc_to_system_mul
);
1912 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1915 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1916 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1917 vcpu
->last_guest_tsc
= tsc_timestamp
;
1919 /* If the host uses TSC clocksource, then it is stable */
1921 if (use_master_clock
)
1922 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1924 vcpu
->hv_clock
.flags
= pvclock_flags
;
1926 if (vcpu
->pv_time_enabled
)
1927 kvm_setup_pvclock_page(v
);
1928 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1929 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1934 * kvmclock updates which are isolated to a given vcpu, such as
1935 * vcpu->cpu migration, should not allow system_timestamp from
1936 * the rest of the vcpus to remain static. Otherwise ntp frequency
1937 * correction applies to one vcpu's system_timestamp but not
1940 * So in those cases, request a kvmclock update for all vcpus.
1941 * We need to rate-limit these requests though, as they can
1942 * considerably slow guests that have a large number of vcpus.
1943 * The time for a remote vcpu to update its kvmclock is bound
1944 * by the delay we use to rate-limit the updates.
1947 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1949 static void kvmclock_update_fn(struct work_struct
*work
)
1952 struct delayed_work
*dwork
= to_delayed_work(work
);
1953 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1954 kvmclock_update_work
);
1955 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1956 struct kvm_vcpu
*vcpu
;
1958 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1959 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1960 kvm_vcpu_kick(vcpu
);
1964 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1966 struct kvm
*kvm
= v
->kvm
;
1968 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1969 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1970 KVMCLOCK_UPDATE_DELAY
);
1973 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1975 static void kvmclock_sync_fn(struct work_struct
*work
)
1977 struct delayed_work
*dwork
= to_delayed_work(work
);
1978 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1979 kvmclock_sync_work
);
1980 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1982 if (!kvmclock_periodic_sync
)
1985 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1986 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1987 KVMCLOCK_SYNC_PERIOD
);
1990 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1992 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1993 unsigned bank_num
= mcg_cap
& 0xff;
1996 case MSR_IA32_MCG_STATUS
:
1997 vcpu
->arch
.mcg_status
= data
;
1999 case MSR_IA32_MCG_CTL
:
2000 if (!(mcg_cap
& MCG_CTL_P
))
2002 if (data
!= 0 && data
!= ~(u64
)0)
2004 vcpu
->arch
.mcg_ctl
= data
;
2007 if (msr
>= MSR_IA32_MC0_CTL
&&
2008 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2009 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2010 /* only 0 or all 1s can be written to IA32_MCi_CTL
2011 * some Linux kernels though clear bit 10 in bank 4 to
2012 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2013 * this to avoid an uncatched #GP in the guest
2015 if ((offset
& 0x3) == 0 &&
2016 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2018 vcpu
->arch
.mce_banks
[offset
] = data
;
2026 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2028 struct kvm
*kvm
= vcpu
->kvm
;
2029 int lm
= is_long_mode(vcpu
);
2030 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2031 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2032 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2033 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2034 u32 page_num
= data
& ~PAGE_MASK
;
2035 u64 page_addr
= data
& PAGE_MASK
;
2040 if (page_num
>= blob_size
)
2043 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2048 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2057 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2059 gpa_t gpa
= data
& ~0x3f;
2061 /* Bits 2:5 are reserved, Should be zero */
2065 vcpu
->arch
.apf
.msr_val
= data
;
2067 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2068 kvm_clear_async_pf_completion_queue(vcpu
);
2069 kvm_async_pf_hash_reset(vcpu
);
2073 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2077 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2078 kvm_async_pf_wakeup_all(vcpu
);
2082 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2084 vcpu
->arch
.pv_time_enabled
= false;
2087 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2089 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2092 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2093 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2096 vcpu
->arch
.st
.steal
.preempted
= 0;
2098 if (vcpu
->arch
.st
.steal
.version
& 1)
2099 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2101 vcpu
->arch
.st
.steal
.version
+= 1;
2103 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2104 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2108 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2109 vcpu
->arch
.st
.last_steal
;
2110 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2112 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2113 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2117 vcpu
->arch
.st
.steal
.version
+= 1;
2119 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2120 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2123 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2126 u32 msr
= msr_info
->index
;
2127 u64 data
= msr_info
->data
;
2130 case MSR_AMD64_NB_CFG
:
2131 case MSR_IA32_UCODE_REV
:
2132 case MSR_IA32_UCODE_WRITE
:
2133 case MSR_VM_HSAVE_PA
:
2134 case MSR_AMD64_PATCH_LOADER
:
2135 case MSR_AMD64_BU_CFG2
:
2136 case MSR_AMD64_DC_CFG
:
2140 return set_efer(vcpu
, data
);
2142 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2143 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2144 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2145 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2147 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2152 case MSR_FAM10H_MMIO_CONF_BASE
:
2154 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2159 case MSR_IA32_DEBUGCTLMSR
:
2161 /* We support the non-activated case already */
2163 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2164 /* Values other than LBR and BTF are vendor-specific,
2165 thus reserved and should throw a #GP */
2168 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2171 case 0x200 ... 0x2ff:
2172 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2173 case MSR_IA32_APICBASE
:
2174 return kvm_set_apic_base(vcpu
, msr_info
);
2175 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2176 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2177 case MSR_IA32_TSCDEADLINE
:
2178 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2180 case MSR_IA32_TSC_ADJUST
:
2181 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2182 if (!msr_info
->host_initiated
) {
2183 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2184 adjust_tsc_offset_guest(vcpu
, adj
);
2186 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2189 case MSR_IA32_MISC_ENABLE
:
2190 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2192 case MSR_IA32_SMBASE
:
2193 if (!msr_info
->host_initiated
)
2195 vcpu
->arch
.smbase
= data
;
2197 case MSR_KVM_WALL_CLOCK_NEW
:
2198 case MSR_KVM_WALL_CLOCK
:
2199 vcpu
->kvm
->arch
.wall_clock
= data
;
2200 kvm_write_wall_clock(vcpu
->kvm
, data
);
2202 case MSR_KVM_SYSTEM_TIME_NEW
:
2203 case MSR_KVM_SYSTEM_TIME
: {
2204 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2206 kvmclock_reset(vcpu
);
2208 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2209 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2211 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2212 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2214 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2217 vcpu
->arch
.time
= data
;
2218 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2220 /* we verify if the enable bit is set... */
2224 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2225 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2226 sizeof(struct pvclock_vcpu_time_info
)))
2227 vcpu
->arch
.pv_time_enabled
= false;
2229 vcpu
->arch
.pv_time_enabled
= true;
2233 case MSR_KVM_ASYNC_PF_EN
:
2234 if (kvm_pv_enable_async_pf(vcpu
, data
))
2237 case MSR_KVM_STEAL_TIME
:
2239 if (unlikely(!sched_info_on()))
2242 if (data
& KVM_STEAL_RESERVED_MASK
)
2245 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2246 data
& KVM_STEAL_VALID_BITS
,
2247 sizeof(struct kvm_steal_time
)))
2250 vcpu
->arch
.st
.msr_val
= data
;
2252 if (!(data
& KVM_MSR_ENABLED
))
2255 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2258 case MSR_KVM_PV_EOI_EN
:
2259 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2263 case MSR_IA32_MCG_CTL
:
2264 case MSR_IA32_MCG_STATUS
:
2265 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2266 return set_msr_mce(vcpu
, msr
, data
);
2268 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2269 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2270 pr
= true; /* fall through */
2271 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2272 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2273 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2274 return kvm_pmu_set_msr(vcpu
, msr_info
);
2276 if (pr
|| data
!= 0)
2277 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2278 "0x%x data 0x%llx\n", msr
, data
);
2280 case MSR_K7_CLK_CTL
:
2282 * Ignore all writes to this no longer documented MSR.
2283 * Writes are only relevant for old K7 processors,
2284 * all pre-dating SVM, but a recommended workaround from
2285 * AMD for these chips. It is possible to specify the
2286 * affected processor models on the command line, hence
2287 * the need to ignore the workaround.
2290 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2291 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2292 case HV_X64_MSR_CRASH_CTL
:
2293 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2294 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2295 msr_info
->host_initiated
);
2296 case MSR_IA32_BBL_CR_CTL3
:
2297 /* Drop writes to this legacy MSR -- see rdmsr
2298 * counterpart for further detail.
2300 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2302 case MSR_AMD64_OSVW_ID_LENGTH
:
2303 if (!guest_cpuid_has_osvw(vcpu
))
2305 vcpu
->arch
.osvw
.length
= data
;
2307 case MSR_AMD64_OSVW_STATUS
:
2308 if (!guest_cpuid_has_osvw(vcpu
))
2310 vcpu
->arch
.osvw
.status
= data
;
2312 case MSR_PLATFORM_INFO
:
2313 if (!msr_info
->host_initiated
||
2314 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2315 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2316 cpuid_fault_enabled(vcpu
)))
2318 vcpu
->arch
.msr_platform_info
= data
;
2320 case MSR_MISC_FEATURES_ENABLES
:
2321 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2322 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2323 !supports_cpuid_fault(vcpu
)))
2325 vcpu
->arch
.msr_misc_features_enables
= data
;
2328 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2329 return xen_hvm_config(vcpu
, data
);
2330 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2331 return kvm_pmu_set_msr(vcpu
, msr_info
);
2333 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2337 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2344 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2348 * Reads an msr value (of 'msr_index') into 'pdata'.
2349 * Returns 0 on success, non-0 otherwise.
2350 * Assumes vcpu_load() was already called.
2352 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2354 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2356 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2358 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2361 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2362 unsigned bank_num
= mcg_cap
& 0xff;
2365 case MSR_IA32_P5_MC_ADDR
:
2366 case MSR_IA32_P5_MC_TYPE
:
2369 case MSR_IA32_MCG_CAP
:
2370 data
= vcpu
->arch
.mcg_cap
;
2372 case MSR_IA32_MCG_CTL
:
2373 if (!(mcg_cap
& MCG_CTL_P
))
2375 data
= vcpu
->arch
.mcg_ctl
;
2377 case MSR_IA32_MCG_STATUS
:
2378 data
= vcpu
->arch
.mcg_status
;
2381 if (msr
>= MSR_IA32_MC0_CTL
&&
2382 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2383 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2384 data
= vcpu
->arch
.mce_banks
[offset
];
2393 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2395 switch (msr_info
->index
) {
2396 case MSR_IA32_PLATFORM_ID
:
2397 case MSR_IA32_EBL_CR_POWERON
:
2398 case MSR_IA32_DEBUGCTLMSR
:
2399 case MSR_IA32_LASTBRANCHFROMIP
:
2400 case MSR_IA32_LASTBRANCHTOIP
:
2401 case MSR_IA32_LASTINTFROMIP
:
2402 case MSR_IA32_LASTINTTOIP
:
2404 case MSR_K8_TSEG_ADDR
:
2405 case MSR_K8_TSEG_MASK
:
2407 case MSR_VM_HSAVE_PA
:
2408 case MSR_K8_INT_PENDING_MSG
:
2409 case MSR_AMD64_NB_CFG
:
2410 case MSR_FAM10H_MMIO_CONF_BASE
:
2411 case MSR_AMD64_BU_CFG2
:
2412 case MSR_IA32_PERF_CTL
:
2413 case MSR_AMD64_DC_CFG
:
2416 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2417 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2418 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2419 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2420 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2421 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2424 case MSR_IA32_UCODE_REV
:
2425 msr_info
->data
= 0x100000000ULL
;
2428 case 0x200 ... 0x2ff:
2429 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2430 case 0xcd: /* fsb frequency */
2434 * MSR_EBC_FREQUENCY_ID
2435 * Conservative value valid for even the basic CPU models.
2436 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2437 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2438 * and 266MHz for model 3, or 4. Set Core Clock
2439 * Frequency to System Bus Frequency Ratio to 1 (bits
2440 * 31:24) even though these are only valid for CPU
2441 * models > 2, however guests may end up dividing or
2442 * multiplying by zero otherwise.
2444 case MSR_EBC_FREQUENCY_ID
:
2445 msr_info
->data
= 1 << 24;
2447 case MSR_IA32_APICBASE
:
2448 msr_info
->data
= kvm_get_apic_base(vcpu
);
2450 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2451 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2453 case MSR_IA32_TSCDEADLINE
:
2454 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2456 case MSR_IA32_TSC_ADJUST
:
2457 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2459 case MSR_IA32_MISC_ENABLE
:
2460 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2462 case MSR_IA32_SMBASE
:
2463 if (!msr_info
->host_initiated
)
2465 msr_info
->data
= vcpu
->arch
.smbase
;
2467 case MSR_IA32_PERF_STATUS
:
2468 /* TSC increment by tick */
2469 msr_info
->data
= 1000ULL;
2470 /* CPU multiplier */
2471 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2474 msr_info
->data
= vcpu
->arch
.efer
;
2476 case MSR_KVM_WALL_CLOCK
:
2477 case MSR_KVM_WALL_CLOCK_NEW
:
2478 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2480 case MSR_KVM_SYSTEM_TIME
:
2481 case MSR_KVM_SYSTEM_TIME_NEW
:
2482 msr_info
->data
= vcpu
->arch
.time
;
2484 case MSR_KVM_ASYNC_PF_EN
:
2485 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2487 case MSR_KVM_STEAL_TIME
:
2488 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2490 case MSR_KVM_PV_EOI_EN
:
2491 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2493 case MSR_IA32_P5_MC_ADDR
:
2494 case MSR_IA32_P5_MC_TYPE
:
2495 case MSR_IA32_MCG_CAP
:
2496 case MSR_IA32_MCG_CTL
:
2497 case MSR_IA32_MCG_STATUS
:
2498 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2499 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2500 case MSR_K7_CLK_CTL
:
2502 * Provide expected ramp-up count for K7. All other
2503 * are set to zero, indicating minimum divisors for
2506 * This prevents guest kernels on AMD host with CPU
2507 * type 6, model 8 and higher from exploding due to
2508 * the rdmsr failing.
2510 msr_info
->data
= 0x20000000;
2512 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2513 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2514 case HV_X64_MSR_CRASH_CTL
:
2515 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2516 return kvm_hv_get_msr_common(vcpu
,
2517 msr_info
->index
, &msr_info
->data
);
2519 case MSR_IA32_BBL_CR_CTL3
:
2520 /* This legacy MSR exists but isn't fully documented in current
2521 * silicon. It is however accessed by winxp in very narrow
2522 * scenarios where it sets bit #19, itself documented as
2523 * a "reserved" bit. Best effort attempt to source coherent
2524 * read data here should the balance of the register be
2525 * interpreted by the guest:
2527 * L2 cache control register 3: 64GB range, 256KB size,
2528 * enabled, latency 0x1, configured
2530 msr_info
->data
= 0xbe702111;
2532 case MSR_AMD64_OSVW_ID_LENGTH
:
2533 if (!guest_cpuid_has_osvw(vcpu
))
2535 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2537 case MSR_AMD64_OSVW_STATUS
:
2538 if (!guest_cpuid_has_osvw(vcpu
))
2540 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2542 case MSR_PLATFORM_INFO
:
2543 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2545 case MSR_MISC_FEATURES_ENABLES
:
2546 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2549 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2550 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2552 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2556 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2563 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2566 * Read or write a bunch of msrs. All parameters are kernel addresses.
2568 * @return number of msrs set successfully.
2570 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2571 struct kvm_msr_entry
*entries
,
2572 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2573 unsigned index
, u64
*data
))
2577 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2578 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2579 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2581 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2587 * Read or write a bunch of msrs. Parameters are user addresses.
2589 * @return number of msrs set successfully.
2591 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2592 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2593 unsigned index
, u64
*data
),
2596 struct kvm_msrs msrs
;
2597 struct kvm_msr_entry
*entries
;
2602 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2606 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2609 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2610 entries
= memdup_user(user_msrs
->entries
, size
);
2611 if (IS_ERR(entries
)) {
2612 r
= PTR_ERR(entries
);
2616 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2621 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2632 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2637 case KVM_CAP_IRQCHIP
:
2639 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2640 case KVM_CAP_SET_TSS_ADDR
:
2641 case KVM_CAP_EXT_CPUID
:
2642 case KVM_CAP_EXT_EMUL_CPUID
:
2643 case KVM_CAP_CLOCKSOURCE
:
2645 case KVM_CAP_NOP_IO_DELAY
:
2646 case KVM_CAP_MP_STATE
:
2647 case KVM_CAP_SYNC_MMU
:
2648 case KVM_CAP_USER_NMI
:
2649 case KVM_CAP_REINJECT_CONTROL
:
2650 case KVM_CAP_IRQ_INJECT_STATUS
:
2651 case KVM_CAP_IOEVENTFD
:
2652 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2654 case KVM_CAP_PIT_STATE2
:
2655 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2656 case KVM_CAP_XEN_HVM
:
2657 case KVM_CAP_VCPU_EVENTS
:
2658 case KVM_CAP_HYPERV
:
2659 case KVM_CAP_HYPERV_VAPIC
:
2660 case KVM_CAP_HYPERV_SPIN
:
2661 case KVM_CAP_HYPERV_SYNIC
:
2662 case KVM_CAP_HYPERV_SYNIC2
:
2663 case KVM_CAP_PCI_SEGMENT
:
2664 case KVM_CAP_DEBUGREGS
:
2665 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2667 case KVM_CAP_ASYNC_PF
:
2668 case KVM_CAP_GET_TSC_KHZ
:
2669 case KVM_CAP_KVMCLOCK_CTRL
:
2670 case KVM_CAP_READONLY_MEM
:
2671 case KVM_CAP_HYPERV_TIME
:
2672 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2673 case KVM_CAP_TSC_DEADLINE_TIMER
:
2674 case KVM_CAP_ENABLE_CAP_VM
:
2675 case KVM_CAP_DISABLE_QUIRKS
:
2676 case KVM_CAP_SET_BOOT_CPU_ID
:
2677 case KVM_CAP_SPLIT_IRQCHIP
:
2678 case KVM_CAP_IMMEDIATE_EXIT
:
2681 case KVM_CAP_ADJUST_CLOCK
:
2682 r
= KVM_CLOCK_TSC_STABLE
;
2684 case KVM_CAP_X86_GUEST_MWAIT
:
2685 r
= kvm_mwait_in_guest();
2687 case KVM_CAP_X86_SMM
:
2688 /* SMBASE is usually relocated above 1M on modern chipsets,
2689 * and SMM handlers might indeed rely on 4G segment limits,
2690 * so do not report SMM to be available if real mode is
2691 * emulated via vm86 mode. Still, do not go to great lengths
2692 * to avoid userspace's usage of the feature, because it is a
2693 * fringe case that is not enabled except via specific settings
2694 * of the module parameters.
2696 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2699 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2701 case KVM_CAP_NR_VCPUS
:
2702 r
= KVM_SOFT_MAX_VCPUS
;
2704 case KVM_CAP_MAX_VCPUS
:
2707 case KVM_CAP_NR_MEMSLOTS
:
2708 r
= KVM_USER_MEM_SLOTS
;
2710 case KVM_CAP_PV_MMU
: /* obsolete */
2714 r
= KVM_MAX_MCE_BANKS
;
2717 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2719 case KVM_CAP_TSC_CONTROL
:
2720 r
= kvm_has_tsc_control
;
2722 case KVM_CAP_X2APIC_API
:
2723 r
= KVM_X2APIC_API_VALID_FLAGS
;
2733 long kvm_arch_dev_ioctl(struct file
*filp
,
2734 unsigned int ioctl
, unsigned long arg
)
2736 void __user
*argp
= (void __user
*)arg
;
2740 case KVM_GET_MSR_INDEX_LIST
: {
2741 struct kvm_msr_list __user
*user_msr_list
= argp
;
2742 struct kvm_msr_list msr_list
;
2746 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2749 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2750 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2753 if (n
< msr_list
.nmsrs
)
2756 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2757 num_msrs_to_save
* sizeof(u32
)))
2759 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2761 num_emulated_msrs
* sizeof(u32
)))
2766 case KVM_GET_SUPPORTED_CPUID
:
2767 case KVM_GET_EMULATED_CPUID
: {
2768 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2769 struct kvm_cpuid2 cpuid
;
2772 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2775 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2781 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2786 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2788 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2789 sizeof(kvm_mce_cap_supported
)))
2801 static void wbinvd_ipi(void *garbage
)
2806 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2808 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2811 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2813 /* Address WBINVD may be executed by guest */
2814 if (need_emulate_wbinvd(vcpu
)) {
2815 if (kvm_x86_ops
->has_wbinvd_exit())
2816 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2817 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2818 smp_call_function_single(vcpu
->cpu
,
2819 wbinvd_ipi
, NULL
, 1);
2822 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2824 /* Apply any externally detected TSC adjustments (due to suspend) */
2825 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2826 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2827 vcpu
->arch
.tsc_offset_adjustment
= 0;
2828 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2831 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2832 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2833 rdtsc() - vcpu
->arch
.last_host_tsc
;
2835 mark_tsc_unstable("KVM discovered backwards TSC");
2837 if (check_tsc_unstable()) {
2838 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2839 vcpu
->arch
.last_guest_tsc
);
2840 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2841 vcpu
->arch
.tsc_catchup
= 1;
2844 if (kvm_lapic_hv_timer_in_use(vcpu
))
2845 kvm_lapic_restart_hv_timer(vcpu
);
2848 * On a host with synchronized TSC, there is no need to update
2849 * kvmclock on vcpu->cpu migration
2851 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2852 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2853 if (vcpu
->cpu
!= cpu
)
2854 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2858 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2861 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2863 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2866 vcpu
->arch
.st
.steal
.preempted
= 1;
2868 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2869 &vcpu
->arch
.st
.steal
.preempted
,
2870 offsetof(struct kvm_steal_time
, preempted
),
2871 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2874 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2878 * Disable page faults because we're in atomic context here.
2879 * kvm_write_guest_offset_cached() would call might_fault()
2880 * that relies on pagefault_disable() to tell if there's a
2881 * bug. NOTE: the write to guest memory may not go through if
2882 * during postcopy live migration or if there's heavy guest
2885 pagefault_disable();
2887 * kvm_memslots() will be called by
2888 * kvm_write_guest_offset_cached() so take the srcu lock.
2890 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2891 kvm_steal_time_set_preempted(vcpu
);
2892 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2894 kvm_x86_ops
->vcpu_put(vcpu
);
2895 kvm_put_guest_fpu(vcpu
);
2896 vcpu
->arch
.last_host_tsc
= rdtsc();
2899 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2900 struct kvm_lapic_state
*s
)
2902 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2903 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2905 return kvm_apic_get_state(vcpu
, s
);
2908 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2909 struct kvm_lapic_state
*s
)
2913 r
= kvm_apic_set_state(vcpu
, s
);
2916 update_cr8_intercept(vcpu
);
2921 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2923 return (!lapic_in_kernel(vcpu
) ||
2924 kvm_apic_accept_pic_intr(vcpu
));
2928 * if userspace requested an interrupt window, check that the
2929 * interrupt window is open.
2931 * No need to exit to userspace if we already have an interrupt queued.
2933 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2935 return kvm_arch_interrupt_allowed(vcpu
) &&
2936 !kvm_cpu_has_interrupt(vcpu
) &&
2937 !kvm_event_needs_reinjection(vcpu
) &&
2938 kvm_cpu_accept_dm_intr(vcpu
);
2941 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2942 struct kvm_interrupt
*irq
)
2944 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2947 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2948 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2949 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2954 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2955 * fail for in-kernel 8259.
2957 if (pic_in_kernel(vcpu
->kvm
))
2960 if (vcpu
->arch
.pending_external_vector
!= -1)
2963 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2964 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2968 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2970 kvm_inject_nmi(vcpu
);
2975 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2977 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2982 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2983 struct kvm_tpr_access_ctl
*tac
)
2987 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2991 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2995 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2998 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3000 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3003 vcpu
->arch
.mcg_cap
= mcg_cap
;
3004 /* Init IA32_MCG_CTL to all 1s */
3005 if (mcg_cap
& MCG_CTL_P
)
3006 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3007 /* Init IA32_MCi_CTL to all 1s */
3008 for (bank
= 0; bank
< bank_num
; bank
++)
3009 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3011 if (kvm_x86_ops
->setup_mce
)
3012 kvm_x86_ops
->setup_mce(vcpu
);
3017 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3018 struct kvm_x86_mce
*mce
)
3020 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3021 unsigned bank_num
= mcg_cap
& 0xff;
3022 u64
*banks
= vcpu
->arch
.mce_banks
;
3024 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3027 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3028 * reporting is disabled
3030 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3031 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3033 banks
+= 4 * mce
->bank
;
3035 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3036 * reporting is disabled for the bank
3038 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3040 if (mce
->status
& MCI_STATUS_UC
) {
3041 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3042 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3043 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3046 if (banks
[1] & MCI_STATUS_VAL
)
3047 mce
->status
|= MCI_STATUS_OVER
;
3048 banks
[2] = mce
->addr
;
3049 banks
[3] = mce
->misc
;
3050 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3051 banks
[1] = mce
->status
;
3052 kvm_queue_exception(vcpu
, MC_VECTOR
);
3053 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3054 || !(banks
[1] & MCI_STATUS_UC
)) {
3055 if (banks
[1] & MCI_STATUS_VAL
)
3056 mce
->status
|= MCI_STATUS_OVER
;
3057 banks
[2] = mce
->addr
;
3058 banks
[3] = mce
->misc
;
3059 banks
[1] = mce
->status
;
3061 banks
[1] |= MCI_STATUS_OVER
;
3065 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3066 struct kvm_vcpu_events
*events
)
3069 events
->exception
.injected
=
3070 vcpu
->arch
.exception
.pending
&&
3071 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3072 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3073 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3074 events
->exception
.pad
= 0;
3075 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3077 events
->interrupt
.injected
=
3078 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3079 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3080 events
->interrupt
.soft
= 0;
3081 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3083 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3084 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3085 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3086 events
->nmi
.pad
= 0;
3088 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3090 events
->smi
.smm
= is_smm(vcpu
);
3091 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3092 events
->smi
.smm_inside_nmi
=
3093 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3094 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3096 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3097 | KVM_VCPUEVENT_VALID_SHADOW
3098 | KVM_VCPUEVENT_VALID_SMM
);
3099 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3102 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3104 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3105 struct kvm_vcpu_events
*events
)
3107 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3108 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3109 | KVM_VCPUEVENT_VALID_SHADOW
3110 | KVM_VCPUEVENT_VALID_SMM
))
3113 if (events
->exception
.injected
&&
3114 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3115 is_guest_mode(vcpu
)))
3118 /* INITs are latched while in SMM */
3119 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3120 (events
->smi
.smm
|| events
->smi
.pending
) &&
3121 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3125 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3126 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3127 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3128 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3130 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3131 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3132 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3133 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3134 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3135 events
->interrupt
.shadow
);
3137 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3138 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3139 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3140 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3142 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3143 lapic_in_kernel(vcpu
))
3144 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3146 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3147 u32 hflags
= vcpu
->arch
.hflags
;
3148 if (events
->smi
.smm
)
3149 hflags
|= HF_SMM_MASK
;
3151 hflags
&= ~HF_SMM_MASK
;
3152 kvm_set_hflags(vcpu
, hflags
);
3154 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3155 if (events
->smi
.smm_inside_nmi
)
3156 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3158 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3159 if (lapic_in_kernel(vcpu
)) {
3160 if (events
->smi
.latched_init
)
3161 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3163 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3167 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3172 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3173 struct kvm_debugregs
*dbgregs
)
3177 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3178 kvm_get_dr(vcpu
, 6, &val
);
3180 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3182 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3185 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3186 struct kvm_debugregs
*dbgregs
)
3191 if (dbgregs
->dr6
& ~0xffffffffull
)
3193 if (dbgregs
->dr7
& ~0xffffffffull
)
3196 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3197 kvm_update_dr0123(vcpu
);
3198 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3199 kvm_update_dr6(vcpu
);
3200 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3201 kvm_update_dr7(vcpu
);
3206 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3208 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3210 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3211 u64 xstate_bv
= xsave
->header
.xfeatures
;
3215 * Copy legacy XSAVE area, to avoid complications with CPUID
3216 * leaves 0 and 1 in the loop below.
3218 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3221 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3222 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3225 * Copy each region from the possibly compacted offset to the
3226 * non-compacted offset.
3228 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3230 u64 feature
= valid
& -valid
;
3231 int index
= fls64(feature
) - 1;
3232 void *src
= get_xsave_addr(xsave
, feature
);
3235 u32 size
, offset
, ecx
, edx
;
3236 cpuid_count(XSTATE_CPUID
, index
,
3237 &size
, &offset
, &ecx
, &edx
);
3238 memcpy(dest
+ offset
, src
, size
);
3245 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3247 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3248 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3252 * Copy legacy XSAVE area, to avoid complications with CPUID
3253 * leaves 0 and 1 in the loop below.
3255 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3257 /* Set XSTATE_BV and possibly XCOMP_BV. */
3258 xsave
->header
.xfeatures
= xstate_bv
;
3259 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3260 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3263 * Copy each region from the non-compacted offset to the
3264 * possibly compacted offset.
3266 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3268 u64 feature
= valid
& -valid
;
3269 int index
= fls64(feature
) - 1;
3270 void *dest
= get_xsave_addr(xsave
, feature
);
3273 u32 size
, offset
, ecx
, edx
;
3274 cpuid_count(XSTATE_CPUID
, index
,
3275 &size
, &offset
, &ecx
, &edx
);
3276 memcpy(dest
, src
+ offset
, size
);
3283 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3284 struct kvm_xsave
*guest_xsave
)
3286 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3287 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3288 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3290 memcpy(guest_xsave
->region
,
3291 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3292 sizeof(struct fxregs_state
));
3293 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3294 XFEATURE_MASK_FPSSE
;
3298 #define XSAVE_MXCSR_OFFSET 24
3300 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3301 struct kvm_xsave
*guest_xsave
)
3304 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3305 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3307 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3309 * Here we allow setting states that are not present in
3310 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3311 * with old userspace.
3313 if (xstate_bv
& ~kvm_supported_xcr0() ||
3314 mxcsr
& ~mxcsr_feature_mask
)
3316 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3318 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3319 mxcsr
& ~mxcsr_feature_mask
)
3321 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3322 guest_xsave
->region
, sizeof(struct fxregs_state
));
3327 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3328 struct kvm_xcrs
*guest_xcrs
)
3330 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3331 guest_xcrs
->nr_xcrs
= 0;
3335 guest_xcrs
->nr_xcrs
= 1;
3336 guest_xcrs
->flags
= 0;
3337 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3338 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3341 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3342 struct kvm_xcrs
*guest_xcrs
)
3346 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3349 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3352 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3353 /* Only support XCR0 currently */
3354 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3355 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3356 guest_xcrs
->xcrs
[i
].value
);
3365 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3366 * stopped by the hypervisor. This function will be called from the host only.
3367 * EINVAL is returned when the host attempts to set the flag for a guest that
3368 * does not support pv clocks.
3370 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3372 if (!vcpu
->arch
.pv_time_enabled
)
3374 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3375 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3379 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3380 struct kvm_enable_cap
*cap
)
3386 case KVM_CAP_HYPERV_SYNIC2
:
3389 case KVM_CAP_HYPERV_SYNIC
:
3390 if (!irqchip_in_kernel(vcpu
->kvm
))
3392 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3393 KVM_CAP_HYPERV_SYNIC2
);
3399 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3400 unsigned int ioctl
, unsigned long arg
)
3402 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3403 void __user
*argp
= (void __user
*)arg
;
3406 struct kvm_lapic_state
*lapic
;
3407 struct kvm_xsave
*xsave
;
3408 struct kvm_xcrs
*xcrs
;
3414 case KVM_GET_LAPIC
: {
3416 if (!lapic_in_kernel(vcpu
))
3418 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3423 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3427 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3432 case KVM_SET_LAPIC
: {
3434 if (!lapic_in_kernel(vcpu
))
3436 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3437 if (IS_ERR(u
.lapic
))
3438 return PTR_ERR(u
.lapic
);
3440 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3443 case KVM_INTERRUPT
: {
3444 struct kvm_interrupt irq
;
3447 if (copy_from_user(&irq
, argp
, sizeof irq
))
3449 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3453 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3457 r
= kvm_vcpu_ioctl_smi(vcpu
);
3460 case KVM_SET_CPUID
: {
3461 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3462 struct kvm_cpuid cpuid
;
3465 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3467 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3470 case KVM_SET_CPUID2
: {
3471 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3472 struct kvm_cpuid2 cpuid
;
3475 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3477 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3478 cpuid_arg
->entries
);
3481 case KVM_GET_CPUID2
: {
3482 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3483 struct kvm_cpuid2 cpuid
;
3486 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3488 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3489 cpuid_arg
->entries
);
3493 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3499 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3502 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3504 case KVM_TPR_ACCESS_REPORTING
: {
3505 struct kvm_tpr_access_ctl tac
;
3508 if (copy_from_user(&tac
, argp
, sizeof tac
))
3510 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3514 if (copy_to_user(argp
, &tac
, sizeof tac
))
3519 case KVM_SET_VAPIC_ADDR
: {
3520 struct kvm_vapic_addr va
;
3524 if (!lapic_in_kernel(vcpu
))
3527 if (copy_from_user(&va
, argp
, sizeof va
))
3529 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3530 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3531 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3534 case KVM_X86_SETUP_MCE
: {
3538 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3540 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3543 case KVM_X86_SET_MCE
: {
3544 struct kvm_x86_mce mce
;
3547 if (copy_from_user(&mce
, argp
, sizeof mce
))
3549 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3552 case KVM_GET_VCPU_EVENTS
: {
3553 struct kvm_vcpu_events events
;
3555 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3558 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3563 case KVM_SET_VCPU_EVENTS
: {
3564 struct kvm_vcpu_events events
;
3567 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3570 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3573 case KVM_GET_DEBUGREGS
: {
3574 struct kvm_debugregs dbgregs
;
3576 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3579 if (copy_to_user(argp
, &dbgregs
,
3580 sizeof(struct kvm_debugregs
)))
3585 case KVM_SET_DEBUGREGS
: {
3586 struct kvm_debugregs dbgregs
;
3589 if (copy_from_user(&dbgregs
, argp
,
3590 sizeof(struct kvm_debugregs
)))
3593 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3596 case KVM_GET_XSAVE
: {
3597 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3602 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3605 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3610 case KVM_SET_XSAVE
: {
3611 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3612 if (IS_ERR(u
.xsave
))
3613 return PTR_ERR(u
.xsave
);
3615 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3618 case KVM_GET_XCRS
: {
3619 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3624 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3627 if (copy_to_user(argp
, u
.xcrs
,
3628 sizeof(struct kvm_xcrs
)))
3633 case KVM_SET_XCRS
: {
3634 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3636 return PTR_ERR(u
.xcrs
);
3638 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3641 case KVM_SET_TSC_KHZ
: {
3645 user_tsc_khz
= (u32
)arg
;
3647 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3650 if (user_tsc_khz
== 0)
3651 user_tsc_khz
= tsc_khz
;
3653 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3658 case KVM_GET_TSC_KHZ
: {
3659 r
= vcpu
->arch
.virtual_tsc_khz
;
3662 case KVM_KVMCLOCK_CTRL
: {
3663 r
= kvm_set_guest_paused(vcpu
);
3666 case KVM_ENABLE_CAP
: {
3667 struct kvm_enable_cap cap
;
3670 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3672 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3683 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3685 return VM_FAULT_SIGBUS
;
3688 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3692 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3694 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3698 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3701 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3705 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3706 u32 kvm_nr_mmu_pages
)
3708 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3711 mutex_lock(&kvm
->slots_lock
);
3713 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3714 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3716 mutex_unlock(&kvm
->slots_lock
);
3720 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3722 return kvm
->arch
.n_max_mmu_pages
;
3725 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3727 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3731 switch (chip
->chip_id
) {
3732 case KVM_IRQCHIP_PIC_MASTER
:
3733 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3734 sizeof(struct kvm_pic_state
));
3736 case KVM_IRQCHIP_PIC_SLAVE
:
3737 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3738 sizeof(struct kvm_pic_state
));
3740 case KVM_IRQCHIP_IOAPIC
:
3741 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3750 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3752 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3756 switch (chip
->chip_id
) {
3757 case KVM_IRQCHIP_PIC_MASTER
:
3758 spin_lock(&pic
->lock
);
3759 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3760 sizeof(struct kvm_pic_state
));
3761 spin_unlock(&pic
->lock
);
3763 case KVM_IRQCHIP_PIC_SLAVE
:
3764 spin_lock(&pic
->lock
);
3765 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3766 sizeof(struct kvm_pic_state
));
3767 spin_unlock(&pic
->lock
);
3769 case KVM_IRQCHIP_IOAPIC
:
3770 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3776 kvm_pic_update_irq(pic
);
3780 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3782 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3784 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3786 mutex_lock(&kps
->lock
);
3787 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3788 mutex_unlock(&kps
->lock
);
3792 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3795 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3797 mutex_lock(&pit
->pit_state
.lock
);
3798 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3799 for (i
= 0; i
< 3; i
++)
3800 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3801 mutex_unlock(&pit
->pit_state
.lock
);
3805 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3807 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3808 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3809 sizeof(ps
->channels
));
3810 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3811 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3812 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3816 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3820 u32 prev_legacy
, cur_legacy
;
3821 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3823 mutex_lock(&pit
->pit_state
.lock
);
3824 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3825 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3826 if (!prev_legacy
&& cur_legacy
)
3828 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3829 sizeof(pit
->pit_state
.channels
));
3830 pit
->pit_state
.flags
= ps
->flags
;
3831 for (i
= 0; i
< 3; i
++)
3832 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3834 mutex_unlock(&pit
->pit_state
.lock
);
3838 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3839 struct kvm_reinject_control
*control
)
3841 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3846 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3847 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3848 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3850 mutex_lock(&pit
->pit_state
.lock
);
3851 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3852 mutex_unlock(&pit
->pit_state
.lock
);
3858 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3859 * @kvm: kvm instance
3860 * @log: slot id and address to which we copy the log
3862 * Steps 1-4 below provide general overview of dirty page logging. See
3863 * kvm_get_dirty_log_protect() function description for additional details.
3865 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3866 * always flush the TLB (step 4) even if previous step failed and the dirty
3867 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3868 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3869 * writes will be marked dirty for next log read.
3871 * 1. Take a snapshot of the bit and clear it if needed.
3872 * 2. Write protect the corresponding page.
3873 * 3. Copy the snapshot to the userspace.
3874 * 4. Flush TLB's if needed.
3876 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3878 bool is_dirty
= false;
3881 mutex_lock(&kvm
->slots_lock
);
3884 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3886 if (kvm_x86_ops
->flush_log_dirty
)
3887 kvm_x86_ops
->flush_log_dirty(kvm
);
3889 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3892 * All the TLBs can be flushed out of mmu lock, see the comments in
3893 * kvm_mmu_slot_remove_write_access().
3895 lockdep_assert_held(&kvm
->slots_lock
);
3897 kvm_flush_remote_tlbs(kvm
);
3899 mutex_unlock(&kvm
->slots_lock
);
3903 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3906 if (!irqchip_in_kernel(kvm
))
3909 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3910 irq_event
->irq
, irq_event
->level
,
3915 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3916 struct kvm_enable_cap
*cap
)
3924 case KVM_CAP_DISABLE_QUIRKS
:
3925 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3928 case KVM_CAP_SPLIT_IRQCHIP
: {
3929 mutex_lock(&kvm
->lock
);
3931 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3932 goto split_irqchip_unlock
;
3934 if (irqchip_in_kernel(kvm
))
3935 goto split_irqchip_unlock
;
3936 if (kvm
->created_vcpus
)
3937 goto split_irqchip_unlock
;
3938 r
= kvm_setup_empty_irq_routing(kvm
);
3940 goto split_irqchip_unlock
;
3941 /* Pairs with irqchip_in_kernel. */
3943 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3944 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3946 split_irqchip_unlock
:
3947 mutex_unlock(&kvm
->lock
);
3950 case KVM_CAP_X2APIC_API
:
3952 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3955 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3956 kvm
->arch
.x2apic_format
= true;
3957 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3958 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3969 long kvm_arch_vm_ioctl(struct file
*filp
,
3970 unsigned int ioctl
, unsigned long arg
)
3972 struct kvm
*kvm
= filp
->private_data
;
3973 void __user
*argp
= (void __user
*)arg
;
3976 * This union makes it completely explicit to gcc-3.x
3977 * that these two variables' stack usage should be
3978 * combined, not added together.
3981 struct kvm_pit_state ps
;
3982 struct kvm_pit_state2 ps2
;
3983 struct kvm_pit_config pit_config
;
3987 case KVM_SET_TSS_ADDR
:
3988 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3990 case KVM_SET_IDENTITY_MAP_ADDR
: {
3994 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3996 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3999 case KVM_SET_NR_MMU_PAGES
:
4000 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4002 case KVM_GET_NR_MMU_PAGES
:
4003 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4005 case KVM_CREATE_IRQCHIP
: {
4006 mutex_lock(&kvm
->lock
);
4009 if (irqchip_in_kernel(kvm
))
4010 goto create_irqchip_unlock
;
4013 if (kvm
->created_vcpus
)
4014 goto create_irqchip_unlock
;
4016 r
= kvm_pic_init(kvm
);
4018 goto create_irqchip_unlock
;
4020 r
= kvm_ioapic_init(kvm
);
4022 kvm_pic_destroy(kvm
);
4023 goto create_irqchip_unlock
;
4026 r
= kvm_setup_default_irq_routing(kvm
);
4028 kvm_ioapic_destroy(kvm
);
4029 kvm_pic_destroy(kvm
);
4030 goto create_irqchip_unlock
;
4032 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4034 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4035 create_irqchip_unlock
:
4036 mutex_unlock(&kvm
->lock
);
4039 case KVM_CREATE_PIT
:
4040 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4042 case KVM_CREATE_PIT2
:
4044 if (copy_from_user(&u
.pit_config
, argp
,
4045 sizeof(struct kvm_pit_config
)))
4048 mutex_lock(&kvm
->lock
);
4051 goto create_pit_unlock
;
4053 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4057 mutex_unlock(&kvm
->lock
);
4059 case KVM_GET_IRQCHIP
: {
4060 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4061 struct kvm_irqchip
*chip
;
4063 chip
= memdup_user(argp
, sizeof(*chip
));
4070 if (!irqchip_kernel(kvm
))
4071 goto get_irqchip_out
;
4072 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4074 goto get_irqchip_out
;
4076 if (copy_to_user(argp
, chip
, sizeof *chip
))
4077 goto get_irqchip_out
;
4083 case KVM_SET_IRQCHIP
: {
4084 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4085 struct kvm_irqchip
*chip
;
4087 chip
= memdup_user(argp
, sizeof(*chip
));
4094 if (!irqchip_kernel(kvm
))
4095 goto set_irqchip_out
;
4096 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4098 goto set_irqchip_out
;
4106 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4109 if (!kvm
->arch
.vpit
)
4111 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4115 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4122 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4125 if (!kvm
->arch
.vpit
)
4127 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4130 case KVM_GET_PIT2
: {
4132 if (!kvm
->arch
.vpit
)
4134 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4138 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4143 case KVM_SET_PIT2
: {
4145 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4148 if (!kvm
->arch
.vpit
)
4150 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4153 case KVM_REINJECT_CONTROL
: {
4154 struct kvm_reinject_control control
;
4156 if (copy_from_user(&control
, argp
, sizeof(control
)))
4158 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4161 case KVM_SET_BOOT_CPU_ID
:
4163 mutex_lock(&kvm
->lock
);
4164 if (kvm
->created_vcpus
)
4167 kvm
->arch
.bsp_vcpu_id
= arg
;
4168 mutex_unlock(&kvm
->lock
);
4170 case KVM_XEN_HVM_CONFIG
: {
4172 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4173 sizeof(struct kvm_xen_hvm_config
)))
4176 if (kvm
->arch
.xen_hvm_config
.flags
)
4181 case KVM_SET_CLOCK
: {
4182 struct kvm_clock_data user_ns
;
4186 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4195 * TODO: userspace has to take care of races with VCPU_RUN, so
4196 * kvm_gen_update_masterclock() can be cut down to locked
4197 * pvclock_update_vm_gtod_copy().
4199 kvm_gen_update_masterclock(kvm
);
4200 now_ns
= get_kvmclock_ns(kvm
);
4201 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4202 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4205 case KVM_GET_CLOCK
: {
4206 struct kvm_clock_data user_ns
;
4209 now_ns
= get_kvmclock_ns(kvm
);
4210 user_ns
.clock
= now_ns
;
4211 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4212 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4215 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4220 case KVM_ENABLE_CAP
: {
4221 struct kvm_enable_cap cap
;
4224 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4226 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4236 static void kvm_init_msr_list(void)
4241 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4242 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4246 * Even MSRs that are valid in the host may not be exposed
4247 * to the guests in some cases.
4249 switch (msrs_to_save
[i
]) {
4250 case MSR_IA32_BNDCFGS
:
4251 if (!kvm_x86_ops
->mpx_supported())
4255 if (!kvm_x86_ops
->rdtscp_supported())
4263 msrs_to_save
[j
] = msrs_to_save
[i
];
4266 num_msrs_to_save
= j
;
4268 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4269 switch (emulated_msrs
[i
]) {
4270 case MSR_IA32_SMBASE
:
4271 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4279 emulated_msrs
[j
] = emulated_msrs
[i
];
4282 num_emulated_msrs
= j
;
4285 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4293 if (!(lapic_in_kernel(vcpu
) &&
4294 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4295 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4306 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4313 if (!(lapic_in_kernel(vcpu
) &&
4314 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4316 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4318 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4328 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4329 struct kvm_segment
*var
, int seg
)
4331 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4334 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4335 struct kvm_segment
*var
, int seg
)
4337 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4340 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4341 struct x86_exception
*exception
)
4345 BUG_ON(!mmu_is_nested(vcpu
));
4347 /* NPT walks are always user-walks */
4348 access
|= PFERR_USER_MASK
;
4349 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4354 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4355 struct x86_exception
*exception
)
4357 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4358 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4361 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4362 struct x86_exception
*exception
)
4364 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4365 access
|= PFERR_FETCH_MASK
;
4366 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4369 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4370 struct x86_exception
*exception
)
4372 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4373 access
|= PFERR_WRITE_MASK
;
4374 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4377 /* uses this to access any guest's mapped memory without checking CPL */
4378 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4379 struct x86_exception
*exception
)
4381 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4384 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4385 struct kvm_vcpu
*vcpu
, u32 access
,
4386 struct x86_exception
*exception
)
4389 int r
= X86EMUL_CONTINUE
;
4392 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4394 unsigned offset
= addr
& (PAGE_SIZE
-1);
4395 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4398 if (gpa
== UNMAPPED_GVA
)
4399 return X86EMUL_PROPAGATE_FAULT
;
4400 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4403 r
= X86EMUL_IO_NEEDED
;
4415 /* used for instruction fetching */
4416 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4417 gva_t addr
, void *val
, unsigned int bytes
,
4418 struct x86_exception
*exception
)
4420 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4421 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4425 /* Inline kvm_read_guest_virt_helper for speed. */
4426 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4428 if (unlikely(gpa
== UNMAPPED_GVA
))
4429 return X86EMUL_PROPAGATE_FAULT
;
4431 offset
= addr
& (PAGE_SIZE
-1);
4432 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4433 bytes
= (unsigned)PAGE_SIZE
- offset
;
4434 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4436 if (unlikely(ret
< 0))
4437 return X86EMUL_IO_NEEDED
;
4439 return X86EMUL_CONTINUE
;
4442 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4443 gva_t addr
, void *val
, unsigned int bytes
,
4444 struct x86_exception
*exception
)
4446 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4447 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4449 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4452 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4454 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4455 gva_t addr
, void *val
, unsigned int bytes
,
4456 struct x86_exception
*exception
)
4458 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4459 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4462 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4463 unsigned long addr
, void *val
, unsigned int bytes
)
4465 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4466 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4468 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4471 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4472 gva_t addr
, void *val
,
4474 struct x86_exception
*exception
)
4476 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4478 int r
= X86EMUL_CONTINUE
;
4481 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4484 unsigned offset
= addr
& (PAGE_SIZE
-1);
4485 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4488 if (gpa
== UNMAPPED_GVA
)
4489 return X86EMUL_PROPAGATE_FAULT
;
4490 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4492 r
= X86EMUL_IO_NEEDED
;
4503 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4505 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4506 gpa_t gpa
, bool write
)
4508 /* For APIC access vmexit */
4509 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4512 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4513 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4520 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4521 gpa_t
*gpa
, struct x86_exception
*exception
,
4524 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4525 | (write
? PFERR_WRITE_MASK
: 0);
4528 * currently PKRU is only applied to ept enabled guest so
4529 * there is no pkey in EPT page table for L1 guest or EPT
4530 * shadow page table for L2 guest.
4532 if (vcpu_match_mmio_gva(vcpu
, gva
)
4533 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4534 vcpu
->arch
.access
, 0, access
)) {
4535 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4536 (gva
& (PAGE_SIZE
- 1));
4537 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4541 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4543 if (*gpa
== UNMAPPED_GVA
)
4546 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4549 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4550 const void *val
, int bytes
)
4554 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4557 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4561 struct read_write_emulator_ops
{
4562 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4564 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4565 void *val
, int bytes
);
4566 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4567 int bytes
, void *val
);
4568 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4569 void *val
, int bytes
);
4573 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4575 if (vcpu
->mmio_read_completed
) {
4576 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4577 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4578 vcpu
->mmio_read_completed
= 0;
4585 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4586 void *val
, int bytes
)
4588 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4591 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4592 void *val
, int bytes
)
4594 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4597 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4599 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4600 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4603 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4604 void *val
, int bytes
)
4606 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4607 return X86EMUL_IO_NEEDED
;
4610 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4611 void *val
, int bytes
)
4613 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4615 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4616 return X86EMUL_CONTINUE
;
4619 static const struct read_write_emulator_ops read_emultor
= {
4620 .read_write_prepare
= read_prepare
,
4621 .read_write_emulate
= read_emulate
,
4622 .read_write_mmio
= vcpu_mmio_read
,
4623 .read_write_exit_mmio
= read_exit_mmio
,
4626 static const struct read_write_emulator_ops write_emultor
= {
4627 .read_write_emulate
= write_emulate
,
4628 .read_write_mmio
= write_mmio
,
4629 .read_write_exit_mmio
= write_exit_mmio
,
4633 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4635 struct x86_exception
*exception
,
4636 struct kvm_vcpu
*vcpu
,
4637 const struct read_write_emulator_ops
*ops
)
4641 bool write
= ops
->write
;
4642 struct kvm_mmio_fragment
*frag
;
4643 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4646 * If the exit was due to a NPF we may already have a GPA.
4647 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4648 * Note, this cannot be used on string operations since string
4649 * operation using rep will only have the initial GPA from the NPF
4652 if (vcpu
->arch
.gpa_available
&&
4653 emulator_can_use_gpa(ctxt
) &&
4654 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4655 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4656 gpa
= exception
->address
;
4660 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4663 return X86EMUL_PROPAGATE_FAULT
;
4665 /* For APIC access vmexit */
4669 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4670 return X86EMUL_CONTINUE
;
4674 * Is this MMIO handled locally?
4676 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4677 if (handled
== bytes
)
4678 return X86EMUL_CONTINUE
;
4684 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4685 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4689 return X86EMUL_CONTINUE
;
4692 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4694 void *val
, unsigned int bytes
,
4695 struct x86_exception
*exception
,
4696 const struct read_write_emulator_ops
*ops
)
4698 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4702 if (ops
->read_write_prepare
&&
4703 ops
->read_write_prepare(vcpu
, val
, bytes
))
4704 return X86EMUL_CONTINUE
;
4706 vcpu
->mmio_nr_fragments
= 0;
4708 /* Crossing a page boundary? */
4709 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4712 now
= -addr
& ~PAGE_MASK
;
4713 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4716 if (rc
!= X86EMUL_CONTINUE
)
4719 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4725 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4727 if (rc
!= X86EMUL_CONTINUE
)
4730 if (!vcpu
->mmio_nr_fragments
)
4733 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4735 vcpu
->mmio_needed
= 1;
4736 vcpu
->mmio_cur_fragment
= 0;
4738 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4739 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4740 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4741 vcpu
->run
->mmio
.phys_addr
= gpa
;
4743 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4746 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4750 struct x86_exception
*exception
)
4752 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4753 exception
, &read_emultor
);
4756 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4760 struct x86_exception
*exception
)
4762 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4763 exception
, &write_emultor
);
4766 #define CMPXCHG_TYPE(t, ptr, old, new) \
4767 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4769 #ifdef CONFIG_X86_64
4770 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4772 # define CMPXCHG64(ptr, old, new) \
4773 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4776 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4781 struct x86_exception
*exception
)
4783 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4789 /* guests cmpxchg8b have to be emulated atomically */
4790 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4793 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4795 if (gpa
== UNMAPPED_GVA
||
4796 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4799 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4802 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4803 if (is_error_page(page
))
4806 kaddr
= kmap_atomic(page
);
4807 kaddr
+= offset_in_page(gpa
);
4810 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4813 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4816 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4819 exchanged
= CMPXCHG64(kaddr
, old
, new);
4824 kunmap_atomic(kaddr
);
4825 kvm_release_page_dirty(page
);
4828 return X86EMUL_CMPXCHG_FAILED
;
4830 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4831 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4833 return X86EMUL_CONTINUE
;
4836 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4838 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4841 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4845 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4846 if (vcpu
->arch
.pio
.in
)
4847 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4848 vcpu
->arch
.pio
.size
, pd
);
4850 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4851 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4855 pd
+= vcpu
->arch
.pio
.size
;
4860 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4861 unsigned short port
, void *val
,
4862 unsigned int count
, bool in
)
4864 vcpu
->arch
.pio
.port
= port
;
4865 vcpu
->arch
.pio
.in
= in
;
4866 vcpu
->arch
.pio
.count
= count
;
4867 vcpu
->arch
.pio
.size
= size
;
4869 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4870 vcpu
->arch
.pio
.count
= 0;
4874 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4875 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4876 vcpu
->run
->io
.size
= size
;
4877 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4878 vcpu
->run
->io
.count
= count
;
4879 vcpu
->run
->io
.port
= port
;
4884 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4885 int size
, unsigned short port
, void *val
,
4888 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4891 if (vcpu
->arch
.pio
.count
)
4894 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4896 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4899 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4900 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4901 vcpu
->arch
.pio
.count
= 0;
4908 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4909 int size
, unsigned short port
,
4910 const void *val
, unsigned int count
)
4912 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4914 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4915 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4916 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4919 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4921 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4924 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4926 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4929 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4931 if (!need_emulate_wbinvd(vcpu
))
4932 return X86EMUL_CONTINUE
;
4934 if (kvm_x86_ops
->has_wbinvd_exit()) {
4935 int cpu
= get_cpu();
4937 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4938 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4939 wbinvd_ipi
, NULL
, 1);
4941 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4944 return X86EMUL_CONTINUE
;
4947 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4949 kvm_emulate_wbinvd_noskip(vcpu
);
4950 return kvm_skip_emulated_instruction(vcpu
);
4952 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4956 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4958 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4961 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4962 unsigned long *dest
)
4964 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4967 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4968 unsigned long value
)
4971 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4974 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4976 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4979 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4981 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4982 unsigned long value
;
4986 value
= kvm_read_cr0(vcpu
);
4989 value
= vcpu
->arch
.cr2
;
4992 value
= kvm_read_cr3(vcpu
);
4995 value
= kvm_read_cr4(vcpu
);
4998 value
= kvm_get_cr8(vcpu
);
5001 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5008 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5010 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5015 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5018 vcpu
->arch
.cr2
= val
;
5021 res
= kvm_set_cr3(vcpu
, val
);
5024 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5027 res
= kvm_set_cr8(vcpu
, val
);
5030 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5037 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5039 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5042 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5044 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5047 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5049 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5052 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5054 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5057 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5059 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5062 static unsigned long emulator_get_cached_segment_base(
5063 struct x86_emulate_ctxt
*ctxt
, int seg
)
5065 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5068 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5069 struct desc_struct
*desc
, u32
*base3
,
5072 struct kvm_segment var
;
5074 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5075 *selector
= var
.selector
;
5078 memset(desc
, 0, sizeof(*desc
));
5086 set_desc_limit(desc
, var
.limit
);
5087 set_desc_base(desc
, (unsigned long)var
.base
);
5088 #ifdef CONFIG_X86_64
5090 *base3
= var
.base
>> 32;
5092 desc
->type
= var
.type
;
5094 desc
->dpl
= var
.dpl
;
5095 desc
->p
= var
.present
;
5096 desc
->avl
= var
.avl
;
5104 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5105 struct desc_struct
*desc
, u32 base3
,
5108 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5109 struct kvm_segment var
;
5111 var
.selector
= selector
;
5112 var
.base
= get_desc_base(desc
);
5113 #ifdef CONFIG_X86_64
5114 var
.base
|= ((u64
)base3
) << 32;
5116 var
.limit
= get_desc_limit(desc
);
5118 var
.limit
= (var
.limit
<< 12) | 0xfff;
5119 var
.type
= desc
->type
;
5120 var
.dpl
= desc
->dpl
;
5125 var
.avl
= desc
->avl
;
5126 var
.present
= desc
->p
;
5127 var
.unusable
= !var
.present
;
5130 kvm_set_segment(vcpu
, &var
, seg
);
5134 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5135 u32 msr_index
, u64
*pdata
)
5137 struct msr_data msr
;
5140 msr
.index
= msr_index
;
5141 msr
.host_initiated
= false;
5142 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5150 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5151 u32 msr_index
, u64 data
)
5153 struct msr_data msr
;
5156 msr
.index
= msr_index
;
5157 msr
.host_initiated
= false;
5158 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5161 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5163 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5165 return vcpu
->arch
.smbase
;
5168 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5170 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5172 vcpu
->arch
.smbase
= smbase
;
5175 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5178 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5181 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5182 u32 pmc
, u64
*pdata
)
5184 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5187 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5189 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5192 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5195 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5198 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5203 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5204 struct x86_instruction_info
*info
,
5205 enum x86_intercept_stage stage
)
5207 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5210 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5211 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5213 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5216 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5218 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5221 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5223 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5226 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5228 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5231 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5233 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5236 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5238 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5241 static const struct x86_emulate_ops emulate_ops
= {
5242 .read_gpr
= emulator_read_gpr
,
5243 .write_gpr
= emulator_write_gpr
,
5244 .read_std
= kvm_read_guest_virt_system
,
5245 .write_std
= kvm_write_guest_virt_system
,
5246 .read_phys
= kvm_read_guest_phys_system
,
5247 .fetch
= kvm_fetch_guest_virt
,
5248 .read_emulated
= emulator_read_emulated
,
5249 .write_emulated
= emulator_write_emulated
,
5250 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5251 .invlpg
= emulator_invlpg
,
5252 .pio_in_emulated
= emulator_pio_in_emulated
,
5253 .pio_out_emulated
= emulator_pio_out_emulated
,
5254 .get_segment
= emulator_get_segment
,
5255 .set_segment
= emulator_set_segment
,
5256 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5257 .get_gdt
= emulator_get_gdt
,
5258 .get_idt
= emulator_get_idt
,
5259 .set_gdt
= emulator_set_gdt
,
5260 .set_idt
= emulator_set_idt
,
5261 .get_cr
= emulator_get_cr
,
5262 .set_cr
= emulator_set_cr
,
5263 .cpl
= emulator_get_cpl
,
5264 .get_dr
= emulator_get_dr
,
5265 .set_dr
= emulator_set_dr
,
5266 .get_smbase
= emulator_get_smbase
,
5267 .set_smbase
= emulator_set_smbase
,
5268 .set_msr
= emulator_set_msr
,
5269 .get_msr
= emulator_get_msr
,
5270 .check_pmc
= emulator_check_pmc
,
5271 .read_pmc
= emulator_read_pmc
,
5272 .halt
= emulator_halt
,
5273 .wbinvd
= emulator_wbinvd
,
5274 .fix_hypercall
= emulator_fix_hypercall
,
5275 .get_fpu
= emulator_get_fpu
,
5276 .put_fpu
= emulator_put_fpu
,
5277 .intercept
= emulator_intercept
,
5278 .get_cpuid
= emulator_get_cpuid
,
5279 .set_nmi_mask
= emulator_set_nmi_mask
,
5280 .get_hflags
= emulator_get_hflags
,
5281 .set_hflags
= emulator_set_hflags
,
5284 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5286 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5288 * an sti; sti; sequence only disable interrupts for the first
5289 * instruction. So, if the last instruction, be it emulated or
5290 * not, left the system with the INT_STI flag enabled, it
5291 * means that the last instruction is an sti. We should not
5292 * leave the flag on in this case. The same goes for mov ss
5294 if (int_shadow
& mask
)
5296 if (unlikely(int_shadow
|| mask
)) {
5297 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5299 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5303 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5305 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5306 if (ctxt
->exception
.vector
== PF_VECTOR
)
5307 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5309 if (ctxt
->exception
.error_code_valid
)
5310 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5311 ctxt
->exception
.error_code
);
5313 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5317 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5319 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5322 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5324 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5325 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5327 ctxt
->eip
= kvm_rip_read(vcpu
);
5328 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5329 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5330 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5331 cs_db
? X86EMUL_MODE_PROT32
:
5332 X86EMUL_MODE_PROT16
;
5333 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5334 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5335 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5337 init_decode_cache(ctxt
);
5338 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5341 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5343 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5346 init_emulate_ctxt(vcpu
);
5350 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5351 ret
= emulate_int_real(ctxt
, irq
);
5353 if (ret
!= X86EMUL_CONTINUE
)
5354 return EMULATE_FAIL
;
5356 ctxt
->eip
= ctxt
->_eip
;
5357 kvm_rip_write(vcpu
, ctxt
->eip
);
5358 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5360 if (irq
== NMI_VECTOR
)
5361 vcpu
->arch
.nmi_pending
= 0;
5363 vcpu
->arch
.interrupt
.pending
= false;
5365 return EMULATE_DONE
;
5367 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5369 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5371 int r
= EMULATE_DONE
;
5373 ++vcpu
->stat
.insn_emulation_fail
;
5374 trace_kvm_emulate_insn_failed(vcpu
);
5375 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5376 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5377 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5378 vcpu
->run
->internal
.ndata
= 0;
5381 kvm_queue_exception(vcpu
, UD_VECTOR
);
5386 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5387 bool write_fault_to_shadow_pgtable
,
5393 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5396 if (!vcpu
->arch
.mmu
.direct_map
) {
5398 * Write permission should be allowed since only
5399 * write access need to be emulated.
5401 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5404 * If the mapping is invalid in guest, let cpu retry
5405 * it to generate fault.
5407 if (gpa
== UNMAPPED_GVA
)
5412 * Do not retry the unhandleable instruction if it faults on the
5413 * readonly host memory, otherwise it will goto a infinite loop:
5414 * retry instruction -> write #PF -> emulation fail -> retry
5415 * instruction -> ...
5417 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5420 * If the instruction failed on the error pfn, it can not be fixed,
5421 * report the error to userspace.
5423 if (is_error_noslot_pfn(pfn
))
5426 kvm_release_pfn_clean(pfn
);
5428 /* The instructions are well-emulated on direct mmu. */
5429 if (vcpu
->arch
.mmu
.direct_map
) {
5430 unsigned int indirect_shadow_pages
;
5432 spin_lock(&vcpu
->kvm
->mmu_lock
);
5433 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5434 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5436 if (indirect_shadow_pages
)
5437 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5443 * if emulation was due to access to shadowed page table
5444 * and it failed try to unshadow page and re-enter the
5445 * guest to let CPU execute the instruction.
5447 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5450 * If the access faults on its page table, it can not
5451 * be fixed by unprotecting shadow page and it should
5452 * be reported to userspace.
5454 return !write_fault_to_shadow_pgtable
;
5457 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5458 unsigned long cr2
, int emulation_type
)
5460 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5461 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5463 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5464 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5467 * If the emulation is caused by #PF and it is non-page_table
5468 * writing instruction, it means the VM-EXIT is caused by shadow
5469 * page protected, we can zap the shadow page and retry this
5470 * instruction directly.
5472 * Note: if the guest uses a non-page-table modifying instruction
5473 * on the PDE that points to the instruction, then we will unmap
5474 * the instruction and go to an infinite loop. So, we cache the
5475 * last retried eip and the last fault address, if we meet the eip
5476 * and the address again, we can break out of the potential infinite
5479 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5481 if (!(emulation_type
& EMULTYPE_RETRY
))
5484 if (x86_page_table_writing_insn(ctxt
))
5487 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5490 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5491 vcpu
->arch
.last_retry_addr
= cr2
;
5493 if (!vcpu
->arch
.mmu
.direct_map
)
5494 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5496 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5501 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5502 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5504 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5506 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5507 /* This is a good place to trace that we are exiting SMM. */
5508 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5510 /* Process a latched INIT or SMI, if any. */
5511 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5514 kvm_mmu_reset_context(vcpu
);
5517 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5519 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5521 vcpu
->arch
.hflags
= emul_flags
;
5523 if (changed
& HF_SMM_MASK
)
5524 kvm_smm_changed(vcpu
);
5527 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5536 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5537 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5542 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5544 struct kvm_run
*kvm_run
= vcpu
->run
;
5546 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5547 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5548 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5549 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5550 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5551 *r
= EMULATE_USER_EXIT
;
5554 * "Certain debug exceptions may clear bit 0-3. The
5555 * remaining contents of the DR6 register are never
5556 * cleared by the processor".
5558 vcpu
->arch
.dr6
&= ~15;
5559 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5560 kvm_queue_exception(vcpu
, DB_VECTOR
);
5564 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5566 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5567 int r
= EMULATE_DONE
;
5569 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5572 * rflags is the old, "raw" value of the flags. The new value has
5573 * not been saved yet.
5575 * This is correct even for TF set by the guest, because "the
5576 * processor will not generate this exception after the instruction
5577 * that sets the TF flag".
5579 if (unlikely(rflags
& X86_EFLAGS_TF
))
5580 kvm_vcpu_do_singlestep(vcpu
, &r
);
5581 return r
== EMULATE_DONE
;
5583 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5585 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5587 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5588 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5589 struct kvm_run
*kvm_run
= vcpu
->run
;
5590 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5591 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5592 vcpu
->arch
.guest_debug_dr7
,
5596 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5597 kvm_run
->debug
.arch
.pc
= eip
;
5598 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5599 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5600 *r
= EMULATE_USER_EXIT
;
5605 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5606 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5607 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5608 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5613 vcpu
->arch
.dr6
&= ~15;
5614 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5615 kvm_queue_exception(vcpu
, DB_VECTOR
);
5624 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5631 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5632 bool writeback
= true;
5633 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5636 * Clear write_fault_to_shadow_pgtable here to ensure it is
5639 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5640 kvm_clear_exception_queue(vcpu
);
5642 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5643 init_emulate_ctxt(vcpu
);
5646 * We will reenter on the same instruction since
5647 * we do not set complete_userspace_io. This does not
5648 * handle watchpoints yet, those would be handled in
5651 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5654 ctxt
->interruptibility
= 0;
5655 ctxt
->have_exception
= false;
5656 ctxt
->exception
.vector
= -1;
5657 ctxt
->perm_ok
= false;
5659 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5661 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5663 trace_kvm_emulate_insn_start(vcpu
);
5664 ++vcpu
->stat
.insn_emulation
;
5665 if (r
!= EMULATION_OK
) {
5666 if (emulation_type
& EMULTYPE_TRAP_UD
)
5667 return EMULATE_FAIL
;
5668 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5670 return EMULATE_DONE
;
5671 if (emulation_type
& EMULTYPE_SKIP
)
5672 return EMULATE_FAIL
;
5673 return handle_emulation_failure(vcpu
);
5677 if (emulation_type
& EMULTYPE_SKIP
) {
5678 kvm_rip_write(vcpu
, ctxt
->_eip
);
5679 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5680 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5681 return EMULATE_DONE
;
5684 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5685 return EMULATE_DONE
;
5687 /* this is needed for vmware backdoor interface to work since it
5688 changes registers values during IO operation */
5689 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5690 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5691 emulator_invalidate_register_cache(ctxt
);
5695 /* Save the faulting GPA (cr2) in the address field */
5696 ctxt
->exception
.address
= cr2
;
5698 r
= x86_emulate_insn(ctxt
);
5700 if (r
== EMULATION_INTERCEPTED
)
5701 return EMULATE_DONE
;
5703 if (r
== EMULATION_FAILED
) {
5704 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5706 return EMULATE_DONE
;
5708 return handle_emulation_failure(vcpu
);
5711 if (ctxt
->have_exception
) {
5713 if (inject_emulated_exception(vcpu
))
5715 } else if (vcpu
->arch
.pio
.count
) {
5716 if (!vcpu
->arch
.pio
.in
) {
5717 /* FIXME: return into emulator if single-stepping. */
5718 vcpu
->arch
.pio
.count
= 0;
5721 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5723 r
= EMULATE_USER_EXIT
;
5724 } else if (vcpu
->mmio_needed
) {
5725 if (!vcpu
->mmio_is_write
)
5727 r
= EMULATE_USER_EXIT
;
5728 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5729 } else if (r
== EMULATION_RESTART
)
5735 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5736 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5737 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5738 kvm_rip_write(vcpu
, ctxt
->eip
);
5739 if (r
== EMULATE_DONE
&&
5740 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5741 kvm_vcpu_do_singlestep(vcpu
, &r
);
5742 if (!ctxt
->have_exception
||
5743 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5744 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5747 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5748 * do nothing, and it will be requested again as soon as
5749 * the shadow expires. But we still need to check here,
5750 * because POPF has no interrupt shadow.
5752 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5753 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5755 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5759 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5761 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5763 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5764 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5765 size
, port
, &val
, 1);
5766 /* do not return to emulator after return from userspace */
5767 vcpu
->arch
.pio
.count
= 0;
5770 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5772 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5776 /* We should only ever be called with arch.pio.count equal to 1 */
5777 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5779 /* For size less than 4 we merge, else we zero extend */
5780 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5784 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5785 * the copy and tracing
5787 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5788 vcpu
->arch
.pio
.port
, &val
, 1);
5789 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5794 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5799 /* For size less than 4 we merge, else we zero extend */
5800 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5802 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5805 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5809 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5813 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5815 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5817 __this_cpu_write(cpu_tsc_khz
, 0);
5821 static void tsc_khz_changed(void *data
)
5823 struct cpufreq_freqs
*freq
= data
;
5824 unsigned long khz
= 0;
5828 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5829 khz
= cpufreq_quick_get(raw_smp_processor_id());
5832 __this_cpu_write(cpu_tsc_khz
, khz
);
5835 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5838 struct cpufreq_freqs
*freq
= data
;
5840 struct kvm_vcpu
*vcpu
;
5841 int i
, send_ipi
= 0;
5844 * We allow guests to temporarily run on slowing clocks,
5845 * provided we notify them after, or to run on accelerating
5846 * clocks, provided we notify them before. Thus time never
5849 * However, we have a problem. We can't atomically update
5850 * the frequency of a given CPU from this function; it is
5851 * merely a notifier, which can be called from any CPU.
5852 * Changing the TSC frequency at arbitrary points in time
5853 * requires a recomputation of local variables related to
5854 * the TSC for each VCPU. We must flag these local variables
5855 * to be updated and be sure the update takes place with the
5856 * new frequency before any guests proceed.
5858 * Unfortunately, the combination of hotplug CPU and frequency
5859 * change creates an intractable locking scenario; the order
5860 * of when these callouts happen is undefined with respect to
5861 * CPU hotplug, and they can race with each other. As such,
5862 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5863 * undefined; you can actually have a CPU frequency change take
5864 * place in between the computation of X and the setting of the
5865 * variable. To protect against this problem, all updates of
5866 * the per_cpu tsc_khz variable are done in an interrupt
5867 * protected IPI, and all callers wishing to update the value
5868 * must wait for a synchronous IPI to complete (which is trivial
5869 * if the caller is on the CPU already). This establishes the
5870 * necessary total order on variable updates.
5872 * Note that because a guest time update may take place
5873 * anytime after the setting of the VCPU's request bit, the
5874 * correct TSC value must be set before the request. However,
5875 * to ensure the update actually makes it to any guest which
5876 * starts running in hardware virtualization between the set
5877 * and the acquisition of the spinlock, we must also ping the
5878 * CPU after setting the request bit.
5882 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5884 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5887 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5889 spin_lock(&kvm_lock
);
5890 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5891 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5892 if (vcpu
->cpu
!= freq
->cpu
)
5894 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5895 if (vcpu
->cpu
!= smp_processor_id())
5899 spin_unlock(&kvm_lock
);
5901 if (freq
->old
< freq
->new && send_ipi
) {
5903 * We upscale the frequency. Must make the guest
5904 * doesn't see old kvmclock values while running with
5905 * the new frequency, otherwise we risk the guest sees
5906 * time go backwards.
5908 * In case we update the frequency for another cpu
5909 * (which might be in guest context) send an interrupt
5910 * to kick the cpu out of guest context. Next time
5911 * guest context is entered kvmclock will be updated,
5912 * so the guest will not see stale values.
5914 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5919 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5920 .notifier_call
= kvmclock_cpufreq_notifier
5923 static int kvmclock_cpu_online(unsigned int cpu
)
5925 tsc_khz_changed(NULL
);
5929 static void kvm_timer_init(void)
5931 max_tsc_khz
= tsc_khz
;
5933 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5934 #ifdef CONFIG_CPU_FREQ
5935 struct cpufreq_policy policy
;
5938 memset(&policy
, 0, sizeof(policy
));
5940 cpufreq_get_policy(&policy
, cpu
);
5941 if (policy
.cpuinfo
.max_freq
)
5942 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5945 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5946 CPUFREQ_TRANSITION_NOTIFIER
);
5948 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5950 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5951 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5954 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5956 int kvm_is_in_guest(void)
5958 return __this_cpu_read(current_vcpu
) != NULL
;
5961 static int kvm_is_user_mode(void)
5965 if (__this_cpu_read(current_vcpu
))
5966 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5968 return user_mode
!= 0;
5971 static unsigned long kvm_get_guest_ip(void)
5973 unsigned long ip
= 0;
5975 if (__this_cpu_read(current_vcpu
))
5976 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5981 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5982 .is_in_guest
= kvm_is_in_guest
,
5983 .is_user_mode
= kvm_is_user_mode
,
5984 .get_guest_ip
= kvm_get_guest_ip
,
5987 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5989 __this_cpu_write(current_vcpu
, vcpu
);
5991 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5993 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5995 __this_cpu_write(current_vcpu
, NULL
);
5997 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5999 static void kvm_set_mmio_spte_mask(void)
6002 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6005 * Set the reserved bits and the present bit of an paging-structure
6006 * entry to generate page fault with PFER.RSV = 1.
6008 /* Mask the reserved physical address bits. */
6009 mask
= rsvd_bits(maxphyaddr
, 51);
6011 /* Set the present bit. */
6014 #ifdef CONFIG_X86_64
6016 * If reserved bit is not supported, clear the present bit to disable
6019 if (maxphyaddr
== 52)
6023 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6026 #ifdef CONFIG_X86_64
6027 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6031 struct kvm_vcpu
*vcpu
;
6034 spin_lock(&kvm_lock
);
6035 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6036 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6037 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6038 atomic_set(&kvm_guest_has_master_clock
, 0);
6039 spin_unlock(&kvm_lock
);
6042 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6045 * Notification about pvclock gtod data update.
6047 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6050 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6051 struct timekeeper
*tk
= priv
;
6053 update_pvclock_gtod(tk
);
6055 /* disable master clock if host does not trust, or does not
6056 * use, TSC clocksource
6058 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6059 atomic_read(&kvm_guest_has_master_clock
) != 0)
6060 queue_work(system_long_wq
, &pvclock_gtod_work
);
6065 static struct notifier_block pvclock_gtod_notifier
= {
6066 .notifier_call
= pvclock_gtod_notify
,
6070 int kvm_arch_init(void *opaque
)
6073 struct kvm_x86_ops
*ops
= opaque
;
6076 printk(KERN_ERR
"kvm: already loaded the other module\n");
6081 if (!ops
->cpu_has_kvm_support()) {
6082 printk(KERN_ERR
"kvm: no hardware support\n");
6086 if (ops
->disabled_by_bios()) {
6087 printk(KERN_ERR
"kvm: disabled by bios\n");
6093 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6095 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6099 r
= kvm_mmu_module_init();
6101 goto out_free_percpu
;
6103 kvm_set_mmio_spte_mask();
6107 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6108 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6109 PT_PRESENT_MASK
, 0);
6112 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6114 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6115 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6118 #ifdef CONFIG_X86_64
6119 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6125 free_percpu(shared_msrs
);
6130 void kvm_arch_exit(void)
6133 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6135 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6136 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6137 CPUFREQ_TRANSITION_NOTIFIER
);
6138 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6139 #ifdef CONFIG_X86_64
6140 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6143 kvm_mmu_module_exit();
6144 free_percpu(shared_msrs
);
6147 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6149 ++vcpu
->stat
.halt_exits
;
6150 if (lapic_in_kernel(vcpu
)) {
6151 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6154 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6158 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6160 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6162 int ret
= kvm_skip_emulated_instruction(vcpu
);
6164 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6165 * KVM_EXIT_DEBUG here.
6167 return kvm_vcpu_halt(vcpu
) && ret
;
6169 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6171 #ifdef CONFIG_X86_64
6172 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6173 unsigned long clock_type
)
6175 struct kvm_clock_pairing clock_pairing
;
6180 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6181 return -KVM_EOPNOTSUPP
;
6183 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6184 return -KVM_EOPNOTSUPP
;
6186 clock_pairing
.sec
= ts
.tv_sec
;
6187 clock_pairing
.nsec
= ts
.tv_nsec
;
6188 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6189 clock_pairing
.flags
= 0;
6192 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6193 sizeof(struct kvm_clock_pairing
)))
6201 * kvm_pv_kick_cpu_op: Kick a vcpu.
6203 * @apicid - apicid of vcpu to be kicked.
6205 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6207 struct kvm_lapic_irq lapic_irq
;
6209 lapic_irq
.shorthand
= 0;
6210 lapic_irq
.dest_mode
= 0;
6211 lapic_irq
.dest_id
= apicid
;
6212 lapic_irq
.msi_redir_hint
= false;
6214 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6215 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6218 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6220 vcpu
->arch
.apicv_active
= false;
6221 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6224 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6226 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6229 r
= kvm_skip_emulated_instruction(vcpu
);
6231 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6232 return kvm_hv_hypercall(vcpu
);
6234 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6235 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6236 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6237 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6238 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6240 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6242 op_64_bit
= is_64_bit_mode(vcpu
);
6251 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6257 case KVM_HC_VAPIC_POLL_IRQ
:
6260 case KVM_HC_KICK_CPU
:
6261 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6264 #ifdef CONFIG_X86_64
6265 case KVM_HC_CLOCK_PAIRING
:
6266 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6276 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6277 ++vcpu
->stat
.hypercalls
;
6280 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6282 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6284 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6285 char instruction
[3];
6286 unsigned long rip
= kvm_rip_read(vcpu
);
6288 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6290 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6294 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6296 return vcpu
->run
->request_interrupt_window
&&
6297 likely(!pic_in_kernel(vcpu
->kvm
));
6300 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6302 struct kvm_run
*kvm_run
= vcpu
->run
;
6304 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6305 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6306 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6307 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6308 kvm_run
->ready_for_interrupt_injection
=
6309 pic_in_kernel(vcpu
->kvm
) ||
6310 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6313 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6317 if (!kvm_x86_ops
->update_cr8_intercept
)
6320 if (!lapic_in_kernel(vcpu
))
6323 if (vcpu
->arch
.apicv_active
)
6326 if (!vcpu
->arch
.apic
->vapic_addr
)
6327 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6334 tpr
= kvm_lapic_get_cr8(vcpu
);
6336 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6339 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6343 /* try to reinject previous events if any */
6344 if (vcpu
->arch
.exception
.pending
) {
6345 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6346 vcpu
->arch
.exception
.has_error_code
,
6347 vcpu
->arch
.exception
.error_code
);
6349 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6350 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6353 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6354 (vcpu
->arch
.dr7
& DR7_GD
)) {
6355 vcpu
->arch
.dr7
&= ~DR7_GD
;
6356 kvm_update_dr7(vcpu
);
6359 kvm_x86_ops
->queue_exception(vcpu
);
6363 if (vcpu
->arch
.nmi_injected
) {
6364 kvm_x86_ops
->set_nmi(vcpu
);
6368 if (vcpu
->arch
.interrupt
.pending
) {
6369 kvm_x86_ops
->set_irq(vcpu
);
6373 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6374 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6379 /* try to inject new event if pending */
6380 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6381 vcpu
->arch
.smi_pending
= false;
6383 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6384 --vcpu
->arch
.nmi_pending
;
6385 vcpu
->arch
.nmi_injected
= true;
6386 kvm_x86_ops
->set_nmi(vcpu
);
6387 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6389 * Because interrupts can be injected asynchronously, we are
6390 * calling check_nested_events again here to avoid a race condition.
6391 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6392 * proposal and current concerns. Perhaps we should be setting
6393 * KVM_REQ_EVENT only on certain events and not unconditionally?
6395 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6396 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6400 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6401 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6403 kvm_x86_ops
->set_irq(vcpu
);
6410 static void process_nmi(struct kvm_vcpu
*vcpu
)
6415 * x86 is limited to one NMI running, and one NMI pending after it.
6416 * If an NMI is already in progress, limit further NMIs to just one.
6417 * Otherwise, allow two (and we'll inject the first one immediately).
6419 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6422 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6423 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6424 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6427 #define put_smstate(type, buf, offset, val) \
6428 *(type *)((buf) + (offset) - 0x7e00) = val
6430 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6433 flags
|= seg
->g
<< 23;
6434 flags
|= seg
->db
<< 22;
6435 flags
|= seg
->l
<< 21;
6436 flags
|= seg
->avl
<< 20;
6437 flags
|= seg
->present
<< 15;
6438 flags
|= seg
->dpl
<< 13;
6439 flags
|= seg
->s
<< 12;
6440 flags
|= seg
->type
<< 8;
6444 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6446 struct kvm_segment seg
;
6449 kvm_get_segment(vcpu
, &seg
, n
);
6450 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6453 offset
= 0x7f84 + n
* 12;
6455 offset
= 0x7f2c + (n
- 3) * 12;
6457 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6458 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6459 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6462 #ifdef CONFIG_X86_64
6463 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6465 struct kvm_segment seg
;
6469 kvm_get_segment(vcpu
, &seg
, n
);
6470 offset
= 0x7e00 + n
* 16;
6472 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6473 put_smstate(u16
, buf
, offset
, seg
.selector
);
6474 put_smstate(u16
, buf
, offset
+ 2, flags
);
6475 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6476 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6480 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6483 struct kvm_segment seg
;
6487 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6488 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6489 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6490 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6492 for (i
= 0; i
< 8; i
++)
6493 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6495 kvm_get_dr(vcpu
, 6, &val
);
6496 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6497 kvm_get_dr(vcpu
, 7, &val
);
6498 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6500 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6501 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6502 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6503 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6504 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6506 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6507 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6508 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6509 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6510 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6512 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6513 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6514 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6516 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6517 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6518 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6520 for (i
= 0; i
< 6; i
++)
6521 enter_smm_save_seg_32(vcpu
, buf
, i
);
6523 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6526 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6527 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6530 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6532 #ifdef CONFIG_X86_64
6534 struct kvm_segment seg
;
6538 for (i
= 0; i
< 16; i
++)
6539 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6541 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6542 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6544 kvm_get_dr(vcpu
, 6, &val
);
6545 put_smstate(u64
, buf
, 0x7f68, val
);
6546 kvm_get_dr(vcpu
, 7, &val
);
6547 put_smstate(u64
, buf
, 0x7f60, val
);
6549 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6550 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6551 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6553 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6556 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6558 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6560 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6561 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6562 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6563 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6564 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6566 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6567 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6568 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6570 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6571 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6572 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6573 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6574 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6576 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6577 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6578 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6580 for (i
= 0; i
< 6; i
++)
6581 enter_smm_save_seg_64(vcpu
, buf
, i
);
6587 static void enter_smm(struct kvm_vcpu
*vcpu
)
6589 struct kvm_segment cs
, ds
;
6594 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6595 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6596 memset(buf
, 0, 512);
6597 if (guest_cpuid_has_longmode(vcpu
))
6598 enter_smm_save_state_64(vcpu
, buf
);
6600 enter_smm_save_state_32(vcpu
, buf
);
6602 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6604 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6605 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6607 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6609 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6610 kvm_rip_write(vcpu
, 0x8000);
6612 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6613 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6614 vcpu
->arch
.cr0
= cr0
;
6616 kvm_x86_ops
->set_cr4(vcpu
, 0);
6618 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6619 dt
.address
= dt
.size
= 0;
6620 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6622 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6624 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6625 cs
.base
= vcpu
->arch
.smbase
;
6630 cs
.limit
= ds
.limit
= 0xffffffff;
6631 cs
.type
= ds
.type
= 0x3;
6632 cs
.dpl
= ds
.dpl
= 0;
6637 cs
.avl
= ds
.avl
= 0;
6638 cs
.present
= ds
.present
= 1;
6639 cs
.unusable
= ds
.unusable
= 0;
6640 cs
.padding
= ds
.padding
= 0;
6642 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6643 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6644 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6645 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6646 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6647 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6649 if (guest_cpuid_has_longmode(vcpu
))
6650 kvm_x86_ops
->set_efer(vcpu
, 0);
6652 kvm_update_cpuid(vcpu
);
6653 kvm_mmu_reset_context(vcpu
);
6656 static void process_smi(struct kvm_vcpu
*vcpu
)
6658 vcpu
->arch
.smi_pending
= true;
6659 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6662 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6664 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6667 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6669 u64 eoi_exit_bitmap
[4];
6671 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6674 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6676 if (irqchip_split(vcpu
->kvm
))
6677 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6679 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6680 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6681 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6683 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6684 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6685 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6688 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6690 ++vcpu
->stat
.tlb_flush
;
6691 kvm_x86_ops
->tlb_flush(vcpu
);
6694 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6696 struct page
*page
= NULL
;
6698 if (!lapic_in_kernel(vcpu
))
6701 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6704 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6705 if (is_error_page(page
))
6707 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6710 * Do not pin apic access page in memory, the MMU notifier
6711 * will call us again if it is migrated or swapped out.
6715 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6717 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6718 unsigned long address
)
6721 * The physical address of apic access page is stored in the VMCS.
6722 * Update it when it becomes invalid.
6724 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6725 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6729 * Returns 1 to let vcpu_run() continue the guest execution loop without
6730 * exiting to the userspace. Otherwise, the value will be returned to the
6733 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6737 dm_request_for_irq_injection(vcpu
) &&
6738 kvm_cpu_accept_dm_intr(vcpu
);
6740 bool req_immediate_exit
= false;
6742 if (kvm_request_pending(vcpu
)) {
6743 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6744 kvm_mmu_unload(vcpu
);
6745 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6746 __kvm_migrate_timers(vcpu
);
6747 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6748 kvm_gen_update_masterclock(vcpu
->kvm
);
6749 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6750 kvm_gen_kvmclock_update(vcpu
);
6751 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6752 r
= kvm_guest_time_update(vcpu
);
6756 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6757 kvm_mmu_sync_roots(vcpu
);
6758 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6759 kvm_vcpu_flush_tlb(vcpu
);
6760 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6761 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6765 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6766 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6770 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6771 /* Page is swapped out. Do synthetic halt */
6772 vcpu
->arch
.apf
.halted
= true;
6776 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6777 record_steal_time(vcpu
);
6778 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6780 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6782 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6783 kvm_pmu_handle_event(vcpu
);
6784 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6785 kvm_pmu_deliver_pmi(vcpu
);
6786 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6787 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6788 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6789 vcpu
->arch
.ioapic_handled_vectors
)) {
6790 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6791 vcpu
->run
->eoi
.vector
=
6792 vcpu
->arch
.pending_ioapic_eoi
;
6797 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6798 vcpu_scan_ioapic(vcpu
);
6799 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6800 kvm_vcpu_reload_apic_access_page(vcpu
);
6801 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6802 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6803 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6807 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6808 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6809 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6813 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6814 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6815 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6821 * KVM_REQ_HV_STIMER has to be processed after
6822 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6823 * depend on the guest clock being up-to-date
6825 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6826 kvm_hv_process_stimers(vcpu
);
6829 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6830 ++vcpu
->stat
.req_event
;
6831 kvm_apic_accept_events(vcpu
);
6832 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6837 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6838 req_immediate_exit
= true;
6840 /* Enable NMI/IRQ window open exits if needed.
6842 * SMIs have two cases: 1) they can be nested, and
6843 * then there is nothing to do here because RSM will
6844 * cause a vmexit anyway; 2) or the SMI can be pending
6845 * because inject_pending_event has completed the
6846 * injection of an IRQ or NMI from the previous vmexit,
6847 * and then we request an immediate exit to inject the SMI.
6849 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6850 req_immediate_exit
= true;
6851 if (vcpu
->arch
.nmi_pending
)
6852 kvm_x86_ops
->enable_nmi_window(vcpu
);
6853 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6854 kvm_x86_ops
->enable_irq_window(vcpu
);
6857 if (kvm_lapic_enabled(vcpu
)) {
6858 update_cr8_intercept(vcpu
);
6859 kvm_lapic_sync_to_vapic(vcpu
);
6863 r
= kvm_mmu_reload(vcpu
);
6865 goto cancel_injection
;
6870 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6871 kvm_load_guest_fpu(vcpu
);
6874 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6875 * IPI are then delayed after guest entry, which ensures that they
6876 * result in virtual interrupt delivery.
6878 local_irq_disable();
6879 vcpu
->mode
= IN_GUEST_MODE
;
6881 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6884 * 1) We should set ->mode before checking ->requests. Please see
6885 * the comment in kvm_vcpu_exiting_guest_mode().
6887 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6888 * pairs with the memory barrier implicit in pi_test_and_set_on
6889 * (see vmx_deliver_posted_interrupt).
6891 * 3) This also orders the write to mode from any reads to the page
6892 * tables done while the VCPU is running. Please see the comment
6893 * in kvm_flush_remote_tlbs.
6895 smp_mb__after_srcu_read_unlock();
6898 * This handles the case where a posted interrupt was
6899 * notified with kvm_vcpu_kick.
6901 if (kvm_lapic_enabled(vcpu
)) {
6902 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6903 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6906 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6907 || need_resched() || signal_pending(current
)) {
6908 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6912 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6914 goto cancel_injection
;
6917 kvm_load_guest_xcr0(vcpu
);
6919 if (req_immediate_exit
) {
6920 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6921 smp_send_reschedule(vcpu
->cpu
);
6924 trace_kvm_entry(vcpu
->vcpu_id
);
6925 wait_lapic_expire(vcpu
);
6926 guest_enter_irqoff();
6928 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6930 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6931 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6932 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6933 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6934 set_debugreg(vcpu
->arch
.dr6
, 6);
6935 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6938 kvm_x86_ops
->run(vcpu
);
6941 * Do this here before restoring debug registers on the host. And
6942 * since we do this before handling the vmexit, a DR access vmexit
6943 * can (a) read the correct value of the debug registers, (b) set
6944 * KVM_DEBUGREG_WONT_EXIT again.
6946 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6947 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6948 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6949 kvm_update_dr0123(vcpu
);
6950 kvm_update_dr6(vcpu
);
6951 kvm_update_dr7(vcpu
);
6952 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6956 * If the guest has used debug registers, at least dr7
6957 * will be disabled while returning to the host.
6958 * If we don't have active breakpoints in the host, we don't
6959 * care about the messed up debug address registers. But if
6960 * we have some of them active, restore the old state.
6962 if (hw_breakpoint_active())
6963 hw_breakpoint_restore();
6965 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6967 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6970 kvm_put_guest_xcr0(vcpu
);
6972 kvm_x86_ops
->handle_external_intr(vcpu
);
6976 guest_exit_irqoff();
6981 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6984 * Profile KVM exit RIPs:
6986 if (unlikely(prof_on
== KVM_PROFILING
)) {
6987 unsigned long rip
= kvm_rip_read(vcpu
);
6988 profile_hit(KVM_PROFILING
, (void *)rip
);
6991 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6992 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6994 if (vcpu
->arch
.apic_attention
)
6995 kvm_lapic_sync_from_vapic(vcpu
);
6997 r
= kvm_x86_ops
->handle_exit(vcpu
);
7001 kvm_x86_ops
->cancel_injection(vcpu
);
7002 if (unlikely(vcpu
->arch
.apic_attention
))
7003 kvm_lapic_sync_from_vapic(vcpu
);
7008 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7010 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7011 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7012 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7013 kvm_vcpu_block(vcpu
);
7014 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7016 if (kvm_x86_ops
->post_block
)
7017 kvm_x86_ops
->post_block(vcpu
);
7019 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7023 kvm_apic_accept_events(vcpu
);
7024 switch(vcpu
->arch
.mp_state
) {
7025 case KVM_MP_STATE_HALTED
:
7026 vcpu
->arch
.pv
.pv_unhalted
= false;
7027 vcpu
->arch
.mp_state
=
7028 KVM_MP_STATE_RUNNABLE
;
7029 case KVM_MP_STATE_RUNNABLE
:
7030 vcpu
->arch
.apf
.halted
= false;
7032 case KVM_MP_STATE_INIT_RECEIVED
:
7041 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7043 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7044 kvm_x86_ops
->check_nested_events(vcpu
, false);
7046 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7047 !vcpu
->arch
.apf
.halted
);
7050 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7053 struct kvm
*kvm
= vcpu
->kvm
;
7055 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7058 if (kvm_vcpu_running(vcpu
)) {
7059 r
= vcpu_enter_guest(vcpu
);
7061 r
= vcpu_block(kvm
, vcpu
);
7067 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7068 if (kvm_cpu_has_pending_timer(vcpu
))
7069 kvm_inject_pending_timer_irqs(vcpu
);
7071 if (dm_request_for_irq_injection(vcpu
) &&
7072 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7074 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7075 ++vcpu
->stat
.request_irq_exits
;
7079 kvm_check_async_pf_completion(vcpu
);
7081 if (signal_pending(current
)) {
7083 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7084 ++vcpu
->stat
.signal_exits
;
7087 if (need_resched()) {
7088 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7090 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7094 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7099 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7102 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7103 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7104 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7105 if (r
!= EMULATE_DONE
)
7110 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7112 BUG_ON(!vcpu
->arch
.pio
.count
);
7114 return complete_emulated_io(vcpu
);
7118 * Implements the following, as a state machine:
7122 * for each mmio piece in the fragment
7130 * for each mmio piece in the fragment
7135 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7137 struct kvm_run
*run
= vcpu
->run
;
7138 struct kvm_mmio_fragment
*frag
;
7141 BUG_ON(!vcpu
->mmio_needed
);
7143 /* Complete previous fragment */
7144 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7145 len
= min(8u, frag
->len
);
7146 if (!vcpu
->mmio_is_write
)
7147 memcpy(frag
->data
, run
->mmio
.data
, len
);
7149 if (frag
->len
<= 8) {
7150 /* Switch to the next fragment. */
7152 vcpu
->mmio_cur_fragment
++;
7154 /* Go forward to the next mmio piece. */
7160 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7161 vcpu
->mmio_needed
= 0;
7163 /* FIXME: return into emulator if single-stepping. */
7164 if (vcpu
->mmio_is_write
)
7166 vcpu
->mmio_read_completed
= 1;
7167 return complete_emulated_io(vcpu
);
7170 run
->exit_reason
= KVM_EXIT_MMIO
;
7171 run
->mmio
.phys_addr
= frag
->gpa
;
7172 if (vcpu
->mmio_is_write
)
7173 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7174 run
->mmio
.len
= min(8u, frag
->len
);
7175 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7176 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7181 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7183 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7187 fpu__activate_curr(fpu
);
7189 if (vcpu
->sigset_active
)
7190 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7192 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7193 kvm_vcpu_block(vcpu
);
7194 kvm_apic_accept_events(vcpu
);
7195 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7200 /* re-sync apic's tpr */
7201 if (!lapic_in_kernel(vcpu
)) {
7202 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7208 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7209 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7210 vcpu
->arch
.complete_userspace_io
= NULL
;
7215 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7217 if (kvm_run
->immediate_exit
)
7223 post_kvm_run_save(vcpu
);
7224 if (vcpu
->sigset_active
)
7225 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7230 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7232 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7234 * We are here if userspace calls get_regs() in the middle of
7235 * instruction emulation. Registers state needs to be copied
7236 * back from emulation context to vcpu. Userspace shouldn't do
7237 * that usually, but some bad designed PV devices (vmware
7238 * backdoor interface) need this to work
7240 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7241 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7243 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7244 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7245 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7246 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7247 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7248 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7249 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7250 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7251 #ifdef CONFIG_X86_64
7252 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7253 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7254 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7255 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7256 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7257 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7258 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7259 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7262 regs
->rip
= kvm_rip_read(vcpu
);
7263 regs
->rflags
= kvm_get_rflags(vcpu
);
7268 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7270 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7271 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7273 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7274 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7275 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7276 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7277 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7278 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7279 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7280 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7281 #ifdef CONFIG_X86_64
7282 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7283 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7284 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7285 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7286 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7287 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7288 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7289 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7292 kvm_rip_write(vcpu
, regs
->rip
);
7293 kvm_set_rflags(vcpu
, regs
->rflags
);
7295 vcpu
->arch
.exception
.pending
= false;
7297 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7302 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7304 struct kvm_segment cs
;
7306 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7310 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7312 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7313 struct kvm_sregs
*sregs
)
7317 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7318 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7319 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7320 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7321 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7322 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7324 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7325 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7327 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7328 sregs
->idt
.limit
= dt
.size
;
7329 sregs
->idt
.base
= dt
.address
;
7330 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7331 sregs
->gdt
.limit
= dt
.size
;
7332 sregs
->gdt
.base
= dt
.address
;
7334 sregs
->cr0
= kvm_read_cr0(vcpu
);
7335 sregs
->cr2
= vcpu
->arch
.cr2
;
7336 sregs
->cr3
= kvm_read_cr3(vcpu
);
7337 sregs
->cr4
= kvm_read_cr4(vcpu
);
7338 sregs
->cr8
= kvm_get_cr8(vcpu
);
7339 sregs
->efer
= vcpu
->arch
.efer
;
7340 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7342 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7344 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7345 set_bit(vcpu
->arch
.interrupt
.nr
,
7346 (unsigned long *)sregs
->interrupt_bitmap
);
7351 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7352 struct kvm_mp_state
*mp_state
)
7354 kvm_apic_accept_events(vcpu
);
7355 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7356 vcpu
->arch
.pv
.pv_unhalted
)
7357 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7359 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7364 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7365 struct kvm_mp_state
*mp_state
)
7367 if (!lapic_in_kernel(vcpu
) &&
7368 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7371 /* INITs are latched while in SMM */
7372 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7373 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7374 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7377 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7378 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7379 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7381 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7382 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7386 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7387 int reason
, bool has_error_code
, u32 error_code
)
7389 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7392 init_emulate_ctxt(vcpu
);
7394 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7395 has_error_code
, error_code
);
7398 return EMULATE_FAIL
;
7400 kvm_rip_write(vcpu
, ctxt
->eip
);
7401 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7402 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7403 return EMULATE_DONE
;
7405 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7407 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7408 struct kvm_sregs
*sregs
)
7410 struct msr_data apic_base_msr
;
7411 int mmu_reset_needed
= 0;
7412 int pending_vec
, max_bits
, idx
;
7415 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7418 dt
.size
= sregs
->idt
.limit
;
7419 dt
.address
= sregs
->idt
.base
;
7420 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7421 dt
.size
= sregs
->gdt
.limit
;
7422 dt
.address
= sregs
->gdt
.base
;
7423 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7425 vcpu
->arch
.cr2
= sregs
->cr2
;
7426 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7427 vcpu
->arch
.cr3
= sregs
->cr3
;
7428 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7430 kvm_set_cr8(vcpu
, sregs
->cr8
);
7432 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7433 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7434 apic_base_msr
.data
= sregs
->apic_base
;
7435 apic_base_msr
.host_initiated
= true;
7436 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7438 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7439 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7440 vcpu
->arch
.cr0
= sregs
->cr0
;
7442 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7443 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7444 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7445 kvm_update_cpuid(vcpu
);
7447 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7448 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7449 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7450 mmu_reset_needed
= 1;
7452 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7454 if (mmu_reset_needed
)
7455 kvm_mmu_reset_context(vcpu
);
7457 max_bits
= KVM_NR_INTERRUPTS
;
7458 pending_vec
= find_first_bit(
7459 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7460 if (pending_vec
< max_bits
) {
7461 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7462 pr_debug("Set back pending irq %d\n", pending_vec
);
7465 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7466 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7467 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7468 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7469 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7470 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7472 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7473 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7475 update_cr8_intercept(vcpu
);
7477 /* Older userspace won't unhalt the vcpu on reset. */
7478 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7479 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7481 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7483 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7488 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7489 struct kvm_guest_debug
*dbg
)
7491 unsigned long rflags
;
7494 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7496 if (vcpu
->arch
.exception
.pending
)
7498 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7499 kvm_queue_exception(vcpu
, DB_VECTOR
);
7501 kvm_queue_exception(vcpu
, BP_VECTOR
);
7505 * Read rflags as long as potentially injected trace flags are still
7508 rflags
= kvm_get_rflags(vcpu
);
7510 vcpu
->guest_debug
= dbg
->control
;
7511 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7512 vcpu
->guest_debug
= 0;
7514 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7515 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7516 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7517 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7519 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7520 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7522 kvm_update_dr7(vcpu
);
7524 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7525 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7526 get_segment_base(vcpu
, VCPU_SREG_CS
);
7529 * Trigger an rflags update that will inject or remove the trace
7532 kvm_set_rflags(vcpu
, rflags
);
7534 kvm_x86_ops
->update_bp_intercept(vcpu
);
7544 * Translate a guest virtual address to a guest physical address.
7546 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7547 struct kvm_translation
*tr
)
7549 unsigned long vaddr
= tr
->linear_address
;
7553 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7554 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7555 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7556 tr
->physical_address
= gpa
;
7557 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7564 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7566 struct fxregs_state
*fxsave
=
7567 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7569 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7570 fpu
->fcw
= fxsave
->cwd
;
7571 fpu
->fsw
= fxsave
->swd
;
7572 fpu
->ftwx
= fxsave
->twd
;
7573 fpu
->last_opcode
= fxsave
->fop
;
7574 fpu
->last_ip
= fxsave
->rip
;
7575 fpu
->last_dp
= fxsave
->rdp
;
7576 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7581 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7583 struct fxregs_state
*fxsave
=
7584 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7586 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7587 fxsave
->cwd
= fpu
->fcw
;
7588 fxsave
->swd
= fpu
->fsw
;
7589 fxsave
->twd
= fpu
->ftwx
;
7590 fxsave
->fop
= fpu
->last_opcode
;
7591 fxsave
->rip
= fpu
->last_ip
;
7592 fxsave
->rdp
= fpu
->last_dp
;
7593 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7598 static void fx_init(struct kvm_vcpu
*vcpu
)
7600 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7601 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7602 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7603 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7606 * Ensure guest xcr0 is valid for loading
7608 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7610 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7613 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7615 if (vcpu
->guest_fpu_loaded
)
7619 * Restore all possible states in the guest,
7620 * and assume host would use all available bits.
7621 * Guest xcr0 would be loaded later.
7623 vcpu
->guest_fpu_loaded
= 1;
7624 __kernel_fpu_begin();
7625 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7629 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7631 if (!vcpu
->guest_fpu_loaded
)
7634 vcpu
->guest_fpu_loaded
= 0;
7635 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7637 ++vcpu
->stat
.fpu_reload
;
7641 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7643 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7645 kvmclock_reset(vcpu
);
7647 kvm_x86_ops
->vcpu_free(vcpu
);
7648 free_cpumask_var(wbinvd_dirty_mask
);
7651 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7654 struct kvm_vcpu
*vcpu
;
7656 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7657 printk_once(KERN_WARNING
7658 "kvm: SMP vm created on host with unstable TSC; "
7659 "guest TSC will not be reliable\n");
7661 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7666 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7670 kvm_vcpu_mtrr_init(vcpu
);
7671 r
= vcpu_load(vcpu
);
7674 kvm_vcpu_reset(vcpu
, false);
7675 kvm_mmu_setup(vcpu
);
7680 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7682 struct msr_data msr
;
7683 struct kvm
*kvm
= vcpu
->kvm
;
7685 if (vcpu_load(vcpu
))
7688 msr
.index
= MSR_IA32_TSC
;
7689 msr
.host_initiated
= true;
7690 kvm_write_tsc(vcpu
, &msr
);
7693 if (!kvmclock_periodic_sync
)
7696 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7697 KVMCLOCK_SYNC_PERIOD
);
7700 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7703 vcpu
->arch
.apf
.msr_val
= 0;
7705 r
= vcpu_load(vcpu
);
7707 kvm_mmu_unload(vcpu
);
7710 kvm_x86_ops
->vcpu_free(vcpu
);
7713 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7715 vcpu
->arch
.hflags
= 0;
7717 vcpu
->arch
.smi_pending
= 0;
7718 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7719 vcpu
->arch
.nmi_pending
= 0;
7720 vcpu
->arch
.nmi_injected
= false;
7721 kvm_clear_interrupt_queue(vcpu
);
7722 kvm_clear_exception_queue(vcpu
);
7724 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7725 kvm_update_dr0123(vcpu
);
7726 vcpu
->arch
.dr6
= DR6_INIT
;
7727 kvm_update_dr6(vcpu
);
7728 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7729 kvm_update_dr7(vcpu
);
7733 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7734 vcpu
->arch
.apf
.msr_val
= 0;
7735 vcpu
->arch
.st
.msr_val
= 0;
7737 kvmclock_reset(vcpu
);
7739 kvm_clear_async_pf_completion_queue(vcpu
);
7740 kvm_async_pf_hash_reset(vcpu
);
7741 vcpu
->arch
.apf
.halted
= false;
7744 kvm_pmu_reset(vcpu
);
7745 vcpu
->arch
.smbase
= 0x30000;
7747 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7748 vcpu
->arch
.msr_misc_features_enables
= 0;
7751 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7752 vcpu
->arch
.regs_avail
= ~0;
7753 vcpu
->arch
.regs_dirty
= ~0;
7755 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7758 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7760 struct kvm_segment cs
;
7762 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7763 cs
.selector
= vector
<< 8;
7764 cs
.base
= vector
<< 12;
7765 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7766 kvm_rip_write(vcpu
, 0);
7769 int kvm_arch_hardware_enable(void)
7772 struct kvm_vcpu
*vcpu
;
7777 bool stable
, backwards_tsc
= false;
7779 kvm_shared_msr_cpu_online();
7780 ret
= kvm_x86_ops
->hardware_enable();
7784 local_tsc
= rdtsc();
7785 stable
= !check_tsc_unstable();
7786 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7787 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7788 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7789 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7790 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7791 backwards_tsc
= true;
7792 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7793 max_tsc
= vcpu
->arch
.last_host_tsc
;
7799 * Sometimes, even reliable TSCs go backwards. This happens on
7800 * platforms that reset TSC during suspend or hibernate actions, but
7801 * maintain synchronization. We must compensate. Fortunately, we can
7802 * detect that condition here, which happens early in CPU bringup,
7803 * before any KVM threads can be running. Unfortunately, we can't
7804 * bring the TSCs fully up to date with real time, as we aren't yet far
7805 * enough into CPU bringup that we know how much real time has actually
7806 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7807 * variables that haven't been updated yet.
7809 * So we simply find the maximum observed TSC above, then record the
7810 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7811 * the adjustment will be applied. Note that we accumulate
7812 * adjustments, in case multiple suspend cycles happen before some VCPU
7813 * gets a chance to run again. In the event that no KVM threads get a
7814 * chance to run, we will miss the entire elapsed period, as we'll have
7815 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7816 * loose cycle time. This isn't too big a deal, since the loss will be
7817 * uniform across all VCPUs (not to mention the scenario is extremely
7818 * unlikely). It is possible that a second hibernate recovery happens
7819 * much faster than a first, causing the observed TSC here to be
7820 * smaller; this would require additional padding adjustment, which is
7821 * why we set last_host_tsc to the local tsc observed here.
7823 * N.B. - this code below runs only on platforms with reliable TSC,
7824 * as that is the only way backwards_tsc is set above. Also note
7825 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7826 * have the same delta_cyc adjustment applied if backwards_tsc
7827 * is detected. Note further, this adjustment is only done once,
7828 * as we reset last_host_tsc on all VCPUs to stop this from being
7829 * called multiple times (one for each physical CPU bringup).
7831 * Platforms with unreliable TSCs don't have to deal with this, they
7832 * will be compensated by the logic in vcpu_load, which sets the TSC to
7833 * catchup mode. This will catchup all VCPUs to real time, but cannot
7834 * guarantee that they stay in perfect synchronization.
7836 if (backwards_tsc
) {
7837 u64 delta_cyc
= max_tsc
- local_tsc
;
7838 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7839 kvm
->arch
.backwards_tsc_observed
= true;
7840 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7841 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7842 vcpu
->arch
.last_host_tsc
= local_tsc
;
7843 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7847 * We have to disable TSC offset matching.. if you were
7848 * booting a VM while issuing an S4 host suspend....
7849 * you may have some problem. Solving this issue is
7850 * left as an exercise to the reader.
7852 kvm
->arch
.last_tsc_nsec
= 0;
7853 kvm
->arch
.last_tsc_write
= 0;
7860 void kvm_arch_hardware_disable(void)
7862 kvm_x86_ops
->hardware_disable();
7863 drop_user_return_notifiers();
7866 int kvm_arch_hardware_setup(void)
7870 r
= kvm_x86_ops
->hardware_setup();
7874 if (kvm_has_tsc_control
) {
7876 * Make sure the user can only configure tsc_khz values that
7877 * fit into a signed integer.
7878 * A min value is not calculated needed because it will always
7879 * be 1 on all machines.
7881 u64 max
= min(0x7fffffffULL
,
7882 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7883 kvm_max_guest_tsc_khz
= max
;
7885 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7888 kvm_init_msr_list();
7892 void kvm_arch_hardware_unsetup(void)
7894 kvm_x86_ops
->hardware_unsetup();
7897 void kvm_arch_check_processor_compat(void *rtn
)
7899 kvm_x86_ops
->check_processor_compatibility(rtn
);
7902 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7904 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7906 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7908 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7910 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7913 struct static_key kvm_no_apic_vcpu __read_mostly
;
7914 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7916 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7922 BUG_ON(vcpu
->kvm
== NULL
);
7925 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7926 vcpu
->arch
.pv
.pv_unhalted
= false;
7927 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7928 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7929 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7931 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7933 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7938 vcpu
->arch
.pio_data
= page_address(page
);
7940 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7942 r
= kvm_mmu_create(vcpu
);
7944 goto fail_free_pio_data
;
7946 if (irqchip_in_kernel(kvm
)) {
7947 r
= kvm_create_lapic(vcpu
);
7949 goto fail_mmu_destroy
;
7951 static_key_slow_inc(&kvm_no_apic_vcpu
);
7953 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7955 if (!vcpu
->arch
.mce_banks
) {
7957 goto fail_free_lapic
;
7959 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7961 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7963 goto fail_free_mce_banks
;
7968 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7969 vcpu
->arch
.pv_time_enabled
= false;
7971 vcpu
->arch
.guest_supported_xcr0
= 0;
7972 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7974 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7976 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7978 kvm_async_pf_hash_reset(vcpu
);
7981 vcpu
->arch
.pending_external_vector
= -1;
7983 kvm_hv_vcpu_init(vcpu
);
7987 fail_free_mce_banks
:
7988 kfree(vcpu
->arch
.mce_banks
);
7990 kvm_free_lapic(vcpu
);
7992 kvm_mmu_destroy(vcpu
);
7994 free_page((unsigned long)vcpu
->arch
.pio_data
);
7999 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8003 kvm_hv_vcpu_uninit(vcpu
);
8004 kvm_pmu_destroy(vcpu
);
8005 kfree(vcpu
->arch
.mce_banks
);
8006 kvm_free_lapic(vcpu
);
8007 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8008 kvm_mmu_destroy(vcpu
);
8009 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8010 free_page((unsigned long)vcpu
->arch
.pio_data
);
8011 if (!lapic_in_kernel(vcpu
))
8012 static_key_slow_dec(&kvm_no_apic_vcpu
);
8015 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8017 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8020 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8025 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8026 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8027 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8028 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8029 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8031 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8032 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8033 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8034 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8035 &kvm
->arch
.irq_sources_bitmap
);
8037 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8038 mutex_init(&kvm
->arch
.apic_map_lock
);
8039 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8040 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8042 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8043 pvclock_update_vm_gtod_copy(kvm
);
8045 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8046 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8048 kvm_page_track_init(kvm
);
8049 kvm_mmu_init_vm(kvm
);
8051 if (kvm_x86_ops
->vm_init
)
8052 return kvm_x86_ops
->vm_init(kvm
);
8057 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8060 r
= vcpu_load(vcpu
);
8062 kvm_mmu_unload(vcpu
);
8066 static void kvm_free_vcpus(struct kvm
*kvm
)
8069 struct kvm_vcpu
*vcpu
;
8072 * Unpin any mmu pages first.
8074 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8075 kvm_clear_async_pf_completion_queue(vcpu
);
8076 kvm_unload_vcpu_mmu(vcpu
);
8078 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8079 kvm_arch_vcpu_free(vcpu
);
8081 mutex_lock(&kvm
->lock
);
8082 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8083 kvm
->vcpus
[i
] = NULL
;
8085 atomic_set(&kvm
->online_vcpus
, 0);
8086 mutex_unlock(&kvm
->lock
);
8089 void kvm_arch_sync_events(struct kvm
*kvm
)
8091 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8092 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8096 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8100 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8101 struct kvm_memory_slot
*slot
, old
;
8103 /* Called with kvm->slots_lock held. */
8104 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8107 slot
= id_to_memslot(slots
, id
);
8113 * MAP_SHARED to prevent internal slot pages from being moved
8116 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8117 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8118 if (IS_ERR((void *)hva
))
8119 return PTR_ERR((void *)hva
);
8128 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8129 struct kvm_userspace_memory_region m
;
8131 m
.slot
= id
| (i
<< 16);
8133 m
.guest_phys_addr
= gpa
;
8134 m
.userspace_addr
= hva
;
8135 m
.memory_size
= size
;
8136 r
= __kvm_set_memory_region(kvm
, &m
);
8142 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8148 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8150 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8154 mutex_lock(&kvm
->slots_lock
);
8155 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8156 mutex_unlock(&kvm
->slots_lock
);
8160 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8162 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8164 if (current
->mm
== kvm
->mm
) {
8166 * Free memory regions allocated on behalf of userspace,
8167 * unless the the memory map has changed due to process exit
8170 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8171 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8172 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8174 if (kvm_x86_ops
->vm_destroy
)
8175 kvm_x86_ops
->vm_destroy(kvm
);
8176 kvm_pic_destroy(kvm
);
8177 kvm_ioapic_destroy(kvm
);
8178 kvm_free_vcpus(kvm
);
8179 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8180 kvm_mmu_uninit_vm(kvm
);
8181 kvm_page_track_cleanup(kvm
);
8184 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8185 struct kvm_memory_slot
*dont
)
8189 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8190 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8191 kvfree(free
->arch
.rmap
[i
]);
8192 free
->arch
.rmap
[i
] = NULL
;
8197 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8198 dont
->arch
.lpage_info
[i
- 1]) {
8199 kvfree(free
->arch
.lpage_info
[i
- 1]);
8200 free
->arch
.lpage_info
[i
- 1] = NULL
;
8204 kvm_page_track_free_memslot(free
, dont
);
8207 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8208 unsigned long npages
)
8212 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8213 struct kvm_lpage_info
*linfo
;
8218 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8219 slot
->base_gfn
, level
) + 1;
8221 slot
->arch
.rmap
[i
] =
8222 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8223 if (!slot
->arch
.rmap
[i
])
8228 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8232 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8234 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8235 linfo
[0].disallow_lpage
= 1;
8236 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8237 linfo
[lpages
- 1].disallow_lpage
= 1;
8238 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8240 * If the gfn and userspace address are not aligned wrt each
8241 * other, or if explicitly asked to, disable large page
8242 * support for this slot
8244 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8245 !kvm_largepages_enabled()) {
8248 for (j
= 0; j
< lpages
; ++j
)
8249 linfo
[j
].disallow_lpage
= 1;
8253 if (kvm_page_track_create_memslot(slot
, npages
))
8259 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8260 kvfree(slot
->arch
.rmap
[i
]);
8261 slot
->arch
.rmap
[i
] = NULL
;
8265 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8266 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8271 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8274 * memslots->generation has been incremented.
8275 * mmio generation may have reached its maximum value.
8277 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8280 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8281 struct kvm_memory_slot
*memslot
,
8282 const struct kvm_userspace_memory_region
*mem
,
8283 enum kvm_mr_change change
)
8288 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8289 struct kvm_memory_slot
*new)
8291 /* Still write protect RO slot */
8292 if (new->flags
& KVM_MEM_READONLY
) {
8293 kvm_mmu_slot_remove_write_access(kvm
, new);
8298 * Call kvm_x86_ops dirty logging hooks when they are valid.
8300 * kvm_x86_ops->slot_disable_log_dirty is called when:
8302 * - KVM_MR_CREATE with dirty logging is disabled
8303 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8305 * The reason is, in case of PML, we need to set D-bit for any slots
8306 * with dirty logging disabled in order to eliminate unnecessary GPA
8307 * logging in PML buffer (and potential PML buffer full VMEXT). This
8308 * guarantees leaving PML enabled during guest's lifetime won't have
8309 * any additonal overhead from PML when guest is running with dirty
8310 * logging disabled for memory slots.
8312 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8313 * to dirty logging mode.
8315 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8317 * In case of write protect:
8319 * Write protect all pages for dirty logging.
8321 * All the sptes including the large sptes which point to this
8322 * slot are set to readonly. We can not create any new large
8323 * spte on this slot until the end of the logging.
8325 * See the comments in fast_page_fault().
8327 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8328 if (kvm_x86_ops
->slot_enable_log_dirty
)
8329 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8331 kvm_mmu_slot_remove_write_access(kvm
, new);
8333 if (kvm_x86_ops
->slot_disable_log_dirty
)
8334 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8338 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8339 const struct kvm_userspace_memory_region
*mem
,
8340 const struct kvm_memory_slot
*old
,
8341 const struct kvm_memory_slot
*new,
8342 enum kvm_mr_change change
)
8344 int nr_mmu_pages
= 0;
8346 if (!kvm
->arch
.n_requested_mmu_pages
)
8347 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8350 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8353 * Dirty logging tracks sptes in 4k granularity, meaning that large
8354 * sptes have to be split. If live migration is successful, the guest
8355 * in the source machine will be destroyed and large sptes will be
8356 * created in the destination. However, if the guest continues to run
8357 * in the source machine (for example if live migration fails), small
8358 * sptes will remain around and cause bad performance.
8360 * Scan sptes if dirty logging has been stopped, dropping those
8361 * which can be collapsed into a single large-page spte. Later
8362 * page faults will create the large-page sptes.
8364 if ((change
!= KVM_MR_DELETE
) &&
8365 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8366 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8367 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8370 * Set up write protection and/or dirty logging for the new slot.
8372 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8373 * been zapped so no dirty logging staff is needed for old slot. For
8374 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8375 * new and it's also covered when dealing with the new slot.
8377 * FIXME: const-ify all uses of struct kvm_memory_slot.
8379 if (change
!= KVM_MR_DELETE
)
8380 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8383 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8385 kvm_mmu_invalidate_zap_all_pages(kvm
);
8388 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8389 struct kvm_memory_slot
*slot
)
8391 kvm_page_track_flush_slot(kvm
, slot
);
8394 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8396 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8399 if (kvm_apic_has_events(vcpu
))
8402 if (vcpu
->arch
.pv
.pv_unhalted
)
8405 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8406 (vcpu
->arch
.nmi_pending
&&
8407 kvm_x86_ops
->nmi_allowed(vcpu
)))
8410 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8411 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8414 if (kvm_arch_interrupt_allowed(vcpu
) &&
8415 kvm_cpu_has_interrupt(vcpu
))
8418 if (kvm_hv_has_stimer_pending(vcpu
))
8424 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8426 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8429 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8431 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8434 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8436 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8439 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8441 if (is_64_bit_mode(vcpu
))
8442 return kvm_rip_read(vcpu
);
8443 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8444 kvm_rip_read(vcpu
));
8446 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8448 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8450 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8452 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8454 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8456 unsigned long rflags
;
8458 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8459 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8460 rflags
&= ~X86_EFLAGS_TF
;
8463 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8465 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8467 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8468 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8469 rflags
|= X86_EFLAGS_TF
;
8470 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8473 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8475 __kvm_set_rflags(vcpu
, rflags
);
8476 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8478 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8480 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8484 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8488 r
= kvm_mmu_reload(vcpu
);
8492 if (!vcpu
->arch
.mmu
.direct_map
&&
8493 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8496 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8499 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8501 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8504 static inline u32
kvm_async_pf_next_probe(u32 key
)
8506 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8509 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8511 u32 key
= kvm_async_pf_hash_fn(gfn
);
8513 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8514 key
= kvm_async_pf_next_probe(key
);
8516 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8519 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8522 u32 key
= kvm_async_pf_hash_fn(gfn
);
8524 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8525 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8526 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8527 key
= kvm_async_pf_next_probe(key
);
8532 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8534 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8537 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8541 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8543 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8545 j
= kvm_async_pf_next_probe(j
);
8546 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8548 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8550 * k lies cyclically in ]i,j]
8552 * |....j i.k.| or |.k..j i...|
8554 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8555 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8560 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8563 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8567 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8568 struct kvm_async_pf
*work
)
8570 struct x86_exception fault
;
8572 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8573 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8575 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8576 (vcpu
->arch
.apf
.send_user_only
&&
8577 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8578 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8579 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8580 fault
.vector
= PF_VECTOR
;
8581 fault
.error_code_valid
= true;
8582 fault
.error_code
= 0;
8583 fault
.nested_page_fault
= false;
8584 fault
.address
= work
->arch
.token
;
8585 kvm_inject_page_fault(vcpu
, &fault
);
8589 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8590 struct kvm_async_pf
*work
)
8592 struct x86_exception fault
;
8594 if (work
->wakeup_all
)
8595 work
->arch
.token
= ~0; /* broadcast wakeup */
8597 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8598 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8600 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8601 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8602 fault
.vector
= PF_VECTOR
;
8603 fault
.error_code_valid
= true;
8604 fault
.error_code
= 0;
8605 fault
.nested_page_fault
= false;
8606 fault
.address
= work
->arch
.token
;
8607 kvm_inject_page_fault(vcpu
, &fault
);
8609 vcpu
->arch
.apf
.halted
= false;
8610 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8613 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8615 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8618 return kvm_can_do_async_pf(vcpu
);
8621 void kvm_arch_start_assignment(struct kvm
*kvm
)
8623 atomic_inc(&kvm
->arch
.assigned_device_count
);
8625 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8627 void kvm_arch_end_assignment(struct kvm
*kvm
)
8629 atomic_dec(&kvm
->arch
.assigned_device_count
);
8631 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8633 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8635 return atomic_read(&kvm
->arch
.assigned_device_count
);
8637 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8639 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8641 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8643 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8645 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8647 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8649 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8651 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8653 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8655 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8657 bool kvm_arch_has_irq_bypass(void)
8659 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8662 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8663 struct irq_bypass_producer
*prod
)
8665 struct kvm_kernel_irqfd
*irqfd
=
8666 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8668 irqfd
->producer
= prod
;
8670 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8671 prod
->irq
, irqfd
->gsi
, 1);
8674 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8675 struct irq_bypass_producer
*prod
)
8678 struct kvm_kernel_irqfd
*irqfd
=
8679 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8681 WARN_ON(irqfd
->producer
!= prod
);
8682 irqfd
->producer
= NULL
;
8685 * When producer of consumer is unregistered, we change back to
8686 * remapped mode, so we can re-use the current implementation
8687 * when the irq is masked/disabled or the consumer side (KVM
8688 * int this case doesn't want to receive the interrupts.
8690 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8692 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8693 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8696 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8697 uint32_t guest_irq
, bool set
)
8699 if (!kvm_x86_ops
->update_pi_irte
)
8702 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8705 bool kvm_vector_hashing_enabled(void)
8707 return vector_hashing
;
8709 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);