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[thirdparty/kernel/stable.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
61 */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
114 { NULL }
115 };
116
117 unsigned long segment_base(u16 selector)
118 {
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
122 unsigned long v;
123
124 if (selector == 0)
125 return 0;
126
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
129
130 if (selector & 4) { /* from ldt */
131 u16 ldt_selector;
132
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
135 }
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
139 #ifdef CONFIG_X86_64
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
142 #endif
143 return v;
144 }
145 EXPORT_SYMBOL_GPL(segment_base);
146
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
148 {
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
151 else
152 return vcpu->arch.apic_base;
153 }
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
155
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
157 {
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
161 else
162 vcpu->arch.apic_base = data;
163 }
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
165
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
167 {
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
172 }
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
174
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
176 u32 error_code)
177 {
178 ++vcpu->stat.pf_guest;
179
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
189 }
190 return;
191 }
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
194 }
195
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
197 {
198 vcpu->arch.nmi_pending = 1;
199 }
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
201
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
203 {
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
209 }
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
211
212 static void __queue_exception(struct kvm_vcpu *vcpu)
213 {
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
217 }
218
219 /*
220 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
221 * a #GP and return false.
222 */
223 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
224 {
225 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
226 return true;
227 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
228 return false;
229 }
230 EXPORT_SYMBOL_GPL(kvm_require_cpl);
231
232 /*
233 * Load the pae pdptrs. Return true is they are all valid.
234 */
235 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
236 {
237 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
238 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
239 int i;
240 int ret;
241 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
242
243 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
244 offset * sizeof(u64), sizeof(pdpte));
245 if (ret < 0) {
246 ret = 0;
247 goto out;
248 }
249 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
250 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
251 ret = 0;
252 goto out;
253 }
254 }
255 ret = 1;
256
257 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
258 out:
259
260 return ret;
261 }
262 EXPORT_SYMBOL_GPL(load_pdptrs);
263
264 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
265 {
266 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
267 bool changed = true;
268 int r;
269
270 if (is_long_mode(vcpu) || !is_pae(vcpu))
271 return false;
272
273 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
274 if (r < 0)
275 goto out;
276 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
277 out:
278
279 return changed;
280 }
281
282 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
283 {
284 if (cr0 & CR0_RESERVED_BITS) {
285 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
286 cr0, vcpu->arch.cr0);
287 kvm_inject_gp(vcpu, 0);
288 return;
289 }
290
291 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
292 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
293 kvm_inject_gp(vcpu, 0);
294 return;
295 }
296
297 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
298 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
299 "and a clear PE flag\n");
300 kvm_inject_gp(vcpu, 0);
301 return;
302 }
303
304 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
305 #ifdef CONFIG_X86_64
306 if ((vcpu->arch.shadow_efer & EFER_LME)) {
307 int cs_db, cs_l;
308
309 if (!is_pae(vcpu)) {
310 printk(KERN_DEBUG "set_cr0: #GP, start paging "
311 "in long mode while PAE is disabled\n");
312 kvm_inject_gp(vcpu, 0);
313 return;
314 }
315 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
316 if (cs_l) {
317 printk(KERN_DEBUG "set_cr0: #GP, start paging "
318 "in long mode while CS.L == 1\n");
319 kvm_inject_gp(vcpu, 0);
320 return;
321
322 }
323 } else
324 #endif
325 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
326 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
327 "reserved bits\n");
328 kvm_inject_gp(vcpu, 0);
329 return;
330 }
331
332 }
333
334 kvm_x86_ops->set_cr0(vcpu, cr0);
335 vcpu->arch.cr0 = cr0;
336
337 kvm_mmu_sync_global(vcpu);
338 kvm_mmu_reset_context(vcpu);
339 return;
340 }
341 EXPORT_SYMBOL_GPL(kvm_set_cr0);
342
343 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
344 {
345 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
346 KVMTRACE_1D(LMSW, vcpu,
347 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
348 handler);
349 }
350 EXPORT_SYMBOL_GPL(kvm_lmsw);
351
352 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
353 {
354 unsigned long old_cr4 = vcpu->arch.cr4;
355 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
356
357 if (cr4 & CR4_RESERVED_BITS) {
358 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
359 kvm_inject_gp(vcpu, 0);
360 return;
361 }
362
363 if (is_long_mode(vcpu)) {
364 if (!(cr4 & X86_CR4_PAE)) {
365 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
366 "in long mode\n");
367 kvm_inject_gp(vcpu, 0);
368 return;
369 }
370 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
371 && ((cr4 ^ old_cr4) & pdptr_bits)
372 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
373 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
374 kvm_inject_gp(vcpu, 0);
375 return;
376 }
377
378 if (cr4 & X86_CR4_VMXE) {
379 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
380 kvm_inject_gp(vcpu, 0);
381 return;
382 }
383 kvm_x86_ops->set_cr4(vcpu, cr4);
384 vcpu->arch.cr4 = cr4;
385 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
386 kvm_mmu_sync_global(vcpu);
387 kvm_mmu_reset_context(vcpu);
388 }
389 EXPORT_SYMBOL_GPL(kvm_set_cr4);
390
391 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
392 {
393 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
394 kvm_mmu_sync_roots(vcpu);
395 kvm_mmu_flush_tlb(vcpu);
396 return;
397 }
398
399 if (is_long_mode(vcpu)) {
400 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
401 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
402 kvm_inject_gp(vcpu, 0);
403 return;
404 }
405 } else {
406 if (is_pae(vcpu)) {
407 if (cr3 & CR3_PAE_RESERVED_BITS) {
408 printk(KERN_DEBUG
409 "set_cr3: #GP, reserved bits\n");
410 kvm_inject_gp(vcpu, 0);
411 return;
412 }
413 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
414 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
415 "reserved bits\n");
416 kvm_inject_gp(vcpu, 0);
417 return;
418 }
419 }
420 /*
421 * We don't check reserved bits in nonpae mode, because
422 * this isn't enforced, and VMware depends on this.
423 */
424 }
425
426 /*
427 * Does the new cr3 value map to physical memory? (Note, we
428 * catch an invalid cr3 even in real-mode, because it would
429 * cause trouble later on when we turn on paging anyway.)
430 *
431 * A real CPU would silently accept an invalid cr3 and would
432 * attempt to use it - with largely undefined (and often hard
433 * to debug) behavior on the guest side.
434 */
435 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
436 kvm_inject_gp(vcpu, 0);
437 else {
438 vcpu->arch.cr3 = cr3;
439 vcpu->arch.mmu.new_cr3(vcpu);
440 }
441 }
442 EXPORT_SYMBOL_GPL(kvm_set_cr3);
443
444 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
445 {
446 if (cr8 & CR8_RESERVED_BITS) {
447 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
448 kvm_inject_gp(vcpu, 0);
449 return;
450 }
451 if (irqchip_in_kernel(vcpu->kvm))
452 kvm_lapic_set_tpr(vcpu, cr8);
453 else
454 vcpu->arch.cr8 = cr8;
455 }
456 EXPORT_SYMBOL_GPL(kvm_set_cr8);
457
458 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
459 {
460 if (irqchip_in_kernel(vcpu->kvm))
461 return kvm_lapic_get_cr8(vcpu);
462 else
463 return vcpu->arch.cr8;
464 }
465 EXPORT_SYMBOL_GPL(kvm_get_cr8);
466
467 static inline u32 bit(int bitno)
468 {
469 return 1 << (bitno & 31);
470 }
471
472 /*
473 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
474 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
475 *
476 * This list is modified at module load time to reflect the
477 * capabilities of the host cpu.
478 */
479 static u32 msrs_to_save[] = {
480 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
481 MSR_K6_STAR,
482 #ifdef CONFIG_X86_64
483 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
484 #endif
485 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
486 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
487 };
488
489 static unsigned num_msrs_to_save;
490
491 static u32 emulated_msrs[] = {
492 MSR_IA32_MISC_ENABLE,
493 };
494
495 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
496 {
497 if (efer & efer_reserved_bits) {
498 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
499 efer);
500 kvm_inject_gp(vcpu, 0);
501 return;
502 }
503
504 if (is_paging(vcpu)
505 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
506 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
507 kvm_inject_gp(vcpu, 0);
508 return;
509 }
510
511 if (efer & EFER_FFXSR) {
512 struct kvm_cpuid_entry2 *feat;
513
514 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
515 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
516 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
517 kvm_inject_gp(vcpu, 0);
518 return;
519 }
520 }
521
522 if (efer & EFER_SVME) {
523 struct kvm_cpuid_entry2 *feat;
524
525 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
526 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
527 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
528 kvm_inject_gp(vcpu, 0);
529 return;
530 }
531 }
532
533 kvm_x86_ops->set_efer(vcpu, efer);
534
535 efer &= ~EFER_LMA;
536 efer |= vcpu->arch.shadow_efer & EFER_LMA;
537
538 vcpu->arch.shadow_efer = efer;
539
540 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
541 kvm_mmu_reset_context(vcpu);
542 }
543
544 void kvm_enable_efer_bits(u64 mask)
545 {
546 efer_reserved_bits &= ~mask;
547 }
548 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
549
550
551 /*
552 * Writes msr value into into the appropriate "register".
553 * Returns 0 on success, non-0 otherwise.
554 * Assumes vcpu_load() was already called.
555 */
556 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
557 {
558 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
559 }
560
561 /*
562 * Adapt set_msr() to msr_io()'s calling convention
563 */
564 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
565 {
566 return kvm_set_msr(vcpu, index, *data);
567 }
568
569 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
570 {
571 static int version;
572 struct pvclock_wall_clock wc;
573 struct timespec now, sys, boot;
574
575 if (!wall_clock)
576 return;
577
578 version++;
579
580 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
581
582 /*
583 * The guest calculates current wall clock time by adding
584 * system time (updated by kvm_write_guest_time below) to the
585 * wall clock specified here. guest system time equals host
586 * system time for us, thus we must fill in host boot time here.
587 */
588 now = current_kernel_time();
589 ktime_get_ts(&sys);
590 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
591
592 wc.sec = boot.tv_sec;
593 wc.nsec = boot.tv_nsec;
594 wc.version = version;
595
596 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
597
598 version++;
599 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
600 }
601
602 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
603 {
604 uint32_t quotient, remainder;
605
606 /* Don't try to replace with do_div(), this one calculates
607 * "(dividend << 32) / divisor" */
608 __asm__ ( "divl %4"
609 : "=a" (quotient), "=d" (remainder)
610 : "0" (0), "1" (dividend), "r" (divisor) );
611 return quotient;
612 }
613
614 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
615 {
616 uint64_t nsecs = 1000000000LL;
617 int32_t shift = 0;
618 uint64_t tps64;
619 uint32_t tps32;
620
621 tps64 = tsc_khz * 1000LL;
622 while (tps64 > nsecs*2) {
623 tps64 >>= 1;
624 shift--;
625 }
626
627 tps32 = (uint32_t)tps64;
628 while (tps32 <= (uint32_t)nsecs) {
629 tps32 <<= 1;
630 shift++;
631 }
632
633 hv_clock->tsc_shift = shift;
634 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
635
636 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
637 __func__, tsc_khz, hv_clock->tsc_shift,
638 hv_clock->tsc_to_system_mul);
639 }
640
641 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
642
643 static void kvm_write_guest_time(struct kvm_vcpu *v)
644 {
645 struct timespec ts;
646 unsigned long flags;
647 struct kvm_vcpu_arch *vcpu = &v->arch;
648 void *shared_kaddr;
649
650 if ((!vcpu->time_page))
651 return;
652
653 preempt_disable();
654 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
655 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
656 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
657 }
658 preempt_enable();
659
660 /* Keep irq disabled to prevent changes to the clock */
661 local_irq_save(flags);
662 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
663 &vcpu->hv_clock.tsc_timestamp);
664 ktime_get_ts(&ts);
665 local_irq_restore(flags);
666
667 /* With all the info we got, fill in the values */
668
669 vcpu->hv_clock.system_time = ts.tv_nsec +
670 (NSEC_PER_SEC * (u64)ts.tv_sec);
671 /*
672 * The interface expects us to write an even number signaling that the
673 * update is finished. Since the guest won't see the intermediate
674 * state, we just increase by 2 at the end.
675 */
676 vcpu->hv_clock.version += 2;
677
678 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
679
680 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
681 sizeof(vcpu->hv_clock));
682
683 kunmap_atomic(shared_kaddr, KM_USER0);
684
685 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
686 }
687
688 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
689 {
690 struct kvm_vcpu_arch *vcpu = &v->arch;
691
692 if (!vcpu->time_page)
693 return 0;
694 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
695 return 1;
696 }
697
698 static bool msr_mtrr_valid(unsigned msr)
699 {
700 switch (msr) {
701 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
702 case MSR_MTRRfix64K_00000:
703 case MSR_MTRRfix16K_80000:
704 case MSR_MTRRfix16K_A0000:
705 case MSR_MTRRfix4K_C0000:
706 case MSR_MTRRfix4K_C8000:
707 case MSR_MTRRfix4K_D0000:
708 case MSR_MTRRfix4K_D8000:
709 case MSR_MTRRfix4K_E0000:
710 case MSR_MTRRfix4K_E8000:
711 case MSR_MTRRfix4K_F0000:
712 case MSR_MTRRfix4K_F8000:
713 case MSR_MTRRdefType:
714 case MSR_IA32_CR_PAT:
715 return true;
716 case 0x2f8:
717 return true;
718 }
719 return false;
720 }
721
722 static bool valid_pat_type(unsigned t)
723 {
724 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
725 }
726
727 static bool valid_mtrr_type(unsigned t)
728 {
729 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
730 }
731
732 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
733 {
734 int i;
735
736 if (!msr_mtrr_valid(msr))
737 return false;
738
739 if (msr == MSR_IA32_CR_PAT) {
740 for (i = 0; i < 8; i++)
741 if (!valid_pat_type((data >> (i * 8)) & 0xff))
742 return false;
743 return true;
744 } else if (msr == MSR_MTRRdefType) {
745 if (data & ~0xcff)
746 return false;
747 return valid_mtrr_type(data & 0xff);
748 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
749 for (i = 0; i < 8 ; i++)
750 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
751 return false;
752 return true;
753 }
754
755 /* variable MTRRs */
756 return valid_mtrr_type(data & 0xff);
757 }
758
759 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
760 {
761 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
762
763 if (!mtrr_valid(vcpu, msr, data))
764 return 1;
765
766 if (msr == MSR_MTRRdefType) {
767 vcpu->arch.mtrr_state.def_type = data;
768 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
769 } else if (msr == MSR_MTRRfix64K_00000)
770 p[0] = data;
771 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
772 p[1 + msr - MSR_MTRRfix16K_80000] = data;
773 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
774 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
775 else if (msr == MSR_IA32_CR_PAT)
776 vcpu->arch.pat = data;
777 else { /* Variable MTRRs */
778 int idx, is_mtrr_mask;
779 u64 *pt;
780
781 idx = (msr - 0x200) / 2;
782 is_mtrr_mask = msr - 0x200 - 2 * idx;
783 if (!is_mtrr_mask)
784 pt =
785 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
786 else
787 pt =
788 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
789 *pt = data;
790 }
791
792 kvm_mmu_reset_context(vcpu);
793 return 0;
794 }
795
796 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
797 {
798 switch (msr) {
799 case MSR_EFER:
800 set_efer(vcpu, data);
801 break;
802 case MSR_IA32_MC0_STATUS:
803 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
804 __func__, data);
805 break;
806 case MSR_IA32_MCG_STATUS:
807 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
808 __func__, data);
809 break;
810 case MSR_IA32_MCG_CTL:
811 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
812 __func__, data);
813 break;
814 case MSR_IA32_DEBUGCTLMSR:
815 if (!data) {
816 /* We support the non-activated case already */
817 break;
818 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
819 /* Values other than LBR and BTF are vendor-specific,
820 thus reserved and should throw a #GP */
821 return 1;
822 }
823 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
824 __func__, data);
825 break;
826 case MSR_IA32_UCODE_REV:
827 case MSR_IA32_UCODE_WRITE:
828 case MSR_VM_HSAVE_PA:
829 break;
830 case 0x200 ... 0x2ff:
831 return set_msr_mtrr(vcpu, msr, data);
832 case MSR_IA32_APICBASE:
833 kvm_set_apic_base(vcpu, data);
834 break;
835 case MSR_IA32_MISC_ENABLE:
836 vcpu->arch.ia32_misc_enable_msr = data;
837 break;
838 case MSR_KVM_WALL_CLOCK:
839 vcpu->kvm->arch.wall_clock = data;
840 kvm_write_wall_clock(vcpu->kvm, data);
841 break;
842 case MSR_KVM_SYSTEM_TIME: {
843 if (vcpu->arch.time_page) {
844 kvm_release_page_dirty(vcpu->arch.time_page);
845 vcpu->arch.time_page = NULL;
846 }
847
848 vcpu->arch.time = data;
849
850 /* we verify if the enable bit is set... */
851 if (!(data & 1))
852 break;
853
854 /* ...but clean it before doing the actual write */
855 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
856
857 vcpu->arch.time_page =
858 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
859
860 if (is_error_page(vcpu->arch.time_page)) {
861 kvm_release_page_clean(vcpu->arch.time_page);
862 vcpu->arch.time_page = NULL;
863 }
864
865 kvm_request_guest_time_update(vcpu);
866 break;
867 }
868 default:
869 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
870 return 1;
871 }
872 return 0;
873 }
874 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
875
876
877 /*
878 * Reads an msr value (of 'msr_index') into 'pdata'.
879 * Returns 0 on success, non-0 otherwise.
880 * Assumes vcpu_load() was already called.
881 */
882 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
883 {
884 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
885 }
886
887 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
888 {
889 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
890
891 if (!msr_mtrr_valid(msr))
892 return 1;
893
894 if (msr == MSR_MTRRdefType)
895 *pdata = vcpu->arch.mtrr_state.def_type +
896 (vcpu->arch.mtrr_state.enabled << 10);
897 else if (msr == MSR_MTRRfix64K_00000)
898 *pdata = p[0];
899 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
900 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
901 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
902 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
903 else if (msr == MSR_IA32_CR_PAT)
904 *pdata = vcpu->arch.pat;
905 else { /* Variable MTRRs */
906 int idx, is_mtrr_mask;
907 u64 *pt;
908
909 idx = (msr - 0x200) / 2;
910 is_mtrr_mask = msr - 0x200 - 2 * idx;
911 if (!is_mtrr_mask)
912 pt =
913 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
914 else
915 pt =
916 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
917 *pdata = *pt;
918 }
919
920 return 0;
921 }
922
923 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
924 {
925 u64 data;
926
927 switch (msr) {
928 case 0xc0010010: /* SYSCFG */
929 case 0xc0010015: /* HWCR */
930 case MSR_IA32_PLATFORM_ID:
931 case MSR_IA32_P5_MC_ADDR:
932 case MSR_IA32_P5_MC_TYPE:
933 case MSR_IA32_MC0_CTL:
934 case MSR_IA32_MCG_STATUS:
935 case MSR_IA32_MCG_CAP:
936 case MSR_IA32_MCG_CTL:
937 case MSR_IA32_MC0_MISC:
938 case MSR_IA32_MC0_MISC+4:
939 case MSR_IA32_MC0_MISC+8:
940 case MSR_IA32_MC0_MISC+12:
941 case MSR_IA32_MC0_MISC+16:
942 case MSR_IA32_MC0_MISC+20:
943 case MSR_IA32_UCODE_REV:
944 case MSR_IA32_EBL_CR_POWERON:
945 case MSR_IA32_DEBUGCTLMSR:
946 case MSR_IA32_LASTBRANCHFROMIP:
947 case MSR_IA32_LASTBRANCHTOIP:
948 case MSR_IA32_LASTINTFROMIP:
949 case MSR_IA32_LASTINTTOIP:
950 case MSR_VM_HSAVE_PA:
951 case MSR_P6_EVNTSEL0:
952 case MSR_P6_EVNTSEL1:
953 case MSR_K7_EVNTSEL0:
954 data = 0;
955 break;
956 case MSR_MTRRcap:
957 data = 0x500 | KVM_NR_VAR_MTRR;
958 break;
959 case 0x200 ... 0x2ff:
960 return get_msr_mtrr(vcpu, msr, pdata);
961 case 0xcd: /* fsb frequency */
962 data = 3;
963 break;
964 case MSR_IA32_APICBASE:
965 data = kvm_get_apic_base(vcpu);
966 break;
967 case MSR_IA32_MISC_ENABLE:
968 data = vcpu->arch.ia32_misc_enable_msr;
969 break;
970 case MSR_IA32_PERF_STATUS:
971 /* TSC increment by tick */
972 data = 1000ULL;
973 /* CPU multiplier */
974 data |= (((uint64_t)4ULL) << 40);
975 break;
976 case MSR_EFER:
977 data = vcpu->arch.shadow_efer;
978 break;
979 case MSR_KVM_WALL_CLOCK:
980 data = vcpu->kvm->arch.wall_clock;
981 break;
982 case MSR_KVM_SYSTEM_TIME:
983 data = vcpu->arch.time;
984 break;
985 default:
986 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
987 return 1;
988 }
989 *pdata = data;
990 return 0;
991 }
992 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
993
994 /*
995 * Read or write a bunch of msrs. All parameters are kernel addresses.
996 *
997 * @return number of msrs set successfully.
998 */
999 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1000 struct kvm_msr_entry *entries,
1001 int (*do_msr)(struct kvm_vcpu *vcpu,
1002 unsigned index, u64 *data))
1003 {
1004 int i;
1005
1006 vcpu_load(vcpu);
1007
1008 down_read(&vcpu->kvm->slots_lock);
1009 for (i = 0; i < msrs->nmsrs; ++i)
1010 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1011 break;
1012 up_read(&vcpu->kvm->slots_lock);
1013
1014 vcpu_put(vcpu);
1015
1016 return i;
1017 }
1018
1019 /*
1020 * Read or write a bunch of msrs. Parameters are user addresses.
1021 *
1022 * @return number of msrs set successfully.
1023 */
1024 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1025 int (*do_msr)(struct kvm_vcpu *vcpu,
1026 unsigned index, u64 *data),
1027 int writeback)
1028 {
1029 struct kvm_msrs msrs;
1030 struct kvm_msr_entry *entries;
1031 int r, n;
1032 unsigned size;
1033
1034 r = -EFAULT;
1035 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1036 goto out;
1037
1038 r = -E2BIG;
1039 if (msrs.nmsrs >= MAX_IO_MSRS)
1040 goto out;
1041
1042 r = -ENOMEM;
1043 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1044 entries = vmalloc(size);
1045 if (!entries)
1046 goto out;
1047
1048 r = -EFAULT;
1049 if (copy_from_user(entries, user_msrs->entries, size))
1050 goto out_free;
1051
1052 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1053 if (r < 0)
1054 goto out_free;
1055
1056 r = -EFAULT;
1057 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1058 goto out_free;
1059
1060 r = n;
1061
1062 out_free:
1063 vfree(entries);
1064 out:
1065 return r;
1066 }
1067
1068 int kvm_dev_ioctl_check_extension(long ext)
1069 {
1070 int r;
1071
1072 switch (ext) {
1073 case KVM_CAP_IRQCHIP:
1074 case KVM_CAP_HLT:
1075 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1076 case KVM_CAP_SET_TSS_ADDR:
1077 case KVM_CAP_EXT_CPUID:
1078 case KVM_CAP_CLOCKSOURCE:
1079 case KVM_CAP_PIT:
1080 case KVM_CAP_NOP_IO_DELAY:
1081 case KVM_CAP_MP_STATE:
1082 case KVM_CAP_SYNC_MMU:
1083 case KVM_CAP_REINJECT_CONTROL:
1084 case KVM_CAP_IRQ_INJECT_STATUS:
1085 r = 1;
1086 break;
1087 case KVM_CAP_COALESCED_MMIO:
1088 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1089 break;
1090 case KVM_CAP_VAPIC:
1091 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1092 break;
1093 case KVM_CAP_NR_VCPUS:
1094 r = KVM_MAX_VCPUS;
1095 break;
1096 case KVM_CAP_NR_MEMSLOTS:
1097 r = KVM_MEMORY_SLOTS;
1098 break;
1099 case KVM_CAP_PV_MMU:
1100 r = !tdp_enabled;
1101 break;
1102 case KVM_CAP_IOMMU:
1103 r = iommu_found();
1104 break;
1105 default:
1106 r = 0;
1107 break;
1108 }
1109 return r;
1110
1111 }
1112
1113 long kvm_arch_dev_ioctl(struct file *filp,
1114 unsigned int ioctl, unsigned long arg)
1115 {
1116 void __user *argp = (void __user *)arg;
1117 long r;
1118
1119 switch (ioctl) {
1120 case KVM_GET_MSR_INDEX_LIST: {
1121 struct kvm_msr_list __user *user_msr_list = argp;
1122 struct kvm_msr_list msr_list;
1123 unsigned n;
1124
1125 r = -EFAULT;
1126 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1127 goto out;
1128 n = msr_list.nmsrs;
1129 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1130 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1131 goto out;
1132 r = -E2BIG;
1133 if (n < msr_list.nmsrs)
1134 goto out;
1135 r = -EFAULT;
1136 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1137 num_msrs_to_save * sizeof(u32)))
1138 goto out;
1139 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1140 &emulated_msrs,
1141 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1142 goto out;
1143 r = 0;
1144 break;
1145 }
1146 case KVM_GET_SUPPORTED_CPUID: {
1147 struct kvm_cpuid2 __user *cpuid_arg = argp;
1148 struct kvm_cpuid2 cpuid;
1149
1150 r = -EFAULT;
1151 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1152 goto out;
1153 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1154 cpuid_arg->entries);
1155 if (r)
1156 goto out;
1157
1158 r = -EFAULT;
1159 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1160 goto out;
1161 r = 0;
1162 break;
1163 }
1164 default:
1165 r = -EINVAL;
1166 }
1167 out:
1168 return r;
1169 }
1170
1171 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1172 {
1173 kvm_x86_ops->vcpu_load(vcpu, cpu);
1174 kvm_request_guest_time_update(vcpu);
1175 }
1176
1177 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1178 {
1179 kvm_x86_ops->vcpu_put(vcpu);
1180 kvm_put_guest_fpu(vcpu);
1181 }
1182
1183 static int is_efer_nx(void)
1184 {
1185 unsigned long long efer = 0;
1186
1187 rdmsrl_safe(MSR_EFER, &efer);
1188 return efer & EFER_NX;
1189 }
1190
1191 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1192 {
1193 int i;
1194 struct kvm_cpuid_entry2 *e, *entry;
1195
1196 entry = NULL;
1197 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1198 e = &vcpu->arch.cpuid_entries[i];
1199 if (e->function == 0x80000001) {
1200 entry = e;
1201 break;
1202 }
1203 }
1204 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1205 entry->edx &= ~(1 << 20);
1206 printk(KERN_INFO "kvm: guest NX capability removed\n");
1207 }
1208 }
1209
1210 /* when an old userspace process fills a new kernel module */
1211 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1212 struct kvm_cpuid *cpuid,
1213 struct kvm_cpuid_entry __user *entries)
1214 {
1215 int r, i;
1216 struct kvm_cpuid_entry *cpuid_entries;
1217
1218 r = -E2BIG;
1219 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1220 goto out;
1221 r = -ENOMEM;
1222 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1223 if (!cpuid_entries)
1224 goto out;
1225 r = -EFAULT;
1226 if (copy_from_user(cpuid_entries, entries,
1227 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1228 goto out_free;
1229 for (i = 0; i < cpuid->nent; i++) {
1230 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1231 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1232 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1233 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1234 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1235 vcpu->arch.cpuid_entries[i].index = 0;
1236 vcpu->arch.cpuid_entries[i].flags = 0;
1237 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1238 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1239 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1240 }
1241 vcpu->arch.cpuid_nent = cpuid->nent;
1242 cpuid_fix_nx_cap(vcpu);
1243 r = 0;
1244
1245 out_free:
1246 vfree(cpuid_entries);
1247 out:
1248 return r;
1249 }
1250
1251 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1252 struct kvm_cpuid2 *cpuid,
1253 struct kvm_cpuid_entry2 __user *entries)
1254 {
1255 int r;
1256
1257 r = -E2BIG;
1258 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1259 goto out;
1260 r = -EFAULT;
1261 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1262 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1263 goto out;
1264 vcpu->arch.cpuid_nent = cpuid->nent;
1265 return 0;
1266
1267 out:
1268 return r;
1269 }
1270
1271 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1272 struct kvm_cpuid2 *cpuid,
1273 struct kvm_cpuid_entry2 __user *entries)
1274 {
1275 int r;
1276
1277 r = -E2BIG;
1278 if (cpuid->nent < vcpu->arch.cpuid_nent)
1279 goto out;
1280 r = -EFAULT;
1281 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1282 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1283 goto out;
1284 return 0;
1285
1286 out:
1287 cpuid->nent = vcpu->arch.cpuid_nent;
1288 return r;
1289 }
1290
1291 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1292 u32 index)
1293 {
1294 entry->function = function;
1295 entry->index = index;
1296 cpuid_count(entry->function, entry->index,
1297 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1298 entry->flags = 0;
1299 }
1300
1301 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1302 u32 index, int *nent, int maxnent)
1303 {
1304 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1305 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1306 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1307 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1308 bit(X86_FEATURE_MCE) |
1309 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1310 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_MTRR) |
1311 bit(X86_FEATURE_PGE) | bit(X86_FEATURE_MCA) |
1312 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PAT) |
1313 bit(X86_FEATURE_PSE36) |
1314 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1315 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1316 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1317 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1318 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1319 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1320 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1321 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1322 bit(X86_FEATURE_PGE) |
1323 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1324 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1325 bit(X86_FEATURE_SYSCALL) |
1326 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1327 #ifdef CONFIG_X86_64
1328 bit(X86_FEATURE_LM) |
1329 #endif
1330 bit(X86_FEATURE_FXSR_OPT) |
1331 bit(X86_FEATURE_MMXEXT) |
1332 bit(X86_FEATURE_3DNOWEXT) |
1333 bit(X86_FEATURE_3DNOW);
1334 const u32 kvm_supported_word3_x86_features =
1335 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1336 const u32 kvm_supported_word6_x86_features =
1337 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1338 bit(X86_FEATURE_SVM);
1339
1340 /* all calls to cpuid_count() should be made on the same cpu */
1341 get_cpu();
1342 do_cpuid_1_ent(entry, function, index);
1343 ++*nent;
1344
1345 switch (function) {
1346 case 0:
1347 entry->eax = min(entry->eax, (u32)0xb);
1348 break;
1349 case 1:
1350 entry->edx &= kvm_supported_word0_x86_features;
1351 entry->ecx &= kvm_supported_word3_x86_features;
1352 break;
1353 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1354 * may return different values. This forces us to get_cpu() before
1355 * issuing the first command, and also to emulate this annoying behavior
1356 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1357 case 2: {
1358 int t, times = entry->eax & 0xff;
1359
1360 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1361 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1362 for (t = 1; t < times && *nent < maxnent; ++t) {
1363 do_cpuid_1_ent(&entry[t], function, 0);
1364 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1365 ++*nent;
1366 }
1367 break;
1368 }
1369 /* function 4 and 0xb have additional index. */
1370 case 4: {
1371 int i, cache_type;
1372
1373 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1374 /* read more entries until cache_type is zero */
1375 for (i = 1; *nent < maxnent; ++i) {
1376 cache_type = entry[i - 1].eax & 0x1f;
1377 if (!cache_type)
1378 break;
1379 do_cpuid_1_ent(&entry[i], function, i);
1380 entry[i].flags |=
1381 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1382 ++*nent;
1383 }
1384 break;
1385 }
1386 case 0xb: {
1387 int i, level_type;
1388
1389 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1390 /* read more entries until level_type is zero */
1391 for (i = 1; *nent < maxnent; ++i) {
1392 level_type = entry[i - 1].ecx & 0xff00;
1393 if (!level_type)
1394 break;
1395 do_cpuid_1_ent(&entry[i], function, i);
1396 entry[i].flags |=
1397 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1398 ++*nent;
1399 }
1400 break;
1401 }
1402 case 0x80000000:
1403 entry->eax = min(entry->eax, 0x8000001a);
1404 break;
1405 case 0x80000001:
1406 entry->edx &= kvm_supported_word1_x86_features;
1407 entry->ecx &= kvm_supported_word6_x86_features;
1408 break;
1409 }
1410 put_cpu();
1411 }
1412
1413 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1414 struct kvm_cpuid_entry2 __user *entries)
1415 {
1416 struct kvm_cpuid_entry2 *cpuid_entries;
1417 int limit, nent = 0, r = -E2BIG;
1418 u32 func;
1419
1420 if (cpuid->nent < 1)
1421 goto out;
1422 r = -ENOMEM;
1423 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1424 if (!cpuid_entries)
1425 goto out;
1426
1427 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1428 limit = cpuid_entries[0].eax;
1429 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1430 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1431 &nent, cpuid->nent);
1432 r = -E2BIG;
1433 if (nent >= cpuid->nent)
1434 goto out_free;
1435
1436 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1437 limit = cpuid_entries[nent - 1].eax;
1438 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1439 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1440 &nent, cpuid->nent);
1441 r = -EFAULT;
1442 if (copy_to_user(entries, cpuid_entries,
1443 nent * sizeof(struct kvm_cpuid_entry2)))
1444 goto out_free;
1445 cpuid->nent = nent;
1446 r = 0;
1447
1448 out_free:
1449 vfree(cpuid_entries);
1450 out:
1451 return r;
1452 }
1453
1454 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1455 struct kvm_lapic_state *s)
1456 {
1457 vcpu_load(vcpu);
1458 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1459 vcpu_put(vcpu);
1460
1461 return 0;
1462 }
1463
1464 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1465 struct kvm_lapic_state *s)
1466 {
1467 vcpu_load(vcpu);
1468 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1469 kvm_apic_post_state_restore(vcpu);
1470 vcpu_put(vcpu);
1471
1472 return 0;
1473 }
1474
1475 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1476 struct kvm_interrupt *irq)
1477 {
1478 if (irq->irq < 0 || irq->irq >= 256)
1479 return -EINVAL;
1480 if (irqchip_in_kernel(vcpu->kvm))
1481 return -ENXIO;
1482 vcpu_load(vcpu);
1483
1484 set_bit(irq->irq, vcpu->arch.irq_pending);
1485 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1486
1487 vcpu_put(vcpu);
1488
1489 return 0;
1490 }
1491
1492 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1493 {
1494 vcpu_load(vcpu);
1495 kvm_inject_nmi(vcpu);
1496 vcpu_put(vcpu);
1497
1498 return 0;
1499 }
1500
1501 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1502 struct kvm_tpr_access_ctl *tac)
1503 {
1504 if (tac->flags)
1505 return -EINVAL;
1506 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1507 return 0;
1508 }
1509
1510 long kvm_arch_vcpu_ioctl(struct file *filp,
1511 unsigned int ioctl, unsigned long arg)
1512 {
1513 struct kvm_vcpu *vcpu = filp->private_data;
1514 void __user *argp = (void __user *)arg;
1515 int r;
1516 struct kvm_lapic_state *lapic = NULL;
1517
1518 switch (ioctl) {
1519 case KVM_GET_LAPIC: {
1520 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1521
1522 r = -ENOMEM;
1523 if (!lapic)
1524 goto out;
1525 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1526 if (r)
1527 goto out;
1528 r = -EFAULT;
1529 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1530 goto out;
1531 r = 0;
1532 break;
1533 }
1534 case KVM_SET_LAPIC: {
1535 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1536 r = -ENOMEM;
1537 if (!lapic)
1538 goto out;
1539 r = -EFAULT;
1540 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1541 goto out;
1542 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1543 if (r)
1544 goto out;
1545 r = 0;
1546 break;
1547 }
1548 case KVM_INTERRUPT: {
1549 struct kvm_interrupt irq;
1550
1551 r = -EFAULT;
1552 if (copy_from_user(&irq, argp, sizeof irq))
1553 goto out;
1554 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1555 if (r)
1556 goto out;
1557 r = 0;
1558 break;
1559 }
1560 case KVM_NMI: {
1561 r = kvm_vcpu_ioctl_nmi(vcpu);
1562 if (r)
1563 goto out;
1564 r = 0;
1565 break;
1566 }
1567 case KVM_SET_CPUID: {
1568 struct kvm_cpuid __user *cpuid_arg = argp;
1569 struct kvm_cpuid cpuid;
1570
1571 r = -EFAULT;
1572 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1573 goto out;
1574 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1575 if (r)
1576 goto out;
1577 break;
1578 }
1579 case KVM_SET_CPUID2: {
1580 struct kvm_cpuid2 __user *cpuid_arg = argp;
1581 struct kvm_cpuid2 cpuid;
1582
1583 r = -EFAULT;
1584 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1585 goto out;
1586 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1587 cpuid_arg->entries);
1588 if (r)
1589 goto out;
1590 break;
1591 }
1592 case KVM_GET_CPUID2: {
1593 struct kvm_cpuid2 __user *cpuid_arg = argp;
1594 struct kvm_cpuid2 cpuid;
1595
1596 r = -EFAULT;
1597 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1598 goto out;
1599 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1600 cpuid_arg->entries);
1601 if (r)
1602 goto out;
1603 r = -EFAULT;
1604 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1605 goto out;
1606 r = 0;
1607 break;
1608 }
1609 case KVM_GET_MSRS:
1610 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1611 break;
1612 case KVM_SET_MSRS:
1613 r = msr_io(vcpu, argp, do_set_msr, 0);
1614 break;
1615 case KVM_TPR_ACCESS_REPORTING: {
1616 struct kvm_tpr_access_ctl tac;
1617
1618 r = -EFAULT;
1619 if (copy_from_user(&tac, argp, sizeof tac))
1620 goto out;
1621 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1622 if (r)
1623 goto out;
1624 r = -EFAULT;
1625 if (copy_to_user(argp, &tac, sizeof tac))
1626 goto out;
1627 r = 0;
1628 break;
1629 };
1630 case KVM_SET_VAPIC_ADDR: {
1631 struct kvm_vapic_addr va;
1632
1633 r = -EINVAL;
1634 if (!irqchip_in_kernel(vcpu->kvm))
1635 goto out;
1636 r = -EFAULT;
1637 if (copy_from_user(&va, argp, sizeof va))
1638 goto out;
1639 r = 0;
1640 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1641 break;
1642 }
1643 default:
1644 r = -EINVAL;
1645 }
1646 out:
1647 if (lapic)
1648 kfree(lapic);
1649 return r;
1650 }
1651
1652 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1653 {
1654 int ret;
1655
1656 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1657 return -1;
1658 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1659 return ret;
1660 }
1661
1662 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1663 u32 kvm_nr_mmu_pages)
1664 {
1665 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1666 return -EINVAL;
1667
1668 down_write(&kvm->slots_lock);
1669 spin_lock(&kvm->mmu_lock);
1670
1671 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1672 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1673
1674 spin_unlock(&kvm->mmu_lock);
1675 up_write(&kvm->slots_lock);
1676 return 0;
1677 }
1678
1679 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1680 {
1681 return kvm->arch.n_alloc_mmu_pages;
1682 }
1683
1684 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1685 {
1686 int i;
1687 struct kvm_mem_alias *alias;
1688
1689 for (i = 0; i < kvm->arch.naliases; ++i) {
1690 alias = &kvm->arch.aliases[i];
1691 if (gfn >= alias->base_gfn
1692 && gfn < alias->base_gfn + alias->npages)
1693 return alias->target_gfn + gfn - alias->base_gfn;
1694 }
1695 return gfn;
1696 }
1697
1698 /*
1699 * Set a new alias region. Aliases map a portion of physical memory into
1700 * another portion. This is useful for memory windows, for example the PC
1701 * VGA region.
1702 */
1703 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1704 struct kvm_memory_alias *alias)
1705 {
1706 int r, n;
1707 struct kvm_mem_alias *p;
1708
1709 r = -EINVAL;
1710 /* General sanity checks */
1711 if (alias->memory_size & (PAGE_SIZE - 1))
1712 goto out;
1713 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1714 goto out;
1715 if (alias->slot >= KVM_ALIAS_SLOTS)
1716 goto out;
1717 if (alias->guest_phys_addr + alias->memory_size
1718 < alias->guest_phys_addr)
1719 goto out;
1720 if (alias->target_phys_addr + alias->memory_size
1721 < alias->target_phys_addr)
1722 goto out;
1723
1724 down_write(&kvm->slots_lock);
1725 spin_lock(&kvm->mmu_lock);
1726
1727 p = &kvm->arch.aliases[alias->slot];
1728 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1729 p->npages = alias->memory_size >> PAGE_SHIFT;
1730 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1731
1732 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1733 if (kvm->arch.aliases[n - 1].npages)
1734 break;
1735 kvm->arch.naliases = n;
1736
1737 spin_unlock(&kvm->mmu_lock);
1738 kvm_mmu_zap_all(kvm);
1739
1740 up_write(&kvm->slots_lock);
1741
1742 return 0;
1743
1744 out:
1745 return r;
1746 }
1747
1748 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1749 {
1750 int r;
1751
1752 r = 0;
1753 switch (chip->chip_id) {
1754 case KVM_IRQCHIP_PIC_MASTER:
1755 memcpy(&chip->chip.pic,
1756 &pic_irqchip(kvm)->pics[0],
1757 sizeof(struct kvm_pic_state));
1758 break;
1759 case KVM_IRQCHIP_PIC_SLAVE:
1760 memcpy(&chip->chip.pic,
1761 &pic_irqchip(kvm)->pics[1],
1762 sizeof(struct kvm_pic_state));
1763 break;
1764 case KVM_IRQCHIP_IOAPIC:
1765 memcpy(&chip->chip.ioapic,
1766 ioapic_irqchip(kvm),
1767 sizeof(struct kvm_ioapic_state));
1768 break;
1769 default:
1770 r = -EINVAL;
1771 break;
1772 }
1773 return r;
1774 }
1775
1776 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1777 {
1778 int r;
1779
1780 r = 0;
1781 switch (chip->chip_id) {
1782 case KVM_IRQCHIP_PIC_MASTER:
1783 memcpy(&pic_irqchip(kvm)->pics[0],
1784 &chip->chip.pic,
1785 sizeof(struct kvm_pic_state));
1786 break;
1787 case KVM_IRQCHIP_PIC_SLAVE:
1788 memcpy(&pic_irqchip(kvm)->pics[1],
1789 &chip->chip.pic,
1790 sizeof(struct kvm_pic_state));
1791 break;
1792 case KVM_IRQCHIP_IOAPIC:
1793 memcpy(ioapic_irqchip(kvm),
1794 &chip->chip.ioapic,
1795 sizeof(struct kvm_ioapic_state));
1796 break;
1797 default:
1798 r = -EINVAL;
1799 break;
1800 }
1801 kvm_pic_update_irq(pic_irqchip(kvm));
1802 return r;
1803 }
1804
1805 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1806 {
1807 int r = 0;
1808
1809 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1810 return r;
1811 }
1812
1813 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1814 {
1815 int r = 0;
1816
1817 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1818 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1819 return r;
1820 }
1821
1822 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1823 struct kvm_reinject_control *control)
1824 {
1825 if (!kvm->arch.vpit)
1826 return -ENXIO;
1827 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1828 return 0;
1829 }
1830
1831 /*
1832 * Get (and clear) the dirty memory log for a memory slot.
1833 */
1834 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1835 struct kvm_dirty_log *log)
1836 {
1837 int r;
1838 int n;
1839 struct kvm_memory_slot *memslot;
1840 int is_dirty = 0;
1841
1842 down_write(&kvm->slots_lock);
1843
1844 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1845 if (r)
1846 goto out;
1847
1848 /* If nothing is dirty, don't bother messing with page tables. */
1849 if (is_dirty) {
1850 spin_lock(&kvm->mmu_lock);
1851 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1852 spin_unlock(&kvm->mmu_lock);
1853 kvm_flush_remote_tlbs(kvm);
1854 memslot = &kvm->memslots[log->slot];
1855 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1856 memset(memslot->dirty_bitmap, 0, n);
1857 }
1858 r = 0;
1859 out:
1860 up_write(&kvm->slots_lock);
1861 return r;
1862 }
1863
1864 long kvm_arch_vm_ioctl(struct file *filp,
1865 unsigned int ioctl, unsigned long arg)
1866 {
1867 struct kvm *kvm = filp->private_data;
1868 void __user *argp = (void __user *)arg;
1869 int r = -EINVAL;
1870 /*
1871 * This union makes it completely explicit to gcc-3.x
1872 * that these two variables' stack usage should be
1873 * combined, not added together.
1874 */
1875 union {
1876 struct kvm_pit_state ps;
1877 struct kvm_memory_alias alias;
1878 } u;
1879
1880 switch (ioctl) {
1881 case KVM_SET_TSS_ADDR:
1882 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1883 if (r < 0)
1884 goto out;
1885 break;
1886 case KVM_SET_MEMORY_REGION: {
1887 struct kvm_memory_region kvm_mem;
1888 struct kvm_userspace_memory_region kvm_userspace_mem;
1889
1890 r = -EFAULT;
1891 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1892 goto out;
1893 kvm_userspace_mem.slot = kvm_mem.slot;
1894 kvm_userspace_mem.flags = kvm_mem.flags;
1895 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1896 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1897 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1898 if (r)
1899 goto out;
1900 break;
1901 }
1902 case KVM_SET_NR_MMU_PAGES:
1903 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1904 if (r)
1905 goto out;
1906 break;
1907 case KVM_GET_NR_MMU_PAGES:
1908 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1909 break;
1910 case KVM_SET_MEMORY_ALIAS:
1911 r = -EFAULT;
1912 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1913 goto out;
1914 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1915 if (r)
1916 goto out;
1917 break;
1918 case KVM_CREATE_IRQCHIP:
1919 r = -ENOMEM;
1920 kvm->arch.vpic = kvm_create_pic(kvm);
1921 if (kvm->arch.vpic) {
1922 r = kvm_ioapic_init(kvm);
1923 if (r) {
1924 kfree(kvm->arch.vpic);
1925 kvm->arch.vpic = NULL;
1926 goto out;
1927 }
1928 } else
1929 goto out;
1930 r = kvm_setup_default_irq_routing(kvm);
1931 if (r) {
1932 kfree(kvm->arch.vpic);
1933 kfree(kvm->arch.vioapic);
1934 goto out;
1935 }
1936 break;
1937 case KVM_CREATE_PIT:
1938 mutex_lock(&kvm->lock);
1939 r = -EEXIST;
1940 if (kvm->arch.vpit)
1941 goto create_pit_unlock;
1942 r = -ENOMEM;
1943 kvm->arch.vpit = kvm_create_pit(kvm);
1944 if (kvm->arch.vpit)
1945 r = 0;
1946 create_pit_unlock:
1947 mutex_unlock(&kvm->lock);
1948 break;
1949 case KVM_IRQ_LINE_STATUS:
1950 case KVM_IRQ_LINE: {
1951 struct kvm_irq_level irq_event;
1952
1953 r = -EFAULT;
1954 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1955 goto out;
1956 if (irqchip_in_kernel(kvm)) {
1957 __s32 status;
1958 mutex_lock(&kvm->lock);
1959 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1960 irq_event.irq, irq_event.level);
1961 mutex_unlock(&kvm->lock);
1962 if (ioctl == KVM_IRQ_LINE_STATUS) {
1963 irq_event.status = status;
1964 if (copy_to_user(argp, &irq_event,
1965 sizeof irq_event))
1966 goto out;
1967 }
1968 r = 0;
1969 }
1970 break;
1971 }
1972 case KVM_GET_IRQCHIP: {
1973 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1974 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1975
1976 r = -ENOMEM;
1977 if (!chip)
1978 goto out;
1979 r = -EFAULT;
1980 if (copy_from_user(chip, argp, sizeof *chip))
1981 goto get_irqchip_out;
1982 r = -ENXIO;
1983 if (!irqchip_in_kernel(kvm))
1984 goto get_irqchip_out;
1985 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1986 if (r)
1987 goto get_irqchip_out;
1988 r = -EFAULT;
1989 if (copy_to_user(argp, chip, sizeof *chip))
1990 goto get_irqchip_out;
1991 r = 0;
1992 get_irqchip_out:
1993 kfree(chip);
1994 if (r)
1995 goto out;
1996 break;
1997 }
1998 case KVM_SET_IRQCHIP: {
1999 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2000 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2001
2002 r = -ENOMEM;
2003 if (!chip)
2004 goto out;
2005 r = -EFAULT;
2006 if (copy_from_user(chip, argp, sizeof *chip))
2007 goto set_irqchip_out;
2008 r = -ENXIO;
2009 if (!irqchip_in_kernel(kvm))
2010 goto set_irqchip_out;
2011 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2012 if (r)
2013 goto set_irqchip_out;
2014 r = 0;
2015 set_irqchip_out:
2016 kfree(chip);
2017 if (r)
2018 goto out;
2019 break;
2020 }
2021 case KVM_GET_PIT: {
2022 r = -EFAULT;
2023 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2024 goto out;
2025 r = -ENXIO;
2026 if (!kvm->arch.vpit)
2027 goto out;
2028 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2029 if (r)
2030 goto out;
2031 r = -EFAULT;
2032 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2033 goto out;
2034 r = 0;
2035 break;
2036 }
2037 case KVM_SET_PIT: {
2038 r = -EFAULT;
2039 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2040 goto out;
2041 r = -ENXIO;
2042 if (!kvm->arch.vpit)
2043 goto out;
2044 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2045 if (r)
2046 goto out;
2047 r = 0;
2048 break;
2049 }
2050 case KVM_REINJECT_CONTROL: {
2051 struct kvm_reinject_control control;
2052 r = -EFAULT;
2053 if (copy_from_user(&control, argp, sizeof(control)))
2054 goto out;
2055 r = kvm_vm_ioctl_reinject(kvm, &control);
2056 if (r)
2057 goto out;
2058 r = 0;
2059 break;
2060 }
2061 default:
2062 ;
2063 }
2064 out:
2065 return r;
2066 }
2067
2068 static void kvm_init_msr_list(void)
2069 {
2070 u32 dummy[2];
2071 unsigned i, j;
2072
2073 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2074 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2075 continue;
2076 if (j < i)
2077 msrs_to_save[j] = msrs_to_save[i];
2078 j++;
2079 }
2080 num_msrs_to_save = j;
2081 }
2082
2083 /*
2084 * Only apic need an MMIO device hook, so shortcut now..
2085 */
2086 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2087 gpa_t addr, int len,
2088 int is_write)
2089 {
2090 struct kvm_io_device *dev;
2091
2092 if (vcpu->arch.apic) {
2093 dev = &vcpu->arch.apic->dev;
2094 if (dev->in_range(dev, addr, len, is_write))
2095 return dev;
2096 }
2097 return NULL;
2098 }
2099
2100
2101 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2102 gpa_t addr, int len,
2103 int is_write)
2104 {
2105 struct kvm_io_device *dev;
2106
2107 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2108 if (dev == NULL)
2109 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2110 is_write);
2111 return dev;
2112 }
2113
2114 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2115 struct kvm_vcpu *vcpu)
2116 {
2117 void *data = val;
2118 int r = X86EMUL_CONTINUE;
2119
2120 while (bytes) {
2121 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2122 unsigned offset = addr & (PAGE_SIZE-1);
2123 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2124 int ret;
2125
2126 if (gpa == UNMAPPED_GVA) {
2127 r = X86EMUL_PROPAGATE_FAULT;
2128 goto out;
2129 }
2130 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2131 if (ret < 0) {
2132 r = X86EMUL_UNHANDLEABLE;
2133 goto out;
2134 }
2135
2136 bytes -= toread;
2137 data += toread;
2138 addr += toread;
2139 }
2140 out:
2141 return r;
2142 }
2143
2144 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2145 struct kvm_vcpu *vcpu)
2146 {
2147 void *data = val;
2148 int r = X86EMUL_CONTINUE;
2149
2150 while (bytes) {
2151 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2152 unsigned offset = addr & (PAGE_SIZE-1);
2153 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2154 int ret;
2155
2156 if (gpa == UNMAPPED_GVA) {
2157 r = X86EMUL_PROPAGATE_FAULT;
2158 goto out;
2159 }
2160 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2161 if (ret < 0) {
2162 r = X86EMUL_UNHANDLEABLE;
2163 goto out;
2164 }
2165
2166 bytes -= towrite;
2167 data += towrite;
2168 addr += towrite;
2169 }
2170 out:
2171 return r;
2172 }
2173
2174
2175 static int emulator_read_emulated(unsigned long addr,
2176 void *val,
2177 unsigned int bytes,
2178 struct kvm_vcpu *vcpu)
2179 {
2180 struct kvm_io_device *mmio_dev;
2181 gpa_t gpa;
2182
2183 if (vcpu->mmio_read_completed) {
2184 memcpy(val, vcpu->mmio_data, bytes);
2185 vcpu->mmio_read_completed = 0;
2186 return X86EMUL_CONTINUE;
2187 }
2188
2189 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2190
2191 /* For APIC access vmexit */
2192 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2193 goto mmio;
2194
2195 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2196 == X86EMUL_CONTINUE)
2197 return X86EMUL_CONTINUE;
2198 if (gpa == UNMAPPED_GVA)
2199 return X86EMUL_PROPAGATE_FAULT;
2200
2201 mmio:
2202 /*
2203 * Is this MMIO handled locally?
2204 */
2205 mutex_lock(&vcpu->kvm->lock);
2206 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2207 if (mmio_dev) {
2208 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2209 mutex_unlock(&vcpu->kvm->lock);
2210 return X86EMUL_CONTINUE;
2211 }
2212 mutex_unlock(&vcpu->kvm->lock);
2213
2214 vcpu->mmio_needed = 1;
2215 vcpu->mmio_phys_addr = gpa;
2216 vcpu->mmio_size = bytes;
2217 vcpu->mmio_is_write = 0;
2218
2219 return X86EMUL_UNHANDLEABLE;
2220 }
2221
2222 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2223 const void *val, int bytes)
2224 {
2225 int ret;
2226
2227 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2228 if (ret < 0)
2229 return 0;
2230 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2231 return 1;
2232 }
2233
2234 static int emulator_write_emulated_onepage(unsigned long addr,
2235 const void *val,
2236 unsigned int bytes,
2237 struct kvm_vcpu *vcpu)
2238 {
2239 struct kvm_io_device *mmio_dev;
2240 gpa_t gpa;
2241
2242 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2243
2244 if (gpa == UNMAPPED_GVA) {
2245 kvm_inject_page_fault(vcpu, addr, 2);
2246 return X86EMUL_PROPAGATE_FAULT;
2247 }
2248
2249 /* For APIC access vmexit */
2250 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2251 goto mmio;
2252
2253 if (emulator_write_phys(vcpu, gpa, val, bytes))
2254 return X86EMUL_CONTINUE;
2255
2256 mmio:
2257 /*
2258 * Is this MMIO handled locally?
2259 */
2260 mutex_lock(&vcpu->kvm->lock);
2261 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2262 if (mmio_dev) {
2263 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2264 mutex_unlock(&vcpu->kvm->lock);
2265 return X86EMUL_CONTINUE;
2266 }
2267 mutex_unlock(&vcpu->kvm->lock);
2268
2269 vcpu->mmio_needed = 1;
2270 vcpu->mmio_phys_addr = gpa;
2271 vcpu->mmio_size = bytes;
2272 vcpu->mmio_is_write = 1;
2273 memcpy(vcpu->mmio_data, val, bytes);
2274
2275 return X86EMUL_CONTINUE;
2276 }
2277
2278 int emulator_write_emulated(unsigned long addr,
2279 const void *val,
2280 unsigned int bytes,
2281 struct kvm_vcpu *vcpu)
2282 {
2283 /* Crossing a page boundary? */
2284 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2285 int rc, now;
2286
2287 now = -addr & ~PAGE_MASK;
2288 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2289 if (rc != X86EMUL_CONTINUE)
2290 return rc;
2291 addr += now;
2292 val += now;
2293 bytes -= now;
2294 }
2295 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2296 }
2297 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2298
2299 static int emulator_cmpxchg_emulated(unsigned long addr,
2300 const void *old,
2301 const void *new,
2302 unsigned int bytes,
2303 struct kvm_vcpu *vcpu)
2304 {
2305 static int reported;
2306
2307 if (!reported) {
2308 reported = 1;
2309 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2310 }
2311 #ifndef CONFIG_X86_64
2312 /* guests cmpxchg8b have to be emulated atomically */
2313 if (bytes == 8) {
2314 gpa_t gpa;
2315 struct page *page;
2316 char *kaddr;
2317 u64 val;
2318
2319 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2320
2321 if (gpa == UNMAPPED_GVA ||
2322 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2323 goto emul_write;
2324
2325 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2326 goto emul_write;
2327
2328 val = *(u64 *)new;
2329
2330 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2331
2332 kaddr = kmap_atomic(page, KM_USER0);
2333 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2334 kunmap_atomic(kaddr, KM_USER0);
2335 kvm_release_page_dirty(page);
2336 }
2337 emul_write:
2338 #endif
2339
2340 return emulator_write_emulated(addr, new, bytes, vcpu);
2341 }
2342
2343 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2344 {
2345 return kvm_x86_ops->get_segment_base(vcpu, seg);
2346 }
2347
2348 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2349 {
2350 kvm_mmu_invlpg(vcpu, address);
2351 return X86EMUL_CONTINUE;
2352 }
2353
2354 int emulate_clts(struct kvm_vcpu *vcpu)
2355 {
2356 KVMTRACE_0D(CLTS, vcpu, handler);
2357 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2358 return X86EMUL_CONTINUE;
2359 }
2360
2361 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2362 {
2363 struct kvm_vcpu *vcpu = ctxt->vcpu;
2364
2365 switch (dr) {
2366 case 0 ... 3:
2367 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2368 return X86EMUL_CONTINUE;
2369 default:
2370 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2371 return X86EMUL_UNHANDLEABLE;
2372 }
2373 }
2374
2375 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2376 {
2377 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2378 int exception;
2379
2380 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2381 if (exception) {
2382 /* FIXME: better handling */
2383 return X86EMUL_UNHANDLEABLE;
2384 }
2385 return X86EMUL_CONTINUE;
2386 }
2387
2388 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2389 {
2390 u8 opcodes[4];
2391 unsigned long rip = kvm_rip_read(vcpu);
2392 unsigned long rip_linear;
2393
2394 if (!printk_ratelimit())
2395 return;
2396
2397 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2398
2399 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2400
2401 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2402 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2403 }
2404 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2405
2406 static struct x86_emulate_ops emulate_ops = {
2407 .read_std = kvm_read_guest_virt,
2408 .read_emulated = emulator_read_emulated,
2409 .write_emulated = emulator_write_emulated,
2410 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2411 };
2412
2413 static void cache_all_regs(struct kvm_vcpu *vcpu)
2414 {
2415 kvm_register_read(vcpu, VCPU_REGS_RAX);
2416 kvm_register_read(vcpu, VCPU_REGS_RSP);
2417 kvm_register_read(vcpu, VCPU_REGS_RIP);
2418 vcpu->arch.regs_dirty = ~0;
2419 }
2420
2421 int emulate_instruction(struct kvm_vcpu *vcpu,
2422 struct kvm_run *run,
2423 unsigned long cr2,
2424 u16 error_code,
2425 int emulation_type)
2426 {
2427 int r, shadow_mask;
2428 struct decode_cache *c;
2429
2430 kvm_clear_exception_queue(vcpu);
2431 vcpu->arch.mmio_fault_cr2 = cr2;
2432 /*
2433 * TODO: fix x86_emulate.c to use guest_read/write_register
2434 * instead of direct ->regs accesses, can save hundred cycles
2435 * on Intel for instructions that don't read/change RSP, for
2436 * for example.
2437 */
2438 cache_all_regs(vcpu);
2439
2440 vcpu->mmio_is_write = 0;
2441 vcpu->arch.pio.string = 0;
2442
2443 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2444 int cs_db, cs_l;
2445 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2446
2447 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2448 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2449 vcpu->arch.emulate_ctxt.mode =
2450 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2451 ? X86EMUL_MODE_REAL : cs_l
2452 ? X86EMUL_MODE_PROT64 : cs_db
2453 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2454
2455 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2456
2457 /* Reject the instructions other than VMCALL/VMMCALL when
2458 * try to emulate invalid opcode */
2459 c = &vcpu->arch.emulate_ctxt.decode;
2460 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2461 (!(c->twobyte && c->b == 0x01 &&
2462 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2463 c->modrm_mod == 3 && c->modrm_rm == 1)))
2464 return EMULATE_FAIL;
2465
2466 ++vcpu->stat.insn_emulation;
2467 if (r) {
2468 ++vcpu->stat.insn_emulation_fail;
2469 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2470 return EMULATE_DONE;
2471 return EMULATE_FAIL;
2472 }
2473 }
2474
2475 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2476 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2477
2478 if (r == 0)
2479 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2480
2481 if (vcpu->arch.pio.string)
2482 return EMULATE_DO_MMIO;
2483
2484 if ((r || vcpu->mmio_is_write) && run) {
2485 run->exit_reason = KVM_EXIT_MMIO;
2486 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2487 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2488 run->mmio.len = vcpu->mmio_size;
2489 run->mmio.is_write = vcpu->mmio_is_write;
2490 }
2491
2492 if (r) {
2493 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2494 return EMULATE_DONE;
2495 if (!vcpu->mmio_needed) {
2496 kvm_report_emulation_failure(vcpu, "mmio");
2497 return EMULATE_FAIL;
2498 }
2499 return EMULATE_DO_MMIO;
2500 }
2501
2502 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2503
2504 if (vcpu->mmio_is_write) {
2505 vcpu->mmio_needed = 0;
2506 return EMULATE_DO_MMIO;
2507 }
2508
2509 return EMULATE_DONE;
2510 }
2511 EXPORT_SYMBOL_GPL(emulate_instruction);
2512
2513 static int pio_copy_data(struct kvm_vcpu *vcpu)
2514 {
2515 void *p = vcpu->arch.pio_data;
2516 gva_t q = vcpu->arch.pio.guest_gva;
2517 unsigned bytes;
2518 int ret;
2519
2520 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2521 if (vcpu->arch.pio.in)
2522 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2523 else
2524 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2525 return ret;
2526 }
2527
2528 int complete_pio(struct kvm_vcpu *vcpu)
2529 {
2530 struct kvm_pio_request *io = &vcpu->arch.pio;
2531 long delta;
2532 int r;
2533 unsigned long val;
2534
2535 if (!io->string) {
2536 if (io->in) {
2537 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2538 memcpy(&val, vcpu->arch.pio_data, io->size);
2539 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2540 }
2541 } else {
2542 if (io->in) {
2543 r = pio_copy_data(vcpu);
2544 if (r)
2545 return r;
2546 }
2547
2548 delta = 1;
2549 if (io->rep) {
2550 delta *= io->cur_count;
2551 /*
2552 * The size of the register should really depend on
2553 * current address size.
2554 */
2555 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2556 val -= delta;
2557 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2558 }
2559 if (io->down)
2560 delta = -delta;
2561 delta *= io->size;
2562 if (io->in) {
2563 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2564 val += delta;
2565 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2566 } else {
2567 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2568 val += delta;
2569 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2570 }
2571 }
2572
2573 io->count -= io->cur_count;
2574 io->cur_count = 0;
2575
2576 return 0;
2577 }
2578
2579 static void kernel_pio(struct kvm_io_device *pio_dev,
2580 struct kvm_vcpu *vcpu,
2581 void *pd)
2582 {
2583 /* TODO: String I/O for in kernel device */
2584
2585 mutex_lock(&vcpu->kvm->lock);
2586 if (vcpu->arch.pio.in)
2587 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2588 vcpu->arch.pio.size,
2589 pd);
2590 else
2591 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2592 vcpu->arch.pio.size,
2593 pd);
2594 mutex_unlock(&vcpu->kvm->lock);
2595 }
2596
2597 static void pio_string_write(struct kvm_io_device *pio_dev,
2598 struct kvm_vcpu *vcpu)
2599 {
2600 struct kvm_pio_request *io = &vcpu->arch.pio;
2601 void *pd = vcpu->arch.pio_data;
2602 int i;
2603
2604 mutex_lock(&vcpu->kvm->lock);
2605 for (i = 0; i < io->cur_count; i++) {
2606 kvm_iodevice_write(pio_dev, io->port,
2607 io->size,
2608 pd);
2609 pd += io->size;
2610 }
2611 mutex_unlock(&vcpu->kvm->lock);
2612 }
2613
2614 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2615 gpa_t addr, int len,
2616 int is_write)
2617 {
2618 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2619 }
2620
2621 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2622 int size, unsigned port)
2623 {
2624 struct kvm_io_device *pio_dev;
2625 unsigned long val;
2626
2627 vcpu->run->exit_reason = KVM_EXIT_IO;
2628 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2629 vcpu->run->io.size = vcpu->arch.pio.size = size;
2630 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2631 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2632 vcpu->run->io.port = vcpu->arch.pio.port = port;
2633 vcpu->arch.pio.in = in;
2634 vcpu->arch.pio.string = 0;
2635 vcpu->arch.pio.down = 0;
2636 vcpu->arch.pio.rep = 0;
2637
2638 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2639 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2640 handler);
2641 else
2642 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2643 handler);
2644
2645 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2646 memcpy(vcpu->arch.pio_data, &val, 4);
2647
2648 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2649 if (pio_dev) {
2650 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2651 complete_pio(vcpu);
2652 return 1;
2653 }
2654 return 0;
2655 }
2656 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2657
2658 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2659 int size, unsigned long count, int down,
2660 gva_t address, int rep, unsigned port)
2661 {
2662 unsigned now, in_page;
2663 int ret = 0;
2664 struct kvm_io_device *pio_dev;
2665
2666 vcpu->run->exit_reason = KVM_EXIT_IO;
2667 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2668 vcpu->run->io.size = vcpu->arch.pio.size = size;
2669 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2670 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2671 vcpu->run->io.port = vcpu->arch.pio.port = port;
2672 vcpu->arch.pio.in = in;
2673 vcpu->arch.pio.string = 1;
2674 vcpu->arch.pio.down = down;
2675 vcpu->arch.pio.rep = rep;
2676
2677 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2678 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2679 handler);
2680 else
2681 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2682 handler);
2683
2684 if (!count) {
2685 kvm_x86_ops->skip_emulated_instruction(vcpu);
2686 return 1;
2687 }
2688
2689 if (!down)
2690 in_page = PAGE_SIZE - offset_in_page(address);
2691 else
2692 in_page = offset_in_page(address) + size;
2693 now = min(count, (unsigned long)in_page / size);
2694 if (!now)
2695 now = 1;
2696 if (down) {
2697 /*
2698 * String I/O in reverse. Yuck. Kill the guest, fix later.
2699 */
2700 pr_unimpl(vcpu, "guest string pio down\n");
2701 kvm_inject_gp(vcpu, 0);
2702 return 1;
2703 }
2704 vcpu->run->io.count = now;
2705 vcpu->arch.pio.cur_count = now;
2706
2707 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2708 kvm_x86_ops->skip_emulated_instruction(vcpu);
2709
2710 vcpu->arch.pio.guest_gva = address;
2711
2712 pio_dev = vcpu_find_pio_dev(vcpu, port,
2713 vcpu->arch.pio.cur_count,
2714 !vcpu->arch.pio.in);
2715 if (!vcpu->arch.pio.in) {
2716 /* string PIO write */
2717 ret = pio_copy_data(vcpu);
2718 if (ret == X86EMUL_PROPAGATE_FAULT) {
2719 kvm_inject_gp(vcpu, 0);
2720 return 1;
2721 }
2722 if (ret == 0 && pio_dev) {
2723 pio_string_write(pio_dev, vcpu);
2724 complete_pio(vcpu);
2725 if (vcpu->arch.pio.count == 0)
2726 ret = 1;
2727 }
2728 } else if (pio_dev)
2729 pr_unimpl(vcpu, "no string pio read support yet, "
2730 "port %x size %d count %ld\n",
2731 port, size, count);
2732
2733 return ret;
2734 }
2735 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2736
2737 static void bounce_off(void *info)
2738 {
2739 /* nothing */
2740 }
2741
2742 static unsigned int ref_freq;
2743 static unsigned long tsc_khz_ref;
2744
2745 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2746 void *data)
2747 {
2748 struct cpufreq_freqs *freq = data;
2749 struct kvm *kvm;
2750 struct kvm_vcpu *vcpu;
2751 int i, send_ipi = 0;
2752
2753 if (!ref_freq)
2754 ref_freq = freq->old;
2755
2756 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2757 return 0;
2758 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2759 return 0;
2760 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2761
2762 spin_lock(&kvm_lock);
2763 list_for_each_entry(kvm, &vm_list, vm_list) {
2764 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2765 vcpu = kvm->vcpus[i];
2766 if (!vcpu)
2767 continue;
2768 if (vcpu->cpu != freq->cpu)
2769 continue;
2770 if (!kvm_request_guest_time_update(vcpu))
2771 continue;
2772 if (vcpu->cpu != smp_processor_id())
2773 send_ipi++;
2774 }
2775 }
2776 spin_unlock(&kvm_lock);
2777
2778 if (freq->old < freq->new && send_ipi) {
2779 /*
2780 * We upscale the frequency. Must make the guest
2781 * doesn't see old kvmclock values while running with
2782 * the new frequency, otherwise we risk the guest sees
2783 * time go backwards.
2784 *
2785 * In case we update the frequency for another cpu
2786 * (which might be in guest context) send an interrupt
2787 * to kick the cpu out of guest context. Next time
2788 * guest context is entered kvmclock will be updated,
2789 * so the guest will not see stale values.
2790 */
2791 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2792 }
2793 return 0;
2794 }
2795
2796 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2797 .notifier_call = kvmclock_cpufreq_notifier
2798 };
2799
2800 int kvm_arch_init(void *opaque)
2801 {
2802 int r, cpu;
2803 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2804
2805 if (kvm_x86_ops) {
2806 printk(KERN_ERR "kvm: already loaded the other module\n");
2807 r = -EEXIST;
2808 goto out;
2809 }
2810
2811 if (!ops->cpu_has_kvm_support()) {
2812 printk(KERN_ERR "kvm: no hardware support\n");
2813 r = -EOPNOTSUPP;
2814 goto out;
2815 }
2816 if (ops->disabled_by_bios()) {
2817 printk(KERN_ERR "kvm: disabled by bios\n");
2818 r = -EOPNOTSUPP;
2819 goto out;
2820 }
2821
2822 r = kvm_mmu_module_init();
2823 if (r)
2824 goto out;
2825
2826 kvm_init_msr_list();
2827
2828 kvm_x86_ops = ops;
2829 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2830 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2831 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2832 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2833
2834 for_each_possible_cpu(cpu)
2835 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2836 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2837 tsc_khz_ref = tsc_khz;
2838 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2839 CPUFREQ_TRANSITION_NOTIFIER);
2840 }
2841
2842 return 0;
2843
2844 out:
2845 return r;
2846 }
2847
2848 void kvm_arch_exit(void)
2849 {
2850 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2851 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2852 CPUFREQ_TRANSITION_NOTIFIER);
2853 kvm_x86_ops = NULL;
2854 kvm_mmu_module_exit();
2855 }
2856
2857 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2858 {
2859 ++vcpu->stat.halt_exits;
2860 KVMTRACE_0D(HLT, vcpu, handler);
2861 if (irqchip_in_kernel(vcpu->kvm)) {
2862 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2863 return 1;
2864 } else {
2865 vcpu->run->exit_reason = KVM_EXIT_HLT;
2866 return 0;
2867 }
2868 }
2869 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2870
2871 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2872 unsigned long a1)
2873 {
2874 if (is_long_mode(vcpu))
2875 return a0;
2876 else
2877 return a0 | ((gpa_t)a1 << 32);
2878 }
2879
2880 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2881 {
2882 unsigned long nr, a0, a1, a2, a3, ret;
2883 int r = 1;
2884
2885 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2886 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2887 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2888 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2889 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2890
2891 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2892
2893 if (!is_long_mode(vcpu)) {
2894 nr &= 0xFFFFFFFF;
2895 a0 &= 0xFFFFFFFF;
2896 a1 &= 0xFFFFFFFF;
2897 a2 &= 0xFFFFFFFF;
2898 a3 &= 0xFFFFFFFF;
2899 }
2900
2901 switch (nr) {
2902 case KVM_HC_VAPIC_POLL_IRQ:
2903 ret = 0;
2904 break;
2905 case KVM_HC_MMU_OP:
2906 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2907 break;
2908 default:
2909 ret = -KVM_ENOSYS;
2910 break;
2911 }
2912 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2913 ++vcpu->stat.hypercalls;
2914 return r;
2915 }
2916 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2917
2918 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2919 {
2920 char instruction[3];
2921 int ret = 0;
2922 unsigned long rip = kvm_rip_read(vcpu);
2923
2924
2925 /*
2926 * Blow out the MMU to ensure that no other VCPU has an active mapping
2927 * to ensure that the updated hypercall appears atomically across all
2928 * VCPUs.
2929 */
2930 kvm_mmu_zap_all(vcpu->kvm);
2931
2932 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2933 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2934 != X86EMUL_CONTINUE)
2935 ret = -EFAULT;
2936
2937 return ret;
2938 }
2939
2940 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2941 {
2942 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2943 }
2944
2945 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2946 {
2947 struct descriptor_table dt = { limit, base };
2948
2949 kvm_x86_ops->set_gdt(vcpu, &dt);
2950 }
2951
2952 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2953 {
2954 struct descriptor_table dt = { limit, base };
2955
2956 kvm_x86_ops->set_idt(vcpu, &dt);
2957 }
2958
2959 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2960 unsigned long *rflags)
2961 {
2962 kvm_lmsw(vcpu, msw);
2963 *rflags = kvm_x86_ops->get_rflags(vcpu);
2964 }
2965
2966 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2967 {
2968 unsigned long value;
2969
2970 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2971 switch (cr) {
2972 case 0:
2973 value = vcpu->arch.cr0;
2974 break;
2975 case 2:
2976 value = vcpu->arch.cr2;
2977 break;
2978 case 3:
2979 value = vcpu->arch.cr3;
2980 break;
2981 case 4:
2982 value = vcpu->arch.cr4;
2983 break;
2984 case 8:
2985 value = kvm_get_cr8(vcpu);
2986 break;
2987 default:
2988 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2989 return 0;
2990 }
2991 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2992 (u32)((u64)value >> 32), handler);
2993
2994 return value;
2995 }
2996
2997 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2998 unsigned long *rflags)
2999 {
3000 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
3001 (u32)((u64)val >> 32), handler);
3002
3003 switch (cr) {
3004 case 0:
3005 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3006 *rflags = kvm_x86_ops->get_rflags(vcpu);
3007 break;
3008 case 2:
3009 vcpu->arch.cr2 = val;
3010 break;
3011 case 3:
3012 kvm_set_cr3(vcpu, val);
3013 break;
3014 case 4:
3015 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3016 break;
3017 case 8:
3018 kvm_set_cr8(vcpu, val & 0xfUL);
3019 break;
3020 default:
3021 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3022 }
3023 }
3024
3025 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3026 {
3027 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3028 int j, nent = vcpu->arch.cpuid_nent;
3029
3030 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3031 /* when no next entry is found, the current entry[i] is reselected */
3032 for (j = i + 1; ; j = (j + 1) % nent) {
3033 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3034 if (ej->function == e->function) {
3035 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3036 return j;
3037 }
3038 }
3039 return 0; /* silence gcc, even though control never reaches here */
3040 }
3041
3042 /* find an entry with matching function, matching index (if needed), and that
3043 * should be read next (if it's stateful) */
3044 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3045 u32 function, u32 index)
3046 {
3047 if (e->function != function)
3048 return 0;
3049 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3050 return 0;
3051 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3052 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3053 return 0;
3054 return 1;
3055 }
3056
3057 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3058 u32 function, u32 index)
3059 {
3060 int i;
3061 struct kvm_cpuid_entry2 *best = NULL;
3062
3063 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3064 struct kvm_cpuid_entry2 *e;
3065
3066 e = &vcpu->arch.cpuid_entries[i];
3067 if (is_matching_cpuid_entry(e, function, index)) {
3068 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3069 move_to_next_stateful_cpuid_entry(vcpu, i);
3070 best = e;
3071 break;
3072 }
3073 /*
3074 * Both basic or both extended?
3075 */
3076 if (((e->function ^ function) & 0x80000000) == 0)
3077 if (!best || e->function > best->function)
3078 best = e;
3079 }
3080 return best;
3081 }
3082
3083 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3084 {
3085 u32 function, index;
3086 struct kvm_cpuid_entry2 *best;
3087
3088 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3089 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3090 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3091 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3092 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3093 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3094 best = kvm_find_cpuid_entry(vcpu, function, index);
3095 if (best) {
3096 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3097 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3098 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3099 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3100 }
3101 kvm_x86_ops->skip_emulated_instruction(vcpu);
3102 KVMTRACE_5D(CPUID, vcpu, function,
3103 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3104 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3105 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3106 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3107 }
3108 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3109
3110 /*
3111 * Check if userspace requested an interrupt window, and that the
3112 * interrupt window is open.
3113 *
3114 * No need to exit to userspace if we already have an interrupt queued.
3115 */
3116 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3117 struct kvm_run *kvm_run)
3118 {
3119 return (!vcpu->arch.irq_summary &&
3120 kvm_run->request_interrupt_window &&
3121 vcpu->arch.interrupt_window_open &&
3122 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3123 }
3124
3125 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3126 struct kvm_run *kvm_run)
3127 {
3128 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3129 kvm_run->cr8 = kvm_get_cr8(vcpu);
3130 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3131 if (irqchip_in_kernel(vcpu->kvm))
3132 kvm_run->ready_for_interrupt_injection = 1;
3133 else
3134 kvm_run->ready_for_interrupt_injection =
3135 (vcpu->arch.interrupt_window_open &&
3136 vcpu->arch.irq_summary == 0);
3137 }
3138
3139 static void vapic_enter(struct kvm_vcpu *vcpu)
3140 {
3141 struct kvm_lapic *apic = vcpu->arch.apic;
3142 struct page *page;
3143
3144 if (!apic || !apic->vapic_addr)
3145 return;
3146
3147 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3148
3149 vcpu->arch.apic->vapic_page = page;
3150 }
3151
3152 static void vapic_exit(struct kvm_vcpu *vcpu)
3153 {
3154 struct kvm_lapic *apic = vcpu->arch.apic;
3155
3156 if (!apic || !apic->vapic_addr)
3157 return;
3158
3159 down_read(&vcpu->kvm->slots_lock);
3160 kvm_release_page_dirty(apic->vapic_page);
3161 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3162 up_read(&vcpu->kvm->slots_lock);
3163 }
3164
3165 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3166 {
3167 int r;
3168
3169 if (vcpu->requests)
3170 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3171 kvm_mmu_unload(vcpu);
3172
3173 r = kvm_mmu_reload(vcpu);
3174 if (unlikely(r))
3175 goto out;
3176
3177 if (vcpu->requests) {
3178 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3179 __kvm_migrate_timers(vcpu);
3180 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3181 kvm_write_guest_time(vcpu);
3182 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3183 kvm_mmu_sync_roots(vcpu);
3184 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3185 kvm_x86_ops->tlb_flush(vcpu);
3186 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3187 &vcpu->requests)) {
3188 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3189 r = 0;
3190 goto out;
3191 }
3192 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3193 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3194 r = 0;
3195 goto out;
3196 }
3197 }
3198
3199 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3200 kvm_inject_pending_timer_irqs(vcpu);
3201
3202 preempt_disable();
3203
3204 kvm_x86_ops->prepare_guest_switch(vcpu);
3205 kvm_load_guest_fpu(vcpu);
3206
3207 local_irq_disable();
3208
3209 if (vcpu->requests || need_resched() || signal_pending(current)) {
3210 local_irq_enable();
3211 preempt_enable();
3212 r = 1;
3213 goto out;
3214 }
3215
3216 vcpu->guest_mode = 1;
3217 /*
3218 * Make sure that guest_mode assignment won't happen after
3219 * testing the pending IRQ vector bitmap.
3220 */
3221 smp_wmb();
3222
3223 if (vcpu->arch.exception.pending)
3224 __queue_exception(vcpu);
3225 else if (irqchip_in_kernel(vcpu->kvm))
3226 kvm_x86_ops->inject_pending_irq(vcpu);
3227 else
3228 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3229
3230 kvm_lapic_sync_to_vapic(vcpu);
3231
3232 up_read(&vcpu->kvm->slots_lock);
3233
3234 kvm_guest_enter();
3235
3236 get_debugreg(vcpu->arch.host_dr6, 6);
3237 get_debugreg(vcpu->arch.host_dr7, 7);
3238 if (unlikely(vcpu->arch.switch_db_regs)) {
3239 get_debugreg(vcpu->arch.host_db[0], 0);
3240 get_debugreg(vcpu->arch.host_db[1], 1);
3241 get_debugreg(vcpu->arch.host_db[2], 2);
3242 get_debugreg(vcpu->arch.host_db[3], 3);
3243
3244 set_debugreg(0, 7);
3245 set_debugreg(vcpu->arch.eff_db[0], 0);
3246 set_debugreg(vcpu->arch.eff_db[1], 1);
3247 set_debugreg(vcpu->arch.eff_db[2], 2);
3248 set_debugreg(vcpu->arch.eff_db[3], 3);
3249 }
3250
3251 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3252 kvm_x86_ops->run(vcpu, kvm_run);
3253
3254 if (unlikely(vcpu->arch.switch_db_regs)) {
3255 set_debugreg(0, 7);
3256 set_debugreg(vcpu->arch.host_db[0], 0);
3257 set_debugreg(vcpu->arch.host_db[1], 1);
3258 set_debugreg(vcpu->arch.host_db[2], 2);
3259 set_debugreg(vcpu->arch.host_db[3], 3);
3260 }
3261 set_debugreg(vcpu->arch.host_dr6, 6);
3262 set_debugreg(vcpu->arch.host_dr7, 7);
3263
3264 vcpu->guest_mode = 0;
3265 local_irq_enable();
3266
3267 ++vcpu->stat.exits;
3268
3269 /*
3270 * We must have an instruction between local_irq_enable() and
3271 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3272 * the interrupt shadow. The stat.exits increment will do nicely.
3273 * But we need to prevent reordering, hence this barrier():
3274 */
3275 barrier();
3276
3277 kvm_guest_exit();
3278
3279 preempt_enable();
3280
3281 down_read(&vcpu->kvm->slots_lock);
3282
3283 /*
3284 * Profile KVM exit RIPs:
3285 */
3286 if (unlikely(prof_on == KVM_PROFILING)) {
3287 unsigned long rip = kvm_rip_read(vcpu);
3288 profile_hit(KVM_PROFILING, (void *)rip);
3289 }
3290
3291 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3292 vcpu->arch.exception.pending = false;
3293
3294 kvm_lapic_sync_from_vapic(vcpu);
3295
3296 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3297 out:
3298 return r;
3299 }
3300
3301 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3302 {
3303 int r;
3304
3305 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3306 pr_debug("vcpu %d received sipi with vector # %x\n",
3307 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3308 kvm_lapic_reset(vcpu);
3309 r = kvm_arch_vcpu_reset(vcpu);
3310 if (r)
3311 return r;
3312 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3313 }
3314
3315 down_read(&vcpu->kvm->slots_lock);
3316 vapic_enter(vcpu);
3317
3318 r = 1;
3319 while (r > 0) {
3320 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3321 r = vcpu_enter_guest(vcpu, kvm_run);
3322 else {
3323 up_read(&vcpu->kvm->slots_lock);
3324 kvm_vcpu_block(vcpu);
3325 down_read(&vcpu->kvm->slots_lock);
3326 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3327 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3328 vcpu->arch.mp_state =
3329 KVM_MP_STATE_RUNNABLE;
3330 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3331 r = -EINTR;
3332 }
3333
3334 if (r > 0) {
3335 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3336 r = -EINTR;
3337 kvm_run->exit_reason = KVM_EXIT_INTR;
3338 ++vcpu->stat.request_irq_exits;
3339 }
3340 if (signal_pending(current)) {
3341 r = -EINTR;
3342 kvm_run->exit_reason = KVM_EXIT_INTR;
3343 ++vcpu->stat.signal_exits;
3344 }
3345 if (need_resched()) {
3346 up_read(&vcpu->kvm->slots_lock);
3347 kvm_resched(vcpu);
3348 down_read(&vcpu->kvm->slots_lock);
3349 }
3350 }
3351 }
3352
3353 up_read(&vcpu->kvm->slots_lock);
3354 post_kvm_run_save(vcpu, kvm_run);
3355
3356 vapic_exit(vcpu);
3357
3358 return r;
3359 }
3360
3361 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3362 {
3363 int r;
3364 sigset_t sigsaved;
3365
3366 vcpu_load(vcpu);
3367
3368 if (vcpu->sigset_active)
3369 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3370
3371 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3372 kvm_vcpu_block(vcpu);
3373 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3374 r = -EAGAIN;
3375 goto out;
3376 }
3377
3378 /* re-sync apic's tpr */
3379 if (!irqchip_in_kernel(vcpu->kvm))
3380 kvm_set_cr8(vcpu, kvm_run->cr8);
3381
3382 if (vcpu->arch.pio.cur_count) {
3383 r = complete_pio(vcpu);
3384 if (r)
3385 goto out;
3386 }
3387 #if CONFIG_HAS_IOMEM
3388 if (vcpu->mmio_needed) {
3389 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3390 vcpu->mmio_read_completed = 1;
3391 vcpu->mmio_needed = 0;
3392
3393 down_read(&vcpu->kvm->slots_lock);
3394 r = emulate_instruction(vcpu, kvm_run,
3395 vcpu->arch.mmio_fault_cr2, 0,
3396 EMULTYPE_NO_DECODE);
3397 up_read(&vcpu->kvm->slots_lock);
3398 if (r == EMULATE_DO_MMIO) {
3399 /*
3400 * Read-modify-write. Back to userspace.
3401 */
3402 r = 0;
3403 goto out;
3404 }
3405 }
3406 #endif
3407 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3408 kvm_register_write(vcpu, VCPU_REGS_RAX,
3409 kvm_run->hypercall.ret);
3410
3411 r = __vcpu_run(vcpu, kvm_run);
3412
3413 out:
3414 if (vcpu->sigset_active)
3415 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3416
3417 vcpu_put(vcpu);
3418 return r;
3419 }
3420
3421 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3422 {
3423 vcpu_load(vcpu);
3424
3425 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3426 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3427 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3428 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3429 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3430 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3431 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3432 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3433 #ifdef CONFIG_X86_64
3434 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3435 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3436 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3437 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3438 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3439 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3440 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3441 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3442 #endif
3443
3444 regs->rip = kvm_rip_read(vcpu);
3445 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3446
3447 /*
3448 * Don't leak debug flags in case they were set for guest debugging
3449 */
3450 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3451 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3452
3453 vcpu_put(vcpu);
3454
3455 return 0;
3456 }
3457
3458 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3459 {
3460 vcpu_load(vcpu);
3461
3462 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3463 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3464 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3465 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3466 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3467 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3468 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3469 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3470 #ifdef CONFIG_X86_64
3471 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3472 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3473 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3474 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3475 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3476 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3477 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3478 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3479
3480 #endif
3481
3482 kvm_rip_write(vcpu, regs->rip);
3483 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3484
3485
3486 vcpu->arch.exception.pending = false;
3487
3488 vcpu_put(vcpu);
3489
3490 return 0;
3491 }
3492
3493 void kvm_get_segment(struct kvm_vcpu *vcpu,
3494 struct kvm_segment *var, int seg)
3495 {
3496 kvm_x86_ops->get_segment(vcpu, var, seg);
3497 }
3498
3499 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3500 {
3501 struct kvm_segment cs;
3502
3503 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3504 *db = cs.db;
3505 *l = cs.l;
3506 }
3507 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3508
3509 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3510 struct kvm_sregs *sregs)
3511 {
3512 struct descriptor_table dt;
3513 int pending_vec;
3514
3515 vcpu_load(vcpu);
3516
3517 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3518 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3519 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3520 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3521 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3522 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3523
3524 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3525 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3526
3527 kvm_x86_ops->get_idt(vcpu, &dt);
3528 sregs->idt.limit = dt.limit;
3529 sregs->idt.base = dt.base;
3530 kvm_x86_ops->get_gdt(vcpu, &dt);
3531 sregs->gdt.limit = dt.limit;
3532 sregs->gdt.base = dt.base;
3533
3534 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3535 sregs->cr0 = vcpu->arch.cr0;
3536 sregs->cr2 = vcpu->arch.cr2;
3537 sregs->cr3 = vcpu->arch.cr3;
3538 sregs->cr4 = vcpu->arch.cr4;
3539 sregs->cr8 = kvm_get_cr8(vcpu);
3540 sregs->efer = vcpu->arch.shadow_efer;
3541 sregs->apic_base = kvm_get_apic_base(vcpu);
3542
3543 if (irqchip_in_kernel(vcpu->kvm)) {
3544 memset(sregs->interrupt_bitmap, 0,
3545 sizeof sregs->interrupt_bitmap);
3546 pending_vec = kvm_x86_ops->get_irq(vcpu);
3547 if (pending_vec >= 0)
3548 set_bit(pending_vec,
3549 (unsigned long *)sregs->interrupt_bitmap);
3550 } else
3551 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3552 sizeof sregs->interrupt_bitmap);
3553
3554 vcpu_put(vcpu);
3555
3556 return 0;
3557 }
3558
3559 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3560 struct kvm_mp_state *mp_state)
3561 {
3562 vcpu_load(vcpu);
3563 mp_state->mp_state = vcpu->arch.mp_state;
3564 vcpu_put(vcpu);
3565 return 0;
3566 }
3567
3568 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3569 struct kvm_mp_state *mp_state)
3570 {
3571 vcpu_load(vcpu);
3572 vcpu->arch.mp_state = mp_state->mp_state;
3573 vcpu_put(vcpu);
3574 return 0;
3575 }
3576
3577 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3578 struct kvm_segment *var, int seg)
3579 {
3580 kvm_x86_ops->set_segment(vcpu, var, seg);
3581 }
3582
3583 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3584 struct kvm_segment *kvm_desct)
3585 {
3586 kvm_desct->base = seg_desc->base0;
3587 kvm_desct->base |= seg_desc->base1 << 16;
3588 kvm_desct->base |= seg_desc->base2 << 24;
3589 kvm_desct->limit = seg_desc->limit0;
3590 kvm_desct->limit |= seg_desc->limit << 16;
3591 if (seg_desc->g) {
3592 kvm_desct->limit <<= 12;
3593 kvm_desct->limit |= 0xfff;
3594 }
3595 kvm_desct->selector = selector;
3596 kvm_desct->type = seg_desc->type;
3597 kvm_desct->present = seg_desc->p;
3598 kvm_desct->dpl = seg_desc->dpl;
3599 kvm_desct->db = seg_desc->d;
3600 kvm_desct->s = seg_desc->s;
3601 kvm_desct->l = seg_desc->l;
3602 kvm_desct->g = seg_desc->g;
3603 kvm_desct->avl = seg_desc->avl;
3604 if (!selector)
3605 kvm_desct->unusable = 1;
3606 else
3607 kvm_desct->unusable = 0;
3608 kvm_desct->padding = 0;
3609 }
3610
3611 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3612 u16 selector,
3613 struct descriptor_table *dtable)
3614 {
3615 if (selector & 1 << 2) {
3616 struct kvm_segment kvm_seg;
3617
3618 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3619
3620 if (kvm_seg.unusable)
3621 dtable->limit = 0;
3622 else
3623 dtable->limit = kvm_seg.limit;
3624 dtable->base = kvm_seg.base;
3625 }
3626 else
3627 kvm_x86_ops->get_gdt(vcpu, dtable);
3628 }
3629
3630 /* allowed just for 8 bytes segments */
3631 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3632 struct desc_struct *seg_desc)
3633 {
3634 gpa_t gpa;
3635 struct descriptor_table dtable;
3636 u16 index = selector >> 3;
3637
3638 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3639
3640 if (dtable.limit < index * 8 + 7) {
3641 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3642 return 1;
3643 }
3644 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3645 gpa += index * 8;
3646 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3647 }
3648
3649 /* allowed just for 8 bytes segments */
3650 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3651 struct desc_struct *seg_desc)
3652 {
3653 gpa_t gpa;
3654 struct descriptor_table dtable;
3655 u16 index = selector >> 3;
3656
3657 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3658
3659 if (dtable.limit < index * 8 + 7)
3660 return 1;
3661 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3662 gpa += index * 8;
3663 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3664 }
3665
3666 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3667 struct desc_struct *seg_desc)
3668 {
3669 u32 base_addr;
3670
3671 base_addr = seg_desc->base0;
3672 base_addr |= (seg_desc->base1 << 16);
3673 base_addr |= (seg_desc->base2 << 24);
3674
3675 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3676 }
3677
3678 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3679 {
3680 struct kvm_segment kvm_seg;
3681
3682 kvm_get_segment(vcpu, &kvm_seg, seg);
3683 return kvm_seg.selector;
3684 }
3685
3686 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3687 u16 selector,
3688 struct kvm_segment *kvm_seg)
3689 {
3690 struct desc_struct seg_desc;
3691
3692 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3693 return 1;
3694 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3695 return 0;
3696 }
3697
3698 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3699 {
3700 struct kvm_segment segvar = {
3701 .base = selector << 4,
3702 .limit = 0xffff,
3703 .selector = selector,
3704 .type = 3,
3705 .present = 1,
3706 .dpl = 3,
3707 .db = 0,
3708 .s = 1,
3709 .l = 0,
3710 .g = 0,
3711 .avl = 0,
3712 .unusable = 0,
3713 };
3714 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3715 return 0;
3716 }
3717
3718 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3719 int type_bits, int seg)
3720 {
3721 struct kvm_segment kvm_seg;
3722
3723 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3724 return kvm_load_realmode_segment(vcpu, selector, seg);
3725 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3726 return 1;
3727 kvm_seg.type |= type_bits;
3728
3729 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3730 seg != VCPU_SREG_LDTR)
3731 if (!kvm_seg.s)
3732 kvm_seg.unusable = 1;
3733
3734 kvm_set_segment(vcpu, &kvm_seg, seg);
3735 return 0;
3736 }
3737
3738 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3739 struct tss_segment_32 *tss)
3740 {
3741 tss->cr3 = vcpu->arch.cr3;
3742 tss->eip = kvm_rip_read(vcpu);
3743 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3744 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3745 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3746 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3747 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3748 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3749 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3750 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3751 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3752 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3753 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3754 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3755 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3756 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3757 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3758 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3759 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3760 }
3761
3762 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3763 struct tss_segment_32 *tss)
3764 {
3765 kvm_set_cr3(vcpu, tss->cr3);
3766
3767 kvm_rip_write(vcpu, tss->eip);
3768 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3769
3770 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3771 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3772 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3773 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3774 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3775 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3776 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3777 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3778
3779 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3780 return 1;
3781
3782 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3783 return 1;
3784
3785 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3786 return 1;
3787
3788 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3789 return 1;
3790
3791 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3792 return 1;
3793
3794 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3795 return 1;
3796
3797 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3798 return 1;
3799 return 0;
3800 }
3801
3802 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3803 struct tss_segment_16 *tss)
3804 {
3805 tss->ip = kvm_rip_read(vcpu);
3806 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3807 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3808 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3809 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3810 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3811 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3812 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3813 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3814 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3815
3816 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3817 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3818 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3819 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3820 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3821 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3822 }
3823
3824 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3825 struct tss_segment_16 *tss)
3826 {
3827 kvm_rip_write(vcpu, tss->ip);
3828 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3829 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3830 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3831 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3832 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3833 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3834 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3835 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3836 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3837
3838 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3839 return 1;
3840
3841 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3842 return 1;
3843
3844 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3845 return 1;
3846
3847 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3848 return 1;
3849
3850 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3851 return 1;
3852 return 0;
3853 }
3854
3855 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3856 u32 old_tss_base,
3857 struct desc_struct *nseg_desc)
3858 {
3859 struct tss_segment_16 tss_segment_16;
3860 int ret = 0;
3861
3862 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3863 sizeof tss_segment_16))
3864 goto out;
3865
3866 save_state_to_tss16(vcpu, &tss_segment_16);
3867
3868 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3869 sizeof tss_segment_16))
3870 goto out;
3871
3872 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3873 &tss_segment_16, sizeof tss_segment_16))
3874 goto out;
3875
3876 if (load_state_from_tss16(vcpu, &tss_segment_16))
3877 goto out;
3878
3879 ret = 1;
3880 out:
3881 return ret;
3882 }
3883
3884 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3885 u32 old_tss_base,
3886 struct desc_struct *nseg_desc)
3887 {
3888 struct tss_segment_32 tss_segment_32;
3889 int ret = 0;
3890
3891 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3892 sizeof tss_segment_32))
3893 goto out;
3894
3895 save_state_to_tss32(vcpu, &tss_segment_32);
3896
3897 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3898 sizeof tss_segment_32))
3899 goto out;
3900
3901 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3902 &tss_segment_32, sizeof tss_segment_32))
3903 goto out;
3904
3905 if (load_state_from_tss32(vcpu, &tss_segment_32))
3906 goto out;
3907
3908 ret = 1;
3909 out:
3910 return ret;
3911 }
3912
3913 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3914 {
3915 struct kvm_segment tr_seg;
3916 struct desc_struct cseg_desc;
3917 struct desc_struct nseg_desc;
3918 int ret = 0;
3919 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3920 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3921
3922 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3923
3924 /* FIXME: Handle errors. Failure to read either TSS or their
3925 * descriptors should generate a pagefault.
3926 */
3927 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3928 goto out;
3929
3930 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3931 goto out;
3932
3933 if (reason != TASK_SWITCH_IRET) {
3934 int cpl;
3935
3936 cpl = kvm_x86_ops->get_cpl(vcpu);
3937 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3938 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3939 return 1;
3940 }
3941 }
3942
3943 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3944 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3945 return 1;
3946 }
3947
3948 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3949 cseg_desc.type &= ~(1 << 1); //clear the B flag
3950 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3951 }
3952
3953 if (reason == TASK_SWITCH_IRET) {
3954 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3955 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3956 }
3957
3958 kvm_x86_ops->skip_emulated_instruction(vcpu);
3959
3960 if (nseg_desc.type & 8)
3961 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3962 &nseg_desc);
3963 else
3964 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3965 &nseg_desc);
3966
3967 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3968 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3969 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3970 }
3971
3972 if (reason != TASK_SWITCH_IRET) {
3973 nseg_desc.type |= (1 << 1);
3974 save_guest_segment_descriptor(vcpu, tss_selector,
3975 &nseg_desc);
3976 }
3977
3978 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3979 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3980 tr_seg.type = 11;
3981 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3982 out:
3983 return ret;
3984 }
3985 EXPORT_SYMBOL_GPL(kvm_task_switch);
3986
3987 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3988 struct kvm_sregs *sregs)
3989 {
3990 int mmu_reset_needed = 0;
3991 int i, pending_vec, max_bits;
3992 struct descriptor_table dt;
3993
3994 vcpu_load(vcpu);
3995
3996 dt.limit = sregs->idt.limit;
3997 dt.base = sregs->idt.base;
3998 kvm_x86_ops->set_idt(vcpu, &dt);
3999 dt.limit = sregs->gdt.limit;
4000 dt.base = sregs->gdt.base;
4001 kvm_x86_ops->set_gdt(vcpu, &dt);
4002
4003 vcpu->arch.cr2 = sregs->cr2;
4004 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4005
4006 down_read(&vcpu->kvm->slots_lock);
4007 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4008 vcpu->arch.cr3 = sregs->cr3;
4009 else
4010 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4011 up_read(&vcpu->kvm->slots_lock);
4012
4013 kvm_set_cr8(vcpu, sregs->cr8);
4014
4015 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4016 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4017 kvm_set_apic_base(vcpu, sregs->apic_base);
4018
4019 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4020
4021 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4022 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4023 vcpu->arch.cr0 = sregs->cr0;
4024
4025 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4026 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4027 if (!is_long_mode(vcpu) && is_pae(vcpu))
4028 load_pdptrs(vcpu, vcpu->arch.cr3);
4029
4030 if (mmu_reset_needed)
4031 kvm_mmu_reset_context(vcpu);
4032
4033 if (!irqchip_in_kernel(vcpu->kvm)) {
4034 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
4035 sizeof vcpu->arch.irq_pending);
4036 vcpu->arch.irq_summary = 0;
4037 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
4038 if (vcpu->arch.irq_pending[i])
4039 __set_bit(i, &vcpu->arch.irq_summary);
4040 } else {
4041 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4042 pending_vec = find_first_bit(
4043 (const unsigned long *)sregs->interrupt_bitmap,
4044 max_bits);
4045 /* Only pending external irq is handled here */
4046 if (pending_vec < max_bits) {
4047 kvm_x86_ops->set_irq(vcpu, pending_vec);
4048 pr_debug("Set back pending irq %d\n",
4049 pending_vec);
4050 }
4051 kvm_pic_clear_isr_ack(vcpu->kvm);
4052 }
4053
4054 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4055 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4056 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4057 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4058 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4059 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4060
4061 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4062 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4063
4064 /* Older userspace won't unhalt the vcpu on reset. */
4065 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4066 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4067 !(vcpu->arch.cr0 & X86_CR0_PE))
4068 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4069
4070 vcpu_put(vcpu);
4071
4072 return 0;
4073 }
4074
4075 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4076 struct kvm_guest_debug *dbg)
4077 {
4078 int i, r;
4079
4080 vcpu_load(vcpu);
4081
4082 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4083 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4084 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4085 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4086 vcpu->arch.switch_db_regs =
4087 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4088 } else {
4089 for (i = 0; i < KVM_NR_DB_REGS; i++)
4090 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4091 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4092 }
4093
4094 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4095
4096 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4097 kvm_queue_exception(vcpu, DB_VECTOR);
4098 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4099 kvm_queue_exception(vcpu, BP_VECTOR);
4100
4101 vcpu_put(vcpu);
4102
4103 return r;
4104 }
4105
4106 /*
4107 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4108 * we have asm/x86/processor.h
4109 */
4110 struct fxsave {
4111 u16 cwd;
4112 u16 swd;
4113 u16 twd;
4114 u16 fop;
4115 u64 rip;
4116 u64 rdp;
4117 u32 mxcsr;
4118 u32 mxcsr_mask;
4119 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4120 #ifdef CONFIG_X86_64
4121 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4122 #else
4123 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4124 #endif
4125 };
4126
4127 /*
4128 * Translate a guest virtual address to a guest physical address.
4129 */
4130 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4131 struct kvm_translation *tr)
4132 {
4133 unsigned long vaddr = tr->linear_address;
4134 gpa_t gpa;
4135
4136 vcpu_load(vcpu);
4137 down_read(&vcpu->kvm->slots_lock);
4138 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4139 up_read(&vcpu->kvm->slots_lock);
4140 tr->physical_address = gpa;
4141 tr->valid = gpa != UNMAPPED_GVA;
4142 tr->writeable = 1;
4143 tr->usermode = 0;
4144 vcpu_put(vcpu);
4145
4146 return 0;
4147 }
4148
4149 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4150 {
4151 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4152
4153 vcpu_load(vcpu);
4154
4155 memcpy(fpu->fpr, fxsave->st_space, 128);
4156 fpu->fcw = fxsave->cwd;
4157 fpu->fsw = fxsave->swd;
4158 fpu->ftwx = fxsave->twd;
4159 fpu->last_opcode = fxsave->fop;
4160 fpu->last_ip = fxsave->rip;
4161 fpu->last_dp = fxsave->rdp;
4162 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4163
4164 vcpu_put(vcpu);
4165
4166 return 0;
4167 }
4168
4169 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4170 {
4171 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4172
4173 vcpu_load(vcpu);
4174
4175 memcpy(fxsave->st_space, fpu->fpr, 128);
4176 fxsave->cwd = fpu->fcw;
4177 fxsave->swd = fpu->fsw;
4178 fxsave->twd = fpu->ftwx;
4179 fxsave->fop = fpu->last_opcode;
4180 fxsave->rip = fpu->last_ip;
4181 fxsave->rdp = fpu->last_dp;
4182 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4183
4184 vcpu_put(vcpu);
4185
4186 return 0;
4187 }
4188
4189 void fx_init(struct kvm_vcpu *vcpu)
4190 {
4191 unsigned after_mxcsr_mask;
4192
4193 /*
4194 * Touch the fpu the first time in non atomic context as if
4195 * this is the first fpu instruction the exception handler
4196 * will fire before the instruction returns and it'll have to
4197 * allocate ram with GFP_KERNEL.
4198 */
4199 if (!used_math())
4200 kvm_fx_save(&vcpu->arch.host_fx_image);
4201
4202 /* Initialize guest FPU by resetting ours and saving into guest's */
4203 preempt_disable();
4204 kvm_fx_save(&vcpu->arch.host_fx_image);
4205 kvm_fx_finit();
4206 kvm_fx_save(&vcpu->arch.guest_fx_image);
4207 kvm_fx_restore(&vcpu->arch.host_fx_image);
4208 preempt_enable();
4209
4210 vcpu->arch.cr0 |= X86_CR0_ET;
4211 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4212 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4213 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4214 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4215 }
4216 EXPORT_SYMBOL_GPL(fx_init);
4217
4218 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4219 {
4220 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4221 return;
4222
4223 vcpu->guest_fpu_loaded = 1;
4224 kvm_fx_save(&vcpu->arch.host_fx_image);
4225 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4226 }
4227 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4228
4229 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4230 {
4231 if (!vcpu->guest_fpu_loaded)
4232 return;
4233
4234 vcpu->guest_fpu_loaded = 0;
4235 kvm_fx_save(&vcpu->arch.guest_fx_image);
4236 kvm_fx_restore(&vcpu->arch.host_fx_image);
4237 ++vcpu->stat.fpu_reload;
4238 }
4239 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4240
4241 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4242 {
4243 if (vcpu->arch.time_page) {
4244 kvm_release_page_dirty(vcpu->arch.time_page);
4245 vcpu->arch.time_page = NULL;
4246 }
4247
4248 kvm_x86_ops->vcpu_free(vcpu);
4249 }
4250
4251 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4252 unsigned int id)
4253 {
4254 return kvm_x86_ops->vcpu_create(kvm, id);
4255 }
4256
4257 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4258 {
4259 int r;
4260
4261 /* We do fxsave: this must be aligned. */
4262 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4263
4264 vcpu->arch.mtrr_state.have_fixed = 1;
4265 vcpu_load(vcpu);
4266 r = kvm_arch_vcpu_reset(vcpu);
4267 if (r == 0)
4268 r = kvm_mmu_setup(vcpu);
4269 vcpu_put(vcpu);
4270 if (r < 0)
4271 goto free_vcpu;
4272
4273 return 0;
4274 free_vcpu:
4275 kvm_x86_ops->vcpu_free(vcpu);
4276 return r;
4277 }
4278
4279 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4280 {
4281 vcpu_load(vcpu);
4282 kvm_mmu_unload(vcpu);
4283 vcpu_put(vcpu);
4284
4285 kvm_x86_ops->vcpu_free(vcpu);
4286 }
4287
4288 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4289 {
4290 vcpu->arch.nmi_pending = false;
4291 vcpu->arch.nmi_injected = false;
4292
4293 vcpu->arch.switch_db_regs = 0;
4294 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4295 vcpu->arch.dr6 = DR6_FIXED_1;
4296 vcpu->arch.dr7 = DR7_FIXED_1;
4297
4298 return kvm_x86_ops->vcpu_reset(vcpu);
4299 }
4300
4301 void kvm_arch_hardware_enable(void *garbage)
4302 {
4303 kvm_x86_ops->hardware_enable(garbage);
4304 }
4305
4306 void kvm_arch_hardware_disable(void *garbage)
4307 {
4308 kvm_x86_ops->hardware_disable(garbage);
4309 }
4310
4311 int kvm_arch_hardware_setup(void)
4312 {
4313 return kvm_x86_ops->hardware_setup();
4314 }
4315
4316 void kvm_arch_hardware_unsetup(void)
4317 {
4318 kvm_x86_ops->hardware_unsetup();
4319 }
4320
4321 void kvm_arch_check_processor_compat(void *rtn)
4322 {
4323 kvm_x86_ops->check_processor_compatibility(rtn);
4324 }
4325
4326 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4327 {
4328 struct page *page;
4329 struct kvm *kvm;
4330 int r;
4331
4332 BUG_ON(vcpu->kvm == NULL);
4333 kvm = vcpu->kvm;
4334
4335 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4336 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4337 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4338 else
4339 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4340
4341 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4342 if (!page) {
4343 r = -ENOMEM;
4344 goto fail;
4345 }
4346 vcpu->arch.pio_data = page_address(page);
4347
4348 r = kvm_mmu_create(vcpu);
4349 if (r < 0)
4350 goto fail_free_pio_data;
4351
4352 if (irqchip_in_kernel(kvm)) {
4353 r = kvm_create_lapic(vcpu);
4354 if (r < 0)
4355 goto fail_mmu_destroy;
4356 }
4357
4358 return 0;
4359
4360 fail_mmu_destroy:
4361 kvm_mmu_destroy(vcpu);
4362 fail_free_pio_data:
4363 free_page((unsigned long)vcpu->arch.pio_data);
4364 fail:
4365 return r;
4366 }
4367
4368 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4369 {
4370 kvm_free_lapic(vcpu);
4371 down_read(&vcpu->kvm->slots_lock);
4372 kvm_mmu_destroy(vcpu);
4373 up_read(&vcpu->kvm->slots_lock);
4374 free_page((unsigned long)vcpu->arch.pio_data);
4375 }
4376
4377 struct kvm *kvm_arch_create_vm(void)
4378 {
4379 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4380
4381 if (!kvm)
4382 return ERR_PTR(-ENOMEM);
4383
4384 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4385 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4386 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4387
4388 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4389 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4390
4391 rdtscll(kvm->arch.vm_init_tsc);
4392
4393 return kvm;
4394 }
4395
4396 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4397 {
4398 vcpu_load(vcpu);
4399 kvm_mmu_unload(vcpu);
4400 vcpu_put(vcpu);
4401 }
4402
4403 static void kvm_free_vcpus(struct kvm *kvm)
4404 {
4405 unsigned int i;
4406
4407 /*
4408 * Unpin any mmu pages first.
4409 */
4410 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4411 if (kvm->vcpus[i])
4412 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4413 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4414 if (kvm->vcpus[i]) {
4415 kvm_arch_vcpu_free(kvm->vcpus[i]);
4416 kvm->vcpus[i] = NULL;
4417 }
4418 }
4419
4420 }
4421
4422 void kvm_arch_sync_events(struct kvm *kvm)
4423 {
4424 kvm_free_all_assigned_devices(kvm);
4425 }
4426
4427 void kvm_arch_destroy_vm(struct kvm *kvm)
4428 {
4429 kvm_iommu_unmap_guest(kvm);
4430 kvm_free_pit(kvm);
4431 kfree(kvm->arch.vpic);
4432 kfree(kvm->arch.vioapic);
4433 kvm_free_vcpus(kvm);
4434 kvm_free_physmem(kvm);
4435 if (kvm->arch.apic_access_page)
4436 put_page(kvm->arch.apic_access_page);
4437 if (kvm->arch.ept_identity_pagetable)
4438 put_page(kvm->arch.ept_identity_pagetable);
4439 kfree(kvm);
4440 }
4441
4442 int kvm_arch_set_memory_region(struct kvm *kvm,
4443 struct kvm_userspace_memory_region *mem,
4444 struct kvm_memory_slot old,
4445 int user_alloc)
4446 {
4447 int npages = mem->memory_size >> PAGE_SHIFT;
4448 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4449
4450 /*To keep backward compatibility with older userspace,
4451 *x86 needs to hanlde !user_alloc case.
4452 */
4453 if (!user_alloc) {
4454 if (npages && !old.rmap) {
4455 unsigned long userspace_addr;
4456
4457 down_write(&current->mm->mmap_sem);
4458 userspace_addr = do_mmap(NULL, 0,
4459 npages * PAGE_SIZE,
4460 PROT_READ | PROT_WRITE,
4461 MAP_PRIVATE | MAP_ANONYMOUS,
4462 0);
4463 up_write(&current->mm->mmap_sem);
4464
4465 if (IS_ERR((void *)userspace_addr))
4466 return PTR_ERR((void *)userspace_addr);
4467
4468 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4469 spin_lock(&kvm->mmu_lock);
4470 memslot->userspace_addr = userspace_addr;
4471 spin_unlock(&kvm->mmu_lock);
4472 } else {
4473 if (!old.user_alloc && old.rmap) {
4474 int ret;
4475
4476 down_write(&current->mm->mmap_sem);
4477 ret = do_munmap(current->mm, old.userspace_addr,
4478 old.npages * PAGE_SIZE);
4479 up_write(&current->mm->mmap_sem);
4480 if (ret < 0)
4481 printk(KERN_WARNING
4482 "kvm_vm_ioctl_set_memory_region: "
4483 "failed to munmap memory\n");
4484 }
4485 }
4486 }
4487
4488 spin_lock(&kvm->mmu_lock);
4489 if (!kvm->arch.n_requested_mmu_pages) {
4490 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4491 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4492 }
4493
4494 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4495 spin_unlock(&kvm->mmu_lock);
4496 kvm_flush_remote_tlbs(kvm);
4497
4498 return 0;
4499 }
4500
4501 void kvm_arch_flush_shadow(struct kvm *kvm)
4502 {
4503 kvm_mmu_zap_all(kvm);
4504 kvm_reload_remote_mmus(kvm);
4505 }
4506
4507 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4508 {
4509 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4510 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4511 || vcpu->arch.nmi_pending;
4512 }
4513
4514 static void vcpu_kick_intr(void *info)
4515 {
4516 #ifdef DEBUG
4517 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4518 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4519 #endif
4520 }
4521
4522 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4523 {
4524 int ipi_pcpu = vcpu->cpu;
4525 int cpu = get_cpu();
4526
4527 if (waitqueue_active(&vcpu->wq)) {
4528 wake_up_interruptible(&vcpu->wq);
4529 ++vcpu->stat.halt_wakeup;
4530 }
4531 /*
4532 * We may be called synchronously with irqs disabled in guest mode,
4533 * So need not to call smp_call_function_single() in that case.
4534 */
4535 if (vcpu->guest_mode && vcpu->cpu != cpu)
4536 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4537 put_cpu();
4538 }
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git