arch/x86/lib/fsp/fsp_common.c

   1 /*
   2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <errno.h>
   9 #include <asm/io.h>
  10 #include <asm/mrccache.h>
  11 #include <asm/post.h>
  12 #include <asm/processor.h>
  13 #include <asm/fsp/fsp_support.h>
  14
  15 DECLARE_GLOBAL_DATA_PTR;
  16
  17 int print_cpuinfo(void)
  18 {
  19         post_code(POST_CPU_INFO);
  20         return default_print_cpuinfo();
  21 }
  22
  23 int fsp_init_phase_pci(void)
  24 {
  25         u32 status;
  26
  27         /* call into FspNotify */
  28         debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
  29         status = fsp_notify(NULL, INIT_PHASE_PCI);
  30         if (status)
  31                 debug("fail, error code %x\n", status);
  32         else
  33                 debug("OK\n");
  34
  35         return status ? -EPERM : 0;
  36 }
  37
  38 void board_final_cleanup(void)
  39 {
  40         u32 status;
  41
  42         /* call into FspNotify */
  43         debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
  44         status = fsp_notify(NULL, INIT_PHASE_BOOT);
  45         if (status)
  46                 debug("fail, error code %x\n", status);
  47         else
  48                 debug("OK\n");
  49
  50         return;
  51 }
  52
  53 static __maybe_unused void *fsp_prepare_mrc_cache(void)
  54 {
  55         struct mrc_data_container *cache;
  56         struct mrc_region entry;
  57         int ret;
  58
  59         ret = mrccache_get_region(NULL, &entry);
  60         if (ret)
  61                 return NULL;
  62
  63         cache = mrccache_find_current(&entry);
  64         if (!cache)
  65                 return NULL;
  66
  67         debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
  68               cache->data, cache->data_size, cache->checksum);
  69
  70         return cache->data;
  71 }
  72
  73 int x86_fsp_init(void)
  74 {
  75         void *nvs;
  76
  77         if (!gd->arch.hob_list) {
  78 #ifdef CONFIG_ENABLE_MRC_CACHE
  79                 nvs = fsp_prepare_mrc_cache();
  80 #else
  81                 nvs = NULL;
  82 #endif
  83                 /*
  84                  * The first time we enter here, call fsp_init().
  85                  * Note the execution does not return to this function,
  86                  * instead it jumps to fsp_continue().
  87                  */
  88                 fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
  89         } else {
  90                 /*
  91                  * The second time we enter here, adjust the size of malloc()
  92                  * pool before relocation. Given gd->malloc_base was adjusted
  93                  * after the call to board_init_f_init_reserve() in arch/x86/
  94                  * cpu/start.S, we should fix up gd->malloc_limit here.
  95                  */
  96                 gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
  97         }
  98
  99         return 0;
 100 }