arch/x86/lib/spl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2016 Google, Inc
   4  */
   5
   6 #include <common.h>
   7 #include <cpu_func.h>
   8 #include <debug_uart.h>
   9 #include <dm.h>
  10 #include <hang.h>
  11 #include <image.h>
  12 #include <init.h>
  13 #include <irq_func.h>
  14 #include <log.h>
  15 #include <malloc.h>
  16 #include <spl.h>
  17 #include <syscon.h>
  18 #include <asm/cpu.h>
  19 #include <asm/cpu_common.h>
  20 #include <asm/fsp2/fsp_api.h>
  21 #include <asm/global_data.h>
  22 #include <asm/mrccache.h>
  23 #include <asm/mtrr.h>
  24 #include <asm/pci.h>
  25 #include <asm/processor.h>
  26 #include <asm/spl.h>
  27 #include <asm-generic/sections.h>
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 __weak int fsp_setup_pinctrl(void *ctx, struct event *event)
  32 {
  33         return 0;
  34 }
  35
  36 #ifdef CONFIG_TPL
  37
  38 static int set_max_freq(void)
  39 {
  40         if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) {
  41                 /*
  42                  * Burst Mode has been factory-configured as disabled and is not
  43                  * available in this physical processor package
  44                  */
  45                 debug("Burst Mode is factory-disabled\n");
  46                 return -ENOENT;
  47         }
  48
  49         /* Enable burst mode */
  50         cpu_set_burst_mode(true);
  51
  52         /* Enable speed step */
  53         cpu_set_eist(true);
  54
  55         /* Set P-State ratio */
  56         cpu_set_p_state_to_turbo_ratio();
  57
  58         return 0;
  59 }
  60 #endif
  61
  62 static int x86_spl_init(void)
  63 {
  64 #ifndef CONFIG_TPL
  65         /*
  66          * TODO(sjg@chromium.org): We use this area of RAM for the stack
  67          * and global_data in SPL. Once U-Boot starts up and releocates it
  68          * is not needed. We could make this a CONFIG option or perhaps
  69          * place it immediately below CONFIG_TEXT_BASE.
  70          */
  71         __maybe_unused char *ptr = (char *)0x110000;
  72 #else
  73         struct udevice *punit;
  74 #endif
  75         int ret;
  76
  77         debug("%s starting\n", __func__);
  78         if (IS_ENABLED(TPL))
  79                 ret = x86_cpu_reinit_f();
  80         else
  81                 ret = x86_cpu_init_f();
  82         ret = spl_init();
  83         if (ret) {
  84                 debug("%s: spl_init() failed\n", __func__);
  85                 return ret;
  86         }
  87         ret = arch_cpu_init();
  88         if (ret) {
  89                 debug("%s: arch_cpu_init() failed\n", __func__);
  90                 return ret;
  91         }
  92 #ifndef CONFIG_TPL
  93         ret = fsp_setup_pinctrl(NULL, NULL);
  94         if (ret) {
  95                 debug("%s: arch_cpu_init_dm() failed\n", __func__);
  96                 return ret;
  97         }
  98 #endif
  99         preloader_console_init();
 100 #if !defined(CONFIG_TPL) && !CONFIG_IS_ENABLED(CPU)
 101         ret = print_cpuinfo();
 102         if (ret) {
 103                 debug("%s: print_cpuinfo() failed\n", __func__);
 104                 return ret;
 105         }
 106 #endif
 107         ret = dram_init();
 108         if (ret) {
 109                 debug("%s: dram_init() failed\n", __func__);
 110                 return ret;
 111         }
 112         if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) {
 113                 ret = mrccache_spl_save();
 114                 if (ret)
 115                         debug("%s: Failed to write to mrccache (err=%d)\n",
 116                               __func__, ret);
 117         }
 118
 119 #ifndef CONFIG_SYS_COREBOOT
 120         memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
 121 # ifndef CONFIG_TPL
 122
 123         /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
 124         ret = interrupt_init();
 125         if (ret) {
 126                 debug("%s: interrupt_init() failed\n", __func__);
 127                 return ret;
 128         }
 129
 130         /*
 131          * The stack grows down from ptr. Put the global data at ptr. This
 132          * will only be used for SPL. Once SPL loads U-Boot proper it will
 133          * set up its own stack.
 134          */
 135         gd->new_gd = (struct global_data *)ptr;
 136         memcpy(gd->new_gd, gd, sizeof(*gd));
 137         arch_setup_gd(gd->new_gd);
 138         gd->start_addr_sp = (ulong)ptr;
 139
 140         /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */
 141         ret = mtrr_add_request(MTRR_TYPE_WRBACK,
 142                                (1ULL << 32) - CONFIG_XIP_ROM_SIZE,
 143                                CONFIG_XIP_ROM_SIZE);
 144         if (ret) {
 145                 debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret);
 146                 return ret;
 147         }
 148         mtrr_commit(true);
 149 # else
 150         ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit);
 151         if (ret)
 152                 debug("Could not find PUNIT (err=%d)\n", ret);
 153
 154         ret = set_max_freq();
 155         if (ret)
 156                 debug("Failed to set CPU frequency (err=%d)\n", ret);
 157 # endif
 158 #endif
 159
 160         return 0;
 161 }
 162
 163 void board_init_f(ulong flags)
 164 {
 165         int ret;
 166
 167         ret = x86_spl_init();
 168         if (ret) {
 169                 printf("x86_spl_init: error %d\n", ret);
 170                 hang();
 171         }
 172 #if IS_ENABLED(CONFIG_TPL) || IS_ENABLED(CONFIG_SYS_COREBOOT)
 173         gd->bd = malloc(sizeof(*gd->bd));
 174         if (!gd->bd) {
 175                 printf("Out of memory for bd_info size %x\n", sizeof(*gd->bd));
 176                 hang();
 177         }
 178         board_init_r(gd, 0);
 179 #else
 180         /* Uninit CAR and jump to board_init_f_r() */
 181         board_init_f_r_trampoline(gd->start_addr_sp);
 182 #endif
 183 }
 184
 185 void board_init_f_r(void)
 186 {
 187         init_cache_f_r();
 188         gd->flags &= ~GD_FLG_SERIAL_READY;
 189         debug("cache status %d\n", dcache_status());
 190         board_init_r(gd, 0);
 191 }
 192
 193 u32 spl_boot_device(void)
 194 {
 195         return BOOT_DEVICE_SPI_MMAP;
 196 }
 197
 198 int spl_start_uboot(void)
 199 {
 200         return 0;
 201 }
 202
 203 void spl_board_announce_boot_device(void)
 204 {
 205         printf("SPI flash");
 206 }
 207
 208 static int spl_board_load_image(struct spl_image_info *spl_image,
 209                                 struct spl_boot_device *bootdev)
 210 {
 211         spl_image->size = CONFIG_SYS_MONITOR_LEN;
 212         spl_image->entry_point = CONFIG_TEXT_BASE;
 213         spl_image->load_addr = CONFIG_TEXT_BASE;
 214         spl_image->os = IH_OS_U_BOOT;
 215         spl_image->name = "U-Boot";
 216
 217         if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) {
 218                 /*
 219                  * Copy U-Boot from ROM
 220                  * TODO(sjg@chromium.org): Figure out a way to get the text base
 221                  * correctly here, and in the device-tree binman definition.
 222                  *
 223                  * Also consider using FIT so we get the correct image length
 224                  * and parameters.
 225                  */
 226                 memcpy((char *)spl_image->load_addr, (char *)0xfff00000,
 227                        0x100000);
 228         }
 229
 230         debug("Loading to %lx\n", spl_image->load_addr);
 231
 232         return 0;
 233 }
 234 SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image);
 235
 236 int spl_spi_load_image(void)
 237 {
 238         return -EPERM;
 239 }
 240
 241 #ifdef CONFIG_X86_RUN_64BIT
 242 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 243 {
 244         int ret;
 245
 246         printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
 247         ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
 248         debug("ret=%d\n", ret);
 249         hang();
 250 }
 251 #endif
 252
 253 void spl_board_init(void)
 254 {
 255 #ifndef CONFIG_TPL
 256         preloader_console_init();
 257 #endif
 258 }