2 * Copyright 2013-2015 Arcturus Networks, Inc.
3 * http://www.arcturusnetworks.com/products/ucp1020/
4 * by Oleksandr G Zhadan et al.
5 * based on board/freescale/p1_p2_rdb_pc/spl.c
6 * original copyright follows:
7 * Copyright 2013 Freescale Semiconductor, Inc.
9 * SPDX-License-Identifier: GPL-2.0+
19 #include <fdt_support.h>
25 #include <spi_flash.h>
27 #include <linux/ctype.h>
28 #include <asm/fsl_serdes.h>
30 #include <asm/processor.h>
32 #include <asm/cache.h>
33 #include <asm/immap_85xx.h>
34 #include <asm/fsl_pci.h>
35 #include <fsl_ddr_sdram.h>
37 #include <asm/fsl_law.h>
38 #include <asm/fsl_lbc.h>
42 void spi_set_speed(struct spi_slave
*slave
, uint hz
)
44 /* TO DO: It's actially have to be in spi/ */
48 * To be compatible with cmd_gpio
50 int name_to_gpio(const char *name
)
52 int gpio
= 31 - simple_strtoul(name
, NULL
, 10);
60 void board_gpio_init(void)
63 char envname
[8], *val
;
65 for (i
= 0; i
< GPIO_MAX_NUM
; i
++) {
66 sprintf(envname
, "GPIO%d", i
);
67 val
= env_get(envname
);
69 char direction
= toupper(val
[0]);
70 char level
= toupper(val
[1]);
72 if (direction
== 'I') {
73 gpio_direction_input(i
);
75 if (direction
== 'O') {
77 gpio_direction_output(i
, 1);
79 gpio_direction_output(i
, 0);
85 val
= env_get("PCIE_OFF");
87 gpio_direction_input(GPIO_PCIE1_EN
);
88 gpio_direction_input(GPIO_PCIE2_EN
);
90 gpio_direction_output(GPIO_PCIE1_EN
, 1);
91 gpio_direction_output(GPIO_PCIE2_EN
, 1);
94 val
= env_get("SDHC_CDWP_OFF");
96 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
98 setbits_be32(&gur
->pmuxcr
,
99 (MPC85xx_PMUXCR_SDHC_CD
| MPC85xx_PMUXCR_SDHC_WP
));
103 int board_early_init_f(void)
105 return 0; /* Just in case. Could be disable in config file */
110 printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL
);
112 printf("SD/MMC: 4-bit Mode\n");
118 void pci_init_board(void)
120 fsl_pcie_init_board(0);
124 int board_early_init_r(void)
126 const unsigned int flashbase
= CONFIG_SYS_FLASH_BASE
;
127 const u8 flash_esel
= find_tlb_idx((void *)flashbase
, 1);
130 * Remap Boot flash region to caching-inhibited
131 * so that flash can be erased properly.
134 /* Flush d-cache and invalidate i-cache of any FLASH data */
138 /* invalidate existing TLB entry for flash */
139 disable_tlb(flash_esel
);
141 set_tlb(1, flashbase
, CONFIG_SYS_FLASH_BASE_PHYS
, /* tlb, epn, rpn */
142 MAS3_SX
| MAS3_SW
| MAS3_SR
, MAS2_I
| MAS2_G
, /* perms, wimge */
143 0, flash_esel
, BOOKE_PAGESZ_64M
, 1);/* ts, esel, tsize, iprot */
148 int board_phy_config(struct phy_device
*phydev
)
150 #if defined(CONFIG_PHY_MICREL_KSZ9021)
155 printf("PHYs address [");
157 if (phydev
->addr
== TSEC1_PHY_ADDR
|| phydev
->addr
== TSEC3_PHY_ADDR
) {
159 ksz9021_phy_extended_read(phydev
,
160 MII_KSZ9021_EXT_STRAP_STATUS
);
164 ksz9021_phy_extended_write(phydev
,
165 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW
,
168 * max rx/tx clock delay, min rx/tx control
170 ksz9021_phy_extended_write(phydev
,
171 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW
,
173 printf("0x%x", (regval
& 0x1f));
175 printf("0x%x", (TSEC2_PHY_ADDR
& 0x1f));
183 #if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG)
184 regval
= ksz9031_phy_extended_read(phydev
, 2, 0x01, 0x4000);
186 printf(" (ADDR 0x%x) ", regval
& 0x1f);
192 int last_stage_init(void)
194 static char newkernelargs
[256];
200 if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B
, 7, 1, &id1
[0], 2) < 0) {
201 printf("Error reading i2c IDT6V49205B information!\n");
203 printf("IDT6V49205B(0x%02x): ready\n", id1
[1]);
204 i2c_read(CONFIG_SYS_I2C_IDT6V49205B
, 4, 1, &id1
[0], 2);
205 if (!(id1
[1] & 0x02)) {
207 i2c_write(CONFIG_SYS_I2C_IDT6V49205B
, 4, 1, &id1
[0], 2);
212 if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR
, 0xFE, 1, &id2
, 1) < 0)
213 printf("Error reading i2c NCT72 information!\n");
215 printf("NCT72(0x%x): ready\n", id2
);
217 kval
= env_get("kernelargs");
219 mmc
= find_mmc_device(0);
221 if (!mmc_init(mmc
)) {
222 printf("MMC/SD card detected\n");
224 int n
= strlen(defkargs
);
225 char *tmp
= strstr(kval
, defkargs
);
228 strcpy(newkernelargs
, kval
);
229 strcat(newkernelargs
, " ");
230 strcat(newkernelargs
, mmckargs
);
231 strcat(newkernelargs
, " ");
232 strcat(newkernelargs
, &tmp
[n
]);
233 env_set("kernelargs", newkernelargs
);
235 env_set("kernelargs", mmckargs
);
241 sval
= env_get("SERIAL");
243 strcpy(newkernelargs
, "SN=");
244 strcat(newkernelargs
, sval
);
245 strcat(newkernelargs
, " ");
246 strcat(newkernelargs
, kval
);
247 env_set("kernelargs", newkernelargs
);
250 printf("Error reading kernelargs env variable!\n");
256 int board_eth_init(bd_t
*bis
)
258 struct fsl_pq_mdio_info mdio_info
;
259 struct tsec_info_struct tsec_info
[4];
261 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
266 SET_STD_TSEC_INFO(tsec_info
[num
], 1);
270 SET_STD_TSEC_INFO(tsec_info
[num
], 2);
271 if (is_serdes_configured(SGMII_TSEC2
)) {
272 if (!(in_be32(&gur
->pordevsr
) & MPC85xx_PORDEVSR_SGMII2_DIS
)) {
273 puts("eTSEC2 is in sgmii mode.\n");
274 tsec_info
[num
].flags
|= TSEC_SGMII
;
275 tsec_info
[num
].phyaddr
= TSEC2_PHY_ADDR_SGMII
;
281 SET_STD_TSEC_INFO(tsec_info
[num
], 3);
286 printf("No TSECs initialized\n");
290 mdio_info
.regs
= (struct tsec_mii_mng
*)CONFIG_SYS_MDIO_BASE_ADDR
;
291 mdio_info
.name
= DEFAULT_MII_NAME
;
293 fsl_pq_mdio_init(bis
, &mdio_info
);
295 tsec_eth_init(bis
, tsec_info
, num
);
297 return pci_eth_init(bis
);
300 #ifdef CONFIG_OF_BOARD_SETUP
301 int ft_board_setup(void *blob
, bd_t
*bd
)
305 const char *soc_usb_compat
= "fsl-usb2-dr";
306 int err
, usb1_off
, usb2_off
;
308 ft_cpu_setup(blob
, bd
);
310 base
= getenv_bootm_low();
311 size
= getenv_bootm_size();
313 fdt_fixup_memory(blob
, (u64
)base
, (u64
)size
);
317 #if defined(CONFIG_HAS_FSL_DR_USB)
318 fsl_fdt_fixup_dr_usb(blob
, bd
);
321 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
322 /* Delete eLBC node as it is muxed with USB2 controller */
323 if (hwconfig("usb2")) {
324 const char *soc_elbc_compat
= "fsl,p1020-elbc";
325 int off
= fdt_node_offset_by_compatible(blob
, -1,
329 ("WARNING: could not find compatible node %s: %s\n",
330 soc_elbc_compat
, fdt_strerror(off
));
333 err
= fdt_del_node(blob
, off
);
335 printf("WARNING: could not remove %s: %s\n",
336 soc_elbc_compat
, fdt_strerror(err
));
342 /* Delete USB2 node as it is muxed with eLBC */
343 usb1_off
= fdt_node_offset_by_compatible(blob
, -1, soc_usb_compat
);
345 printf("WARNING: could not find compatible node %s: %s.\n",
346 soc_usb_compat
, fdt_strerror(usb1_off
));
350 fdt_node_offset_by_compatible(blob
, usb1_off
, soc_usb_compat
);
352 printf("WARNING: could not find compatible node %s: %s.\n",
353 soc_usb_compat
, fdt_strerror(usb2_off
));
356 err
= fdt_del_node(blob
, usb2_off
);
358 printf("WARNING: could not remove %s: %s.\n",
359 soc_usb_compat
, fdt_strerror(err
));