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1 /*
2 * (C) Copyright 2008-2009
3 * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
4 * Jens Scharsig <esw@bus-elektronik.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #include <common.h>
26 #include <exports.h>
27 #include <net.h>
28 #include <netdev.h>
29 #include <nand.h>
30
31 #include <asm/io.h>
32 #include <asm/arch/hardware.h>
33 #include <asm/arch/at91_pio.h>
34 #include <asm/arch/at91_pmc.h>
35 #include <asm/arch/at91_mc.h>
36 #include <asm/arch/at91_common.h>
37
38 #ifdef CONFIG_STATUS_LED
39 #include <status_led.h>
40 #endif
41
42 #ifdef CONFIG_VIDEO
43 #include <bus_vcxk.h>
44
45 extern unsigned long display_width;
46 extern unsigned long display_height;
47 #endif
48
49 #ifdef CONFIG_CMD_NAND
50 void cpux9k2_nand_hw_init(void);
51 #endif
52
53 DECLARE_GLOBAL_DATA_PTR;
54
55 /*
56 * Miscelaneous platform dependent initialisations
57 */
58
59 int board_init(void)
60 {
61 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
62 /* Enable Ctrlc */
63 console_init_f();
64
65 /* Correct IRDA resistor problem / Set PA23_TXD in Output */
66 writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer);
67
68 gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
69 /* adress of boot parameters */
70 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
71
72 #ifdef CONFIG_STATUS_LED
73 status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
74 #endif
75 #ifdef CONFIG_CMD_NAND
76 cpux9k2_nand_hw_init();
77 #endif
78 return 0;
79 }
80
81 int board_early_init_f(void)
82 {
83 at91_seriald_hw_init();
84 return 0;
85 }
86
87 #ifdef CONFIG_MISC_INIT_R
88
89 int misc_init_r(void)
90 {
91 uchar mac[8];
92 uchar tm;
93 uchar midx;
94 uchar macn6, macn7;
95
96 #ifdef CONFIG_NET_MULTI
97 if (getenv("ethaddr") == NULL) {
98 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
99 CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
100 (uchar *) &mac, sizeof(mac)) != 0) {
101 puts("Error reading MAC from EEPROM\n");
102 } else {
103 tm = 0;
104 macn6 = 0;
105 macn7 = 0xFF;
106 for (midx = 0; midx < 6; midx++) {
107 if ((mac[midx] != 0) && (mac[midx] != 0xFF))
108 tm++;
109 macn6 += mac[midx];
110 macn7 ^= mac[midx];
111 }
112 if ((macn6 != mac[6]) || (macn7 != mac[7]))
113 tm = 0;
114 if (tm)
115 eth_setenv_enetaddr("ethaddr", mac);
116 else
117 puts("Error: invalid MAC at EEPROM\n");
118 }
119 }
120 #endif
121 gd->jt[XF_do_reset] = (void *) do_reset;
122
123 #ifdef CONFIG_STATUS_LED
124 status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
125 #endif
126 return 0;
127 }
128 #endif
129
130 #ifdef CONFIG_RESET_PHY_R
131 void reset_phy(void)
132 {
133 udelay(10000);
134 eth_init(gd->bd);
135 }
136 #endif
137
138 /*
139 * DRAM initialisations
140 */
141
142 int dram_init(void)
143 {
144 gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
145 CONFIG_SYS_SDRAM_SIZE);
146 return 0;
147 }
148
149 /*
150 * Ethernet initialisations
151 */
152
153 #ifdef CONFIG_DRIVER_AT91EMAC
154 int board_eth_init(bd_t *bis)
155 {
156 int rc = 0;
157 rc = at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
158 return rc;
159 }
160 #endif
161
162 /*
163 * Disk On Chip (NAND) Millenium initialization.
164 * The NAND lives in the CS2* space
165 */
166 #if defined(CONFIG_CMD_NAND)
167
168 #define MASK_ALE (1 << 22) /* our ALE is AD22 */
169 #define MASK_CLE (1 << 21) /* our CLE is AD21 */
170
171 void cpux9k2_nand_hw_init(void)
172 {
173 unsigned long csr;
174 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
175 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
176 at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
177
178 /* Setup Smart Media, fitst enable the address range of CS3 */
179 writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
180
181 /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
182 csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
183 AT91_SMC_CSR_NWS(3) |
184 AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
185 AT91_SMC_CSR_WSEN;
186 writel(csr, &mc->smc.csr[3]);
187
188 writel(ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.asr);
189 writel(ATMEL_PMX_CA_BFCK | ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE,
190 &pio->pioc.pdr);
191
192 /* Configure PC2 as input (signal Nand READY ) */
193 writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.per);
194 writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
195 writel(ATMEL_PMX_CA_BFCK, &pio->pioc.codr);
196
197 /* PIOC clock enabling */
198 writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
199 }
200
201 static void board_nand_hwcontrol(struct mtd_info *mtd,
202 int cmd, unsigned int ctrl)
203 {
204 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
205 struct nand_chip *this = mtd->priv;
206 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
207
208 if (ctrl & NAND_CTRL_CHANGE) {
209 IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
210
211 if (ctrl & NAND_CLE)
212 IO_ADDR_W |= MASK_CLE;
213 if (ctrl & NAND_ALE)
214 IO_ADDR_W |= MASK_ALE;
215
216 if ((ctrl & NAND_NCE))
217 writel(1, &pio->pioc.codr);
218 else
219 writel(1, &pio->pioc.sodr);
220
221 this->IO_ADDR_W = (void *) IO_ADDR_W;
222 }
223 if (cmd != NAND_CMD_NONE)
224 writeb(cmd, this->IO_ADDR_W);
225 }
226
227 static int board_nand_dev_ready(struct mtd_info *mtd)
228 {
229 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
230 return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
231 }
232
233 int board_nand_init(struct nand_chip *nand)
234 {
235 cpux9k2_nand_hw_init();
236 nand->ecc.mode = NAND_ECC_SOFT;
237 nand->cmd_ctrl = board_nand_hwcontrol;
238 nand->dev_ready = board_nand_dev_ready;
239 nand->chip_delay = 20;
240 return 0;
241 }
242
243 #endif
244
245 #if defined(CONFIG_VIDEO)
246 /*
247 * drv_video_init
248 * FUNCTION: initialize VCxK device
249 */
250
251 int drv_video_init(void)
252 {
253 #ifdef CONFIG_SPLASH_SCREEN
254 unsigned long splash;
255 #endif
256 char *s;
257 unsigned long csr;
258 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
259 at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
260
261 printf("Init Video as ");
262 s = getenv("displaywidth");
263 if (s != NULL)
264 display_width = simple_strtoul(s, NULL, 10);
265 else
266 display_width = 256;
267 s = getenv("displayheight");
268 if (s != NULL)
269 display_height = simple_strtoul(s, NULL, 10);
270 else
271 display_height = 256;
272 printf("%ld x %ld pixel matrix\n", display_width, display_height);
273
274 /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */
275 csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) |
276 AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) |
277 AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
278 AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
279 writel(csr, &mc->smc.csr[2]);
280 writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
281
282 vcxk_init(display_width, display_height);
283 #ifdef CONFIG_SPLASH_SCREEN
284 s = getenv("splashimage");
285 if (s != NULL) {
286 splash = simple_strtoul(s, NULL, 16);
287 printf("use splashimage: %lx\n", splash);
288 video_display_bitmap(splash, 0, 0);
289 }
290 #endif
291 return 0;
292 }
293 #endif
294
295 #ifdef CONFIG_SOFT_I2C
296
297 void i2c_init_board(void)
298 {
299 u32 pin;
300 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
301 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
302
303 writel(1 << ATMEL_ID_PIOA, &pmc->pcer);
304 pin = ATMEL_PMX_AA_TWD | ATMEL_PMX_AA_TWCK;
305 writel(pin, &pio->pioa.idr);
306 writel(pin, &pio->pioa.pudr);
307 writel(pin, &pio->pioa.per);
308 writel(pin, &pio->pioa.oer);
309 writel(pin, &pio->pioa.sodr);
310 }
311
312 #endif
313
314 /*--------------------------------------------------------------------------*/
315
316 #ifdef CONFIG_STATUS_LED
317
318 void __led_toggle(led_id_t mask)
319 {
320 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
321
322 if (readl(&pio->piod.odsr) & mask)
323 writel(mask, &pio->piod.codr);
324 else
325 writel(mask, &pio->piod.codr);
326 }
327
328 void __led_init(led_id_t mask, int state)
329 {
330 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
331 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
332
333 writel(1 << ATMEL_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
334 /* Disable peripherals on LEDs */
335 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
336 /* Enable pins as outputs */
337 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
338 /* Turn all LEDs OFF */
339 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
340
341 __led_set(mask, state);
342 }
343
344 void __led_set(led_id_t mask, int state)
345 {
346 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
347 if (state == STATUS_LED_ON)
348 writel(mask, &pio->piod.codr);
349 else
350 writel(mask, &pio->piod.sodr);
351 }
352
353 #endif
354
355 /*---------------------------------------------------------------------------*/
356
357 int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
358 {
359 int rcode = 0;
360 ulong side;
361 ulong bright;
362
363 switch (argc) {
364 case 3:
365 side = simple_strtoul(argv[1], NULL, 10);
366 bright = simple_strtoul(argv[2], NULL, 10);
367 if ((side >= 0) && (side <= 3) &&
368 (bright >= 0) && (bright <= 1000)) {
369 vcxk_setbrightness(side, bright);
370 rcode = 0;
371 } else {
372 printf("parameters out of range\n");
373 printf("Usage:\n%s\n", cmdtp->usage);
374 rcode = 1;
375 }
376 break;
377 default:
378 printf("Usage:\n%s\n", cmdtp->usage);
379 rcode = 1;
380 break;
381 }
382 return rcode;
383 }
384
385 /*---------------------------------------------------------------------------*/
386
387 U_BOOT_CMD(
388 bright, 3, 0, do_brightness,
389 "bright - sets the display brightness\n",
390 " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
391 );
392
393 /* EOF cpu9k2.c */