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[people/ms/u-boot.git] / board / BuS / eb_cpux9k2 / cpux9k2.c
1 /*
2 * (C) Copyright 2008-2009
3 * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
4 * Jens Scharsig <esw@bus-elektronik.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #include <common.h>
26 #include <exports.h>
27 #include <net.h>
28 #include <netdev.h>
29 #include <nand.h>
30
31 #include <asm/io.h>
32 #include <asm/arch/hardware.h>
33 #include <asm/arch/at91_pio.h>
34 #include <asm/arch/at91_pmc.h>
35 #include <asm/arch/at91_mc.h>
36 #include <asm/arch/at91_common.h>
37
38 #ifdef CONFIG_STATUS_LED
39 #include <status_led.h>
40 #endif
41
42 #ifdef CONFIG_VIDEO
43 #include <bus_vcxk.h>
44
45 extern unsigned long display_width;
46 extern unsigned long display_height;
47 #endif
48
49 #ifdef CONFIG_CMD_NAND
50 void cpux9k2_nand_hw_init(void);
51 #endif
52
53 DECLARE_GLOBAL_DATA_PTR;
54
55 /*
56 * Miscelaneous platform dependent initialisations
57 */
58
59 int board_init(void)
60 {
61 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
62
63 /* Correct IRDA resistor problem / Set PA23_TXD in Output */
64 writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer);
65
66 gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
67 /* adress of boot parameters */
68 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
69
70 #ifdef CONFIG_STATUS_LED
71 status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
72 #endif
73 #ifdef CONFIG_CMD_NAND
74 cpux9k2_nand_hw_init();
75 #endif
76 return 0;
77 }
78
79 int board_early_init_f(void)
80 {
81 at91_seriald_hw_init();
82 return 0;
83 }
84
85 #ifdef CONFIG_MISC_INIT_R
86
87 int misc_init_r(void)
88 {
89 uchar mac[8];
90 uchar tm;
91 uchar midx;
92 uchar macn6, macn7;
93
94 if (getenv("ethaddr") == NULL) {
95 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
96 CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
97 (uchar *) &mac, sizeof(mac)) != 0) {
98 puts("Error reading MAC from EEPROM\n");
99 } else {
100 tm = 0;
101 macn6 = 0;
102 macn7 = 0xFF;
103 for (midx = 0; midx < 6; midx++) {
104 if ((mac[midx] != 0) && (mac[midx] != 0xFF))
105 tm++;
106 macn6 += mac[midx];
107 macn7 ^= mac[midx];
108 }
109 if ((macn6 != mac[6]) || (macn7 != mac[7]))
110 tm = 0;
111 if (tm)
112 eth_setenv_enetaddr("ethaddr", mac);
113 else
114 puts("Error: invalid MAC at EEPROM\n");
115 }
116 }
117 gd->jt[XF_do_reset] = (void *) do_reset;
118
119 #ifdef CONFIG_STATUS_LED
120 status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
121 #endif
122 return 0;
123 }
124 #endif
125
126 #ifdef CONFIG_RESET_PHY_R
127 void reset_phy(void)
128 {
129 udelay(10000);
130 eth_init(gd->bd);
131 }
132 #endif
133
134 /*
135 * DRAM initialisations
136 */
137
138 int dram_init(void)
139 {
140 gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
141 CONFIG_SYS_SDRAM_SIZE);
142 return 0;
143 }
144
145 /*
146 * Ethernet initialisations
147 */
148
149 #ifdef CONFIG_DRIVER_AT91EMAC
150 int board_eth_init(bd_t *bis)
151 {
152 int rc = 0;
153 rc = at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
154 return rc;
155 }
156 #endif
157
158 /*
159 * Disk On Chip (NAND) Millenium initialization.
160 * The NAND lives in the CS2* space
161 */
162 #if defined(CONFIG_CMD_NAND)
163
164 #define MASK_ALE (1 << 22) /* our ALE is AD22 */
165 #define MASK_CLE (1 << 21) /* our CLE is AD21 */
166
167 void cpux9k2_nand_hw_init(void)
168 {
169 unsigned long csr;
170 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
171 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
172 at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
173
174 /* Setup Smart Media, fitst enable the address range of CS3 */
175 writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
176
177 /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
178 csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
179 AT91_SMC_CSR_NWS(3) |
180 AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
181 AT91_SMC_CSR_WSEN;
182 writel(csr, &mc->smc.csr[3]);
183
184 writel(ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.asr);
185 writel(ATMEL_PMX_CA_BFCK | ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE,
186 &pio->pioc.pdr);
187
188 /* Configure PC2 as input (signal Nand READY ) */
189 writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.per);
190 writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
191 writel(ATMEL_PMX_CA_BFCK, &pio->pioc.codr);
192
193 /* PIOC clock enabling */
194 writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
195 }
196
197 static void board_nand_hwcontrol(struct mtd_info *mtd,
198 int cmd, unsigned int ctrl)
199 {
200 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
201 struct nand_chip *this = mtd->priv;
202 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
203
204 if (ctrl & NAND_CTRL_CHANGE) {
205 IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
206
207 if (ctrl & NAND_CLE)
208 IO_ADDR_W |= MASK_CLE;
209 if (ctrl & NAND_ALE)
210 IO_ADDR_W |= MASK_ALE;
211
212 if ((ctrl & NAND_NCE))
213 writel(1, &pio->pioc.codr);
214 else
215 writel(1, &pio->pioc.sodr);
216
217 this->IO_ADDR_W = (void *) IO_ADDR_W;
218 }
219 if (cmd != NAND_CMD_NONE)
220 writeb(cmd, this->IO_ADDR_W);
221 }
222
223 static int board_nand_dev_ready(struct mtd_info *mtd)
224 {
225 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
226 return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
227 }
228
229 int board_nand_init(struct nand_chip *nand)
230 {
231 cpux9k2_nand_hw_init();
232 nand->ecc.mode = NAND_ECC_SOFT;
233 nand->cmd_ctrl = board_nand_hwcontrol;
234 nand->dev_ready = board_nand_dev_ready;
235 nand->chip_delay = 20;
236 return 0;
237 }
238
239 #endif
240
241 #if defined(CONFIG_VIDEO)
242 /*
243 * drv_video_init
244 * FUNCTION: initialize VCxK device
245 */
246
247 int drv_video_init(void)
248 {
249 #ifdef CONFIG_SPLASH_SCREEN
250 unsigned long splash;
251 #endif
252 char *s;
253 unsigned long csr;
254 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
255 at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
256
257 printf("Init Video as ");
258 s = getenv("displaywidth");
259 if (s != NULL)
260 display_width = simple_strtoul(s, NULL, 10);
261 else
262 display_width = 256;
263 s = getenv("displayheight");
264 if (s != NULL)
265 display_height = simple_strtoul(s, NULL, 10);
266 else
267 display_height = 256;
268 printf("%ld x %ld pixel matrix\n", display_width, display_height);
269
270 /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */
271 csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) |
272 AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) |
273 AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
274 AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
275 writel(csr, &mc->smc.csr[2]);
276 writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
277
278 vcxk_init(display_width, display_height);
279 #ifdef CONFIG_SPLASH_SCREEN
280 s = getenv("splashimage");
281 if (s != NULL) {
282 splash = simple_strtoul(s, NULL, 16);
283 printf("use splashimage: %lx\n", splash);
284 video_display_bitmap(splash, 0, 0);
285 }
286 #endif
287 return 0;
288 }
289 #endif
290
291 #ifdef CONFIG_SOFT_I2C
292
293 void i2c_init_board(void)
294 {
295 u32 pin;
296 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
297 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
298
299 writel(1 << ATMEL_ID_PIOA, &pmc->pcer);
300 pin = ATMEL_PMX_AA_TWD | ATMEL_PMX_AA_TWCK;
301 writel(pin, &pio->pioa.idr);
302 writel(pin, &pio->pioa.pudr);
303 writel(pin, &pio->pioa.per);
304 writel(pin, &pio->pioa.oer);
305 writel(pin, &pio->pioa.sodr);
306 }
307
308 #endif
309
310 /*--------------------------------------------------------------------------*/
311
312 #ifdef CONFIG_STATUS_LED
313
314 void __led_toggle(led_id_t mask)
315 {
316 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
317
318 if (readl(&pio->piod.odsr) & mask)
319 writel(mask, &pio->piod.codr);
320 else
321 writel(mask, &pio->piod.codr);
322 }
323
324 void __led_init(led_id_t mask, int state)
325 {
326 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
327 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
328
329 writel(1 << ATMEL_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
330 /* Disable peripherals on LEDs */
331 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
332 /* Enable pins as outputs */
333 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
334 /* Turn all LEDs OFF */
335 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
336
337 __led_set(mask, state);
338 }
339
340 void __led_set(led_id_t mask, int state)
341 {
342 at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
343 if (state == STATUS_LED_ON)
344 writel(mask, &pio->piod.codr);
345 else
346 writel(mask, &pio->piod.sodr);
347 }
348
349 #endif
350
351 /*---------------------------------------------------------------------------*/
352
353 int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
354 {
355 int rcode = 0;
356 ulong side;
357 ulong bright;
358
359 switch (argc) {
360 case 3:
361 side = simple_strtoul(argv[1], NULL, 10);
362 bright = simple_strtoul(argv[2], NULL, 10);
363 if ((side >= 0) && (side <= 3) &&
364 (bright >= 0) && (bright <= 1000)) {
365 vcxk_setbrightness(side, bright);
366 rcode = 0;
367 } else {
368 printf("parameters out of range\n");
369 printf("Usage:\n%s\n", cmdtp->usage);
370 rcode = 1;
371 }
372 break;
373 default:
374 printf("Usage:\n%s\n", cmdtp->usage);
375 rcode = 1;
376 break;
377 }
378 return rcode;
379 }
380
381 /*---------------------------------------------------------------------------*/
382
383 U_BOOT_CMD(
384 bright, 3, 0, do_brightness,
385 "bright - sets the display brightness\n",
386 " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
387 );
388
389 /* EOF cpu9k2.c */