]>
git.ipfire.org Git - thirdparty/u-boot.git/blob - board/Synology/ds414/cmd_syno.c
1 // SPDX-License-Identifier: GPL-2.0+
3 * Commands to deal with Synology specifics.
5 * Copyright (C) 2015 Phil Sutter <phil@nwl.cc>
13 #include <spi_flash.h>
14 #include <linux/mtd/mtd.h>
17 #include "../drivers/ddr/marvell/axp/ddr3_init.h"
20 #define SYNO_SN_TAG "SN="
21 #define SYNO_CHKSUM_TAG "CHK="
24 static int do_syno_populate(int argc
, char * const argv
[])
26 unsigned int bus
= CONFIG_SF_DEFAULT_BUS
;
27 unsigned int cs
= CONFIG_SF_DEFAULT_CS
;
28 unsigned int speed
= CONFIG_SF_DEFAULT_SPEED
;
29 unsigned int mode
= CONFIG_SF_DEFAULT_MODE
;
30 struct spi_flash
*flash
;
31 unsigned long addr
= 0x80000; /* XXX: parameterize this? */
32 loff_t offset
= 0x007d0000;
33 loff_t len
= 0x00010000;
39 /* XXX: arg parsing to select flash here? */
41 flash
= spi_flash_probe(bus
, cs
, speed
, mode
);
43 printf("Failed to initialize SPI flash at %u:%u\n", bus
, cs
);
47 buf
= map_physmem(addr
, len
, MAP_WRBACK
);
49 puts("Failed to map physical memory\n");
53 ret
= spi_flash_read(flash
, offset
, len
, buf
);
55 puts("Failed to read from SPI flash\n");
59 for (n
= 0; n
< ETHADDR_MAX
; n
++) {
60 char ethaddr
[ETH_ALEN
];
62 unsigned char csum
= 0;
64 for (i
= 0, bufp
= buf
+ n
* 7; i
< ETH_ALEN
; i
++) {
69 if (!sum
) /* MAC address empty */
71 if (csum
!= bufp
[i
]) { /* seventh byte is checksum value */
72 printf("Invalid MAC address for interface %d!\n", n
);
76 sprintf(var
, "ethaddr");
78 sprintf(var
, "eth%daddr", n
);
79 snprintf(val
, sizeof(val
) - 1,
80 "%02x:%02x:%02x:%02x:%02x:%02x",
81 ethaddr
[0], ethaddr
[1], ethaddr
[2],
82 ethaddr
[3], ethaddr
[4], ethaddr
[5]);
83 printf("parsed %s = %s\n", var
, val
);
86 if (!strncmp(buf
+ 32, SYNO_SN_TAG
, strlen(SYNO_SN_TAG
))) {
91 snp
= bufp
= buf
+ 32 + strlen(SYNO_SN_TAG
);
92 for (n
= 0; bufp
[n
] && bufp
[n
] != ','; n
++)
96 /* should come right after, but you never know */
97 bufp
= strstr(bufp
+ n
+ 1, SYNO_CHKSUM_TAG
);
99 printf("Serial number checksum tag missing!\n");
103 csump
= bufp
+= strlen(SYNO_CHKSUM_TAG
);
104 for (n
= 0; bufp
[n
] && bufp
[n
] != ','; n
++)
108 if (strict_strtoul(csump
, 10, &c
) || c
!= csum
) {
109 puts("Invalid serial number found!\n");
113 printf("parsed SN = %s\n", snp
);
115 } else { /* old style format */
116 unsigned char csum
= 0;
118 for (n
= 0, bufp
= buf
+ 32; n
< 10; n
++)
121 if (csum
!= bufp
[n
]) {
122 puts("Invalid serial number found!\n");
127 printf("parsed SN = %s\n", buf
+ 32);
128 env_set("SN", buf
+ 32);
131 unmap_physmem(buf
, len
);
135 /* map bit position to function in POWER_MNG_CTRL_REG */
136 static const char * const pwr_mng_bit_func
[] = {
138 "ge3", "ge2", "ge1", "ge0",
139 "pcie00", "pcie01", "pcie02", "pcie03",
140 "pcie10", "pcie11", "pcie12", "pcie13",
142 "sata0_link", "sata0_core",
145 "usb0", "usb1", "usb2",
146 "idma", "xor0", "crypto",
151 "sata1_link", "sata1_core",
155 static int do_syno_clk_gate(int argc
, char * const argv
[])
157 u32 pwr_mng_ctrl_reg
= reg_read(POWER_MNG_CTRL_REG
);
158 const char *func
, *state
;
164 if (!strcmp(argv
[1], "get")) {
165 puts("Clock Gating:\n");
166 for (i
= 0; i
< 32; i
++) {
167 func
= pwr_mng_bit_func
[i
];
170 state
= pwr_mng_ctrl_reg
& (1 << i
) ? "ON" : "OFF";
171 printf("%s:\t\t%s\n", func
, state
);
177 if (!strcmp(argv
[1], "set")) {
180 for (i
= 0; i
< 32; i
++) {
181 if (!pwr_mng_bit_func
[i
])
183 if (!strcmp(func
, pwr_mng_bit_func
[i
]))
187 printf("Error: name '%s' not known\n", func
);
190 val
= state
[0] != '0';
191 pwr_mng_ctrl_reg
|= (val
<< i
);
192 pwr_mng_ctrl_reg
&= ~(!val
<< i
);
193 reg_write(POWER_MNG_CTRL_REG
, pwr_mng_ctrl_reg
);
198 static int do_syno(cmd_tbl_t
*cmdtp
, int flag
,
199 int argc
, char * const argv
[])
211 if (!strcmp(cmd
, "populate_env"))
212 ret
= do_syno_populate(argc
, argv
);
213 else if (!strcmp(cmd
, "clk_gate"))
214 ret
= do_syno_clk_gate(argc
, argv
);
219 return CMD_RET_USAGE
;
224 "Synology specific commands",
225 "populate_env - Read vendor data from SPI flash into environment\n"
226 "clk_gate (get|set name 1|0) - Manage clock gating\n"