board/amlogic/odroid-c2/odroid-c2.c

   1 /*
   2  * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <asm/io.h>
   9 #include <asm/arch/gxbb.h>
  10 #include <asm/arch/sm.h>
  11 #include <dm/platdata.h>
  12 #include <phy.h>
  13
  14 #define EFUSE_SN_OFFSET         20
  15 #define EFUSE_SN_SIZE           16
  16 #define EFUSE_MAC_OFFSET        52
  17 #define EFUSE_MAC_SIZE          6
  18
  19 int board_init(void)
  20 {
  21         return 0;
  22 }
  23
  24 int misc_init_r(void)
  25 {
  26         u8 mac_addr[EFUSE_MAC_SIZE];
  27         ssize_t len;
  28
  29         /* Set RGMII mode */
  30         setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
  31                                      GXBB_ETH_REG_0_TX_PHASE(1) |
  32                                      GXBB_ETH_REG_0_TX_RATIO(4) |
  33                                      GXBB_ETH_REG_0_PHY_CLK_EN |
  34                                      GXBB_ETH_REG_0_CLK_EN);
  35
  36         /* Enable power and clock gate */
  37         setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
  38         clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
  39
  40         /* Reset PHY on GPIOZ_14 */
  41         clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
  42         clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
  43         mdelay(10);
  44         setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
  45
  46         if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
  47                 len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
  48                                           mac_addr, EFUSE_MAC_SIZE);
  49                 if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
  50                         eth_setenv_enetaddr("ethaddr", mac_addr);
  51         }
  52
  53         return 0;
  54 }