board/bosch/shc/board.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * board.c
   4  *
   5  * (C) Copyright 2016
   6  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   7  *
   8  * Based on:
   9  * Board functions for TI AM335X based boards
  10  *
  11  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  12  */
  13
  14 #include <common.h>
  15 #include <cpu_func.h>
  16 #include <env.h>
  17 #include <errno.h>
  18 #include <init.h>
  19 #include <irq_func.h>
  20 #include <spl.h>
  21 #include <asm/arch/cpu.h>
  22 #include <asm/arch/hardware.h>
  23 #include <asm/arch/omap.h>
  24 #include <asm/arch/ddr_defs.h>
  25 #include <asm/arch/clock.h>
  26 #include <asm/arch/gpio.h>
  27 #include <asm/arch/mmc_host_def.h>
  28 #include <asm/arch/sys_proto.h>
  29 #include <asm/arch/mem.h>
  30 #include <asm/io.h>
  31 #include <asm/emif.h>
  32 #include <asm/gpio.h>
  33 #include <i2c.h>
  34 #include <miiphy.h>
  35 #include <cpsw.h>
  36 #include <power/tps65217.h>
  37 #include <env_internal.h>
  38 #include <watchdog.h>
  39 #include "mmc.h"
  40 #include "board.h"
  41
  42 DECLARE_GLOBAL_DATA_PTR;
  43
  44 static struct shc_eeprom __attribute__((section(".data"))) header;
  45 static int shc_eeprom_valid;
  46
  47 /*
  48  * Read header information from EEPROM into global structure.
  49  */
  50 static int read_eeprom(void)
  51 {
  52         /* Check if baseboard eeprom is available */
  53         if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
  54                 puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
  55                 return -ENODEV;
  56         }
  57
  58         /* read the eeprom using i2c */
  59         if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
  60                      sizeof(header))) {
  61                 puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
  62                 return -EIO;
  63         }
  64
  65         if (header.magic != HDR_MAGIC) {
  66                 printf("Incorrect magic number (0x%x) in EEPROM\n",
  67                        header.magic);
  68                 return -EIO;
  69         }
  70
  71         shc_eeprom_valid = 1;
  72
  73         return 0;
  74 }
  75
  76 static void shc_request_gpio(void)
  77 {
  78         gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
  79         gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
  80         gpio_request(RESET_GPIO, "reset");
  81         gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
  82         gpio_request(WIFI_RST_GPIO, "WIFI rst");
  83         gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
  84         gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
  85         gpio_request(ENOC_RST_GPIO, "ENOC rst");
  86 #if defined CONFIG_B_SAMPLE
  87         gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
  88         gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
  89         gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
  90         gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
  91 #else
  92         gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
  93         gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
  94         gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
  95         gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
  96         gpio_request(LED_PWM_GPIO, "LED PWM");
  97         gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
  98 #endif
  99         gpio_request(BACK_BUTTON_GPIO, "Back button");
 100         gpio_request(FRONT_BUTTON_GPIO, "Front button");
 101 }
 102
 103 /*
 104  * Function which forces all installed modules into running state for ICT
 105  * testing. Called by SPL.
 106  */
 107 static void __maybe_unused force_modules_running(void)
 108 {
 109         /* Wi-Fi power regulator enable - high = enabled */
 110         gpio_direction_output(WIFI_REGEN_GPIO, 1);
 111         /*
 112          * Wait for Wi-Fi power regulator to reach a stable voltage
 113          * (soft-start time, max. 350 µs)
 114          */
 115         __udelay(350);
 116
 117         /* Wi-Fi module reset - high = running */
 118         gpio_direction_output(WIFI_RST_GPIO, 1);
 119
 120         /* ZigBee reset - high = running */
 121         gpio_direction_output(ZIGBEE_RST_GPIO, 1);
 122
 123         /* BidCos reset - high = running */
 124         gpio_direction_output(BIDCOS_RST_GPIO, 1);
 125
 126 #if !defined(CONFIG_B_SAMPLE)
 127         /* Z-Wave reset - high = running */
 128         gpio_direction_output(Z_WAVE_RST_GPIO, 1);
 129 #endif
 130
 131         /* EnOcean reset - low = running */
 132         gpio_direction_output(ENOC_RST_GPIO, 0);
 133 }
 134
 135 /*
 136  * Function which forces all installed modules into reset - to be released by
 137  * the OS, called by SPL
 138  */
 139 static void __maybe_unused force_modules_reset(void)
 140 {
 141         /* Wi-Fi module reset - low = reset */
 142         gpio_direction_output(WIFI_RST_GPIO, 0);
 143
 144         /* Wi-Fi power regulator enable - low = disabled */
 145         gpio_direction_output(WIFI_REGEN_GPIO, 0);
 146
 147         /* ZigBee reset - low = reset */
 148         gpio_direction_output(ZIGBEE_RST_GPIO, 0);
 149
 150         /* BidCos reset - low = reset */
 151         /*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
 152
 153 #if !defined(CONFIG_B_SAMPLE)
 154         /* Z-Wave reset - low = reset */
 155         gpio_direction_output(Z_WAVE_RST_GPIO, 0);
 156 #endif
 157
 158         /* EnOcean reset - high = reset*/
 159         gpio_direction_output(ENOC_RST_GPIO, 1);
 160 }
 161
 162 /*
 163  * Function to set the LEDs in the state "Bootloader booting"
 164  */
 165 static void __maybe_unused leds_set_booting(void)
 166 {
 167 #if defined(CONFIG_B_SAMPLE)
 168
 169         /* Turn all red LEDs on */
 170         gpio_direction_output(LED_PWR_RD_GPIO, 1);
 171         gpio_direction_output(LED_CONN_RD_GPIO, 1);
 172
 173 #else /* All other SHCs starting with B2-Sample */
 174         /* Set the PWM GPIO */
 175         gpio_direction_output(LED_PWM_GPIO, 1);
 176         /* Turn all red LEDs on */
 177         gpio_direction_output(LED_PWR_RD_GPIO, 1);
 178         gpio_direction_output(LED_LAN_RD_GPIO, 1);
 179         gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
 180
 181 #endif
 182 }
 183
 184 /*
 185  * Function to set the LEDs in the state "Bootloader error"
 186  */
 187 static void leds_set_failure(int state)
 188 {
 189 #if defined(CONFIG_B_SAMPLE)
 190         /* Turn all blue and green LEDs off */
 191         gpio_set_value(LED_PWR_BL_GPIO, 0);
 192         gpio_set_value(LED_PWR_GN_GPIO, 0);
 193         gpio_set_value(LED_CONN_BL_GPIO, 0);
 194         gpio_set_value(LED_CONN_GN_GPIO, 0);
 195
 196         /* Turn all red LEDs to 'state' */
 197         gpio_set_value(LED_PWR_RD_GPIO, state);
 198         gpio_set_value(LED_CONN_RD_GPIO, state);
 199
 200 #else /* All other SHCs starting with B2-Sample */
 201         /* Set the PWM GPIO */
 202         gpio_direction_output(LED_PWM_GPIO, 1);
 203
 204         /* Turn all blue LEDs off */
 205         gpio_set_value(LED_PWR_BL_GPIO, 0);
 206         gpio_set_value(LED_LAN_BL_GPIO, 0);
 207         gpio_set_value(LED_CLOUD_BL_GPIO, 0);
 208
 209         /* Turn all red LEDs to 'state' */
 210         gpio_set_value(LED_PWR_RD_GPIO, state);
 211         gpio_set_value(LED_LAN_RD_GPIO, state);
 212         gpio_set_value(LED_CLOUD_RD_GPIO, state);
 213 #endif
 214 }
 215
 216 /*
 217  * Function to set the LEDs in the state "Bootloader finished"
 218  */
 219 static void leds_set_finish(void)
 220 {
 221 #if defined(CONFIG_B_SAMPLE)
 222         /* Turn all LEDs off */
 223         gpio_set_value(LED_PWR_BL_GPIO, 0);
 224         gpio_set_value(LED_PWR_RD_GPIO, 0);
 225         gpio_set_value(LED_PWR_GN_GPIO, 0);
 226         gpio_set_value(LED_CONN_BL_GPIO, 0);
 227         gpio_set_value(LED_CONN_RD_GPIO, 0);
 228         gpio_set_value(LED_CONN_GN_GPIO, 0);
 229 #else /* All other SHCs starting with B2-Sample */
 230         /* Turn all LEDs off */
 231         gpio_set_value(LED_PWR_BL_GPIO, 0);
 232         gpio_set_value(LED_PWR_RD_GPIO, 0);
 233         gpio_set_value(LED_LAN_BL_GPIO, 0);
 234         gpio_set_value(LED_LAN_RD_GPIO, 0);
 235         gpio_set_value(LED_CLOUD_BL_GPIO, 0);
 236         gpio_set_value(LED_CLOUD_RD_GPIO, 0);
 237
 238         /* Turn off the PWM GPIO and mux it to EHRPWM */
 239         gpio_set_value(LED_PWM_GPIO, 0);
 240         enable_shc_board_pwm_pin_mux();
 241 #endif
 242 }
 243
 244 static void check_button_status(void)
 245 {
 246         ulong value;
 247         gpio_direction_input(FRONT_BUTTON_GPIO);
 248         value = gpio_get_value(FRONT_BUTTON_GPIO);
 249
 250         if (value == 0) {
 251                 printf("front button activated !\n");
 252                 env_set("harakiri", "1");
 253         }
 254 }
 255
 256 #if defined(CONFIG_SPL_BUILD)
 257 #ifdef CONFIG_SPL_OS_BOOT
 258 int spl_start_uboot(void)
 259 {
 260         return 1;
 261 }
 262 #endif
 263
 264 static void shc_board_early_init(void)
 265 {
 266         shc_request_gpio();
 267 # ifdef CONFIG_SHC_ICT
 268         /* Force all modules into enabled state for ICT testing */
 269         force_modules_running();
 270 # else
 271         /* Force all modules to enter Reset state until released by the OS */
 272         force_modules_reset();
 273 # endif
 274         leds_set_booting();
 275 }
 276
 277 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 278
 279 #define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
 280 #define OSC     (V_OSCK/1000000)
 281 /* Bosch: Predivider must be fixed to 4, so N = 4-1 */
 282 #define MPUPLL_N        (4-1)
 283 /* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
 284 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
 285
 286 const struct dpll_params dpll_ddr_shc = {
 287                 400, OSC-1, 1, -1, -1, -1, -1};
 288
 289 const struct dpll_params *get_dpll_ddr_params(void)
 290 {
 291         return &dpll_ddr_shc;
 292 }
 293
 294 /*
 295  * As we enabled downspread SSC with 1.8%, the values needed to be corrected
 296  * such that the 20% overshoot will not lead to too high frequencies.
 297  * In all cases, this is achieved by subtracting one from M (6 MHz less).
 298  * Example: 600 MHz CPU
 299  *   Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
 300  *   600 MHz - 6 MHz (1x Fref) = 594 MHz
 301  *   SSC: 594 MHz * 1.8% = 10.7 MHz SSC
 302  *   Overshoot: 10.7 MHz * 20 % = 2.2 MHz
 303  *   --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
 304  */
 305 const struct dpll_params dpll_mpu_shc_opp100 = {
 306                 99, MPUPLL_N, 1, -1, -1, -1, -1};
 307
 308 void am33xx_spl_board_init(void)
 309 {
 310         int sil_rev;
 311         int mpu_vdd;
 312
 313         puts(BOARD_ID_STR);
 314
 315         /*
 316          * Set CORE Frequency to OPP100
 317          * Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
 318          */
 319         do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
 320
 321         sil_rev = readl(&cdev->deviceid) >> 28;
 322         if (sil_rev < 2) {
 323                 puts("We do not support Silicon Revisions below 2.0!\n");
 324                 return;
 325         }
 326
 327         dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
 328         if (i2c_probe(TPS65217_CHIP_PM))
 329                 return;
 330
 331         /*
 332          * Retrieve the CPU max frequency by reading the efuse
 333          * SHC-Default: 600 MHz
 334          */
 335         switch (dpll_mpu_opp100.m) {
 336         case MPUPLL_M_1000:
 337                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
 338                 break;
 339         case MPUPLL_M_800:
 340                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
 341                 break;
 342         case MPUPLL_M_720:
 343                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
 344                 break;
 345         case MPUPLL_M_600:
 346                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
 347                 break;
 348         case MPUPLL_M_300:
 349                 mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
 350                 break;
 351         default:
 352                 puts("Cannot determine the frequency, failing!\n");
 353                 return;
 354         }
 355
 356         if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
 357                 puts("tps65217_voltage_update failure\n");
 358                 return;
 359         }
 360
 361         /* Set MPU Frequency to what we detected */
 362         printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
 363         printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
 364                dpll_mpu_shc_opp100.m);
 365         do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
 366
 367         /* Enable Spread Spectrum for this freq to be clean on EMI side */
 368         set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
 369
 370         /*
 371          * Using the default voltages for the PMIC (TPS65217D)
 372          * LS1 = 1.8V (VDD_1V8)
 373          * LS2 = 3.3V (VDD_3V3A)
 374          * LDO1 = 1.8V (VIO and VRTC)
 375          * LDO2 = 3.3V (VDD_3V3AUX)
 376          */
 377         shc_board_early_init();
 378 }
 379
 380 void set_uart_mux_conf(void)
 381 {
 382         enable_uart0_pin_mux();
 383 }
 384
 385 void set_mux_conf_regs(void)
 386 {
 387         enable_shc_board_pin_mux();
 388 }
 389
 390 const struct ctrl_ioregs ioregs_evmsk = {
 391         .cm0ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
 392         .cm1ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
 393         .cm2ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
 394         .dt0ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
 395         .dt1ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
 396 };
 397
 398 static const struct ddr_data ddr3_shc_data = {
 399         .datardsratio0 = MT41K256M16HA125E_RD_DQS,
 400         .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
 401         .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
 402         .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
 403 };
 404
 405 static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
 406         .cmd0csratio = MT41K256M16HA125E_RATIO,
 407         .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 408
 409         .cmd1csratio = MT41K256M16HA125E_RATIO,
 410         .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 411
 412         .cmd2csratio = MT41K256M16HA125E_RATIO,
 413         .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 414 };
 415
 416 static struct emif_regs ddr3_shc_emif_reg_data = {
 417         .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
 418         .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
 419         .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
 420         .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
 421         .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
 422         .zq_config = MT41K256M16HA125E_ZQ_CFG,
 423         .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
 424                                 PHY_EN_DYN_PWRDN,
 425 };
 426
 427 void sdram_init(void)
 428 {
 429         /* Configure the DDR3 RAM */
 430         config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
 431                    &ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
 432 }
 433 #endif
 434
 435 /*
 436  * Basic board specific setup.  Pinmux has been handled already.
 437  */
 438 int board_init(void)
 439 {
 440 #if defined(CONFIG_HW_WATCHDOG)
 441         hw_watchdog_init();
 442 #endif
 443         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 444         if (read_eeprom() < 0)
 445                 puts("EEPROM Content Invalid.\n");
 446
 447         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 448 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 449         gpmc_init();
 450 #endif
 451         shc_request_gpio();
 452
 453         return 0;
 454 }
 455
 456 #ifdef CONFIG_BOARD_LATE_INIT
 457 int board_late_init(void)
 458 {
 459         check_button_status();
 460 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 461         if (shc_eeprom_valid)
 462                 if (is_valid_ethaddr(header.mac_addr))
 463                         eth_env_set_enetaddr("ethaddr", header.mac_addr);
 464 #endif
 465
 466         return 0;
 467 }
 468 #endif
 469
 470 #if defined(CONFIG_USB_ETHER) && \
 471         (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
 472 int board_eth_init(bd_t *bis)
 473 {
 474         return usb_eth_initialize(bis);
 475 }
 476 #endif
 477
 478 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 479 static void bosch_check_reset_pin(void)
 480 {
 481         if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
 482                 printf("Resetting ...\n");
 483                 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
 484                 disable_interrupts();
 485                 reset_cpu(0);
 486                 /*NOTREACHED*/
 487         }
 488 }
 489
 490 static void hang_bosch(const char *cause, int code)
 491 {
 492         int lv;
 493
 494         gpio_direction_input(RESET_GPIO);
 495
 496         /* Enable reset pin interrupt on falling edge */
 497         writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
 498         writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
 499         enable_interrupts();
 500
 501         puts(cause);
 502         for (;;) {
 503                 for (lv = 0; lv < code; lv++) {
 504                         bosch_check_reset_pin();
 505                         leds_set_failure(1);
 506                         __udelay(150 * 1000);
 507                         leds_set_failure(0);
 508                         __udelay(150 * 1000);
 509                 }
 510 #if defined(BLINK_CODE)
 511                 __udelay(300 * 1000);
 512 #endif
 513         }
 514 }
 515
 516 void show_boot_progress(int val)
 517 {
 518         switch (val) {
 519         case BOOTSTAGE_ID_NEED_RESET:
 520                 hang_bosch("need reset", 4);
 521                 break;
 522         }
 523 }
 524
 525 void arch_preboot_os(void)
 526 {
 527         leds_set_finish();
 528 }
 529 #endif