2 * (C) Copyright 2007 DENX Software Engineering
4 * Author: Bartlomiej Sieka <tur@semihalf.com>
5 * Author: Grzegorz Bernacki <gjb@semihalf.com>
7 * SPDX-License-Identifier: GPL-2.0+
15 * Definitions and declarations for the modules of the cm5200 platform. Mostly
16 * related to reading the hardware identification data (HW ID) from the I2C
17 * EEPROM, detection of the particular module we are executing on, and
18 * appropriate SDRAM controller initialization.
22 #define CM5200_UNKNOWN_MODULE 0xffffffff
30 IDENTIFICATION_NUMBER
, /* 5 */
31 MAJOR_SW_VERSION
, /* 6 */
32 MINOR_SW_VERSION
, /* 7 */
33 /* add new alements above this line */
34 HW_ID_ELEM_COUNT
/* count */
38 * Sect. 4.1 "CM1.Q/CMU1.Q Supervisory Microcontroller Interface Definition"
41 #define DEVICE_NAME_OFFSET 0x02
42 #define GENERATION_OFFSET 0x0b
43 #define PCB_NAME_OFFSET 0x0c
44 #define FORM_OFFSET 0x15
45 #define VERSION_OFFSET 0x16
46 #define IDENTIFICATION_NUMBER_OFFSET 0x19
47 #define MAJOR_SW_VERSION_OFFSET 0x0480
48 #define MINOR_SW_VERSION_OFFSET 0x0481
51 #define DEVICE_NAME_LEN 0x09
52 #define GENERATION_LEN 0x01
53 #define PCB_NAME_LEN 0x09
55 #define VERSION_LEN 0x03
56 #define IDENTIFICATION_NUMBER_LEN 0x09
57 #define MAJOR_SW_VERSION_LEN 0x01
58 #define MINOR_SW_VERSION_LEN 0x01
60 #define HW_ID_ELEM_MAXLEN 0x09 /* MAX(XXX_LEN) */
62 /* entire HW ID in EEPROM is 64 bytes, so longer module name is unlikely */
63 #define MODULE_NAME_MAXLEN 64
66 /* storage for HW ID read from EEPROM */
67 typedef char hw_id_t
[HW_ID_ELEM_COUNT
][HW_ID_ELEM_MAXLEN
];
70 /* HW ID layout in EEPROM */
74 } hw_id_format
[HW_ID_ELEM_COUNT
] = {
75 {DEVICE_NAME_OFFSET
, DEVICE_NAME_LEN
},
76 {GENERATION_OFFSET
, GENERATION_LEN
},
77 {PCB_NAME_OFFSET
, PCB_NAME_LEN
},
78 {FORM_OFFSET
, FORM_LEN
},
79 {VERSION_OFFSET
, VERSION_LEN
},
80 {IDENTIFICATION_NUMBER_OFFSET
, IDENTIFICATION_NUMBER_LEN
},
81 {MAJOR_SW_VERSION_OFFSET
, MAJOR_SW_VERSION_LEN
},
82 {MINOR_SW_VERSION_OFFSET
, MINOR_SW_VERSION_LEN
},
86 /* HW ID data found in EEPROM on supported modules */
87 static char *cm1_qa_hw_id
[HW_ID_ELEM_COUNT
] = {
88 "CM", /* DEVICE_NAME */
93 "591881", /* IDENTIFICATION_NUMBER */
94 "", /* MAJOR_SW_VERSION */
95 "", /* MINOR_SW_VERSION */
98 static char *cm11_qa_hw_id
[HW_ID_ELEM_COUNT
] = {
99 "CM", /* DEVICE_NAME */
100 "1", /* GENERATION */
101 "CM11", /* PCB_NAME */
104 "594200", /* IDENTIFICATION_NUMBER */
105 "", /* MAJOR_SW_VERSION */
106 "", /* MINOR_SW_VERSION */
109 static char *cmu1_qa_hw_id
[HW_ID_ELEM_COUNT
] = {
110 "CMU", /* DEVICE_NAME */
111 "1", /* GENERATION */
112 "CMU1", /* PCB_NAME */
115 "594128", /* IDENTIFICATION_NUMBER */
116 "", /* MAJOR_SW_VERSION */
117 "", /* MINOR_SW_VERSION */
121 /* list of known modules */
122 static char **hw_id_list
[] = {
128 /* indices to the above list - keep in sync */
136 /* identify modules based on these hw id elements */
137 static int hw_id_identify
[] = {
144 /* Registers' settings for SDRAM controller intialization */
152 static mem_conf_t k4s561632E
= {
153 0x00CD0000, /* CASL 3, burst length 8 */
159 static mem_conf_t mt48lc32m16a2
= {
160 0x00CD0000, /* CASL 3, burst length 8 */
166 static mem_conf_t
* memory_config
[] = {
171 #endif /* _CM5200_H */