board/compal/paz00/paz00.c

   1 /*
   2  * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  */
  16
  17 #include <common.h>
  18 #include <asm/io.h>
  19 #include <asm/arch/tegra.h>
  20 #include <asm/arch/pinmux.h>
  21 #include <asm/gpio.h>
  22
  23 #ifdef CONFIG_TEGRA_MMC
  24 /*
  25  * Routine: pin_mux_mmc
  26  * Description: setup the pin muxes/tristate values for the SDMMC(s)
  27  */
  28 void pin_mux_mmc(void)
  29 {
  30         /* SDMMC4: config 3, x8 on 2nd set of pins */
  31         pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
  32         pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
  33         pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
  34
  35         pinmux_tristate_disable(PMUX_PINGRP_ATB);
  36         pinmux_tristate_disable(PMUX_PINGRP_GMA);
  37         pinmux_tristate_disable(PMUX_PINGRP_GME);
  38
  39         /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
  40         pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
  41
  42         pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
  43
  44         /* For power GPIO PV1 */
  45         pinmux_tristate_disable(PMUX_PINGRP_UAC);
  46         /* For CD GPIO PV5 */
  47         pinmux_tristate_disable(PMUX_PINGRP_GPV);
  48 }
  49 #endif
  50
  51 #ifdef CONFIG_LCD
  52 /* this is a weak define that we are overriding */
  53 void pin_mux_display(void)
  54 {
  55         debug("init display pinmux\n");
  56
  57         /* EN_VDD_PANEL GPIO A4 */
  58         pinmux_tristate_disable(PMUX_PINGRP_DAP2);
  59 }
  60 #endif