board/davinci/dm365evm/dm365evm.c

   1 /*
   2  * Copyright (C) 2009 Texas Instruments Incorporated
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 #include <common.h>
  20 #include <nand.h>
  21 #include <asm/io.h>
  22 #include <asm/arch/hardware.h>
  23 #include <asm/arch/emif_defs.h>
  24 #include <asm/arch/nand_defs.h>
  25 #include <asm/arch/gpio_defs.h>
  26 #include <netdev.h>
  27 #include "../common/misc.h"
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 int board_init(void)
  32 {
  33         gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM365_EVM;
  34         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  35
  36         return 0;
  37 }
  38
  39 #ifdef CONFIG_DRIVER_TI_EMAC
  40 int board_eth_init(bd_t *bis)
  41 {
  42         uint8_t eeprom_enetaddr[6];
  43         int i;
  44         struct davinci_gpio *gpio1_base =
  45                         (struct davinci_gpio *)DAVINCI_GPIO_BANK01;
  46
  47         /* Configure PINMUX 3 to enable EMAC pins */
  48         writel((readl(PINMUX3) | 0x1affff), PINMUX3);
  49
  50         /* Configure GPIO20 as output */
  51         writel((readl(&gpio1_base->dir) & ~(1 << 20)), &gpio1_base->dir);
  52
  53         /* Toggle GPIO 20 */
  54         for (i = 0; i < 20; i++) {
  55                 /* GPIO 20 low */
  56                 writel((readl(&gpio1_base->out_data) & ~(1 << 20)),
  57                                                 &gpio1_base->out_data);
  58
  59                 udelay(1000);
  60
  61                 /* GPIO 20 high */
  62                 writel((readl(&gpio1_base->out_data) | (1 << 20)),
  63                                                 &gpio1_base->out_data);
  64         }
  65
  66         /* Configure I2C pins so that EEPROM can be read */
  67         writel((readl(PINMUX3) | 0x01400000), PINMUX3);
  68
  69         /* Read Ethernet MAC address from EEPROM */
  70         if (dvevm_read_mac_address(eeprom_enetaddr))
  71                 davinci_sync_env_enetaddr(eeprom_enetaddr);
  72
  73         davinci_emac_initialize();
  74
  75         return 0;
  76 }
  77 #endif
  78
  79 #ifdef CONFIG_NAND_DAVINCI
  80 static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
  81 {
  82         struct nand_chip        *this = mtd->priv;
  83         unsigned long           wbase = (unsigned long) this->IO_ADDR_W;
  84         unsigned long           rbase = (unsigned long) this->IO_ADDR_R;
  85
  86         if (chip == 1) {
  87                 __set_bit(14, &wbase);
  88                 __set_bit(14, &rbase);
  89         } else {
  90                 __clear_bit(14, &wbase);
  91                 __clear_bit(14, &rbase);
  92         }
  93         this->IO_ADDR_W = (void *)wbase;
  94         this->IO_ADDR_R = (void *)rbase;
  95 }
  96
  97 int board_nand_init(struct nand_chip *nand)
  98 {
  99         davinci_nand_init(nand);
 100         nand->select_chip = nand_dm365evm_select_chip;
 101         return 0;
 102 }
 103 #endif