board/davinci/ea20/ea20.c

   1 /*
   2  * (C) Copyright 2010
   3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de
   4  *
   5  * Based on da850evm.c, original Copyrights follow:
   6  *
   7  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   8  *
   9  * Based on da830evm.c. Original Copyrights follow:
  10  *
  11  * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  12  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 #include <common.h>
  18 #include <i2c.h>
  19 #include <net.h>
  20 #include <netdev.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/arch/hardware.h>
  23 #include <asm/ti-common/davinci_nand.h>
  24 #include <asm/arch/emac_defs.h>
  25 #include <asm/io.h>
  26 #include <asm/arch/davinci_misc.h>
  27 #include <asm/gpio.h>
  28 #include "../../../drivers/video/da8xx-fb.h"
  29
  30 DECLARE_GLOBAL_DATA_PTR;
  31
  32 static const struct da8xx_panel lcd_panel = {
  33         /* Casio COM57H531x */
  34         .name = "Casio_COM57H531x",
  35         .width = 640,
  36         .height = 480,
  37         .hfp = 12,
  38         .hbp = 144,
  39         .hsw = 30,
  40         .vfp = 10,
  41         .vbp = 35,
  42         .vsw = 3,
  43         .pxl_clk = 25000000,
  44         .invert_pxl_clk = 0,
  45 };
  46
  47 static const struct display_panel disp_panel = {
  48         QVGA,
  49         16,
  50         16,
  51         COLOR_ACTIVE,
  52 };
  53
  54 static const struct lcd_ctrl_config lcd_cfg = {
  55         &disp_panel,
  56         .ac_bias                = 255,
  57         .ac_bias_intrpt         = 0,
  58         .dma_burst_sz           = 16,
  59         .bpp                    = 16,
  60         .fdd                    = 255,
  61         .tft_alt_mode           = 0,
  62         .stn_565_mode           = 0,
  63         .mono_8bit_mode         = 0,
  64         .invert_line_clock      = 1,
  65         .invert_frm_clock       = 1,
  66         .sync_edge              = 0,
  67         .sync_ctrl              = 1,
  68         .raster_order           = 0,
  69 };
  70
  71 /* SPI0 pin muxer settings */
  72 static const struct pinmux_config spi1_pins[] = {
  73         { pinmux(5), 1, 1 },
  74         { pinmux(5), 1, 2 },
  75         { pinmux(5), 1, 4 },
  76         { pinmux(5), 1, 5 }
  77 };
  78
  79 /* I2C pin muxer settings */
  80 static const struct pinmux_config i2c_pins[] = {
  81         { pinmux(4), 2, 2 },
  82         { pinmux(4), 2, 3 }
  83 };
  84
  85 /* UART0 pin muxer settings */
  86 static const struct pinmux_config uart_pins[] = {
  87         { pinmux(3), 2, 7 },
  88         { pinmux(3), 2, 6 },
  89         { pinmux(3), 2, 4 },
  90         { pinmux(3), 2, 5 }
  91 };
  92
  93 #ifdef CONFIG_DRIVER_TI_EMAC
  94 #define HAS_RMII 1
  95 static const struct pinmux_config emac_pins[] = {
  96         { pinmux(14), 8, 2 },
  97         { pinmux(14), 8, 3 },
  98         { pinmux(14), 8, 4 },
  99         { pinmux(14), 8, 5 },
 100         { pinmux(14), 8, 6 },
 101         { pinmux(14), 8, 7 },
 102         { pinmux(15), 8, 1 },
 103         { pinmux(4), 8, 0 },
 104         { pinmux(4), 8, 1 }
 105 };
 106 #endif
 107
 108 #ifdef CONFIG_NAND_DAVINCI
 109 const struct pinmux_config nand_pins[] = {
 110         { pinmux(7), 1, 0},     /* CS2 */
 111         { pinmux(7), 0, 1},     /* CS3  in three state*/
 112         { pinmux(7), 1, 4 },    /* EMA_WE */
 113         { pinmux(7), 1, 5 },    /* EMA_OE */
 114         { pinmux(9), 1, 0 },    /* EMA_D[7] */
 115         { pinmux(9), 1, 1 },    /* EMA_D[6] */
 116         { pinmux(9), 1, 2 },    /* EMA_D[5] */
 117         { pinmux(9), 1, 3 },    /* EMA_D[4] */
 118         { pinmux(9), 1, 4 },    /* EMA_D[3] */
 119         { pinmux(9), 1, 5 },    /* EMA_D[2] */
 120         { pinmux(9), 1, 6 },    /* EMA_D[1] */
 121         { pinmux(9), 1, 7 },    /* EMA_D[0] */
 122         { pinmux(12), 1, 5 },   /* EMA_A[2] */
 123         { pinmux(12), 1, 6 },   /* EMA_A[1] */
 124         { pinmux(6), 1, 0 }     /* EMA_CLK */
 125 };
 126 #endif
 127
 128 const struct pinmux_config gpio_pins[] = {
 129         { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
 130         { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
 131         { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
 132         { pinmux(19), 8, 5 }, /* GPIO6[1]  DISP_ON */
 133         { pinmux(14), 8, 1 }  /* GPIO6[6]  LCD_B_PWR*/
 134 };
 135
 136 const struct pinmux_config lcd_pins[] = {
 137         { pinmux(17), 2, 1 }, /* LCD_D_0 */
 138         { pinmux(17), 2, 0 }, /* LCD_D_1 */
 139         { pinmux(16), 2, 7 }, /* LCD_D_2 */
 140         { pinmux(16), 2, 6 }, /* LCD_D_3 */
 141         { pinmux(16), 2, 5 }, /* LCD_D_4 */
 142         { pinmux(16), 2, 4 }, /* LCD_D_5 */
 143         { pinmux(16), 2, 3 }, /* LCD_D_6 */
 144         { pinmux(16), 2, 2 }, /* LCD_D_7 */
 145         { pinmux(18), 2, 1 }, /* LCD_D_8 */
 146         { pinmux(18), 2, 0 }, /* LCD_D_9 */
 147         { pinmux(17), 2, 7 }, /* LCD_D_10 */
 148         { pinmux(17), 2, 6 }, /* LCD_D_11 */
 149         { pinmux(17), 2, 5 }, /* LCD_D_12 */
 150         { pinmux(17), 2, 4 }, /* LCD_D_13 */
 151         { pinmux(17), 2, 3 }, /* LCD_D_14 */
 152         { pinmux(17), 2, 2 }, /* LCD_D_15 */
 153         { pinmux(18), 2, 6 }, /* LCD_PCLK */
 154         { pinmux(19), 2, 0 }, /* LCD_HSYNC */
 155         { pinmux(19), 2, 1 }, /* LCD_VSYNC */
 156         { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
 157 };
 158
 159 const struct pinmux_config halten_pin[] = {
 160         { pinmux(3),  4, 2 } /* GPIO8[6] HALTEN */
 161 };
 162
 163 static const struct pinmux_resource pinmuxes[] = {
 164 #ifdef CONFIG_SPI_FLASH
 165         PINMUX_ITEM(spi1_pins),
 166 #endif
 167         PINMUX_ITEM(uart_pins),
 168         PINMUX_ITEM(i2c_pins),
 169 #ifdef CONFIG_NAND_DAVINCI
 170         PINMUX_ITEM(nand_pins),
 171 #endif
 172 #ifdef CONFIG_VIDEO
 173         PINMUX_ITEM(lcd_pins),
 174 #endif
 175 };
 176
 177 static const struct lpsc_resource lpsc[] = {
 178         { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
 179         { DAVINCI_LPSC_SPI1 },  /* Serial Flash */
 180         { DAVINCI_LPSC_EMAC },  /* image download */
 181         { DAVINCI_LPSC_UART0 }, /* console */
 182         { DAVINCI_LPSC_GPIO },
 183         { DAVINCI_LPSC_LCDC }, /* LCD */
 184 };
 185
 186 int board_early_init_f(void)
 187 {
 188         /* PinMux for GPIO */
 189         if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
 190                 return 1;
 191
 192         /* Set DISP_ON high to enable LCD output*/
 193         gpio_direction_output(97, 1);
 194
 195         /* Set the RESETOUTn low */
 196         gpio_direction_output(111, 0);
 197
 198         /* Set U0_SW0 low for UART0 as console*/
 199         gpio_direction_output(106, 0);
 200
 201         /* Set U0_SW1 low for UART0 as console*/
 202         gpio_direction_output(108, 0);
 203
 204         /* Set LCD_B_PWR low to power down LCD Backlight*/
 205         gpio_direction_output(102, 0);
 206
 207         irq_init();
 208
 209         /*
 210          * NAND CS setup - cycle counts based on da850evm NAND timings in the
 211          * Linux kernel @ 25MHz EMIFA
 212          */
 213 #ifdef CONFIG_NAND_DAVINCI
 214         writel((DAVINCI_ABCR_WSETUP(0) |
 215                 DAVINCI_ABCR_WSTROBE(1) |
 216                 DAVINCI_ABCR_WHOLD(0) |
 217                 DAVINCI_ABCR_RSETUP(0) |
 218                 DAVINCI_ABCR_RSTROBE(1) |
 219                 DAVINCI_ABCR_RHOLD(0) |
 220                 DAVINCI_ABCR_TA(0) |
 221                 DAVINCI_ABCR_ASIZE_8BIT),
 222                &davinci_emif_regs->ab1cr); /* CS2 */
 223 #endif
 224
 225         /*
 226          * Power on required peripherals
 227          * ARM does not have access by default to PSC0 and PSC1
 228          * assuming here that the DSP bootloader has set the IOPU
 229          * such that PSC access is available to ARM
 230          */
 231         if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
 232                 return 1;
 233
 234         /* setup the SUSPSRC for ARM to control emulation suspend */
 235         writel(readl(&davinci_syscfg_regs->suspsrc) &
 236                ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
 237                  DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
 238                  DAVINCI_SYSCFG_SUSPSRC_UART0),
 239                &davinci_syscfg_regs->suspsrc);
 240
 241         /* configure pinmux settings */
 242         if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
 243                 return 1;
 244
 245 #ifdef CONFIG_DRIVER_TI_EMAC
 246         if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
 247                 return 1;
 248
 249         davinci_emac_mii_mode_sel(HAS_RMII);
 250 #endif /* CONFIG_DRIVER_TI_EMAC */
 251
 252         /* enable the console UART */
 253         writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
 254                 DAVINCI_UART_PWREMU_MGMT_UTRST),
 255                &davinci_uart0_ctrl_regs->pwremu_mgmt);
 256
 257         /*
 258          * Reconfigure the LCDC priority to the highest to ensure that
 259          * the throughput/latency requirements for the LCDC are met.
 260          */
 261         writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
 262                &davinci_syscfg_regs->mstpri[2]);
 263
 264
 265         return 0;
 266 }
 267
 268 /*
 269  * Do not overwrite the console
 270  * Use always serial for U-Boot console
 271  */
 272 int overwrite_console(void)
 273 {
 274         return 1;
 275 }
 276
 277 int board_init(void)
 278 {
 279         /* arch number of the board */
 280         gd->bd->bi_arch_number = MACH_TYPE_EA20;
 281
 282         /* address of boot parameters */
 283         gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 284
 285         da8xx_video_init(&lcd_panel, &lcd_cfg, 16);
 286
 287         return 0;
 288 }
 289
 290 #ifdef CONFIG_BOARD_LATE_INIT
 291
 292 int board_late_init(void)
 293 {
 294         unsigned char buf[2];
 295         int ret;
 296
 297         /* PinMux for HALTEN */
 298         if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
 299                 return 1;
 300
 301         /* Set HALTEN to high */
 302         gpio_direction_output(134, 1);
 303
 304         /* Set fixed contrast settings for LCD via I2C potentiometer */
 305         buf[0] = 0x00;
 306         buf[1] = 0xd7;
 307         ret = i2c_write(0x2e, 6, 1, buf, 2);
 308         if (ret)
 309                 puts("\nContrast Settings FAILED\n");
 310
 311         /* Set LCD_B_PWR high to power up LCD Backlight*/
 312         gpio_set_value(102, 1);
 313         return 0;
 314 }
 315 #endif /* CONFIG_BOARD_LATE_INIT */
 316
 317 #ifdef CONFIG_DRIVER_TI_EMAC
 318
 319 /*
 320  * Initializes on-board ethernet controllers.
 321  */
 322 int board_eth_init(bd_t *bis)
 323 {
 324         if (!davinci_emac_initialize()) {
 325                 printf("Error: Ethernet init failed!\n");
 326                 return -1;
 327         }
 328
 329         /*
 330          * This board has a RMII PHY. However, the MDC line on the SOM
 331          * must not be disabled (there is no MII PHY on the
 332          * baseboard) via the GPIO2[6], because this pin
 333          * disables at the same time the SPI flash.
 334          */
 335
 336         return 0;
 337 }
 338 #endif /* CONFIG_DRIVER_TI_EMAC */