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git.ipfire.org Git - people/ms/u-boot.git/blob - board/eltec/bab7xx/bab7xx.c
2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
4 * (C) Copyright 2001 ELTEC Elektronik AG
5 * Frank Gottschling <fgottschling@eltec.de>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /*---------------------------------------------------------------------------*/
36 * Get Bus clock frequency
38 ulong
bab7xx_get_bus_freq (void)
41 * The GPIO Port 1 on BAB7xx reflects the bus speed.
43 volatile struct GPIO
*gpio
= (struct GPIO
*)(CFG_ISA_IO
+ CFG_NS87308_GPIO_BASE
);
45 unsigned char data
= gpio
->dta1
;
53 /*---------------------------------------------------------------------------*/
56 * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
58 ulong
bab7xx_get_gclk_freq (void)
60 static const int pllratio_to_factor
[] = {
61 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00,
64 return pllratio_to_factor
[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10);
67 /*----------------------------------------------------------------------------*/
73 printf ("MPC7xx V%d.%d",(pvr
>> 8) & 0xFF, pvr
& 0xFF);
74 printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq()/1000000,
75 bab7xx_get_bus_freq()/1000000);
80 /* ------------------------------------------------------------------------- */
84 #ifdef CFG_ADDRESS_MAP_A
85 puts ("Board: ELTEC BAB7xx PReP\n");
87 puts ("Board: ELTEC BAB7xx CHRP\n");
92 /* ------------------------------------------------------------------------- */
96 /* TODO: XXX XXX XXX */
97 printf ("2 MB ## Test not implemented yet ##\n");
101 /* ------------------------------------------------------------------------- */
104 static unsigned int mpc106_read_cfg_dword (unsigned int reg
)
106 unsigned int reg_addr
= MPC106_REG
| (reg
& 0xFFFFFFFC);
108 out32r(MPC106_REG_ADDR
, reg_addr
);
110 return (in32r(MPC106_REG_DATA
| (reg
& 0x3)));
113 /* ------------------------------------------------------------------------- */
115 long int dram_size (int board_type
)
117 /* No actual initialisation to do - done when setting up
118 * PICRs MCCRs ME/SARs etc in ram_init.S.
121 register unsigned long i
, msar1
, mear1
, memSize
;
123 #if defined(CFG_MEMTEST)
124 register unsigned long reg
;
126 printf("Testing DRAM\n");
128 /* write each mem addr with it's address */
129 for (reg
= CFG_MEMTEST_START
; reg
< CFG_MEMTEST_END
; reg
+=4)
132 for (reg
= CFG_MEMTEST_START
; reg
< CFG_MEMTEST_END
; reg
+=4)
140 * Since MPC106 memory controller chip has already been set to
141 * control all memory, just read and interpret its memory boundery register.
144 msar1
= mpc106_read_cfg_dword(MPC106_MSAR1
);
145 mear1
= mpc106_read_cfg_dword(MPC106_MEAR1
);
146 i
= mpc106_read_cfg_dword(MPC106_MBER
) & 0xf;
150 if (i
& 0x01) /* is bank enabled ? */
151 memSize
+= (mear1
& 0xff) - (msar1
& 0xff) + 1;
157 return (memSize
* 0x100000);
160 /* ------------------------------------------------------------------------- */
162 long int initdram(int board_type
)
164 return dram_size(board_type
);
167 /* ------------------------------------------------------------------------- */
169 void after_reloc (ulong dest_addr
)
171 DECLARE_GLOBAL_DATA_PTR
;
174 * Jump to the main U-Boot board init code
176 board_init_r(gd
, dest_addr
);
179 /* ------------------------------------------------------------------------- */
182 * do_reset is done here because in this case it is board specific, since the
183 * 7xx CPUs can only be reset by external HW (the RTC in this case).
186 do_reset (cmd_tbl_t
*cmdtp
, bd_t
*bd
, int flag
, int argc
, char *argv
[])
188 #if defined(CONFIG_RTC_MK48T59)
189 /* trigger watchdog immediately */
190 rtc_set_watchdog(1, RTC_WD_RB_16TH
);
192 #error "You must define the macro CONFIG_RTC_MK48T59."
196 /* ------------------------------------------------------------------------- */
198 #if defined(CONFIG_WATCHDOG)
200 * Since the 7xx CPUs don't have an internal watchdog, this function is
201 * board specific. We use the RTC here.
203 void watchdog_reset(void)
205 #if defined(CONFIG_RTC_MK48T59)
206 /* we use a 32 sec watchdog timer */
207 rtc_set_watchdog(8, RTC_WD_RB_4
);
209 #error "You must define the macro CONFIG_RTC_MK48T59."
212 #endif /* CONFIG_WATCHDOG */
214 /* ------------------------------------------------------------------------- */
216 #ifdef CONFIG_CONSOLE_EXTRA_INFO
217 extern GraphicDevice smi
;
219 void video_get_info_str (int line_number
, char *info
)
221 /* init video info strings for graphic console */
225 sprintf (info
," MPC7xx V%d.%d at %ld / %ld MHz",
226 (get_pvr() >> 8) & 0xFF,
228 bab7xx_get_gclk_freq()/1000000,
229 bab7xx_get_bus_freq()/1000000);
232 sprintf (info
, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
233 dram_size(0)/0x100000,
234 flash_init()/0x100000);
237 sprintf (info
, " %s", smi
.modeIdent
);
241 /* no more info lines */
247 /*---------------------------------------------------------------------------*/