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git.ipfire.org Git - people/ms/u-boot.git/blob - board/emk/common/flash.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 flash_info_t flash_info
[CFG_MAX_FLASH_BANKS
]; /* info for FLASH chips */
31 #if defined (CONFIG_TOP860)
32 typedef unsigned short FLASH_PORT_WIDTH
;
33 typedef volatile unsigned short FLASH_PORT_WIDTHV
;
34 #define FLASH_ID_MASK 0xFF
36 #define FPW FLASH_PORT_WIDTH
37 #define FPWV FLASH_PORT_WIDTHV
39 #define FLASH_CYCLE1 0x0555
40 #define FLASH_CYCLE2 0x02aa
43 #define FLASH_ID3 0x0e
44 #define FLASH_ID4 0x0F
47 #if defined (CONFIG_TOP5200) && !defined (CONFIG_LITE5200)
48 typedef unsigned char FLASH_PORT_WIDTH
;
49 typedef volatile unsigned char FLASH_PORT_WIDTHV
;
50 #define FLASH_ID_MASK 0xFF
52 #define FPW FLASH_PORT_WIDTH
53 #define FPWV FLASH_PORT_WIDTHV
55 #define FLASH_CYCLE1 0x0aaa
56 #define FLASH_CYCLE2 0x0555
59 #define FLASH_ID3 0x1c
60 #define FLASH_ID4 0x1E
63 #if defined (CONFIG_TOP5200) && defined (CONFIG_LITE5200)
64 typedef unsigned char FLASH_PORT_WIDTH
;
65 typedef volatile unsigned char FLASH_PORT_WIDTHV
;
66 #define FLASH_ID_MASK 0xFF
68 #define FPW FLASH_PORT_WIDTH
69 #define FPWV FLASH_PORT_WIDTHV
71 #define FLASH_CYCLE1 0x0555
72 #define FLASH_CYCLE2 0x02aa
75 #define FLASH_ID3 0x0E
76 #define FLASH_ID4 0x0F
79 /*-----------------------------------------------------------------------
82 static ulong
flash_get_size(FPWV
*addr
, flash_info_t
*info
);
83 static void flash_reset(flash_info_t
*info
);
84 static int write_word_amd(flash_info_t
*info
, FPWV
*dest
, FPW data
);
85 static flash_info_t
*flash_get_info(ulong base
);
87 /*-----------------------------------------------------------------------
90 * sets up flash_info and returns size of FLASH (bytes)
92 unsigned long flash_init (void)
94 unsigned long size
= 0;
96 extern void flash_preinit(void);
97 extern void flash_afterinit(uint
, ulong
, ulong
);
98 ulong flashbase
= CFG_FLASH_BASE
;
102 /* There is only ONE FLASH device */
103 memset(&flash_info
[i
], 0, sizeof(flash_info_t
));
105 flash_get_size((FPW
*)flashbase
, &flash_info
[i
]);
106 size
+= flash_info
[i
].size
;
108 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
109 /* monitor protection ON by default */
110 flash_protect(FLAG_PROTECT_SET
,
112 CFG_MONITOR_BASE
+monitor_flash_len
-1,
113 flash_get_info(CFG_MONITOR_BASE
));
116 #ifdef CONFIG_ENV_IS_IN_FLASH
117 /* ENV protection ON by default */
118 flash_protect(FLAG_PROTECT_SET
,
120 CONFIG_ENV_ADDR
+CONFIG_ENV_SIZE
-1,
121 flash_get_info(CONFIG_ENV_ADDR
));
125 flash_afterinit(i
, flash_info
[i
].start
[0], flash_info
[i
].size
);
126 return size
? size
: 1;
129 /*-----------------------------------------------------------------------
131 static void flash_reset(flash_info_t
*info
)
133 FPWV
*base
= (FPWV
*)(info
->start
[0]);
135 /* Put FLASH back in read mode */
136 if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
)
137 *base
= (FPW
)0x00FF00FF; /* Intel Read Mode */
138 else if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_AMD
)
139 *base
= (FPW
)0x00F000F0; /* AMD Read Mode */
142 /*-----------------------------------------------------------------------
145 static flash_info_t
*flash_get_info(ulong base
)
150 for (i
= 0; i
< CFG_MAX_FLASH_BANKS
; i
++) {
151 info
= & flash_info
[i
];
153 info
->start
[0] <= base
&& base
<= info
->start
[0] + info
->size
- 1)
157 return i
== CFG_MAX_FLASH_BANKS
? 0 : info
;
160 /*-----------------------------------------------------------------------
163 void flash_print_info (flash_info_t
*info
)
169 uchar botbootletter
[] = "B";
170 uchar topbootletter
[] = "T";
171 uchar botboottype
[] = "bottom boot sector";
172 uchar topboottype
[] = "top boot sector";
174 if (info
->flash_id
== FLASH_UNKNOWN
) {
175 printf ("missing or unknown FLASH type\n");
179 switch (info
->flash_id
& FLASH_VENDMASK
) {
180 case FLASH_MAN_AMD
: printf ("AMD "); break;
182 case FLASH_MAN_BM
: printf ("BRIGHT MICRO "); break;
183 case FLASH_MAN_FUJ
: printf ("FUJITSU "); break;
184 case FLASH_MAN_SST
: printf ("SST "); break;
185 case FLASH_MAN_STM
: printf ("STM "); break;
186 case FLASH_MAN_INTEL
: printf ("INTEL "); break;
188 default: printf ("Unknown Vendor "); break;
191 /* check for top or bottom boot, if it applies */
192 if (info
->flash_id
& FLASH_BTYPE
) {
193 boottype
= botboottype
;
194 bootletter
= botbootletter
;
197 boottype
= topboottype
;
198 bootletter
= topbootletter
;
201 switch (info
->flash_id
& FLASH_TYPEMASK
) {
204 fmt
= "29LV160%s (16 Mbit, %s)\n";
207 fmt
= "29LV640M (64 Mbit)\n";
209 case FLASH_AMDLV065D
:
210 fmt
= "29LV065D (64 Mbit)\n";
213 fmt
= "29LV256M (256 Mbit)\n";
216 fmt
= "Unknown Chip Type\n";
220 printf (fmt
, bootletter
, boottype
);
222 printf (" Size: %ld MB in %d Sectors\n",
226 printf (" Sector Start Addresses:");
228 for (i
=0; i
<info
->sector_count
; ++i
) {
231 ulong
*flash
= (unsigned long *) info
->start
[i
];
238 * Check if whole sector is erased
241 (i
!= (info
->sector_count
- 1)) ?
242 (info
->start
[i
+ 1] - info
->start
[i
]) >> 2 :
243 (info
->start
[0] + info
->size
- info
->start
[i
]) >> 2;
246 flash
= (unsigned long *) info
->start
[i
], erased
= 1;
247 (flash
!= (unsigned long *) info
->start
[i
] + size
) && erased
;
250 erased
= *flash
== ~0x0UL
;
252 printf (" %08lX %s %s",
255 info
->protect
[i
] ? "(RO)" : " ");
261 /*-----------------------------------------------------------------------
265 * The following code cannot be run from FLASH!
268 ulong
flash_get_size (FPWV
*addr
, flash_info_t
*info
)
272 /* Write auto select command: read Manufacturer ID */
273 /* Write auto select command sequence and test FLASH answer */
274 addr
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* for AMD, Intel ignores this */
275 addr
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* for AMD, Intel ignores this */
276 addr
[FLASH_CYCLE1
] = (FPW
)0x00900090; /* selects Intel or AMD */
278 /* The manufacturer codes are only 1 byte, so just use 1 byte.
279 * This works for any bus width and any FLASH device width.
282 switch (addr
[FLASH_ID1
] & 0xff) {
284 case (uchar
)AMD_MANUFACT
:
285 info
->flash_id
= FLASH_MAN_AMD
;
289 case (uchar
)INTEL_MANUFACT
:
290 info
->flash_id
= FLASH_MAN_INTEL
;
295 printf ("unknown vendor=%x ", addr
[FLASH_ID1
] & 0xff);
296 info
->flash_id
= FLASH_UNKNOWN
;
297 info
->sector_count
= 0;
302 /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
303 if (info
->flash_id
!= FLASH_UNKNOWN
) switch ((FPW
)addr
[FLASH_ID2
]) {
305 case (FPW
)AMD_ID_LV160B
:
306 info
->flash_id
+= FLASH_AM160B
;
307 info
->sector_count
= 35;
308 info
->size
= 0x00200000;
309 info
->start
[0] = (ulong
)addr
;
310 info
->start
[1] = (ulong
)addr
+ 0x4000;
311 info
->start
[2] = (ulong
)addr
+ 0x6000;
312 info
->start
[3] = (ulong
)addr
+ 0x8000;
313 for (i
= 4; i
< info
->sector_count
; i
++)
315 info
->start
[i
] = (ulong
)addr
+ 0x10000 * (i
-3);
319 case (FPW
)AMD_ID_LV065D
:
320 info
->flash_id
+= FLASH_AMDLV065D
;
321 info
->sector_count
= 128;
322 info
->size
= 0x00800000;
323 for (i
= 0; i
< info
->sector_count
; i
++)
325 info
->start
[i
] = (ulong
)addr
+ 0x10000 * i
;
329 case (FPW
)AMD_ID_MIRROR
:
330 /* MIRROR BIT FLASH, read more ID bytes */
331 if ((FPW
)addr
[FLASH_ID3
] == (FPW
)AMD_ID_LV640U_2
&&
332 (FPW
)addr
[FLASH_ID4
] == (FPW
)AMD_ID_LV640U_3
)
334 info
->flash_id
+= FLASH_AMLV640U
;
335 info
->sector_count
= 128;
336 info
->size
= 0x00800000;
337 for (i
= 0; i
< info
->sector_count
; i
++)
339 info
->start
[i
] = (ulong
)addr
+ 0x10000 * i
;
343 if ((FPW
)addr
[FLASH_ID3
] == (FPW
)AMD_ID_LV256U_2
&&
344 (FPW
)addr
[FLASH_ID4
] == (FPW
)AMD_ID_LV256U_3
)
346 /* attention: only the first 16 MB will be used in u-boot */
347 info
->flash_id
+= FLASH_AMLV256U
;
348 info
->sector_count
= 256;
349 info
->size
= 0x01000000;
350 for (i
= 0; i
< info
->sector_count
; i
++)
352 info
->start
[i
] = (ulong
)addr
+ 0x10000 * i
;
357 /* fall thru to here ! */
359 printf ("unknown AMD device=%x %x %x",
360 (FPW
)addr
[FLASH_ID2
],
361 (FPW
)addr
[FLASH_ID3
],
362 (FPW
)addr
[FLASH_ID4
]);
363 info
->flash_id
= FLASH_UNKNOWN
;
364 info
->sector_count
= 0;
365 info
->size
= 0x800000;
369 /* Put FLASH back in read mode */
375 /*-----------------------------------------------------------------------
378 int flash_erase (flash_info_t
*info
, int s_first
, int s_last
)
381 int flag
, prot
, sect
;
382 int intel
= (info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
;
383 ulong start
, now
, last
;
386 if ((s_first
< 0) || (s_first
> s_last
)) {
387 if (info
->flash_id
== FLASH_UNKNOWN
) {
388 printf ("- missing\n");
390 printf ("- no sectors to erase\n");
395 switch (info
->flash_id
& FLASH_TYPEMASK
) {
401 printf ("Can't erase unknown flash type %08lx - aborted\n",
407 for (sect
=s_first
; sect
<=s_last
; ++sect
) {
408 if (info
->protect
[sect
]) {
414 printf ("- Warning: %d protected sectors will not be erased!\n",
422 /* Start erase on unprotected sectors */
423 for (sect
= s_first
; sect
<=s_last
&& rcode
== 0; sect
++) {
425 if (info
->protect
[sect
] != 0) /* protected, skip it */
428 /* Disable interrupts which might cause a timeout here */
429 flag
= disable_interrupts();
431 addr
= (FPWV
*)(info
->start
[sect
]);
433 *addr
= (FPW
)0x00500050; /* clear status register */
434 *addr
= (FPW
)0x00200020; /* erase setup */
435 *addr
= (FPW
)0x00D000D0; /* erase confirm */
438 /* must be AMD style if not Intel */
439 FPWV
*base
; /* first address in bank */
441 base
= (FPWV
*)(info
->start
[0]);
442 base
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* unlock */
443 base
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* unlock */
444 base
[FLASH_CYCLE1
] = (FPW
)0x00800080; /* erase mode */
445 base
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* unlock */
446 base
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* unlock */
447 *addr
= (FPW
)0x00300030; /* erase sector */
450 /* re-enable interrupts if necessary */
454 start
= get_timer(0);
456 /* wait at least 50us for AMD, 80us for Intel.
461 while ((*addr
& (FPW
)0x00800080) != (FPW
)0x00800080) {
462 if ((now
= get_timer(start
)) > CFG_FLASH_ERASE_TOUT
) {
463 printf ("Timeout\n");
467 *addr
= (FPW
)0x00B000B0;
470 flash_reset(info
); /* reset to read mode */
471 rcode
= 1; /* failed */
475 /* show that we're waiting */
476 if ((get_timer(last
)) > CFG_HZ
) {/* every second */
482 /* show that we're waiting */
483 if ((get_timer(last
)) > CFG_HZ
) { /* every second */
488 flash_reset(info
); /* reset to read mode */
495 /*-----------------------------------------------------------------------
496 * Copy memory to flash, returns:
499 * 2 - Flash not erased
501 int write_buff (flash_info_t
*info
, uchar
*src
, ulong addr
, ulong cnt
)
503 FPW data
= 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
504 int bytes
; /* number of bytes to program in current word */
505 int left
; /* number of bytes left to program */
508 for (left
= cnt
, res
= 0;
509 left
> 0 && res
== 0;
510 addr
+= sizeof(data
), left
-= sizeof(data
) - bytes
) {
512 bytes
= addr
& (sizeof(data
) - 1);
513 addr
&= ~(sizeof(data
) - 1);
515 /* combine source and destination data so can program
516 * an entire word of 16 or 32 bits
518 for (i
= 0; i
< sizeof(data
); i
++) {
520 if (i
< bytes
|| i
- bytes
>= left
)
521 data
+= *((uchar
*)addr
+ i
);
526 /* write one word to the flash */
527 switch (info
->flash_id
& FLASH_VENDMASK
) {
529 res
= write_word_amd(info
, (FPWV
*)addr
, data
);
532 /* unknown flash type, error! */
533 printf ("missing or unknown FLASH type\n");
534 res
= 1; /* not really a timeout, but gives error */
542 /*-----------------------------------------------------------------------
543 * Write a word to Flash for AMD FLASH
544 * A word is 16 or 32 bits, whichever the bus width of the flash bank
545 * (not an individual chip) is.
550 * 2 - Flash not erased
552 static int write_word_amd (flash_info_t
*info
, FPWV
*dest
, FPW data
)
556 int res
= 0; /* result, assume success */
557 FPWV
*base
; /* first address in flash bank */
559 /* Check if Flash is (sufficiently) erased */
560 if ((*dest
& data
) != data
) {
565 base
= (FPWV
*)(info
->start
[0]);
567 /* Disable interrupts which might cause a timeout here */
568 flag
= disable_interrupts();
570 base
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* unlock */
571 base
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* unlock */
572 base
[FLASH_CYCLE1
] = (FPW
)0x00A000A0; /* selects program mode */
574 *dest
= data
; /* start programming the data */
576 /* re-enable interrupts if necessary */
580 start
= get_timer (0);
582 /* data polling for D7 */
583 while (res
== 0 && (*dest
& (FPW
)0x00800080) != (data
& (FPW
)0x00800080)) {
584 if (get_timer(start
) > CFG_FLASH_WRITE_TOUT
) {
585 *dest
= (FPW
)0x00F000F0; /* reset bank */