1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 Amarula Solutions B.V.
4 * Copyright (C) 2016 Engicam S.r.l.
5 * Author: Jagan Teki <jagan@amarulasolutions.com>
13 #include <asm-generic/gpio.h>
15 #include <linux/delay.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/imx8mm_pins.h>
19 #include <asm/arch/sys_proto.h>
20 #include <asm/mach-imx/gpio.h>
21 #include <asm/mach-imx/iomux-v3.h>
23 DECLARE_GLOBAL_DATA_PTR
;
25 #if IS_ENABLED(CONFIG_FEC_MXC)
27 #define FEC_RST_PAD IMX_GPIO_NR(3, 7)
28 static iomux_v3_cfg_t
const fec1_rst_pads
[] = {
29 IMX8MM_PAD_NAND_DATA01_GPIO3_IO7
| MUX_PAD_CTRL(NO_PAD_CTRL
),
32 static void setup_fec(void)
34 imx_iomux_v3_setup_multiple_pads(fec1_rst_pads
,
35 ARRAY_SIZE(fec1_rst_pads
));
37 gpio_request(FEC_RST_PAD
, "fec1_rst");
38 gpio_direction_output(FEC_RST_PAD
, 0);
40 gpio_direction_output(FEC_RST_PAD
, 1);
43 int board_phy_config(struct phy_device
*phydev
)
45 /* enable rgmii rxc skew and phy mode select to RGMII copper */
46 phy_write(phydev
, MDIO_DEVAD_NONE
, 0x1d, 0x1f);
47 phy_write(phydev
, MDIO_DEVAD_NONE
, 0x1e, 0x8);
49 phy_write(phydev
, MDIO_DEVAD_NONE
, 0x1d, 0x00);
50 phy_write(phydev
, MDIO_DEVAD_NONE
, 0x1e, 0x82ee);
51 phy_write(phydev
, MDIO_DEVAD_NONE
, 0x1d, 0x05);
52 phy_write(phydev
, MDIO_DEVAD_NONE
, 0x1e, 0x100);
54 if (phydev
->drv
->config
)
55 phydev
->drv
->config(phydev
);
63 if (IS_ENABLED(CONFIG_FEC_MXC
))
69 int board_mmc_get_env_dev(int devno
)