board/esd/dasa_sim/dasa_sim.c

   1 /*
   2  * (C) Copyright 2001
   3  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include "dasa_sim.h"
  26
  27 /* ------------------------------------------------------------------------- */
  28
  29 #undef FPGA_DEBUG
  30
  31 #define _NOT_USED_      0xFFFFFFFF
  32
  33 /* ------------------------------------------------------------------------- */
  34
  35 /* fpga configuration data - generated by bit2inc */
  36 static unsigned char fpgadata[] = {
  37 #include "fpgadata.c"
  38 };
  39
  40 #define FPGA_PRG_SLEEP         32       /* fpga program sleep-time */
  41 #define LOAD_LONG(a)           a
  42
  43
  44 /******************************************************************************
  45  *
  46  * sysFpgaBoot - Load fpga-image into fpga
  47  *
  48  */
  49 static int fpgaBoot (void)
  50 {
  51         int i, j, index, len;
  52         unsigned char b;
  53         int imageSize;
  54
  55         imageSize = sizeof (fpgadata);
  56
  57         /* display infos on fpgaimage */
  58         index = 15;
  59         for (i = 0; i < 4; i++) {
  60                 len = fpgadata[index];
  61                 index += len + 3;
  62         }
  63
  64         /* search for preamble 0xFF2X */
  65         for (index = 0; index < imageSize - 1; index++) {
  66                 if ((fpgadata[index] == 0xff)
  67                         && ((fpgadata[index + 1] & 0xf0) == 0x20))
  68                         break;
  69         }
  70
  71         /* enable cs1 instead of user0... */
  72         *(unsigned long *) 0x50000084 &= ~0x00000002;
  73
  74 #ifdef FPGA_DEBUG
  75         printf ("%s\n",
  76                         ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
  77 #endif
  78
  79         /* init fpga by asserting and deasserting PROGRAM* (USER2)... */
  80         *(unsigned long *) 0x50000084 &= ~0x00000400;
  81         udelay (FPGA_PRG_SLEEP * 1000);
  82
  83         *(unsigned long *) 0x50000084 |= 0x00000400;
  84         udelay (FPGA_PRG_SLEEP * 1000);
  85
  86 #ifdef FPGA_DEBUG
  87         printf ("%s\n",
  88                         ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
  89 #endif
  90
  91         /* cs1: disable burst, disable ready */
  92         *(unsigned long *) 0x50000114 &= ~0x00000300;
  93
  94         /* cs1: set write timing */
  95         *(unsigned long *) 0x50000118 |= 0x00010900;
  96
  97         /* write configuration-data into fpga... */
  98         for (i = index; i < imageSize; i++) {
  99                 b = fpgadata[i];
 100                 for (j = 0; j < 8; j++) {
 101                         *(unsigned long *) 0x30000000 =
 102                                 ((b & 0x80) == 0x80)
 103                                 ? LOAD_LONG (0x03030101)
 104                                 : LOAD_LONG (0x02020000);
 105                         b <<= 1;
 106                 }
 107         }
 108
 109 #ifdef FPGA_DEBUG
 110         printf ("%s\n",
 111                         ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
 112 #endif
 113
 114         /* set cs1 to 32 bit data-width, disable burst, enable ready */
 115         *(unsigned long *) 0x50000114 |= 0x00000202;
 116         *(unsigned long *) 0x50000114 &= ~0x00000100;
 117
 118         /* cs1: set iop access to little endian */
 119         *(unsigned long *) 0x50000114 &= ~0x00000010;
 120
 121         /* cs1: set read and write timing */
 122         *(unsigned long *) 0x50000118 = 0x00010000;
 123         *(unsigned long *) 0x5000011c = 0x00010001;
 124
 125 #ifdef FPGA_DEBUG
 126         printf ("%s\n",
 127                         ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
 128 #endif
 129
 130         /* wait for 30 ms... */
 131         udelay (30 * 1000);
 132         /* check if fpga's DONE signal - correctly booted ? */
 133         if ((*(unsigned long *) 0x50000084 & 0x00010000) == 0)
 134                 return -1;
 135
 136         return 0;
 137 }
 138
 139
 140 int board_early_init_f (void)
 141 {
 142         /*
 143          * Init pci regs
 144          */
 145         *(unsigned long *) 0x50000304 = 0x02900007;     /* enable mem/io/master bits */
 146         *(unsigned long *) 0x500001b4 = 0x00000000;     /* disable pci interrupt output enable */
 147         *(unsigned long *) 0x50000354 = 0x00c05800;     /* disable emun interrupt output enable */
 148         *(unsigned long *) 0x50000344 = 0x00000000;     /* disable pme interrupt output enable */
 149         *(unsigned long *) 0x50000310 = 0x00000000;     /* pcibar0 */
 150         *(unsigned long *) 0x50000314 = 0x00000000;     /* pcibar1 */
 151         *(unsigned long *) 0x50000318 = 0x00000000;     /* pcibar2 */
 152
 153         return 0;
 154 }
 155
 156
 157 /*
 158  * Check Board Identity:
 159  */
 160
 161 int checkboard (void)
 162 {
 163         int index;
 164         int len;
 165         char str[64];
 166         int i = getenv_r ("serial#", str, sizeof (str));
 167         int fpga;
 168         unsigned short val;
 169
 170         puts ("Board: ");
 171
 172         /*
 173          * Boot onboard FPGA
 174          */
 175         fpga = fpgaBoot ();
 176
 177         if (!i || strncmp (str, "DASA_SIM", 8)) {
 178                 puts ("### No HW ID - assuming DASA_SIM");
 179         }
 180
 181         puts (str);
 182
 183         if (fpga == 0) {
 184                 val = *(unsigned short *) 0x30000202;
 185                 printf (" (Id=%d Version=%d Revision=%d)",
 186                         (val & 0x07f8) >> 3, val & 0x0001, (val & 0x0006) >> 1);
 187
 188                 puts ("\nFPGA:  ");
 189
 190                 /* display infos on fpgaimage */
 191                 index = 15;
 192                 for (i = 0; i < 4; i++) {
 193                         len = fpgadata[index];
 194                         printf ("%s ", &(fpgadata[index + 1]));
 195                         index += len + 3;
 196                 }
 197         } else {
 198                 puts ("\nFPGA:  Booting failed!");
 199         }
 200
 201         putc ('\n');
 202
 203         return 0;
 204 }
 205
 206
 207 /* ------------------------------------------------------------------------- */
 208
 209 long int initdram (int board_type)
 210 {
 211         return (16 * 1024 * 1024);
 212 }
 213
 214 /* ------------------------------------------------------------------------- */
 215
 216 int testdram (void)
 217 {
 218         /* TODO: XXX XXX XXX */
 219         printf ("test: 16 MB - ok\n");
 220
 221         return (0);
 222 }
 223
 224 /* ------------------------------------------------------------------------- */