board/esd/otc570/otc570.c

   1 /*
   2  * (C) Copyright 2010-2011
   3  * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
   4  * esd electronic system design gmbh <www.esd.eu>
   5  *
   6  * (C) Copyright 2007-2008
   7  * Stelian Pop <stelian@popies.net>
   8  * Lead Tech Design <www.leadtechdesign.com>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #include <common.h>
  30 #include <asm/io.h>
  31 #include <asm/arch/at91sam9_smc.h>
  32 #include <asm/arch/at91_common.h>
  33 #include <asm/arch/at91_pmc.h>
  34 #include <asm/arch/at91_rstc.h>
  35 #include <asm/arch/at91_matrix.h>
  36 #include <asm/arch/at91_pio.h>
  37 #include <asm/arch/clk.h>
  38 #include <netdev.h>
  39 #ifdef CONFIG_LCD
  40 # include <atmel_lcdc.h>
  41 # include <lcd.h>
  42 # ifdef CONFIG_LCD_INFO
  43 #  include <nand.h>
  44 #  include <version.h>
  45 # endif
  46 #endif
  47
  48 DECLARE_GLOBAL_DATA_PTR;
  49
  50 /*
  51  * Miscelaneous platform dependent initialisations
  52  */
  53
  54 static int hw_rev = -1; /* hardware revision */
  55
  56 int get_hw_rev(void)
  57 {
  58         if (hw_rev >= 0)
  59                 return hw_rev;
  60
  61         hw_rev = at91_get_pio_value(AT91_PIO_PORTB, 19);
  62         hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 20) << 1;
  63         hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 21) << 2;
  64         hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 22) << 3;
  65
  66         if (hw_rev == 15)
  67                 hw_rev = 0;
  68
  69         return hw_rev;
  70 }
  71
  72 #ifdef CONFIG_CMD_NAND
  73 static void otc570_nand_hw_init(void)
  74 {
  75         unsigned long csa;
  76         at91_smc_t      *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
  77         at91_matrix_t   *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
  78
  79         /* Enable CS3 */
  80         csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
  81         writel(csa, &matrix->csa[0]);
  82
  83         /* Configure SMC CS3 for NAND/SmartMedia */
  84         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  85                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  86                 &smc->cs[3].setup);
  87
  88         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  89                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  90                 &smc->cs[3].pulse);
  91
  92         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  93                 &smc->cs[3].cycle);
  94         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  95                 AT91_SMC_MODE_EXNW_DISABLE |
  96                 AT91_SMC_MODE_DBW_8 |
  97                 AT91_SMC_MODE_TDF_CYCLE(3),
  98                 &smc->cs[3].mode);
  99
 100         /* Configure RDY/BSY */
 101         at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 102
 103         /* Enable NandFlash */
 104         at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 105 }
 106 #endif /* CONFIG_CMD_NAND */
 107
 108 #ifdef CONFIG_MACB
 109 static void otc570_macb_hw_init(void)
 110 {
 111         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 112         /* Enable clock */
 113         writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
 114         at91_macb_hw_init();
 115 }
 116 #endif
 117
 118 /*
 119  * Static memory controller initialization to enable Beckhoff ET1100 EtherCAT
 120  * controller debugging
 121  * The ET1100 is located at physical address 0x70000000
 122  * Its process memory is located at physical address 0x70001000
 123  */
 124 static void otc570_ethercat_hw_init(void)
 125 {
 126         at91_smc_t      *smc1   = (at91_smc_t *) ATMEL_BASE_SMC1;
 127
 128         /* Configure SMC EBI1_CS0 for EtherCAT */
 129         writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
 130                 AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(0),
 131                 &smc1->cs[0].setup);
 132         writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(9) |
 133                 AT91_SMC_PULSE_NRD(5) | AT91_SMC_PULSE_NCS_RD(9),
 134                 &smc1->cs[0].pulse);
 135         writel(AT91_SMC_CYCLE_NWE(10) | AT91_SMC_CYCLE_NRD(6),
 136                 &smc1->cs[0].cycle);
 137         /*
 138          * Configure behavior at external wait signal, byte-select mode, 16 bit
 139          * data bus width, none data float wait states and TDF optimization
 140          */
 141         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_EXNW_READY |
 142                 AT91_SMC_MODE_DBW_16 | AT91_SMC_MODE_TDF_CYCLE(0) |
 143                 AT91_SMC_MODE_TDF, &smc1->cs[0].mode);
 144
 145         /* Configure RDY/BSY */
 146         at91_set_b_periph(AT91_PIO_PORTE, 20, 0);       /* EBI1_NWAIT */
 147 }
 148
 149 #ifdef CONFIG_LCD
 150 /* Number of columns and rows, pixel clock in Hz and hsync/vsync polarity */
 151 vidinfo_t panel_info = {
 152         .vl_col =               640,
 153         .vl_row =               480,
 154         .vl_clk =               25175000,
 155         .vl_sync =              ATMEL_LCDC_INVLINE_INVERTED |
 156                                 ATMEL_LCDC_INVFRAME_INVERTED,
 157
 158         .vl_bpix =              LCD_BPP,/* Bits per pixel, 0 = 1bit, 3 = 8bit */
 159         .vl_tft =               1,      /* 0 = passive, 1 = TFT */
 160         .vl_vsync_len =         1,      /* Length of vertical sync in NOL */
 161         .vl_upper_margin =      35,     /* Idle lines at the frame start */
 162         .vl_lower_margin =      5,      /* Idle lines at the end of the frame */
 163         .vl_hsync_len =         5,      /* Width of the LCDHSYNC pulse */
 164         .vl_left_margin =       112,    /* Idle cycles at the line beginning */
 165         .vl_right_margin =      1,      /* Idle cycles at the end of the line */
 166
 167         .mmio =                 ATMEL_BASE_LCDC,
 168 };
 169
 170 void lcd_enable(void)
 171 {
 172         at91_set_pio_value(AT91_PIO_PORTA, 30, 0); /* power up */
 173 }
 174
 175 void lcd_disable(void)
 176 {
 177         at91_set_pio_value(AT91_PIO_PORTA, 30, 1); /* power down */
 178 }
 179
 180 static void otc570_lcd_hw_init(void)
 181 {
 182         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 183
 184         at91_set_a_periph(AT91_PIO_PORTC, 0, 0);        /* LCDVSYNC */
 185         at91_set_a_periph(AT91_PIO_PORTC, 1, 0);        /* LCDHSYNC */
 186         at91_set_a_periph(AT91_PIO_PORTC, 2, 0);        /* LCDDOTCK */
 187         at91_set_a_periph(AT91_PIO_PORTC, 3, 0);        /* LCDDEN */
 188         at91_set_b_periph(AT91_PIO_PORTB, 9, 0);        /* LCDCC */
 189         at91_set_a_periph(AT91_PIO_PORTC, 6, 0);        /* LCDD2 */
 190         at91_set_a_periph(AT91_PIO_PORTC, 7, 0);        /* LCDD3 */
 191         at91_set_a_periph(AT91_PIO_PORTC, 8, 0);        /* LCDD4 */
 192         at91_set_a_periph(AT91_PIO_PORTC, 9, 0);        /* LCDD5 */
 193         at91_set_a_periph(AT91_PIO_PORTC, 10, 0);       /* LCDD6 */
 194         at91_set_a_periph(AT91_PIO_PORTC, 11, 0);       /* LCDD7 */
 195         at91_set_a_periph(AT91_PIO_PORTC, 14, 0);       /* LCDD10 */
 196         at91_set_a_periph(AT91_PIO_PORTC, 15, 0);       /* LCDD11 */
 197         at91_set_a_periph(AT91_PIO_PORTC, 16, 0);       /* LCDD12 */
 198         at91_set_b_periph(AT91_PIO_PORTC, 12, 0);       /* LCDD13 */
 199         at91_set_a_periph(AT91_PIO_PORTC, 18, 0);       /* LCDD14 */
 200         at91_set_a_periph(AT91_PIO_PORTC, 19, 0);       /* LCDD15 */
 201         at91_set_a_periph(AT91_PIO_PORTC, 22, 0);       /* LCDD18 */
 202         at91_set_a_periph(AT91_PIO_PORTC, 23, 0);       /* LCDD19 */
 203         at91_set_a_periph(AT91_PIO_PORTC, 24, 0);       /* LCDD20 */
 204         at91_set_b_periph(AT91_PIO_PORTC, 17, 0);       /* LCDD21 */
 205         at91_set_a_periph(AT91_PIO_PORTC, 26, 0);       /* LCDD22 */
 206         at91_set_a_periph(AT91_PIO_PORTC, 27, 0);       /* LCDD23 */
 207         at91_set_pio_output(AT91_PIO_PORTA, 30, 1);     /* PCI */
 208
 209         writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
 210 }
 211
 212 #ifdef CONFIG_LCD_INFO
 213 void lcd_show_board_info(void)
 214 {
 215         ulong dram_size, nand_size;
 216         int i;
 217         char temp[32];
 218
 219         dram_size = 0;
 220         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
 221                 dram_size += gd->bd->bi_dram[i].size;
 222         nand_size = 0;
 223         for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
 224                 nand_size += nand_info[i].size;
 225
 226         lcd_printf("\n%s\n", U_BOOT_VERSION);
 227         lcd_printf("CPU at %s MHz\n", strmhz(temp, get_cpu_clk_rate()));
 228         lcd_printf("  %ld MB SDRAM, %ld MB NAND\n",
 229                 dram_size >> 20,
 230                 nand_size >> 20 );
 231         lcd_printf("  Board            : esd ARM9 HMI Panel - OTC570\n");
 232         lcd_printf("  Hardware-revision: 1.%d\n", get_hw_rev());
 233         lcd_printf("  Mach-type        : %lu\n", gd->bd->bi_arch_number);
 234 }
 235 #endif /* CONFIG_LCD_INFO */
 236 #endif /* CONFIG_LCD */
 237
 238 int dram_init(void)
 239 {
 240         gd->ram_size = get_ram_size(
 241                 (void *)CONFIG_SYS_SDRAM_BASE,
 242                 CONFIG_SYS_SDRAM_SIZE);
 243         return 0;
 244 }
 245
 246 int board_eth_init(bd_t *bis)
 247 {
 248         int rc = 0;
 249 #ifdef CONFIG_MACB
 250         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
 251 #endif
 252         return rc;
 253 }
 254
 255 int checkboard(void)
 256 {
 257         char str[32];
 258
 259         puts("Board            : esd ARM9 HMI Panel - OTC570");
 260         if (getenv_f("serial#", str, sizeof(str)) > 0) {
 261                 puts(", serial# ");
 262                 puts(str);
 263         }
 264         printf("\n");
 265         printf("Hardware-revision: 1.%d\n", get_hw_rev());
 266         printf("Mach-type        : %lu\n", gd->bd->bi_arch_number);
 267         return 0;
 268 }
 269
 270 #ifdef CONFIG_SERIAL_TAG
 271 void get_board_serial(struct tag_serialnr *serialnr)
 272 {
 273         char *str;
 274
 275         char *serial = getenv("serial#");
 276         if (serial) {
 277                 str = strchr(serial, '_');
 278                 if (str && (strlen(str) >= 4)) {
 279                         serialnr->high = (*(str + 1) << 8) | *(str + 2);
 280                         serialnr->low = simple_strtoul(str + 3, NULL, 16);
 281                 }
 282         } else {
 283                 serialnr->high = 0;
 284                 serialnr->low = 0;
 285         }
 286 }
 287 #endif
 288
 289 #ifdef CONFIG_REVISION_TAG
 290 u32 get_board_rev(void)
 291 {
 292         return hw_rev | 0x100;
 293 }
 294 #endif
 295
 296 #ifdef CONFIG_MISC_INIT_R
 297 int misc_init_r(void)
 298 {
 299         char            str[64];
 300         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 301
 302         at91_set_pio_output(AT91_PIO_PORTA, 29, 1);
 303         at91_set_a_periph(AT91_PIO_PORTA, 26, 1);       /* TXD0 */
 304         at91_set_a_periph(AT91_PIO_PORTA, 27, 0);       /* RXD0 */
 305         writel(1 << ATMEL_ID_USART0, &pmc->pcer);
 306         /* Set USART_MODE = 1 (RS485) */
 307         writel(1, 0xFFF8C004);
 308
 309         printf("USART0: ");
 310
 311         if (getenv_f("usart0", str, sizeof(str)) == -1) {
 312                 printf("No entry - assuming 1-wire\n");
 313                 /* CTS pin, works as mode select pin (0 = 1-wire; 1 = RS485) */
 314                 at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
 315         } else {
 316                 if (strcmp(str, "1-wire") == 0) {
 317                         printf("%s\n", str);
 318                         at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
 319                 } else if (strcmp(str, "rs485") == 0) {
 320                         printf("%s\n", str);
 321                         at91_set_pio_output(AT91_PIO_PORTA, 29, 1);
 322                 } else {
 323                         printf("Wrong entry - assuming 1-wire ");
 324                         printf("(valid values are '1-wire' or 'rs485')\n");
 325                         at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
 326                 }
 327         }
 328 #ifdef CONFIG_LCD
 329         printf("Display memory address: 0x%08lX\n", gd->fb_base);
 330 #endif
 331
 332         return 0;
 333 }
 334 #endif /* CONFIG_MISC_INIT_R */
 335
 336 int board_early_init_f(void)
 337 {
 338         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 339
 340         /* enable all clocks */
 341         writel((1 << ATMEL_ID_PIOA) |
 342                 (1 << ATMEL_ID_PIOB) |
 343                 (1 << ATMEL_ID_PIOCDE) |
 344                 (1 << ATMEL_ID_TWI) |
 345                 (1 << ATMEL_ID_SPI0) |
 346 #ifdef CONFIG_LCD
 347                 (1 << ATMEL_ID_LCDC) |
 348 #endif
 349                 (1 << ATMEL_ID_UHP),
 350                 &pmc->pcer);
 351
 352         at91_seriald_hw_init();
 353
 354         /* arch number of OTC570-Board */
 355         gd->bd->bi_arch_number = MACH_TYPE_OTC570;
 356
 357         return 0;
 358 }
 359
 360 int board_init(void)
 361 {
 362         /* initialize ET1100 Controller */
 363         otc570_ethercat_hw_init();
 364
 365         /* adress of boot parameters */
 366         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 367
 368 #ifdef CONFIG_CMD_NAND
 369         otc570_nand_hw_init();
 370 #endif
 371 #ifdef CONFIG_HAS_DATAFLASH
 372         at91_spi0_hw_init(1 << 0);
 373 #endif
 374 #ifdef CONFIG_MACB
 375         otc570_macb_hw_init();
 376 #endif
 377 #ifdef CONFIG_AT91_CAN
 378         at91_can_hw_init();
 379 #endif
 380 #ifdef CONFIG_USB_OHCI_NEW
 381         at91_uhp_hw_init();
 382 #endif
 383 #ifdef CONFIG_LCD
 384         otc570_lcd_hw_init();
 385 #endif
 386         return 0;
 387 }