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git.ipfire.org Git - people/ms/u-boot.git/blob - board/freescale/common/arm_sleep.c
16fd445306ec90d396e55ebd239d15ca365361ab
2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef CONFIG_ARMV7_NONSEC
10 #error " Deep sleep needs non-secure mode support. "
12 #include <asm/secure.h>
14 #include <asm/armv7.h>
16 #if defined(CONFIG_LS102XA)
17 #include <asm/arch/immap_ls102xa.h>
25 DECLARE_GLOBAL_DATA_PTR
;
27 void __weak
board_mem_sleep_setup(void)
31 void __weak
board_sleep_prepare(void)
35 bool is_warm_boot(void)
37 struct ccsr_gur __iomem
*gur
= (void *)CONFIG_SYS_FSL_GUTS_ADDR
;
39 if (in_be32(&gur
->crstsr
) & DCFG_CCSR_CRSTSR_WDRFR
)
45 void fsl_dp_disable_console(void)
47 gd
->flags
|= GD_FLG_SILENT
| GD_FLG_DISABLE_CONSOLE
;
51 * When wakeup from deep sleep, the first 128 bytes space
52 * will be used to do DDR training which corrupts the data
53 * in there. This function will restore them.
55 static void dp_ddr_restore(void)
59 struct ccsr_scfg __iomem
*scfg
= (void *)CONFIG_SYS_FSL_SCFG_ADDR
;
61 /* get the address of ddr date from SPARECR3 */
62 src
= (u64
*)in_le32(&scfg
->sparecr
[2]);
63 dst
= (u64
*)CONFIG_SYS_SDRAM_BASE
;
65 for (i
= 0; i
< DDR_BUFF_LEN
/ 8; i
++)
69 #if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA)
70 void ls1_psci_resume_fixup(void)
73 struct ccsr_scfg __iomem
*scfg
= (void *)CONFIG_SYS_FSL_SCFG_ADDR
;
76 void *qixis_base
= (void *)QIXIS_BASE
;
78 /* Pull on PCIe RST# */
79 out_8(qixis_base
+ QIXIS_RST_FORCE_3
, 0);
81 /* disable deep sleep signals in FPGA */
82 tmp
= in_8(qixis_base
+ QIXIS_PWR_CTL2
);
83 tmp
&= ~QIXIS_PWR_CTL2_PCTL
;
84 out_8(qixis_base
+ QIXIS_PWR_CTL2
, tmp
);
87 /* Disable wakeup interrupt during deep sleep */
88 out_be32(&scfg
->pmcintecr
, 0);
89 /* Clear PMC interrupt status */
90 out_be32(&scfg
->pmcintsr
, 0xffffffff);
92 /* Disable Warm Device Reset */
93 tmp
= in_be32(&scfg
->dpslpcr
);
94 tmp
&= ~SCFG_DPSLPCR_WDRR_EN
;
95 out_be32(&scfg
->dpslpcr
, tmp
);
99 static void dp_resume_prepare(void)
102 board_sleep_prepare();
107 #if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA)
108 ls1_psci_resume_fixup();
112 int fsl_dp_resume(void)
115 void (*kernel_resume
)(void);
116 struct ccsr_scfg __iomem
*scfg
= (void *)CONFIG_SYS_FSL_SCFG_ADDR
;
123 /* Get the entry address and jump to kernel */
124 start_addr
= in_le32(&scfg
->sparecr
[3]);
125 debug("Entry address is 0x%08x\n", start_addr
);
126 kernel_resume
= (void (*)(void))start_addr
;
127 secure_ram_addr(_do_nonsec_entry
)(kernel_resume
, 0, 0, 0);