board/freescale/imx8mn_evk/spl.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright 2018-2019, 2021 NXP
   4  *
   5  */
   6
   7 #include <common.h>
   8 #include <command.h>
   9 #include <cpu_func.h>
  10 #include <hang.h>
  11 #include <image.h>
  12 #include <init.h>
  13 #include <log.h>
  14 #include <spl.h>
  15 #include <asm/global_data.h>
  16 #include <asm/io.h>
  17 #include <asm/mach-imx/iomux-v3.h>
  18 #include <asm/arch/clock.h>
  19 #include <asm/arch/imx8mn_pins.h>
  20 #include <asm/arch/sys_proto.h>
  21 #include <asm/mach-imx/boot_mode.h>
  22 #include <asm/arch/ddr.h>
  23
  24 #include <dm/uclass.h>
  25 #include <dm/device.h>
  26 #include <dm/uclass-internal.h>
  27 #include <dm/device-internal.h>
  28 #include <power/pmic.h>
  29 #include <power/pca9450.h>
  30 #include <asm/mach-imx/gpio.h>
  31 #include <asm/mach-imx/mxc_i2c.h>
  32 #include <fsl_esdhc_imx.h>
  33 #include <mmc.h>
  34
  35 DECLARE_GLOBAL_DATA_PTR;
  36
  37 int spl_board_boot_device(enum boot_device boot_dev_spl)
  38 {
  39         return BOOT_DEVICE_BOOTROM;
  40 }
  41
  42 void spl_dram_init(void)
  43 {
  44         ddr_init(&dram_timing);
  45 }
  46
  47 void spl_board_init(void)
  48 {
  49         struct udevice *dev;
  50         int ret;
  51
  52         if (IS_ENABLED(CONFIG_FSL_CAAM)) {
  53                 ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
  54                 if (ret)
  55                         printf("Failed to initialize caam_jr: %d\n", ret);
  56         }
  57         puts("Normal Boot\n");
  58
  59         ret = uclass_get_device_by_name(UCLASS_CLK,
  60                                         "clock-controller@30380000",
  61                                         &dev);
  62         if (ret < 0)
  63                 printf("Failed to find clock node. Check device tree\n");
  64 }
  65
  66 #if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
  67 int power_init_board(void)
  68 {
  69         struct udevice *dev;
  70         int ret;
  71
  72         ret = pmic_get("pca9450@25", &dev);
  73         if (ret == -ENODEV) {
  74                 puts("No pca9450@25\n");
  75                 return 0;
  76         }
  77         if (ret != 0)
  78                 return ret;
  79
  80         /* BUCKxOUT_DVS0/1 control BUCK123 output */
  81         pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
  82
  83 #ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
  84         /* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mode */
  85         pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10);
  86 #else
  87         /* increase VDD_SOC/VDD_DRAM to typical value 0.95V before first DRAM access */
  88         pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
  89 #endif
  90         /* Set DVS1 to 0.85v for suspend */
  91         /* Enable DVS control through PMIC_STBY_REQ and set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */
  92         pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
  93         pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
  94
  95         /* set VDD_SNVS_0V8 from default 0.85V */
  96         pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
  97
  98         /* enable LDO4 to 1.2v */
  99         pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x44);
 100
 101         /* set WDOG_B_CFG to cold reset */
 102         pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
 103
 104         return 0;
 105 }
 106 #endif
 107
 108 #ifdef CONFIG_SPL_LOAD_FIT
 109 int board_fit_config_name_match(const char *name)
 110 {
 111         /* Just empty function now - can't decide what to choose */
 112         debug("%s: %s\n", __func__, name);
 113
 114         return 0;
 115 }
 116 #endif
 117
 118 void board_init_f(ulong dummy)
 119 {
 120         int ret;
 121
 122         arch_cpu_init();
 123
 124         init_uart_clk(1);
 125
 126         timer_init();
 127
 128         /* Clear the BSS. */
 129         memset(__bss_start, 0, __bss_end - __bss_start);
 130
 131         ret = spl_init();
 132         if (ret) {
 133                 debug("spl_init() failed: %d\n", ret);
 134                 hang();
 135         }
 136
 137         preloader_console_init();
 138
 139         enable_tzc380();
 140
 141         /* DDR initialization */
 142         spl_dram_init();
 143
 144         board_init_r(NULL, 0);
 145 }