1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
12 #include <asm/fsl_i2c.h>
14 static struct pci_region pci1_regions
[] = {
16 bus_start
: CONFIG_SYS_PCI1_MEM_BASE
,
17 phys_start
: CONFIG_SYS_PCI1_MEM_PHYS
,
18 size
: CONFIG_SYS_PCI1_MEM_SIZE
,
19 flags
: PCI_REGION_MEM
| PCI_REGION_PREFETCH
22 bus_start
: CONFIG_SYS_PCI1_IO_BASE
,
23 phys_start
: CONFIG_SYS_PCI1_IO_PHYS
,
24 size
: CONFIG_SYS_PCI1_IO_SIZE
,
28 bus_start
: CONFIG_SYS_PCI1_MMIO_BASE
,
29 phys_start
: CONFIG_SYS_PCI1_MMIO_PHYS
,
30 size
: CONFIG_SYS_PCI1_MMIO_SIZE
,
35 #ifdef CONFIG_MPC83XX_PCI2
36 static struct pci_region pci2_regions
[] = {
38 bus_start
: CONFIG_SYS_PCI2_MEM_BASE
,
39 phys_start
: CONFIG_SYS_PCI2_MEM_PHYS
,
40 size
: CONFIG_SYS_PCI2_MEM_SIZE
,
41 flags
: PCI_REGION_MEM
| PCI_REGION_PREFETCH
44 bus_start
: CONFIG_SYS_PCI2_IO_BASE
,
45 phys_start
: CONFIG_SYS_PCI2_IO_PHYS
,
46 size
: CONFIG_SYS_PCI2_IO_SIZE
,
50 bus_start
: CONFIG_SYS_PCI2_MMIO_BASE
,
51 phys_start
: CONFIG_SYS_PCI2_MMIO_PHYS
,
52 size
: CONFIG_SYS_PCI2_MMIO_SIZE
,
58 #ifndef CONFIG_PCISLAVE
61 u8 val8
, orig_i2c_bus
;
63 * Assign PIB PMC slot to desired PCI bus
65 /* Switch temporarily to I2C bus #2 */
66 orig_i2c_bus
= i2c_get_bus_num();
70 i2c_write(0x23, 0x6, 1, &val8
, 1);
71 i2c_write(0x23, 0x7, 1, &val8
, 1);
73 i2c_write(0x23, 0x2, 1, &val8
, 1);
74 i2c_write(0x23, 0x3, 1, &val8
, 1);
77 i2c_write(0x26, 0x6, 1, &val8
, 1);
79 i2c_write(0x26, 0x7, 1, &val8
, 1);
80 #if defined(PCI_64BIT)
81 val8
= 0xf4; /* PMC2:PCI1/64-bit */
82 #elif defined(PCI_ALL_PCI1)
83 val8
= 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
84 #elif defined(PCI_ONE_PCI1)
85 val8
= 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
87 val8
= 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
89 i2c_write(0x26, 0x2, 1, &val8
, 1);
91 i2c_write(0x26, 0x3, 1, &val8
, 1);
93 i2c_write(0x27, 0x6, 1, &val8
, 1);
94 i2c_write(0x27, 0x7, 1, &val8
, 1);
96 i2c_write(0x27, 0x2, 1, &val8
, 1);
98 i2c_write(0x27, 0x3, 1, &val8
, 1);
101 #if defined(PCI_64BIT)
102 printf("PCI1: 64-bit on PMC2\n");
103 #elif defined(PCI_ALL_PCI1)
104 printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
105 #elif defined(PCI_ONE_PCI1)
106 printf("PCI1: 32-bit on PMC1\n");
107 printf("PCI2: 32-bit on PMC2, PMC3\n");
109 printf("PCI1: 32-bit on PMC1, PMC2\n");
110 printf("PCI2: 32-bit on PMC3\n");
112 /* Reset to original I2C bus */
113 i2c_set_bus_num(orig_i2c_bus
);
116 void pci_init_board(void)
118 volatile immap_t
*immr
= (volatile immap_t
*)CONFIG_SYS_IMMR
;
119 volatile clk83xx_t
*clk
= (volatile clk83xx_t
*)&immr
->clk
;
120 volatile law83xx_t
*pci_law
= immr
->sysconf
.pcilaw
;
121 #ifndef CONFIG_MPC83XX_PCI2
122 struct pci_region
*reg
[] = { pci1_regions
};
124 struct pci_region
*reg
[] = { pci1_regions
, pci2_regions
};
127 /* initialize the PCA9555PW IO expander on the PIB board */
130 /* Enable all 8 PCI_CLK_OUTPUTS */
131 clk
->occr
= 0xff000000;
134 /* Configure PCI Local Access Windows */
135 pci_law
[0].bar
= CONFIG_SYS_PCI1_MEM_PHYS
& LAWBAR_BAR
;
136 pci_law
[0].ar
= LAWAR_EN
| LAWAR_SIZE_1G
;
138 pci_law
[1].bar
= CONFIG_SYS_PCI1_IO_PHYS
& LAWBAR_BAR
;
139 pci_law
[1].ar
= LAWAR_EN
| LAWAR_SIZE_4M
;
143 #ifndef CONFIG_MPC83XX_PCI2
144 mpc83xx_pci_init(1, reg
);
146 mpc83xx_pci_init(2, reg
);
151 void pci_init_board(void)
153 volatile immap_t
*immr
= (volatile immap_t
*)CONFIG_SYS_IMMR
;
154 volatile law83xx_t
*pci_law
= immr
->sysconf
.pcilaw
;
155 volatile pcictrl83xx_t
*pci_ctrl
= &immr
->pci_ctrl
[0];
156 struct pci_region
*reg
[] = { pci1_regions
};
158 /* Configure PCI Local Access Windows */
159 pci_law
[0].bar
= CONFIG_SYS_PCI1_MEM_PHYS
& LAWBAR_BAR
;
160 pci_law
[0].ar
= LAWAR_EN
| LAWAR_SIZE_1G
;
162 pci_law
[1].bar
= CONFIG_SYS_PCI1_IO_PHYS
& LAWBAR_BAR
;
163 pci_law
[1].ar
= LAWAR_EN
| LAWAR_SIZE_4M
;
165 mpc83xx_pci_init(1, reg
);
167 /* Configure PCI Inbound Translation Windows (3 1MB windows) */
168 pci_ctrl
->pitar0
= 0x0;
169 pci_ctrl
->pibar0
= 0x0;
170 pci_ctrl
->piwar0
= PIWAR_EN
| PIWAR_PF
| PIWAR_RTT_SNOOP
|
171 PIWAR_WTT_SNOOP
| PIWAR_IWS_1M
;
173 pci_ctrl
->pitar1
= 0x0;
174 pci_ctrl
->pibar1
= 0x0;
175 pci_ctrl
->piebar1
= 0x0;
176 pci_ctrl
->piwar1
= PIWAR_EN
| PIWAR_PF
| PIWAR_RTT_SNOOP
|
177 PIWAR_WTT_SNOOP
| PIWAR_IWS_1M
;
179 pci_ctrl
->pitar2
= 0x0;
180 pci_ctrl
->pibar2
= 0x0;
181 pci_ctrl
->piebar2
= 0x0;
182 pci_ctrl
->piwar2
= PIWAR_EN
| PIWAR_PF
| PIWAR_RTT_SNOOP
|
183 PIWAR_WTT_SNOOP
| PIWAR_IWS_1M
;
185 /* Unlock the configuration bit */
186 mpc83xx_pcislave_unlock(0);
187 printf("PCI: Agent mode enabled\n");
189 #endif /* CONFIG_PCISLAVE */