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powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
[people/ms/u-boot.git] / board / freescale / mpc8560ads / ddr.c
1 /*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 */
8
9 #include <common.h>
10 #include <i2c.h>
11
12 #include <asm/fsl_ddr_sdram.h>
13 #include <asm/fsl_ddr_dimm_params.h>
14
15 static void
16 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
17 {
18 i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
19 }
20
21 void
22 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
23 unsigned int ctrl_num)
24 {
25 unsigned int i;
26 unsigned int i2c_address = 0;
27
28 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
29 if (ctrl_num == 0 && i == 0) {
30 i2c_address = SPD_EEPROM_ADDRESS;
31 }
32 get_spd(&(ctrl_dimms_spd[i]), i2c_address);
33 }
34 }
35
36 void fsl_ddr_board_options(memctl_options_t *popts,
37 dimm_params_t *pdimm,
38 unsigned int ctrl_num)
39 {
40 /*
41 * Factors to consider for CPO:
42 * - frequency
43 * - ddr1 vs. ddr2
44 */
45 popts->cpo_override = 0;
46
47 /*
48 * Factors to consider for write data delay:
49 * - number of DIMMs
50 *
51 * 1 = 1/4 clock delay
52 * 2 = 1/2 clock delay
53 * 3 = 3/4 clock delay
54 * 4 = 1 clock delay
55 * 5 = 5/4 clock delay
56 * 6 = 3/2 clock delay
57 */
58 popts->write_data_delay = 3;
59
60 /* 2T timing enable */
61 popts->twoT_en = 1;
62
63 /*
64 * Factors to consider for half-strength driver enable:
65 * - number of DIMMs installed
66 */
67 popts->half_strength_driver_enable = 0;
68 }