board/freescale/mpc8568mds/law.c

   1 /*
   2  * Copyright 2008 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <asm/fsl_law.h>
  28 #include <asm/mmu.h>
  29
  30 /*
  31  * LAW(Local Access Window) configuration:
  32  *
  33  *0)   0x0000_0000   0x7fff_ffff     DDR                     2G
  34  *1)   0x8000_0000   0x9fff_ffff     PCI1 MEM                512MB
  35  *2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
  36  *-)   0xe000_0000   0xe00f_ffff     CCSR                    1M
  37  *3)   0xe200_0000   0xe27f_ffff     PCI1 I/O                8M
  38  *4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M
  39  *5)   0xc000_0000   0xdfff_ffff     SRIO                    512MB
  40  *6.a) 0xf000_0000   0xf3ff_ffff     SDRAM                   64MB
  41  *6.b) 0xf800_0000   0xf800_7fff     BCSR                    32KB
  42  *6.c) 0xf800_8000   0xf800_ffff     PIB (CS4)               32KB
  43  *6.d) 0xf801_0000   0xf801_7fff     PIB (CS5)               32KB
  44  *6.e) 0xfe00_0000   0xffff_ffff     Flash                   32MB
  45  *
  46  *Notes:
  47  *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
  48  *    If flash is 8M at default position (last 8M), no LAW needed.
  49  *
  50  */
  51
  52 struct law_entry law_table[] = {
  53         SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
  54         SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
  55         SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI),
  56         SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1),
  57         SET_LAW(CONFIG_SYS_SRIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
  58         /* LBC window - maps 256M.  That's SDRAM, BCSR, PIBs, and Flash */
  59         SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
  60 };
  61
  62 int num_law_entries = ARRAY_SIZE(law_table);