board/freescale/mpc8641hpcn/ddr.c

   1 /*
   2  * Copyright 2008,2011 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * Version 2 as published by the Free Software Foundation.
   7  */
   8
   9 #include <common.h>
  10
  11 #include <asm/fsl_ddr_sdram.h>
  12 #include <asm/fsl_ddr_dimm_params.h>
  13
  14 struct board_specific_parameters {
  15         u32 n_ranks;
  16         u32 datarate_mhz_high;
  17         u32 clk_adjust;
  18         u32 cpo;
  19         u32 write_data_delay;
  20 };
  21
  22 /*
  23  * This table contains all valid speeds we want to override with board
  24  * specific parameters. datarate_mhz_high values need to be in ascending order
  25  * for each n_ranks group.
  26  */
  27 const struct board_specific_parameters dimm0[] = {
  28         /*
  29          * memory controller 0
  30          *   num|  hi|  clk| cpo|wrdata|2T
  31          * ranks| mhz|adjst|    | delay|
  32          */
  33         {4,  333,    7,   7,     3},
  34         {4,  549,    7,   9,     3},
  35         {4,  650,    7,  10,     4},
  36         {2,  333,    7,   7,     3},
  37         {2,  549,    7,   9,     3},
  38         {2,  650,    7,  10,     4},
  39         {1,  333,    7,   7,     3},
  40         {1,  549,    7,   9,     3},
  41         {1,  650,    7,  10,     4},
  42         {}
  43 };
  44
  45 /*
  46  * The two slots have slightly different timing. The center values are good
  47  * for both slots. We use identical speed tables for them. In future use, if
  48  * DIMMs have fewer center values that require two separated tables, copy the
  49  * udimm0 table to udimm1 and make changes to clk_adjust and wrlvl_start.
  50  */
  51 const struct board_specific_parameters *dimms[] = {
  52         dimm0,
  53         dimm0,
  54 };
  55
  56 void fsl_ddr_board_options(memctl_options_t *popts,
  57                         dimm_params_t *pdimm,
  58                         unsigned int ctrl_num)
  59 {
  60         const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
  61         unsigned int i;
  62         ulong ddr_freq;
  63
  64         if (ctrl_num > 1) {
  65                 printf("Wrong parameter for controller number %d", ctrl_num);
  66                 return;
  67         }
  68         for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
  69                 if (pdimm[i].n_ranks)
  70                         break;
  71         }
  72         if (i >= CONFIG_DIMM_SLOTS_PER_CTLR)    /* no DIMM */
  73                 return;
  74
  75         pbsp = dimms[ctrl_num];
  76
  77         /* Get clk_adjust, cpo, write_data_delay, according to the board ddr
  78          * freqency and n_banks specified in board_specific_parameters table.
  79          */
  80         ddr_freq = get_ddr_freq(0) / 1000000;
  81         while (pbsp->datarate_mhz_high) {
  82                 if (pbsp->n_ranks == pdimm[i].n_ranks) {
  83                         if (ddr_freq <= pbsp->datarate_mhz_high) {
  84                                 popts->clk_adjust = pbsp->clk_adjust;
  85                                 popts->cpo_override = pbsp->cpo;
  86                                 popts->write_data_delay =
  87                                         pbsp->write_data_delay;
  88                                 goto found;
  89                         }
  90                         pbsp_highest = pbsp;
  91                 }
  92                 pbsp++;
  93         }
  94
  95         if (pbsp_highest) {
  96                 printf("Error: board specific timing not found "
  97                         "for data rate %lu MT/s!\n"
  98                         "Trying to use the highest speed (%u) parameters\n",
  99                         ddr_freq, pbsp_highest->datarate_mhz_high);
 100                 popts->clk_adjust = pbsp_highest->clk_adjust;
 101                 popts->cpo_override = pbsp_highest->cpo;
 102                 popts->write_data_delay = pbsp_highest->write_data_delay;
 103         } else {
 104                 panic("DIMM is not supported by this board");
 105         }
 106
 107 found:
 108         /* 2T timing enable */
 109         popts->twoT_en = 1;
 110 }