board/freescale/t104xrdb/ddr.h

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __DDR_H__
   8 #define __DDR_H__
   9 dimm_params_t ddr_raw_timing = {
  10         .n_ranks = 2,
  11         .rank_density = 2147483648u,
  12         .capacity = 4294967296u,
  13         .primary_sdram_width = 64,
  14         .ec_sdram_width = 8,
  15         .registered_dimm = 0,
  16         .mirrored_dimm = 0,
  17         .n_row_addr = 15,
  18         .n_col_addr = 10,
  19         .n_banks_per_sdram_device = 8,
  20         .edc_config = 2,        /* ECC */
  21         .burst_lengths_bitmask = 0x0c,
  22         .tckmin_x_ps = 1071,
  23         .caslat_x = 0xfe << 4,  /* 5,6,7,8,9,10,11 */
  24         .taa_ps = 13125,
  25         .twr_ps = 15000,
  26         .trcd_ps = 13125,
  27         .trrd_ps = 6000,
  28         .trp_ps = 13125,
  29         .tras_ps = 34000,
  30         .trc_ps = 48125,
  31         .trfc_ps = 260000,
  32         .twtr_ps = 7500,
  33         .trtp_ps = 7500,
  34         .refresh_rate_ps = 7800000,
  35         .tfaw_ps = 35000,
  36 };
  37
  38 struct board_specific_parameters {
  39         u32 n_ranks;
  40         u32 datarate_mhz_high;
  41         u32 rank_gb;
  42         u32 clk_adjust;
  43         u32 wrlvl_start;
  44         u32 wrlvl_ctl_2;
  45         u32 wrlvl_ctl_3;
  46 };
  47
  48 /*
  49  * These tables contain all valid speeds we want to override with board
  50  * specific parameters. datarate_mhz_high values need to be in ascending order
  51  * for each n_ranks group.
  52  */
  53
  54 static const struct board_specific_parameters udimm0[] = {
  55         /*
  56          * memory controller 0
  57          *   num|  hi| rank|  clk| wrlvl |   wrlvl
  58          * ranks| mhz| GB  |adjst| start |   ctl2
  59          */
  60         {2,  833,  4, 4,     6, 0x06060607, 0x08080807},
  61         {2,  833,  0, 4,     6, 0x06060607, 0x08080807},
  62         {2,  1350, 4, 4,     7, 0x0708080A, 0x0A0B0C09},
  63         {2,  1350, 0, 4,     7, 0x0708080A, 0x0A0B0C09},
  64         {2,  1666, 4, 4,     7, 0x0808090B, 0x0C0D0E0A},
  65         {2,  1666, 0, 4,     7, 0x0808090B, 0x0C0D0E0A},
  66         {1,  833,  4, 4,     6, 0x06060607, 0x08080807},
  67         {1,  833,  0, 4,     6, 0x06060607, 0x08080807},
  68         {1,  1350, 4, 4,     7, 0x0708080A, 0x0A0B0C09},
  69         {1,  1350, 0, 4,     7, 0x0708080A, 0x0A0B0C09},
  70         {1,  1666, 4, 4,     7, 0x0808090B, 0x0C0D0E0A},
  71         {1,  1666, 0, 4,     7, 0x0808090B, 0x0C0D0E0A},
  72         {}
  73 };
  74
  75 static const struct board_specific_parameters *udimms[] = {
  76         udimm0,
  77 };
  78 #endif