1 /* Copyright 2013 Freescale Semiconductor, Inc.
3 * SPDX-License-Identifier: GPL-2.0+
12 #include <fsl_esdhc.h>
13 #include <spi_flash.h>
14 #include "../common/sleep.h"
16 DECLARE_GLOBAL_DATA_PTR
;
18 phys_size_t
get_effective_memsize(void)
20 return CONFIG_SYS_L3_SIZE
;
23 unsigned long get_board_sys_clk(void)
25 return CONFIG_SYS_CLK_FREQ
;
28 unsigned long get_board_ddr_clk(void)
30 return CONFIG_DDR_CLK_FREQ
;
33 #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
34 void board_init_f(ulong bootflag
)
36 u32 plat_ratio
, sys_clk
, uart_clk
;
37 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
41 ccsr_gur_t
*gur
= (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR
;
43 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
44 if (IS_SVR_REV(svr
, 1, 0)) {
46 * There is T1040 SoC issue where NOR, FPGA are inaccessible
47 * during NAND boot because IFC signals > IFC_AD7 are not
48 * enabled. This workaround changes RCW source to make all
51 porsr1
= in_be32(&gur
->porsr1
);
52 pinctl
= ((porsr1
& ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK
))
54 out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR
+ 0x20000),
59 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
60 memcpy((void *)CONFIG_SPL_GD_ADDR
, (void *)gd
, sizeof(gd_t
));
62 /* Update GD pointer */
63 gd
= (gd_t
*)(CONFIG_SPL_GD_ADDR
);
65 #ifdef CONFIG_DEEP_SLEEP
66 /* disable the console if boot from deep sleep */
68 fsl_dp_disable_console();
70 /* compiler optimization barrier needed for GCC >= 3.4 */
71 __asm__
__volatile__("" : : : "memory");
75 /* initialize selected port with appropriate baud rate */
76 sys_clk
= get_board_sys_clk();
77 plat_ratio
= (in_be32(&gur
->rcwsr
[0]) >> 25) & 0x1f;
78 uart_clk
= sys_clk
* plat_ratio
/ 2;
80 NS16550_init((NS16550_t
)CONFIG_SYS_NS16550_COM1
,
81 uart_clk
/ 16 / CONFIG_BAUDRATE
);
83 relocate_code(CONFIG_SPL_RELOC_STACK
, (gd_t
*)CONFIG_SPL_GD_ADDR
, 0x0);
86 void board_init_r(gd_t
*gd
, ulong dest_addr
)
90 bd
= (bd_t
*)(gd
+ sizeof(gd_t
));
91 memset(bd
, 0, sizeof(bd_t
));
93 bd
->bi_memstart
= CONFIG_SYS_INIT_L3_ADDR
;
94 bd
->bi_memsize
= CONFIG_SYS_L3_SIZE
;
98 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR
,
99 CONFIG_SPL_RELOC_MALLOC_SIZE
);
101 #ifdef CONFIG_SPL_MMC_BOOT
105 /* relocate environment function pointers etc. */
106 #ifdef CONFIG_SPL_NAND_BOOT
107 nand_spl_load_image(CONFIG_ENV_OFFSET
, CONFIG_ENV_SIZE
,
108 (uchar
*)CONFIG_ENV_ADDR
);
110 #ifdef CONFIG_SPL_MMC_BOOT
111 mmc_spl_load_image(CONFIG_ENV_OFFSET
, CONFIG_ENV_SIZE
,
112 (uchar
*)CONFIG_ENV_ADDR
);
114 #ifdef CONFIG_SPL_SPI_BOOT
115 spi_spl_load_image(CONFIG_ENV_OFFSET
, CONFIG_ENV_SIZE
,
116 (uchar
*)CONFIG_ENV_ADDR
);
118 gd
->env_addr
= (ulong
)(CONFIG_ENV_ADDR
);
125 gd
->ram_size
= initdram(0);
127 #ifdef CONFIG_SPL_MMC_BOOT
129 #elif defined(CONFIG_SPL_SPI_BOOT)
131 #elif defined(CONFIG_SPL_NAND_BOOT)