1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
4 * Copyright (C) 2017, Grinn - http://grinn-global.com/
10 #include <asm/arch/chilisom.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/hardware.h>
13 #include <asm/arch/omap.h>
14 #include <asm/arch/mem.h>
15 #include <asm/arch/mmc_host_def.h>
16 #include <asm/arch/mux.h>
17 #include <asm/arch/sys_proto.h>
19 #include <asm/global_data.h>
28 DECLARE_GLOBAL_DATA_PTR
;
30 static __maybe_unused
struct ctrl_dev
*cdev
=
31 (struct ctrl_dev
*)CTRL_DEVICE_BASE
;
33 #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
34 static struct module_pin_mux uart0_pin_mux
[] = {
35 {OFFSET(uart0_rxd
), (MODE(0) | PULLUP_EN
| RXACTIVE
)}, /* UART0_RXD */
36 {OFFSET(uart0_txd
), (MODE(0) | PULLUDEN
)}, /* UART0_TXD */
40 static struct module_pin_mux mmc0_pin_mux
[] = {
41 {OFFSET(mmc0_dat3
), (MODE(0) | RXACTIVE
| PULLUP_EN
)}, /* MMC0_DAT3 */
42 {OFFSET(mmc0_dat2
), (MODE(0) | RXACTIVE
| PULLUP_EN
)}, /* MMC0_DAT2 */
43 {OFFSET(mmc0_dat1
), (MODE(0) | RXACTIVE
| PULLUP_EN
)}, /* MMC0_DAT1 */
44 {OFFSET(mmc0_dat0
), (MODE(0) | RXACTIVE
| PULLUP_EN
)}, /* MMC0_DAT0 */
45 {OFFSET(mmc0_clk
), (MODE(0) | RXACTIVE
| PULLUP_EN
)}, /* MMC0_CLK */
46 {OFFSET(mmc0_cmd
), (MODE(0) | RXACTIVE
| PULLUP_EN
)}, /* MMC0_CMD */
50 static struct module_pin_mux rmii1_pin_mux
[] = {
51 {OFFSET(mii1_crs
), MODE(1) | RXACTIVE
}, /* RMII1_CRS */
52 {OFFSET(mii1_rxerr
), MODE(1) | RXACTIVE
}, /* RMII1_RXERR */
53 {OFFSET(mii1_txen
), MODE(1)}, /* RMII1_TXEN */
54 {OFFSET(mii1_txd1
), MODE(1)}, /* RMII1_TXD1 */
55 {OFFSET(mii1_txd0
), MODE(1)}, /* RMII1_TXD0 */
56 {OFFSET(mii1_rxd1
), MODE(1) | RXACTIVE
}, /* RMII1_RXD1 */
57 {OFFSET(mii1_rxd0
), MODE(1) | RXACTIVE
}, /* RMII1_RXD0 */
58 {OFFSET(mdio_data
), MODE(0) | RXACTIVE
| PULLUP_EN
}, /* MDIO_DATA */
59 {OFFSET(mdio_clk
), MODE(0) | PULLUP_EN
}, /* MDIO_CLK */
60 {OFFSET(rmii1_refclk
), MODE(0) | RXACTIVE
}, /* RMII1_REFCLK */
64 static void enable_board_pin_mux(void)
66 chilisom_enable_pin_mux();
68 /* chiliboard pinmux */
69 configure_module_pin_mux(rmii1_pin_mux
);
70 configure_module_pin_mux(mmc0_pin_mux
);
73 void set_uart_mux_conf(void)
75 configure_module_pin_mux(uart0_pin_mux
);
78 void set_mux_conf_regs(void)
80 enable_board_pin_mux();
83 void am33xx_spl_board_init(void)
85 chilisom_spl_board_init();
87 #endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
90 * Basic board specific setup. Pinmux has been handled already.
94 #if defined(CONFIG_HW_WATCHDOG)
98 gd
->bd
->bi_boot_params
= CONFIG_SYS_SDRAM_BASE
+ 0x100;
104 #ifdef CONFIG_BOARD_LATE_INIT
105 int board_late_init(void)
107 #if !defined(CONFIG_SPL_BUILD)
109 uint32_t mac_hi
, mac_lo
;
111 /* try reading mac address from efuse */
112 mac_lo
= readl(&cdev
->macid0l
);
113 mac_hi
= readl(&cdev
->macid0h
);
114 mac_addr
[0] = mac_hi
& 0xFF;
115 mac_addr
[1] = (mac_hi
& 0xFF00) >> 8;
116 mac_addr
[2] = (mac_hi
& 0xFF0000) >> 16;
117 mac_addr
[3] = (mac_hi
& 0xFF000000) >> 24;
118 mac_addr
[4] = mac_lo
& 0xFF;
119 mac_addr
[5] = (mac_lo
& 0xFF00) >> 8;
121 if (!env_get("ethaddr")) {
122 printf("<ethaddr> not set. Validating first E-fuse MAC\n");
124 if (is_valid_ethaddr(mac_addr
))
125 eth_env_set_enetaddr("ethaddr", mac_addr
);
128 mac_lo
= readl(&cdev
->macid1l
);
129 mac_hi
= readl(&cdev
->macid1h
);
130 mac_addr
[0] = mac_hi
& 0xFF;
131 mac_addr
[1] = (mac_hi
& 0xFF00) >> 8;
132 mac_addr
[2] = (mac_hi
& 0xFF0000) >> 16;
133 mac_addr
[3] = (mac_hi
& 0xFF000000) >> 24;
134 mac_addr
[4] = mac_lo
& 0xFF;
135 mac_addr
[5] = (mac_lo
& 0xFF00) >> 8;
137 if (!env_get("eth1addr")) {
138 if (is_valid_ethaddr(mac_addr
))
139 eth_env_set_enetaddr("eth1addr", mac_addr
);