board/icecube/icecube.c

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <mpc5xxx.h>
  26 #include <pci.h>
  27
  28 #ifndef CFG_RAMBOOT
  29 static long int dram_size(long int *base, long int maxsize)
  30 {
  31         volatile long int *addr;
  32         ulong cnt, val;
  33         ulong save[32];                 /* to make test non-destructive */
  34         unsigned char i = 0;
  35
  36         for (cnt = (maxsize / sizeof (long)) >> 1; cnt > 0; cnt >>= 1) {
  37                 addr = base + cnt;              /* pointer arith! */
  38
  39                 save[i++] = *addr;
  40                 *addr = ~cnt;
  41         }
  42
  43         /* write 0 to base address */
  44         addr = base;
  45         save[i] = *addr;
  46         *addr = 0;
  47
  48         /* check at base address */
  49         if ((val = *addr) != 0) {
  50                 *addr = save[i];
  51                 return (0);
  52         }
  53
  54         for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) {
  55                 addr = base + cnt;              /* pointer arith! */
  56
  57                 val = *addr;
  58                 *addr = save[--i];
  59
  60                 if (val != (~cnt)) {
  61                         return (cnt * sizeof (long));
  62                 }
  63         }
  64         return (maxsize);
  65 }
  66
  67 static void sdram_start (int hi_addr)
  68 {
  69         long hi_addr_bit = hi_addr ? 0x01000000 : 0;
  70
  71         /* unlock mode register */
  72         *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000 | hi_addr_bit;
  73         /* precharge all banks */
  74         *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
  75         /* set mode register */
  76 #if defined(CONFIG_MPC5200)
  77         *(vu_long *)MPC5XXX_SDRAM_MODE = 0x408d0000;
  78 #elif defined(CONFIG_MGT5100)
  79         *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
  80 #endif
  81         /* precharge all banks */
  82         *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
  83         /* auto refresh */
  84         *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004 | hi_addr_bit;
  85         /* set mode register */
  86         *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
  87         /* normal operation */
  88         *(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit;
  89 }
  90 #endif
  91
  92 long int initdram (int board_type)
  93 {
  94         ulong dramsize = 0;
  95 #ifndef CFG_RAMBOOT
  96         ulong test1, test2;
  97
  98         /* configure SDRAM start/end */
  99 #if defined(CONFIG_MPC5200)
 100         *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
 101         *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
 102
 103         /* setup config registers */
 104         *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00;
 105         *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;
 106
 107 #elif defined(CONFIG_MGT5100)
 108         *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
 109         *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
 110         *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
 111
 112         /* setup config registers */
 113         *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2222600;
 114         *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;
 115
 116         /* address select register */
 117         *(vu_long *)MPC5XXX_SDRAM_XLBSEL = 0x03000000;
 118 #endif
 119         sdram_start(0);
 120         test1 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
 121         sdram_start(1);
 122         test2 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
 123         if (test1 > test2) {
 124                 sdram_start(0);
 125                 dramsize = test1;
 126         } else {
 127                 dramsize = test2;
 128         }
 129 #if defined(CONFIG_MPC5200)
 130         *(vu_long *)MPC5XXX_SDRAM_CS0CFG =
 131                 (0x13 + __builtin_ffs(dramsize >> 20) - 1);
 132         *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
 133 #elif defined(CONFIG_MGT5100)
 134         *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
 135 #endif
 136
 137 #else
 138 #ifdef CONFIG_MGT5100
 139         *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
 140         dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
 141 #else
 142         dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
 143 #endif
 144 #endif /* CFG_RAMBOOT */
 145         /* return total ram size */
 146         return dramsize;
 147 }
 148
 149 int checkboard (void)
 150 {
 151 #if defined(CONFIG_MPC5200)
 152         puts ("Board: Motorola MPC5200 (IceCube)\n");
 153 #elif defined(CONFIG_MGT5100)
 154         puts ("Board: Motorola MGT5100 (IceCube)\n");
 155 #endif
 156         return 0;
 157 }
 158
 159 void flash_preinit(void)
 160 {
 161         /*
 162          * Now, when we are in RAM, enable flash write
 163          * access for detection process.
 164          * Note that CS_BOOT cannot be cleared when
 165          * executing in flash.
 166          */
 167 #if defined(CONFIG_MGT5100)
 168         *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
 169         *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
 170 #endif
 171         *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 172 }
 173
 174 #ifdef  CONFIG_PCI
 175 static struct pci_controller hose;
 176
 177 extern void pci_mpc5xxx_init(struct pci_controller *);
 178
 179 void pci_init_board(void)
 180 {
 181         pci_mpc5xxx_init(&hose);
 182 }
 183 #endif