board/isee/igep00x0/common.c

   1 /*
   2  * SPDX-License-Identifier:     GPL-2.0+
   3  */
   4 #include <common.h>
   5 #include <twl4030.h>
   6 #include <asm/io.h>
   7 #include <asm/omap_mmc.h>
   8 #include <asm/arch/mux.h>
   9 #include <asm/arch/sys_proto.h>
  10 #include <jffs2/load_kernel.h>
  11 #include <linux/mtd/rawnand.h>
  12 #include "igep00x0.h"
  13
  14 DECLARE_GLOBAL_DATA_PTR;
  15
  16 /*
  17  * Routine: set_muxconf_regs
  18  * Description: Setting up the configuration Mux registers specific to the
  19  *              hardware. Many pins need to be moved from protect to primary
  20  *              mode.
  21  */
  22 void set_muxconf_regs(void)
  23 {
  24         MUX_DEFAULT();
  25 }
  26
  27 /*
  28  * Routine: board_init
  29  * Description: Early hardware init.
  30  */
  31 int board_init(void)
  32 {
  33         int loops = 100;
  34
  35         /* find out flash memory type, assume NAND first */
  36         gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
  37         gpmc_init();
  38
  39         /* Issue a RESET and then READID */
  40         writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd);
  41         writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd);
  42         while ((readl(&gpmc_cfg->cs[0].nand_dat) & NAND_STATUS_READY)
  43                                                 != NAND_STATUS_READY) {
  44                 udelay(1);
  45                 if (--loops == 0) {
  46                         gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;
  47                         gpmc_init();    /* reinitialize for OneNAND */
  48                         break;
  49                 }
  50         }
  51
  52         /* boot param addr */
  53         gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  54
  55         return 0;
  56 }
  57
  58 #if defined(CONFIG_MMC)
  59 int board_mmc_init(bd_t *bis)
  60 {
  61         return omap_mmc_init(0, 0, 0, -1, -1);
  62 }
  63
  64 void board_mmc_power_init(void)
  65 {
  66         twl4030_power_mmc_init(0);
  67 }
  68 #endif