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* Patches by David Müller, 14 Nov 2003:
[people/ms/u-boot.git] / board / mpl / common / flash.c
1 /*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 /*
25 * Modified 4/5/2001
26 * Wait for completion of each sector erase command issued
27 * 4/5/2001
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
29 */
30
31 /*
32 * Modified 3/7/2001
33 * - adapted for pip405, Denis Peter, MPL AG Switzerland
34 * TODO:
35 * clean-up
36 */
37
38 #include <common.h>
39 #include <ppc4xx.h>
40 #include <asm/processor.h>
41 #include "common_util.h"
42 #if defined(CONFIG_MIP405)
43 #include "../mip405/mip405.h"
44 #endif
45 #if defined(CONFIG_PIP405)
46 #include "../pip405/pip405.h"
47 #endif
48 #include <405gp_pci.h>
49
50 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
51 /*-----------------------------------------------------------------------
52 * Functions
53 */
54 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
55 static int write_word (flash_info_t *info, ulong dest, ulong data);
56
57 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
58
59
60 #ifdef CONFIG_PIP405
61 #define ADDR0 0x5555
62 #define ADDR1 0x2aaa
63 #define FLASH_WORD_SIZE unsigned short
64 #endif
65
66 #ifdef CONFIG_MIP405
67 #define ADDR0 0x5555
68 #define ADDR1 0x2aaa
69 #define FLASH_WORD_SIZE unsigned short
70 #endif
71
72 #define FALSE 0
73 #define TRUE 1
74
75 /*-----------------------------------------------------------------------
76 * Some CS switching routines:
77 *
78 * On PIP/MIP405 we have 3 (4) possible boot mode
79 *
80 * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
81 * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
82 * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
83 * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
84 * The flash init is the first board specific routine which is called
85 * after code relocation (running from SDRAM)
86 * The first thing we do is to map the Flash CS to the Flash area and
87 * the MPS CS to the MPS area. Since the flash size is unknown at this
88 * point, we use the max flash size and the lowest flash address as base.
89 *
90 * After flash detection we adjust the size of the CS area accordingly.
91 * The board_init_r will fill in wrong values in the board init structure,
92 * but this will be fixed in the misc_init_r routine:
93 * bd->bi_flashstart=0-flash_info[0].size
94 * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
95 * bd->bi_flashoffset=0
96 *
97 */
98 int get_boot_mode(void)
99 {
100 unsigned long pbcr;
101 int res = 0;
102 pbcr = mfdcr (strap);
103 if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
104 /* boot via MPS or MPS mapping */
105 res = BOOT_MPS;
106 if(pbcr & PSR_ROM_LOC)
107 /* boot via PCI.. */
108 res |= BOOT_PCI;
109 return res;
110 }
111
112 /* Map the flash high (in boot area)
113 This code can only be executed from SDRAM (after relocation).
114 */
115 void setup_cs_reloc(void)
116 {
117 int mode;
118 /* Since we are relocated, we can set-up the CS finaly
119 * but first of all, switch off PCI mapping (in case it was a PCI boot) */
120 out32r(PMM0MA,0L);
121 icache_enable (); /* we are relocated */
122 /* get boot mode */
123 mode=get_boot_mode();
124 /* we map the flash high in every case */
125 /* first findout on which cs the flash is */
126 if(mode & BOOT_MPS) {
127 /* map flash high on CS1 and MPS on CS0 */
128 mtdcr (ebccfga, pb0ap);
129 mtdcr (ebccfgd, MPS_AP);
130 mtdcr (ebccfga, pb0cr);
131 mtdcr (ebccfgd, MPS_CR);
132 /* we use the default values (max values) for the flash
133 * because its real size is not yet known */
134 mtdcr (ebccfga, pb1ap);
135 mtdcr (ebccfgd, FLASH_AP);
136 mtdcr (ebccfga, pb1cr);
137 mtdcr (ebccfgd, FLASH_CR_B);
138 }
139 else {
140 /* map flash high on CS0 and MPS on CS1 */
141 mtdcr (ebccfga, pb1ap);
142 mtdcr (ebccfgd, MPS_AP);
143 mtdcr (ebccfga, pb1cr);
144 mtdcr (ebccfgd, MPS_CR);
145 /* we use the default values (max values) for the flash
146 * because its real size is not yet known */
147 mtdcr (ebccfga, pb0ap);
148 mtdcr (ebccfgd, FLASH_AP);
149 mtdcr (ebccfga, pb0cr);
150 mtdcr (ebccfgd, FLASH_CR_B);
151 }
152 }
153
154
155 unsigned long flash_init (void)
156 {
157 unsigned long size_b0, size_b1,flashcr, size_reg;
158 int mode, i;
159 extern char version_string;
160 char *p=&version_string;
161
162 /* Since we are relocated, we can set-up the CS finally */
163 setup_cs_reloc();
164 /* get and display boot mode */
165 mode=get_boot_mode();
166 if(mode & BOOT_PCI)
167 printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
168 "MPS" : "Flash");
169 else
170 printf("(%s Boot) ",(mode & BOOT_MPS) ?
171 "MPS" : "Flash");
172 /* Init: no FLASHes known */
173 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
174 flash_info[i].flash_id = FLASH_UNKNOWN;
175 }
176
177 /* Static FLASH Bank configuration here - FIXME XXX */
178
179 size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
180
181 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
182 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
183 size_b0, size_b0<<20);
184 }
185 /* protect the bootloader */
186 /* Monitor protection ON by default */
187 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
188 flash_protect(FLAG_PROTECT_SET,
189 CFG_MONITOR_BASE,
190 CFG_MONITOR_BASE+monitor_flash_len-1,
191 &flash_info[0]);
192 #endif
193 /* protect reset vector */
194 flash_info[0].protect[flash_info[0].sector_count-1] = 1;
195 size_b1 = 0 ;
196 flash_info[0].size = size_b0;
197 /* set up flash cs according to the size */
198 size_reg=(flash_info[0].size >>20);
199 switch (size_reg) {
200 case 0:
201 case 1: i=0; break; /* <= 1MB */
202 case 2: i=1; break; /* = 2MB */
203 case 4: i=2; break; /* = 4MB */
204 case 8: i=3; break; /* = 8MB */
205 case 16: i=4; break; /* = 16MB */
206 case 32: i=5; break; /* = 32MB */
207 case 64: i=6; break; /* = 64MB */
208 case 128: i=7; break; /*= 128MB */
209 default:
210 printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
211 while(1);
212 }
213 if(mode & BOOT_MPS) {
214 /* flash is on CS1 */
215 mtdcr(ebccfga, pb1cr);
216 flashcr = mfdcr (ebccfgd);
217 /* we map the flash high in every case */
218 flashcr&=0x0001FFFF; /* mask out address bits */
219 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
220 flashcr|= (i << 17); /* size addr */
221 mtdcr(ebccfga, pb1cr);
222 mtdcr(ebccfgd, flashcr);
223 }
224 else {
225 /* flash is on CS0 */
226 mtdcr(ebccfga, pb0cr);
227 flashcr = mfdcr (ebccfgd);
228 /* we map the flash high in every case */
229 flashcr&=0x0001FFFF; /* mask out address bits */
230 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
231 flashcr|= (i << 17); /* size addr */
232 mtdcr(ebccfga, pb0cr);
233 mtdcr(ebccfgd, flashcr);
234 }
235 #if 0
236 /* enable this if you want to test if
237 the relocation has be done ok.
238 This will disable both Chipselects */
239 mtdcr (ebccfga, pb0cr);
240 mtdcr (ebccfgd, 0L);
241 mtdcr (ebccfga, pb1cr);
242 mtdcr (ebccfgd, 0L);
243 printf("CS0 & CS1 switched off for test\n");
244 #endif
245 /* patch version_string */
246 for(i=0;i<0x100;i++) {
247 if(*p=='\n') {
248 *p=0;
249 break;
250 }
251 p++;
252 }
253 return (size_b0);
254 }
255
256
257 /*-----------------------------------------------------------------------
258 */
259 void flash_print_info (flash_info_t *info)
260 {
261 int i;
262 int k;
263 int size;
264 int erased;
265 volatile unsigned long *flash;
266
267 if (info->flash_id == FLASH_UNKNOWN) {
268 printf ("missing or unknown FLASH type\n");
269 return;
270 }
271
272 switch (info->flash_id & FLASH_VENDMASK) {
273 case FLASH_MAN_AMD: printf ("AMD "); break;
274 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
275 case FLASH_MAN_SST: printf ("SST "); break;
276 case FLASH_MAN_INTEL: printf ("Intel "); break;
277 default: printf ("Unknown Vendor "); break;
278 }
279
280 switch (info->flash_id & FLASH_TYPEMASK) {
281 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
282 break;
283 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
284 break;
285 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
286 break;
287 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
288 break;
289 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
290 break;
291 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
292 break;
293 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
294 break;
295 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
296 break;
297 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
298 break;
299 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
300 break;
301 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
302 break;
303 case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
304 break;
305 case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
306 break;
307 default: printf ("Unknown Chip Type\n");
308 break;
309 }
310
311 printf (" Size: %ld KB in %d Sectors\n",
312 info->size >> 10, info->sector_count);
313
314 printf (" Sector Start Addresses:");
315 for (i=0; i<info->sector_count; ++i) {
316 /*
317 * Check if whole sector is erased
318 */
319 if (i != (info->sector_count-1))
320 size = info->start[i+1] - info->start[i];
321 else
322 size = info->start[0] + info->size - info->start[i];
323 erased = 1;
324 flash = (volatile unsigned long *)info->start[i];
325 size = size >> 2; /* divide by 4 for longword access */
326 for (k=0; k<size; k++) {
327 if (*flash++ != 0xffffffff) {
328 erased = 0;
329 break;
330 }
331 }
332 if ((i % 5) == 0)
333 printf ("\n ");
334 printf (" %08lX%s%s",
335 info->start[i],
336 erased ? " E" : " ",
337 info->protect[i] ? "RO " : " ");
338 }
339 printf ("\n");
340 }
341
342 /*-----------------------------------------------------------------------
343 */
344
345
346 /*-----------------------------------------------------------------------
347
348 */
349
350 /*
351 * The following code cannot be run from FLASH!
352 */
353 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
354 {
355 short i;
356 FLASH_WORD_SIZE value;
357 ulong base;
358 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
359
360 /* Write auto select command: read Manufacturer ID */
361 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
362 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
363 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
364
365 value = addr2[0];
366 /* printf("flash_get_size value: %x\n",value); */
367 switch (value) {
368 case (FLASH_WORD_SIZE)AMD_MANUFACT:
369 info->flash_id = FLASH_MAN_AMD;
370 break;
371 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
372 info->flash_id = FLASH_MAN_FUJ;
373 break;
374 case (FLASH_WORD_SIZE)INTEL_MANUFACT:
375 info->flash_id = FLASH_MAN_INTEL;
376 break;
377 case (FLASH_WORD_SIZE)SST_MANUFACT:
378 info->flash_id = FLASH_MAN_SST;
379 break;
380 default:
381 info->flash_id = FLASH_UNKNOWN;
382 info->sector_count = 0;
383 info->size = 0;
384 return (0); /* no or unknown flash */
385 }
386 value = addr2[1]; /* device ID */
387 /* printf("Device value %x\n",value); */
388 switch (value) {
389 case (FLASH_WORD_SIZE)AMD_ID_F040B:
390 info->flash_id += FLASH_AM040;
391 info->sector_count = 8;
392 info->size = 0x0080000; /* => 512 ko */
393 break;
394 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
395 info->flash_id += FLASH_AM400T;
396 info->sector_count = 11;
397 info->size = 0x00080000;
398 break; /* => 0.5 MB */
399
400 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
401 info->flash_id += FLASH_AM400B;
402 info->sector_count = 11;
403 info->size = 0x00080000;
404 break; /* => 0.5 MB */
405
406 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
407 info->flash_id += FLASH_AM800T;
408 info->sector_count = 19;
409 info->size = 0x00100000;
410 break; /* => 1 MB */
411
412 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
413 info->flash_id += FLASH_AM800B;
414 info->sector_count = 19;
415 info->size = 0x00100000;
416 break; /* => 1 MB */
417
418 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
419 info->flash_id += FLASH_AM160T;
420 info->sector_count = 35;
421 info->size = 0x00200000;
422 break; /* => 2 MB */
423
424 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
425 info->flash_id += FLASH_AM160B;
426 info->sector_count = 35;
427 info->size = 0x00200000;
428 break; /* => 2 MB */
429 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
430 info->flash_id += FLASH_AM320T;
431 info->sector_count = 67;
432 info->size = 0x00400000;
433 break; /* => 4 MB */
434 case (FLASH_WORD_SIZE)AMD_ID_LV640U:
435 info->flash_id += FLASH_AM640U;
436 info->sector_count = 128;
437 info->size = 0x00800000;
438 break; /* => 8 MB */
439 #if 0 /* enable when device IDs are available */
440
441 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
442 info->flash_id += FLASH_AM320B;
443 info->sector_count = 67;
444 info->size = 0x00400000;
445 break; /* => 4 MB */
446 #endif
447 case (FLASH_WORD_SIZE)SST_ID_xF800A:
448 info->flash_id += FLASH_SST800A;
449 info->sector_count = 16;
450 info->size = 0x00100000;
451 break; /* => 1 MB */
452 case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
453 info->flash_id += FLASH_INTEL320T;
454 info->sector_count = 71;
455 info->size = 0x00400000;
456 break; /* => 4 MB */
457
458
459 case (FLASH_WORD_SIZE)SST_ID_xF160A:
460 info->flash_id += FLASH_SST160A;
461 info->sector_count = 32;
462 info->size = 0x00200000;
463 break; /* => 2 MB */
464
465 default:
466 info->flash_id = FLASH_UNKNOWN;
467 return (0); /* => no or unknown flash */
468
469 }
470 /* base address calculation */
471 base=0-info->size;
472 /* set up sector start address table */
473 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
474 (info->flash_id == FLASH_AM040) ||
475 (info->flash_id == FLASH_AM640U)){
476 for (i = 0; i < info->sector_count; i++)
477 info->start[i] = base + (i * 0x00010000);
478 }
479 else {
480 if (info->flash_id & FLASH_BTYPE) {
481 /* set sector offsets for bottom boot block type */
482 info->start[0] = base + 0x00000000;
483 info->start[1] = base + 0x00004000;
484 info->start[2] = base + 0x00006000;
485 info->start[3] = base + 0x00008000;
486 for (i = 4; i < info->sector_count; i++)
487 info->start[i] = base + (i * 0x00010000) - 0x00030000;
488 }
489 else {
490 /* set sector offsets for top boot block type */
491 i = info->sector_count - 1;
492 if(info->sector_count==71) {
493
494 info->start[i--] = base + info->size - 0x00002000;
495 info->start[i--] = base + info->size - 0x00004000;
496 info->start[i--] = base + info->size - 0x00006000;
497 info->start[i--] = base + info->size - 0x00008000;
498 info->start[i--] = base + info->size - 0x0000A000;
499 info->start[i--] = base + info->size - 0x0000C000;
500 info->start[i--] = base + info->size - 0x0000E000;
501 for (; i >= 0; i--)
502 info->start[i] = base + i * 0x000010000;
503 }
504 else {
505 info->start[i--] = base + info->size - 0x00004000;
506 info->start[i--] = base + info->size - 0x00006000;
507 info->start[i--] = base + info->size - 0x00008000;
508 for (; i >= 0; i--)
509 info->start[i] = base + i * 0x00010000;
510 }
511 }
512 }
513
514 /* check for protected sectors */
515 for (i = 0; i < info->sector_count; i++) {
516 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
517 /* D0 = 1 if protected */
518 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
519 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
520 info->protect[i] = 0;
521 else
522 info->protect[i] = addr2[2] & 1;
523 }
524
525 /*
526 * Prevent writes to uninitialized FLASH.
527 */
528 if (info->flash_id != FLASH_UNKNOWN) {
529 addr2 = (FLASH_WORD_SIZE *)info->start[0];
530 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
531 }
532 return (info->size);
533 }
534
535
536 int wait_for_DQ7(flash_info_t *info, int sect)
537 {
538 ulong start, now, last;
539 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
540
541 start = get_timer (0);
542 last = start;
543 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
544 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
545 printf ("Timeout\n");
546 return ERR_TIMOUT;
547 }
548 /* show that we're waiting */
549 if ((now - last) > 1000) { /* every second */
550 putc ('.');
551 last = now;
552 }
553 }
554 return ERR_OK;
555 }
556
557 int intel_wait_for_DQ7(flash_info_t *info, int sect)
558 {
559 ulong start, now, last, status;
560 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
561
562 start = get_timer (0);
563 last = start;
564 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
565 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
566 printf ("Timeout\n");
567 return ERR_TIMOUT;
568 }
569 /* show that we're waiting */
570 if ((now - last) > 1000) { /* every second */
571 putc ('.');
572 last = now;
573 }
574 }
575 status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
576 /* clear status register */
577 addr[0] = (FLASH_WORD_SIZE)0x00500050;
578 /* check status for block erase fail and VPP low */
579 return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
580 }
581
582 /*-----------------------------------------------------------------------
583 */
584
585 int flash_erase (flash_info_t *info, int s_first, int s_last)
586 {
587 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
588 volatile FLASH_WORD_SIZE *addr2;
589 int flag, prot, sect, l_sect;
590 int i, rcode = 0;
591
592
593 if ((s_first < 0) || (s_first > s_last)) {
594 if (info->flash_id == FLASH_UNKNOWN) {
595 printf ("- missing\n");
596 } else {
597 printf ("- no sectors to erase\n");
598 }
599 return 1;
600 }
601
602 if (info->flash_id == FLASH_UNKNOWN) {
603 printf ("Can't erase unknown flash type - aborted\n");
604 return 1;
605 }
606
607 prot = 0;
608 for (sect=s_first; sect<=s_last; ++sect) {
609 if (info->protect[sect]) {
610 prot++;
611 }
612 }
613
614 if (prot) {
615 printf ("- Warning: %d protected sectors will not be erased!\n",
616 prot);
617 } else {
618 printf ("\n");
619 }
620
621 l_sect = -1;
622
623 /* Disable interrupts which might cause a timeout here */
624 flag = disable_interrupts();
625
626 /* Start erase on unprotected sectors */
627 for (sect = s_first; sect<=s_last; sect++) {
628 if (info->protect[sect] == 0) { /* not protected */
629 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
630 /* printf("Erasing sector %p\n", addr2); */ /* CLH */
631 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
632 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
633 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
634 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
635 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
636 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
637 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
638 for (i=0; i<50; i++)
639 udelay(1000); /* wait 1 ms */
640 rcode |= wait_for_DQ7(info, sect);
641 }
642 else {
643 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
644 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
645 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
646 intel_wait_for_DQ7(info, sect);
647 addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
648 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
649 rcode |= intel_wait_for_DQ7(info, sect);
650 }
651 else {
652 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
653 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
654 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
655 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
656 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
657 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
658 rcode |= wait_for_DQ7(info, sect);
659 }
660 }
661 l_sect = sect;
662 /*
663 * Wait for each sector to complete, it's more
664 * reliable. According to AMD Spec, you must
665 * issue all erase commands within a specified
666 * timeout. This has been seen to fail, especially
667 * if printf()s are included (for debug)!!
668 */
669 /* wait_for_DQ7(info, sect); */
670 }
671 }
672
673 /* re-enable interrupts if necessary */
674 if (flag)
675 enable_interrupts();
676
677 /* wait at least 80us - let's wait 1 ms */
678 udelay (1000);
679
680 #if 0
681 /*
682 * We wait for the last triggered sector
683 */
684 if (l_sect < 0)
685 goto DONE;
686 wait_for_DQ7(info, l_sect);
687
688 DONE:
689 #endif
690 /* reset to read mode */
691 addr = (FLASH_WORD_SIZE *)info->start[0];
692 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
693
694 if (!rcode)
695 printf (" done\n");
696
697 return rcode;
698 }
699
700
701 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
702 {
703 int i;
704 volatile FLASH_WORD_SIZE *addr2;
705 long c;
706 c= (long)cnt;
707 for(i=info->sector_count-1;i>0;i--)
708 {
709 if(addr>=info->start[i])
710 break;
711 }
712 do {
713 addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
714 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
715 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
716 intel_wait_for_DQ7(info, i);
717 i++;
718 c-=(info->start[i]-info->start[i-1]);
719 }while(c>0);
720 }
721
722
723 /*-----------------------------------------------------------------------
724 * Copy memory to flash, returns:
725 * 0 - OK
726 * 1 - write timeout
727 * 2 - Flash not erased
728 */
729
730 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
731 {
732 ulong cp, wp, data;
733 int i, l, rc;
734
735 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
736 unlock_intel_sectors(info,addr,cnt);
737 }
738 wp = (addr & ~3); /* get lower word aligned address */
739 /*
740 * handle unaligned start bytes
741 */
742 if ((l = addr - wp) != 0) {
743 data = 0;
744 for (i=0, cp=wp; i<l; ++i, ++cp) {
745 data = (data << 8) | (*(uchar *)cp);
746 }
747 for (; i<4 && cnt>0; ++i) {
748 data = (data << 8) | *src++;
749 --cnt;
750 ++cp;
751 }
752 for (; cnt==0 && i<4; ++i, ++cp) {
753 data = (data << 8) | (*(uchar *)cp);
754 }
755
756 if ((rc = write_word(info, wp, data)) != 0) {
757 return (rc);
758 }
759 wp += 4;
760 }
761
762 /*
763 * handle word aligned part
764 */
765 while (cnt >= 4) {
766 data = 0;
767 for (i=0; i<4; ++i) {
768 data = (data << 8) | *src++;
769 }
770 if ((rc = write_word(info, wp, data)) != 0) {
771 return (rc);
772 }
773 wp += 4;
774 if((wp % 0x10000)==0)
775 printf("."); /* show Progress */
776 cnt -= 4;
777 }
778
779 if (cnt == 0) {
780 return (0);
781 }
782
783 /*
784 * handle unaligned tail bytes
785 */
786 data = 0;
787 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
788 data = (data << 8) | *src++;
789 --cnt;
790 }
791 for (; i<4; ++i, ++cp) {
792 data = (data << 8) | (*(uchar *)cp);
793 }
794 rc=write_word(info, wp, data);
795 return rc;
796 }
797
798 /*-----------------------------------------------------------------------
799 * Write a word to Flash, returns:
800 * 0 - OK
801 * 1 - write timeout
802 * 2 - Flash not erased
803 */
804 static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
805
806 static int write_word (flash_info_t *info, ulong dest, ulong data)
807 {
808 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
809 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
810 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
811 ulong start;
812 int flag;
813 int i;
814
815 /* Check if Flash is (sufficiently) erased */
816 if ((*((volatile FLASH_WORD_SIZE *)dest) &
817 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
818 return (2);
819 }
820 /* Disable interrupts which might cause a timeout here */
821 flag = disable_interrupts();
822 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
823 {
824 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
825 /* intel style writting */
826 dest2[i] = (FLASH_WORD_SIZE)0x00500050;
827 dest2[i] = (FLASH_WORD_SIZE)0x00400040;
828 *read_val++ = data2[i];
829 dest2[i] = data2[i];
830 if (flag)
831 enable_interrupts();
832 /* data polling for D7 */
833 start = get_timer (0);
834 udelay(10);
835 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
836 {
837 if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
838 return (1);
839 }
840 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
841 udelay(10);
842 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
843 if(dest2[i]!=data2[i])
844 printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
845 }
846 else {
847 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
848 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
849 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
850 dest2[i] = data2[i];
851 /* re-enable interrupts if necessary */
852 if (flag)
853 enable_interrupts();
854 /* data polling for D7 */
855 start = get_timer (0);
856 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
857 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
858 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
859 return (1);
860 }
861 }
862 }
863 }
864 return (0);
865 }
866
867 /*-----------------------------------------------------------------------
868 */
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