board/mpl/common/piix4_pci.h

   1 /*
   2  * (C) Copyright 2001
   3  * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24
  25 #ifndef _PIIX4_PCI_H
  26 #define _PIIX4_PCI_H
  27
  28 /***************************************************************************
  29 * Defines PIIX4 Config Registers
  30 ****************************************************************************/
  31
  32 /* Function 0 ISA Bridge */
  33 #define PCI_CFG_PIIX4_IORT              0x4C    /* 8 bit ISA Recovery Timer Reg (default 0x4D) */
  34 #define PCI_CFG_PIIX4_XBCS              0x4E    /* 16 bit XBus Chip select reg (default 0x0003) */
  35 #define PCI_CFG_PIIX4_PIRQC             0x60  /* PCI IRQ Route Register 4 x 8bit (default )*/
  36 #define PCI_CFG_PIIX4_SERIRQ    0x64
  37 #define PCI_CFG_PIIX4_TOM                       0x69
  38 #define PCI_CFG_PIIX4_MSTAT             0x6A
  39 #define PCI_CFG_PIIX4_MBDMA             0x76
  40 #define PCI_CFG_PIIX4_APICBS    0x80
  41 #define PCI_CFG_PIIX4_DLC                       0x82
  42 #define PCI_CFG_PIIX4_PDMACFG   0x90
  43 #define PCI_CFG_PIIX4_DDMABS    0x92
  44 #define PCI_CFG_PIIX4_GENCFG    0xB0
  45 #define PCI_CFG_PIIX4_RTCCFG    0xCB
  46
  47 /* IO Addresses */
  48 #define PIIX4_ISA_DMA1_CH0BA    0x00
  49 #define PIIX4_ISA_DMA1_CH0CA    0x01
  50 #define PIIX4_ISA_DMA1_CH1BA    0x02
  51 #define PIIX4_ISA_DMA1_CH1CA    0x03
  52 #define PIIX4_ISA_DMA1_CH2BA    0x04
  53 #define PIIX4_ISA_DMA1_CH2CA    0x05
  54 #define PIIX4_ISA_DMA1_CH3BA    0x06
  55 #define PIIX4_ISA_DMA1_CH3CA    0x07
  56 #define PIIX4_ISA_DMA1_CMDST    0x08
  57 #define PIIX4_ISA_DMA1_REQ              0x09
  58 #define PIIX4_ISA_DMA1_WSBM             0x0A
  59 #define PIIX4_ISA_DMA1_CH_MOD   0x0B
  60 #define PIIX4_ISA_DMA1_CLR_PT   0x0C
  61 #define PIIX4_ISA_DMA1_M_CLR    0x0D
  62 #define PIIX4_ISA_DMA1_CLR_M    0x0E
  63 #define PIIX4_ISA_DMA1_RWAMB    0x0F
  64
  65 #define PIIX4_ISA_DMA2_CH0BA    0xC0
  66 #define PIIX4_ISA_DMA2_CH0CA    0xC1
  67 #define PIIX4_ISA_DMA2_CH1BA    0xC2
  68 #define PIIX4_ISA_DMA2_CH1CA    0xC3
  69 #define PIIX4_ISA_DMA2_CH2BA    0xC4
  70 #define PIIX4_ISA_DMA2_CH2CA    0xC5
  71 #define PIIX4_ISA_DMA2_CH3BA    0xC6
  72 #define PIIX4_ISA_DMA2_CH3CA    0xC7
  73 #define PIIX4_ISA_DMA2_CMDST    0xD0
  74 #define PIIX4_ISA_DMA2_REQ              0xD2
  75 #define PIIX4_ISA_DMA2_WSBM             0xD4
  76 #define PIIX4_ISA_DMA2_CH_MOD   0xD6
  77 #define PIIX4_ISA_DMA2_CLR_PT   0xD8
  78 #define PIIX4_ISA_DMA2_M_CLR    0xDA
  79 #define PIIX4_ISA_DMA2_CLR_M    0xDC
  80 #define PIIX4_ISA_DMA2_RWAMB    0xDE
  81
  82 #define PIIX4_ISA_INT1_ICW1             0x20
  83 #define PIIX4_ISA_INT1_OCW2             0x20
  84 #define PIIX4_ISA_INT1_OCW3             0x20
  85 #define PIIX4_ISA_INT1_ICW2             0x21
  86 #define PIIX4_ISA_INT1_ICW3             0x21
  87 #define PIIX4_ISA_INT1_ICW4             0x21
  88 #define PIIX4_ISA_INT1_OCW1             0x21
  89
  90 #define PIIX4_ISA_INT1_ELCR             0x4D0
  91
  92 #define PIIX4_ISA_INT2_ICW1             0xA0
  93 #define PIIX4_ISA_INT2_OCW2             0xA0
  94 #define PIIX4_ISA_INT2_OCW3             0xA0
  95 #define PIIX4_ISA_INT2_ICW2             0xA1
  96 #define PIIX4_ISA_INT2_ICW3             0xA1
  97 #define PIIX4_ISA_INT2_ICW4             0xA1
  98 #define PIIX4_ISA_INT2_OCW1             0xA1
  99 #define PIIX4_ISA_INT2_IMR              0xA1 /* read only */
 100
 101 #define PIIX4_ISA_INT2_ELCR             0x4D1
 102
 103 #define PIIX4_ISA_TMR0_CNT_ST   0x40
 104 #define PIIX4_ISA_TMR1_CNT_ST   0x41
 105 #define PIIX4_ISA_TMR2_CNT_ST   0x42
 106 #define PIIX4_ISA_TMR_TCW                       0x43
 107
 108 #define PIIX4_ISA_RST_XBUS              0x60
 109
 110 #define PIIX4_ISA_NMI_CNT_ST    0x61
 111 #define PIIX4_ISA_NMI_ENABLE    0x70
 112
 113 #define PIIX4_ISA_RTC_INDEX             0x70
 114 #define PIIX4_ISA_RTC_DATA              0x71
 115 #define PIIX4_ISA_RTCEXT_IND    0x70
 116 #define PIIX4_ISA_RTCEXT_DATA   0x71
 117
 118 #define PIIX4_ISA_DMA1_CH2LPG   0x81
 119 #define PIIX4_ISA_DMA1_CH3LPG   0x82
 120 #define PIIX4_ISA_DMA1_CH1LPG   0x83
 121 #define PIIX4_ISA_DMA1_CH0LPG   0x87
 122 #define PIIX4_ISA_DMA2_CH2LPG   0x89
 123 #define PIIX4_ISA_DMA2_CH3LPG   0x8A
 124 #define PIIX4_ISA_DMA2_CH1LPG   0x8B
 125 #define PIIX4_ISA_DMA2_LPGRFR   0x8F
 126
 127 #define PIIX4_ISA_PORT_92                       0x92
 128
 129 #define PIIX4_ISA_APM_CONTRL    0xB2
 130 #define PIIX4_ISA_APM_STATUS    0xB3
 131
 132 #define PIIX4_ISA_COCPU_ERROR   0xF0
 133
 134 /* Function 1 IDE Controller */
 135 #define PCI_CFG_PIIX4_BMIBA             0x20
 136 #define PCI_CFG_PIIX4_IDETIM    0x40
 137 #define PCI_CFG_PIIX4_SIDETIM   0x44
 138 #define PCI_CFG_PIIX4_UDMACTL   0x48
 139 #define PCI_CFG_PIIX4_UDMATIM 0x4A
 140
 141 /* Function 2 USB Controller */
 142 #define PCI_CFG_PIIX4_SBRNUM    0x60
 143 #define PCI_CFG_PIIX4_LEGSUP    0xC0
 144
 145 /* Function 3 Power Management */
 146 #define PCI_CFG_PIIX4_PMBA              0x40
 147 #define PCI_CFG_PIIX4_CNTA              0x44
 148 #define PCI_CFG_PIIX4_CNTB              0x48
 149 #define PCI_CFG_PIIX4_GPICTL    0x4C
 150 #define PCI_CFG_PIIX4_DEVRESD   0x50
 151 #define PCI_CFG_PIIX4_DEVACTA   0x54
 152 #define PCI_CFG_PIIX4_DEVACTB   0x58
 153 #define PCI_CFG_PIIX4_DEVRESA   0x5C
 154 #define PCI_CFG_PIIX4_DEVRESB   0x60
 155 #define PCI_CFG_PIIX4_DEVRESC   0x64
 156 #define PCI_CFG_PIIX4_DEVRESE   0x68
 157 #define PCI_CFG_PIIX4_DEVRESF   0x6C
 158 #define PCI_CFG_PIIX4_DEVRESG   0x70
 159 #define PCI_CFG_PIIX4_DEVRESH   0x74
 160 #define PCI_CFG_PIIX4_DEVRESI   0x78
 161 #define PCI_CFG_PIIX4_PMMISC    0x80
 162 #define PCI_CFG_PIIX4_SMBBA     0x90
 163
 164
 165 #endif