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git.ipfire.org Git - people/ms/u-boot.git/blob - board/mpl/vcma9/vcma9.c
43a3d47d2b038ebf42ce966bc4b699df54fb8930
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
6 * (C) Copyright 2002, 2010
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
9 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/s3c24x0_cpu.h>
19 #include "../common/common_util.h"
21 DECLARE_GLOBAL_DATA_PTR
;
24 * Miscellaneous platform dependent initialisations
27 int board_early_init_f(void)
29 struct s3c24x0_gpio
* const gpio
= s3c24x0_get_base_gpio();
31 /* set up the I/O ports */
32 writel(0x007FFFFF, &gpio
->gpacon
);
33 writel(0x002AAAAA, &gpio
->gpbcon
);
34 writel(0x000002BF, &gpio
->gpbup
);
35 writel(0xAAAAAAAA, &gpio
->gpccon
);
36 writel(0x0000FFFF, &gpio
->gpcup
);
37 writel(0xAAAAAAAA, &gpio
->gpdcon
);
38 writel(0x0000FFFF, &gpio
->gpdup
);
39 writel(0xAAAAAAAA, &gpio
->gpecon
);
40 writel(0x000037F7, &gpio
->gpeup
);
41 writel(0x00000000, &gpio
->gpfcon
);
42 writel(0x00000000, &gpio
->gpfup
);
43 writel(0xFFEAFF5A, &gpio
->gpgcon
);
44 writel(0x0000F0DC, &gpio
->gpgup
);
45 writel(0x0028AAAA, &gpio
->gphcon
);
46 writel(0x00000656, &gpio
->gphup
);
48 /* setup correct IRQ modes for NIC (rising edge mode) */
49 writel((readl(&gpio
->extint2
) & ~(7<<8)) | (4<<8), &gpio
->extint2
);
51 /* select USB port 2 to be host or device (setup as host for now) */
52 writel(readl(&gpio
->misccr
) | 0x08, &gpio
->misccr
);
59 /* adress of boot parameters */
60 gd
->bd
->bi_boot_params
= 0x30000100;
69 * Get some Board/PLD Info
72 static u8
get_pld_reg(enum vcma9_pld_regs reg
)
74 return readb(VCMA9_PLD_BASE
+ reg
);
77 static u8
get_pld_version(void)
79 return (get_pld_reg(VCMA9_PLD_ID
) >> 4) & 0x0F;
82 static u8
get_pld_revision(void)
84 return get_pld_reg(VCMA9_PLD_ID
) & 0x0F;
87 static uchar
get_board_pcb(void)
89 return ((get_pld_reg(VCMA9_PLD_BOARD
) >> 4) & 0x03) + 'A';
92 static u8
get_nr_chips(void)
94 switch ((get_pld_reg(VCMA9_PLD_SDRAM
) >> 4) & 0x0F) {
102 static ulong
get_chip_size(void)
104 switch (get_pld_reg(VCMA9_PLD_SDRAM
) & 0x0F) {
105 case 0: return 16 * (1024*1024);
106 case 1: return 32 * (1024*1024);
107 case 2: return 8 * (1024*1024);
108 case 3: return 8 * (1024*1024);
113 static const char *get_chip_geom(void)
115 switch (get_pld_reg(VCMA9_PLD_SDRAM
) & 0x0F) {
116 case 0: return "4Mx8x4";
117 case 1: return "8Mx8x4";
118 case 2: return "2Mx8x4";
119 case 3: return "4Mx8x2";
120 default: return "unknown";
124 static void vcma9_show_info(char *board_name
, char *serial
)
126 printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n",
128 get_board_pcb(), get_pld_version(), get_pld_revision());
129 printf("SDRAM: %d chips %s\n", get_nr_chips(), get_chip_geom());
134 /* dram_init must store complete ramsize in gd->ram_size */
135 gd
->ram_size
= get_chip_size() * get_nr_chips();
140 * Check Board Identity:
147 backup_t
*b
= (backup_t
*) s
;
149 i
= getenv_f("serial#", s
, 32);
150 if ((i
< 0) || strncmp (s
, "VCMA9", 5)) {
151 get_backup_values (b
);
152 if (strncmp (b
->signature
, "MPL\0", 4) != 0) {
153 puts ("### No HW ID - assuming VCMA9");
155 b
->serial_name
[5] = 0;
156 vcma9_show_info(b
->serial_name
, &b
->serial_name
[6]);
160 vcma9_show_info(s
, &s
[6]);
166 int board_late_init(void)
169 * check if environment is healthy, otherwise restore values
176 void vcma9_print_info(void)
178 char *s
= getenv("serial#");
181 puts ("### No HW ID - assuming VCMA9");
184 vcma9_show_info(s
, &s
[6]);
188 #ifdef CONFIG_CMD_NET
189 int board_eth_init(bd_t
*bis
)
193 rc
= cs8900_initialize(0, CONFIG_CS8900_BASE
);
200 * Hardcoded flash setup:
201 * Flash 0 is a non-CFI AMD AM29F400BB flash.
203 ulong
board_flash_get_legacy(ulong base
, int banknum
, flash_info_t
*info
)
205 info
->portwidth
= FLASH_CFI_16BIT
;
206 info
->chipwidth
= FLASH_CFI_BY16
;
207 info
->interface
= FLASH_CFI_X16
;