]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/mvblue/mvblue.c
2 * GNU General Public License for more details.
4 * MATRIX Vision GmbH / June 2002-Nov 2003
17 DECLARE_GLOBAL_DATA_PTR
;
19 u32
get_BoardType (void);
21 #define PCI_CONFIG(b,d,f,r) cpu_to_le32(0x80000000 | ((b&0xff)<<16) \
26 int mv_pci_read (int bus
, int dev
, int func
, int reg
)
28 *(u32
*) (0xfec00cf8) = PCI_CONFIG (bus
, dev
, func
, reg
);
30 return cpu_to_le32 (*(u32
*) (0xfee00cfc));
35 return (mv_pci_read (0, 0xe, 0, 0) == 0x06801095 ? 0 : 1);
38 void init_2nd_DUART (void)
40 NS16550_t console
= (NS16550_t
) CFG_NS16550_COM2
;
41 int clock_divisor
= CFG_NS16550_CLK
/ 16 / CONFIG_BAUDRATE
;
43 *(u8
*) (0xfc004511) = 0x1;
44 NS16550_init (console
, clock_divisor
);
46 void hw_watchdog_reset (void)
48 if (get_BoardType () == 0) {
49 *(u32
*) (0xff000005) = 0;
55 ulong busfreq
= get_bus_freq (0);
57 u32 BoardType
= get_BoardType ();
58 char *BoardName
[2] = { "mvBlueBOX", "mvBlueLYNX" };
64 printf ("U-Boot (%s) running on mvBLUE device.\n", MV_VERSION
);
65 printf (" Found %s running at %s MHz memory clock.\n",
66 BoardName
[BoardType
], strmhz (buf
, busfreq
));
70 if ((p
= getenv ("console_nr")) != NULL
) {
71 unsigned long con_nr
= simple_strtoul (p
, NULL
, 10) & 3;
73 bd
->bi_baudrate
&= ~3;
74 bd
->bi_baudrate
|= con_nr
& 3;
79 phys_size_t
initdram (int board_type
)
86 size
= get_ram_size(CFG_SDRAM_BASE
, CFG_MAX_RAM_SIZE
);
88 new_bank0_end
= size
- 1;
89 mear1
= mpc824x_mpc107_getreg(MEAR1
);
90 emear1
= mpc824x_mpc107_getreg(EMEAR1
);
91 mear1
= (mear1
& 0xFFFFFF00) |
92 ((new_bank0_end
& MICR_ADDR_MASK
) >> MICR_ADDR_SHIFT
);
93 emear1
= (emear1
& 0xFFFFFF00) |
94 ((new_bank0_end
& MICR_ADDR_MASK
) >> MICR_EADDR_SHIFT
);
95 mpc824x_mpc107_setreg(MEAR1
, mear1
);
96 mpc824x_mpc107_setreg(EMEAR1
, emear1
);
101 /* ------------------------------------------------------------------------- */
102 u8
*dhcp_vendorex_prep (u8
* e
)
106 /* DHCP vendor-class-identifier = 60 */
107 if ((ptr
= getenv ("dhcp_vendor-class-identifier"))) {
113 /* my DHCP_CLIENT_IDENTIFIER = 61 */
114 if ((ptr
= getenv ("dhcp_client_id"))) {
123 u8
*dhcp_vendorex_proc (u8
* popt
)
128 /* ------------------------------------------------------------------------- */
131 * Initialize PCI Devices
134 void pci_mvblue_clear_base (struct pci_controller
*hose
, pci_dev_t dev
)
138 printf ("clear base @ dev/func 0x%02x/0x%02x ... ", PCI_DEV (dev
),
140 for (cnt
= 0; cnt
< 6; cnt
++)
141 pci_hose_write_config_dword (hose
, dev
, 0x10 + (4 * cnt
),
146 void duart_setup (u32 base
, u16 divisor
)
148 printf ("duart setup ...");
149 out_8 ((u8
*) (CFG_ISA_IO
+ base
+ 3), 0x80);
150 out_8 ((u8
*) (CFG_ISA_IO
+ base
+ 0), divisor
& 0xff);
151 out_8 ((u8
*) (CFG_ISA_IO
+ base
+ 1), divisor
>> 8);
152 out_8 ((u8
*) (CFG_ISA_IO
+ base
+ 3), 0x03);
153 out_8 ((u8
*) (CFG_ISA_IO
+ base
+ 4), 0x03);
154 out_8 ((u8
*) (CFG_ISA_IO
+ base
+ 2), 0x07);
158 void pci_mvblue_fixup_irq_behind_bridge (struct pci_controller
*hose
,
159 pci_dev_t bridge
, unsigned char irq
)
163 unsigned short vendor
, class;
165 pci_hose_read_config_byte (hose
, bridge
, PCI_SECONDARY_BUS
, &bus
);
166 for (d
= PCI_BDF (bus
, 0, 0);
167 d
< PCI_BDF (bus
, PCI_MAX_PCI_DEVICES
- 1,
168 PCI_MAX_PCI_FUNCTIONS
- 1);
169 d
+= PCI_BDF (0, 0, 1)) {
170 pci_hose_read_config_word (hose
, d
, PCI_VENDOR_ID
, &vendor
);
171 if (vendor
!= 0xffff && vendor
!= 0x0000) {
172 pci_hose_read_config_word (hose
, d
, PCI_CLASS_DEVICE
,
174 if (class == PCI_CLASS_BRIDGE_PCI
)
175 pci_mvblue_fixup_irq_behind_bridge (hose
, d
,
178 pci_hose_write_config_byte (hose
, d
,
185 #define MV_MAX_PCI_BUSSES 3
188 void pci_mvblue_fixup_irq (struct pci_controller
*hose
, pci_dev_t dev
)
190 unsigned char line
= 0xff;
191 unsigned short class;
193 if (PCI_BUS (dev
) == 0) {
194 switch (PCI_DEV (dev
)) {
196 if (get_BoardType () == 0) {
205 pci_hose_write_config_byte (hose
, dev
, 0x8a, 0x20);
208 /* mvBB: Slot0 (Grabber) */
209 pci_hose_read_config_word (hose
, dev
,
210 PCI_CLASS_DEVICE
, &class);
211 if (class == PCI_CLASS_BRIDGE_PCI
) {
212 pci_mvblue_fixup_irq_behind_bridge (hose
, dev
,
220 pci_hose_read_config_word (hose
, dev
,
221 PCI_CLASS_DEVICE
, &class);
222 if (class == PCI_CLASS_BRIDGE_PCI
) {
223 pci_mvblue_fixup_irq_behind_bridge (hose
, dev
,
230 printf ("***pci_scan: illegal dev = 0x%08x\n",
235 pci_hose_write_config_byte (hose
, dev
, PCI_INTERRUPT_LINE
,
240 struct pci_controller hose
= {
241 fixup_irq
:pci_mvblue_fixup_irq
244 void pci_init_board (void)
246 pci_mpc824x_init (&hose
);