board/netstal/hcu5/init.S

   1 /*
   2  *
   3  * See file CREDITS for list of people who contributed to this
   4  * project.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #include <ppc_asm.tmpl>
  23 #include <config.h>
  24 #include <asm/mmu.h>
  25
  26 /**************************************************************************
  27  * TLB TABLE
  28  *
  29  * This table is used by the cpu boot code to setup the initial tlb
  30  * entries. Rather than make broad assumptions in the cpu source tree,
  31  * this table lets each board set things up however they like.
  32  *
  33  *  Pointer to the table is returned in r1
  34  *
  35  *************************************************************************/
  36         .section .bootpg,"ax"
  37         .globl tlbtab
  38
  39 tlbtab:
  40         tlbtab_start
  41
  42         /* TLB#0: vxWorks needs this entry for the Machine Check interrupt, */
  43         tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
  44         /* TLB#1: TLB-entry for DDR SDRAM (Up to 2GB) */
  45         tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0,
  46                 AC_R|AC_W|AC_X|SA_G|SA_I )
  47
  48         /* TLB#2: TLB-entry for EBC */
  49         tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
  50
  51         /*
  52          * TLB#3: BOOT_CS (FLASH) must be forth. Before relocation SA_I can be
  53          * off to use the speed up boot process. It is patched after relocation
  54          * to enable SA_I
  55          */
  56         tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_1M, CONFIG_SYS_BOOT_BASE_ADDR, 1,
  57                 AC_R|AC_W|AC_X|SA_G)
  58
  59         /*
  60          * TLB entries for SDRAM are not needed on this platform.
  61          * They are dynamically generated in the SPD DDR(2) detection
  62          * routine.
  63          */
  64
  65         /* TLB#4: */
  66         tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1,
  67                 AC_R|AC_W|SA_G|SA_I )
  68         /* TLB#5: */
  69         tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1,
  70                 AC_R|AC_W|SA_G|SA_I )
  71         /* TLB#6: */
  72         tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1,
  73                 AC_R|AC_W|SA_G|SA_I )
  74
  75         /* TLB-entry for Internal Registers & OCM */
  76         /* TLB#7: */
  77         tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0,
  78                 AC_R|AC_W|AC_X|SA_G|SA_I )
  79
  80         /*TLB-entry PCI registers*/
  81         /* TLB#8: */
  82         tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1,  AC_R|AC_W|AC_X|SA_G|SA_I )
  83
  84         /* TLB-entry for peripherals */
  85         /* TLB#9: */
  86         tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
  87
  88         /*              CAN */
  89         /* TLB#10: */
  90         tlbentry( CONFIG_SYS_CS_1, SZ_1K, CONFIG_SYS_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
  91
  92         /* TLB#11:  CPLD and IMC-Standard 32 MB */
  93         tlbentry( CONFIG_SYS_CS_2, SZ_16M, CONFIG_SYS_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
  94
  95         /* TLB#12: */
  96         tlbentry( CONFIG_SYS_CS_2 + 0x1000000, SZ_16M, CONFIG_SYS_CS_2 + 0x1000000, 1,
  97                 AC_R|AC_W|AC_X|SA_G|SA_I )
  98
  99          /*             IMC-Fast 32 MB */
 100         /* TLB#13: */
 101         tlbentry( CONFIG_SYS_CS_3, SZ_16M, CONFIG_SYS_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
 102         /* TLB#14: */
 103         tlbentry( CONFIG_SYS_CS_3 + 0x1000000, SZ_16M, CONFIG_SYS_CS_3, 1,
 104                 AC_R|AC_W|AC_X|SA_G|SA_I )
 105
 106         tlbtab_end