board/nvidia/common/board.c

   1 /*
   2  *  (C) Copyright 2010,2011
   3  *  NVIDIA Corporation <www.nvidia.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <ns16550.h>
  10 #include <linux/compiler.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/clock.h>
  13 #ifdef CONFIG_LCD
  14 #include <asm/arch/display.h>
  15 #endif
  16 #include <asm/arch/funcmux.h>
  17 #include <asm/arch/pinmux.h>
  18 #include <asm/arch/pmu.h>
  19 #ifdef CONFIG_PWM_TEGRA
  20 #include <asm/arch/pwm.h>
  21 #endif
  22 #include <asm/arch/tegra.h>
  23 #include <asm/arch-tegra/board.h>
  24 #include <asm/arch-tegra/clk_rst.h>
  25 #include <asm/arch-tegra/pmc.h>
  26 #include <asm/arch-tegra/sys_proto.h>
  27 #include <asm/arch-tegra/uart.h>
  28 #include <asm/arch-tegra/warmboot.h>
  29 #ifdef CONFIG_TEGRA_CLOCK_SCALING
  30 #include <asm/arch/emc.h>
  31 #endif
  32 #ifdef CONFIG_USB_EHCI_TEGRA
  33 #include <asm/arch-tegra/usb.h>
  34 #include <asm/arch/usb.h>
  35 #endif
  36 #ifdef CONFIG_TEGRA_MMC
  37 #include <asm/arch-tegra/tegra_mmc.h>
  38 #include <asm/arch-tegra/mmc.h>
  39 #endif
  40 #include <i2c.h>
  41 #include <spi.h>
  42 #include "emc.h"
  43
  44 DECLARE_GLOBAL_DATA_PTR;
  45
  46 const struct tegra_sysinfo sysinfo = {
  47         CONFIG_TEGRA_BOARD_STRING
  48 };
  49
  50 #ifndef CONFIG_SPL_BUILD
  51 /*
  52  * Routine: timer_init
  53  * Description: init the timestamp and lastinc value
  54  */
  55 int timer_init(void)
  56 {
  57         return 0;
  58 }
  59 #endif
  60
  61 void __pin_mux_usb(void)
  62 {
  63 }
  64
  65 void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
  66
  67 void __pin_mux_spi(void)
  68 {
  69 }
  70
  71 void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
  72
  73 void __gpio_early_init_uart(void)
  74 {
  75 }
  76
  77 void gpio_early_init_uart(void)
  78 __attribute__((weak, alias("__gpio_early_init_uart")));
  79
  80 void __pin_mux_nand(void)
  81 {
  82         funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
  83 }
  84
  85 void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
  86
  87 void __pin_mux_display(void)
  88 {
  89 }
  90
  91 void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
  92
  93 /*
  94  * Routine: power_det_init
  95  * Description: turn off power detects
  96  */
  97 static void power_det_init(void)
  98 {
  99 #if defined(CONFIG_TEGRA20)
 100         struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
 101
 102         /* turn off power detects */
 103         writel(0, &pmc->pmc_pwr_det_latch);
 104         writel(0, &pmc->pmc_pwr_det);
 105 #endif
 106 }
 107
 108 /*
 109  * Routine: board_init
 110  * Description: Early hardware init.
 111  */
 112 int board_init(void)
 113 {
 114         __maybe_unused int err;
 115
 116         /* Do clocks and UART first so that printf() works */
 117         clock_init();
 118         clock_verify();
 119
 120 #ifdef CONFIG_FDT_SPI
 121         pin_mux_spi();
 122         spi_init();
 123 #endif
 124
 125 #ifdef CONFIG_PWM_TEGRA
 126         if (pwm_init(gd->fdt_blob))
 127                 debug("%s: Failed to init pwm\n", __func__);
 128 #endif
 129 #ifdef CONFIG_LCD
 130         pin_mux_display();
 131         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 132 #endif
 133         /* boot param addr */
 134         gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 135
 136         power_det_init();
 137
 138 #ifdef CONFIG_SYS_I2C_TEGRA
 139 #ifndef CONFIG_SYS_I2C_INIT_BOARD
 140 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
 141 #endif
 142         i2c_init_board();
 143 # ifdef CONFIG_TEGRA_PMU
 144         if (pmu_set_nominal())
 145                 debug("Failed to select nominal voltages\n");
 146 #  ifdef CONFIG_TEGRA_CLOCK_SCALING
 147         err = board_emc_init();
 148         if (err)
 149                 debug("Memory controller init failed: %d\n", err);
 150 #  endif
 151 # endif /* CONFIG_TEGRA_PMU */
 152 #endif /* CONFIG_SYS_I2C_TEGRA */
 153
 154 #ifdef CONFIG_USB_EHCI_TEGRA
 155         pin_mux_usb();
 156         board_usb_init(gd->fdt_blob);
 157 #endif
 158 #ifdef CONFIG_LCD
 159         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 160 #endif
 161
 162 #ifdef CONFIG_TEGRA_NAND
 163         pin_mux_nand();
 164 #endif
 165
 166 #ifdef CONFIG_TEGRA_LP0
 167         /* save Sdram params to PMC 2, 4, and 24 for WB0 */
 168         warmboot_save_sdram_params();
 169
 170         /* prepare the WB code to LP0 location */
 171         warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
 172 #endif
 173
 174         return 0;
 175 }
 176
 177 #ifdef CONFIG_BOARD_EARLY_INIT_F
 178 static void __gpio_early_init(void)
 179 {
 180 }
 181
 182 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 183
 184 int board_early_init_f(void)
 185 {
 186 #if !defined(CONFIG_TEGRA20)
 187         pinmux_init();
 188 #endif
 189         board_init_uart_f();
 190
 191         /* Initialize periph GPIOs */
 192         gpio_early_init();
 193         gpio_early_init_uart();
 194 #ifdef CONFIG_LCD
 195         tegra_lcd_early_init(gd->fdt_blob);
 196 #endif
 197
 198         return 0;
 199 }
 200 #endif  /* EARLY_INIT */
 201
 202 int board_late_init(void)
 203 {
 204 #ifdef CONFIG_LCD
 205         /* Make sure we finish initing the LCD */
 206         tegra_lcd_check_next_stage(gd->fdt_blob, 1);
 207 #endif
 208         return 0;
 209 }
 210
 211 #if defined(CONFIG_TEGRA_MMC)
 212 void __pin_mux_mmc(void)
 213 {
 214 }
 215
 216 void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
 217
 218 /* this is a weak define that we are overriding */
 219 int board_mmc_init(bd_t *bd)
 220 {
 221         debug("%s called\n", __func__);
 222
 223         /* Enable muxes, etc. for SDMMC controllers */
 224         pin_mux_mmc();
 225
 226         debug("%s: init MMC\n", __func__);
 227         tegra_mmc_init();
 228
 229         return 0;
 230 }
 231
 232 void pad_init_mmc(struct mmc_host *host)
 233 {
 234 #if defined(CONFIG_TEGRA30)
 235         enum periph_id id = host->mmc_id;
 236         u32 val;
 237
 238         debug("%s: sdmmc address = %08x, id = %d\n", __func__,
 239                 (unsigned int)host->reg, id);
 240
 241         /* Set the pad drive strength for SDMMC1 or 3 only */
 242         if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
 243                 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
 244                         __func__);
 245                 return;
 246         }
 247
 248         val = readl(&host->reg->sdmemcmppadctl);
 249         val &= 0xFFFFFFF0;
 250         val |= MEMCOMP_PADCTRL_VREF;
 251         writel(val, &host->reg->sdmemcmppadctl);
 252
 253         val = readl(&host->reg->autocalcfg);
 254         val &= 0xFFFF0000;
 255         val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
 256         writel(val, &host->reg->autocalcfg);
 257 #endif  /* T30 */
 258 }
 259 #endif  /* MMC */