board/nvidia/common/board.c

   1 /*
   2  *  (C) Copyright 2010,2011
   3  *  NVIDIA Corporation <www.nvidia.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <ns16550.h>
  10 #include <linux/compiler.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/clock.h>
  13 #ifdef CONFIG_LCD
  14 #include <asm/arch/display.h>
  15 #endif
  16 #include <asm/arch/funcmux.h>
  17 #include <asm/arch/pinmux.h>
  18 #include <asm/arch/pmu.h>
  19 #ifdef CONFIG_PWM_TEGRA
  20 #include <asm/arch/pwm.h>
  21 #endif
  22 #include <asm/arch/tegra.h>
  23 #include <asm/arch-tegra/board.h>
  24 #include <asm/arch-tegra/clk_rst.h>
  25 #include <asm/arch-tegra/pmc.h>
  26 #include <asm/arch-tegra/sys_proto.h>
  27 #include <asm/arch-tegra/uart.h>
  28 #include <asm/arch-tegra/warmboot.h>
  29 #ifdef CONFIG_TEGRA_CLOCK_SCALING
  30 #include <asm/arch/emc.h>
  31 #endif
  32 #ifdef CONFIG_USB_EHCI_TEGRA
  33 #include <asm/arch-tegra/usb.h>
  34 #include <asm/arch/usb.h>
  35 #include <usb.h>
  36 #endif
  37 #ifdef CONFIG_TEGRA_MMC
  38 #include <asm/arch-tegra/tegra_mmc.h>
  39 #include <asm/arch-tegra/mmc.h>
  40 #endif
  41 #include <i2c.h>
  42 #include <spi.h>
  43 #include "emc.h"
  44
  45 DECLARE_GLOBAL_DATA_PTR;
  46
  47 const struct tegra_sysinfo sysinfo = {
  48         CONFIG_TEGRA_BOARD_STRING
  49 };
  50
  51 #ifndef CONFIG_SPL_BUILD
  52 /*
  53  * Routine: timer_init
  54  * Description: init the timestamp and lastinc value
  55  */
  56 int timer_init(void)
  57 {
  58         return 0;
  59 }
  60 #endif
  61
  62 void __pin_mux_usb(void)
  63 {
  64 }
  65
  66 void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
  67
  68 void __pin_mux_spi(void)
  69 {
  70 }
  71
  72 void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
  73
  74 void __gpio_early_init_uart(void)
  75 {
  76 }
  77
  78 void gpio_early_init_uart(void)
  79 __attribute__((weak, alias("__gpio_early_init_uart")));
  80
  81 void __pin_mux_nand(void)
  82 {
  83         funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
  84 }
  85
  86 void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
  87
  88 void __pin_mux_display(void)
  89 {
  90 }
  91
  92 void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
  93
  94 /*
  95  * Routine: power_det_init
  96  * Description: turn off power detects
  97  */
  98 static void power_det_init(void)
  99 {
 100 #if defined(CONFIG_TEGRA20)
 101         struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
 102
 103         /* turn off power detects */
 104         writel(0, &pmc->pmc_pwr_det_latch);
 105         writel(0, &pmc->pmc_pwr_det);
 106 #endif
 107 }
 108
 109 /*
 110  * Routine: board_init
 111  * Description: Early hardware init.
 112  */
 113 int board_init(void)
 114 {
 115         __maybe_unused int err;
 116
 117         /* Do clocks and UART first so that printf() works */
 118         clock_init();
 119         clock_verify();
 120
 121 #ifdef CONFIG_FDT_SPI
 122         pin_mux_spi();
 123         spi_init();
 124 #endif
 125
 126 #ifdef CONFIG_PWM_TEGRA
 127         if (pwm_init(gd->fdt_blob))
 128                 debug("%s: Failed to init pwm\n", __func__);
 129 #endif
 130 #ifdef CONFIG_LCD
 131         pin_mux_display();
 132         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 133 #endif
 134         /* boot param addr */
 135         gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 136
 137         power_det_init();
 138
 139 #ifdef CONFIG_SYS_I2C_TEGRA
 140 #ifndef CONFIG_SYS_I2C_INIT_BOARD
 141 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
 142 #endif
 143         i2c_init_board();
 144 # ifdef CONFIG_TEGRA_PMU
 145         if (pmu_set_nominal())
 146                 debug("Failed to select nominal voltages\n");
 147 #  ifdef CONFIG_TEGRA_CLOCK_SCALING
 148         err = board_emc_init();
 149         if (err)
 150                 debug("Memory controller init failed: %d\n", err);
 151 #  endif
 152 # endif /* CONFIG_TEGRA_PMU */
 153 #endif /* CONFIG_SYS_I2C_TEGRA */
 154
 155 #ifdef CONFIG_USB_EHCI_TEGRA
 156         pin_mux_usb();
 157         usb_process_devicetree(gd->fdt_blob);
 158 #endif
 159
 160 #ifdef CONFIG_LCD
 161         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 162 #endif
 163
 164 #ifdef CONFIG_TEGRA_NAND
 165         pin_mux_nand();
 166 #endif
 167
 168 #ifdef CONFIG_TEGRA_LP0
 169         /* save Sdram params to PMC 2, 4, and 24 for WB0 */
 170         warmboot_save_sdram_params();
 171
 172         /* prepare the WB code to LP0 location */
 173         warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
 174 #endif
 175
 176         return 0;
 177 }
 178
 179 #ifdef CONFIG_BOARD_EARLY_INIT_F
 180 static void __gpio_early_init(void)
 181 {
 182 }
 183
 184 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 185
 186 int board_early_init_f(void)
 187 {
 188 #if !defined(CONFIG_TEGRA20)
 189         pinmux_init();
 190 #endif
 191         board_init_uart_f();
 192
 193         /* Initialize periph GPIOs */
 194         gpio_early_init();
 195         gpio_early_init_uart();
 196 #ifdef CONFIG_LCD
 197         tegra_lcd_early_init(gd->fdt_blob);
 198 #endif
 199
 200         return 0;
 201 }
 202 #endif  /* EARLY_INIT */
 203
 204 int board_late_init(void)
 205 {
 206 #ifdef CONFIG_LCD
 207         /* Make sure we finish initing the LCD */
 208         tegra_lcd_check_next_stage(gd->fdt_blob, 1);
 209 #endif
 210         return 0;
 211 }
 212
 213 #if defined(CONFIG_TEGRA_MMC)
 214 void __pin_mux_mmc(void)
 215 {
 216 }
 217
 218 void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
 219
 220 /* this is a weak define that we are overriding */
 221 int board_mmc_init(bd_t *bd)
 222 {
 223         debug("%s called\n", __func__);
 224
 225         /* Enable muxes, etc. for SDMMC controllers */
 226         pin_mux_mmc();
 227
 228         debug("%s: init MMC\n", __func__);
 229         tegra_mmc_init();
 230
 231         return 0;
 232 }
 233
 234 void pad_init_mmc(struct mmc_host *host)
 235 {
 236 #if defined(CONFIG_TEGRA30)
 237         enum periph_id id = host->mmc_id;
 238         u32 val;
 239
 240         debug("%s: sdmmc address = %08x, id = %d\n", __func__,
 241                 (unsigned int)host->reg, id);
 242
 243         /* Set the pad drive strength for SDMMC1 or 3 only */
 244         if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
 245                 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
 246                         __func__);
 247                 return;
 248         }
 249
 250         val = readl(&host->reg->sdmemcmppadctl);
 251         val &= 0xFFFFFFF0;
 252         val |= MEMCOMP_PADCTRL_VREF;
 253         writel(val, &host->reg->sdmemcmppadctl);
 254
 255         val = readl(&host->reg->autocalcfg);
 256         val &= 0xFFFF0000;
 257         val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
 258         writel(val, &host->reg->autocalcfg);
 259 #endif  /* T30 */
 260 }
 261 #endif  /* MMC */