board/nvidia/common/board.c

   1 /*
   2  *  (C) Copyright 2010,2011
   3  *  NVIDIA Corporation <www.nvidia.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <ns16550.h>
  10 #include <linux/compiler.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/clock.h>
  13 #ifdef CONFIG_LCD
  14 #include <asm/arch/display.h>
  15 #endif
  16 #include <asm/arch/funcmux.h>
  17 #include <asm/arch/pinmux.h>
  18 #include <asm/arch/pmu.h>
  19 #ifdef CONFIG_PWM_TEGRA
  20 #include <asm/arch/pwm.h>
  21 #endif
  22 #include <asm/arch/tegra.h>
  23 #include <asm/arch-tegra/board.h>
  24 #include <asm/arch-tegra/clk_rst.h>
  25 #include <asm/arch-tegra/pmc.h>
  26 #include <asm/arch-tegra/sys_proto.h>
  27 #include <asm/arch-tegra/uart.h>
  28 #include <asm/arch-tegra/warmboot.h>
  29 #ifdef CONFIG_TEGRA_CLOCK_SCALING
  30 #include <asm/arch/emc.h>
  31 #endif
  32 #ifdef CONFIG_USB_EHCI_TEGRA
  33 #include <asm/arch-tegra/usb.h>
  34 #include <usb.h>
  35 #endif
  36 #ifdef CONFIG_TEGRA_MMC
  37 #include <asm/arch-tegra/tegra_mmc.h>
  38 #include <asm/arch-tegra/mmc.h>
  39 #endif
  40 #include <i2c.h>
  41 #include <spi.h>
  42 #include "emc.h"
  43
  44 DECLARE_GLOBAL_DATA_PTR;
  45
  46 const struct tegra_sysinfo sysinfo = {
  47         CONFIG_TEGRA_BOARD_STRING
  48 };
  49
  50 void __pinmux_init(void)
  51 {
  52 }
  53
  54 void pinmux_init(void) __attribute__((weak, alias("__pinmux_init")));
  55
  56 void __pin_mux_usb(void)
  57 {
  58 }
  59
  60 void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
  61
  62 void __pin_mux_spi(void)
  63 {
  64 }
  65
  66 void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
  67
  68 void __gpio_early_init_uart(void)
  69 {
  70 }
  71
  72 void gpio_early_init_uart(void)
  73 __attribute__((weak, alias("__gpio_early_init_uart")));
  74
  75 #if defined(CONFIG_TEGRA_NAND)
  76 void __pin_mux_nand(void)
  77 {
  78         funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
  79 }
  80
  81 void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
  82 #endif
  83
  84 void __pin_mux_display(void)
  85 {
  86 }
  87
  88 void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
  89
  90 /*
  91  * Routine: power_det_init
  92  * Description: turn off power detects
  93  */
  94 static void power_det_init(void)
  95 {
  96 #if defined(CONFIG_TEGRA20)
  97         struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
  98
  99         /* turn off power detects */
 100         writel(0, &pmc->pmc_pwr_det_latch);
 101         writel(0, &pmc->pmc_pwr_det);
 102 #endif
 103 }
 104
 105 /*
 106  * Routine: board_init
 107  * Description: Early hardware init.
 108  */
 109 int board_init(void)
 110 {
 111         __maybe_unused int err;
 112
 113         /* Do clocks and UART first so that printf() works */
 114         clock_init();
 115         clock_verify();
 116
 117 #ifdef CONFIG_FDT_SPI
 118         pin_mux_spi();
 119         spi_init();
 120 #endif
 121
 122 #ifdef CONFIG_PWM_TEGRA
 123         if (pwm_init(gd->fdt_blob))
 124                 debug("%s: Failed to init pwm\n", __func__);
 125 #endif
 126 #ifdef CONFIG_LCD
 127         pin_mux_display();
 128         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 129 #endif
 130         /* boot param addr */
 131         gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 132
 133         power_det_init();
 134
 135 #ifdef CONFIG_SYS_I2C_TEGRA
 136 #ifndef CONFIG_SYS_I2C_INIT_BOARD
 137 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
 138 #endif
 139         i2c_init_board();
 140 # ifdef CONFIG_TEGRA_PMU
 141         if (pmu_set_nominal())
 142                 debug("Failed to select nominal voltages\n");
 143 #  ifdef CONFIG_TEGRA_CLOCK_SCALING
 144         err = board_emc_init();
 145         if (err)
 146                 debug("Memory controller init failed: %d\n", err);
 147 #  endif
 148 # endif /* CONFIG_TEGRA_PMU */
 149 #endif /* CONFIG_SYS_I2C_TEGRA */
 150
 151 #ifdef CONFIG_USB_EHCI_TEGRA
 152         pin_mux_usb();
 153         usb_process_devicetree(gd->fdt_blob);
 154 #endif
 155
 156 #ifdef CONFIG_LCD
 157         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 158 #endif
 159
 160 #ifdef CONFIG_TEGRA_NAND
 161         pin_mux_nand();
 162 #endif
 163
 164 #ifdef CONFIG_TEGRA_LP0
 165         /* save Sdram params to PMC 2, 4, and 24 for WB0 */
 166         warmboot_save_sdram_params();
 167
 168         /* prepare the WB code to LP0 location */
 169         warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
 170 #endif
 171
 172         return 0;
 173 }
 174
 175 #ifdef CONFIG_BOARD_EARLY_INIT_F
 176 static void __gpio_early_init(void)
 177 {
 178 }
 179
 180 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 181
 182 int board_early_init_f(void)
 183 {
 184         pinmux_init();
 185         board_init_uart_f();
 186
 187         /* Initialize periph GPIOs */
 188         gpio_early_init();
 189         gpio_early_init_uart();
 190 #ifdef CONFIG_LCD
 191         tegra_lcd_early_init(gd->fdt_blob);
 192 #endif
 193
 194         return 0;
 195 }
 196 #endif  /* EARLY_INIT */
 197
 198 int board_late_init(void)
 199 {
 200 #ifdef CONFIG_LCD
 201         /* Make sure we finish initing the LCD */
 202         tegra_lcd_check_next_stage(gd->fdt_blob, 1);
 203 #endif
 204         return 0;
 205 }
 206
 207 #if defined(CONFIG_TEGRA_MMC)
 208 void __pin_mux_mmc(void)
 209 {
 210 }
 211
 212 void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
 213
 214 /* this is a weak define that we are overriding */
 215 int board_mmc_init(bd_t *bd)
 216 {
 217         debug("%s called\n", __func__);
 218
 219         /* Enable muxes, etc. for SDMMC controllers */
 220         pin_mux_mmc();
 221
 222         debug("%s: init MMC\n", __func__);
 223         tegra_mmc_init();
 224
 225         return 0;
 226 }
 227
 228 void pad_init_mmc(struct mmc_host *host)
 229 {
 230 #if defined(CONFIG_TEGRA30)
 231         enum periph_id id = host->mmc_id;
 232         u32 val;
 233
 234         debug("%s: sdmmc address = %08x, id = %d\n", __func__,
 235                 (unsigned int)host->reg, id);
 236
 237         /* Set the pad drive strength for SDMMC1 or 3 only */
 238         if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
 239                 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
 240                         __func__);
 241                 return;
 242         }
 243
 244         val = readl(&host->reg->sdmemcmppadctl);
 245         val &= 0xFFFFFFF0;
 246         val |= MEMCOMP_PADCTRL_VREF;
 247         writel(val, &host->reg->sdmemcmppadctl);
 248
 249         val = readl(&host->reg->autocalcfg);
 250         val &= 0xFFFF0000;
 251         val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
 252         writel(val, &host->reg->autocalcfg);
 253 #endif  /* T30 */
 254 }
 255 #endif  /* MMC */