board/omap1610inn/omap1610innovator.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8  *
   9  * (C) Copyright 2003
  10  * Texas Instruments, <www.ti.com>
  11  * Kshitij Gupta <Kshitij@ti.com>
  12  *
  13  * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
  14  *
  15  * See file CREDITS for list of people who contributed to this
  16  * project.
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License as
  20  * published by the Free Software Foundation; either version 2 of
  21  * the License, or (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31  * MA 02111-1307 USA
  32  */
  33
  34 #include <common.h>
  35 #if defined(CONFIG_OMAP1610)
  36 #include <./configs/omap1510.h>
  37 #endif
  38
  39 DECLARE_GLOBAL_DATA_PTR;
  40
  41 #ifdef CONFIG_CS_AUTOBOOT
  42 unsigned long omap_flash_base;
  43 #endif
  44
  45 void flash__init (void);
  46 void ether__init (void);
  47 void set_muxconf_regs (void);
  48 void peripheral_power_enable (void);
  49
  50 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  51
  52 static inline void delay (unsigned long loops)
  53 {
  54         __asm__ volatile ("1:\n"
  55                 "subs %0, %1, #1\n"
  56                 "bne 1b":"=r" (loops):"0" (loops));
  57 }
  58
  59 /*
  60  * Miscellaneous platform dependent initialisations
  61  */
  62
  63 int board_init (void)
  64 {
  65         if (machine_is_omap_h2())
  66                 gd->bd->bi_arch_number = MACH_TYPE_OMAP_H2;
  67         else if (machine_is_omap_innovator())
  68                 gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR;
  69         else
  70                 gd->bd->bi_arch_number = MACH_TYPE_OMAP_GENERIC;
  71
  72         /* adress of boot parameters */
  73         gd->bd->bi_boot_params = 0x10000100;
  74
  75         /* Configure MUX settings */
  76         set_muxconf_regs ();
  77         peripheral_power_enable ();
  78
  79 /* this speeds up your boot a quite a bit.  However to make it
  80  *  work, you need make sure your kernel startup flush bug is fixed.
  81  *  ... rkw ...
  82  */
  83         icache_enable ();
  84
  85         flash__init ();
  86         ether__init ();
  87         return 0;
  88 }
  89
  90
  91 int misc_init_r (void)
  92 {
  93         /* currently empty */
  94         return (0);
  95 }
  96
  97 /******************************
  98  Routine:
  99  Description:
 100 ******************************/
 101 void flash__init (void)
 102 {
 103 #define EMIFS_GlB_Config_REG 0xfffecc0c
 104         unsigned int regval;
 105
 106 #ifdef CONFIG_CS_AUTOBOOT
 107          /* Check swapping of CS0 and CS3, set flash base accordingly */
 108         omap_flash_base = ((*((u32 *)OMAP_EMIFS_CONFIG_REG) & 0x02) == 0) ?
 109                                         PHYS_FLASH_1_BM0 : PHYS_FLASH_1_BM1;
 110 #endif
 111         regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
 112         /* Turn off write protection for flash devices. */
 113         regval = regval | 0x0001;
 114         *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
 115 }
 116 /*************************************************************
 117  Routine:ether__init
 118  Description: take the Ethernet controller out of reset and wait
 119                            for the EEPROM load to complete.
 120 *************************************************************/
 121 void ether__init (void)
 122 {
 123 #define ETH_CONTROL_REG 0x0400030b
 124
 125 #ifdef CONFIG_H2_OMAP1610
 126         #define LAN_RESET_REGISTER 0x0400001c
 127
 128         /* The debug board on which the lan chip resides may not be powered
 129          * ON at the same time as the OMAP chip. So wait in a loop until the
 130          * lan reset register (on the debug board) is available (powered on)
 131          * and reset the lan chip.
 132          */
 133
 134         *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 135         do {
 136                 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
 137                 udelay (3);
 138         } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
 139
 140         do {
 141                 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 142                 udelay (3);
 143         } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
 144 #endif
 145
 146         *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
 147         udelay (3);
 148 }
 149
 150 /******************************
 151  Routine:
 152  Description:
 153 ******************************/
 154 int dram_init (void)
 155 {
 156         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 157         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 158
 159         return 0;
 160 }
 161
 162 /******************************************************
 163  Routine: set_muxconf_regs
 164  Description: Setting up the configuration Mux registers
 165                           specific to the hardware
 166 *******************************************************/
 167 void set_muxconf_regs (void)
 168 {
 169         volatile unsigned int *MuxConfReg;
 170         /* set each registers to its reset value; */
 171         MuxConfReg =
 172                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
 173         /* setup for UART1 */
 174         *MuxConfReg &= ~(0x02000000);   /* bit 25 */
 175         /* setup for UART2 */
 176         *MuxConfReg &= ~(0x01000000);   /* bit 24 */
 177         /* Disable Uwire CS Hi-Z */
 178         *MuxConfReg |= 0x08000000;
 179         MuxConfReg =
 180                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
 181         *MuxConfReg = 0x00000000;
 182         MuxConfReg =
 183                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
 184         *MuxConfReg = 0x00000000;
 185         MuxConfReg =
 186                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
 187         *MuxConfReg = 0x00000000;
 188         MuxConfReg =
 189                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
 190         /*setup mux for UART3 */
 191         *MuxConfReg |= 0x00000001;      /* bit3, 1, 0 (mux0 5,5,26) */
 192         *MuxConfReg &= ~0x0000003e;
 193         MuxConfReg =
 194                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
 195         *MuxConfReg = 0x00000000;
 196         MuxConfReg =
 197                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
 198         /* Disable Uwire CS Hi-Z */
 199         *MuxConfReg |= 0x00001200;      /*bit 9 for CS0 12 for CS3 */
 200         MuxConfReg =
 201                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
 202         /*  Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the  */
 203         /*  hardware will actually use TX and RTS based on bit 25 in  */
 204         /*  FUNC_MUX_CTRL_0.  I told you this thing was screwy!  */
 205         *MuxConfReg |= 0x00201000;
 206         MuxConfReg =
 207                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
 208         *MuxConfReg = 0x00000000;
 209         MuxConfReg =
 210                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
 211         *MuxConfReg = 0x00000000;
 212         MuxConfReg =
 213                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
 214         /* setup for UART2 */
 215         /*  Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the  */
 216         /*  hardware will actually use TX and RTS based on bit 24 in  */
 217         /*  FUNC_MUX_CTRL_0. */
 218         *MuxConfReg |= 0x09000000;
 219         MuxConfReg =
 220                 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
 221         *MuxConfReg = 0x00000000;
 222         MuxConfReg =
 223                 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
 224         *MuxConfReg = 0x00000000;
 225         /* mux setup for SD/MMC driver */
 226         MuxConfReg =
 227                 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
 228         *MuxConfReg &= 0xFFFE0FFF;
 229         MuxConfReg =
 230                 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
 231         *MuxConfReg = 0x00000000;
 232         MuxConfReg =
 233                 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
 234         /* bit 13 for MMC2 XOR_CLK */
 235         *MuxConfReg &= ~(0x00002000);
 236         /* bit 29 for UART 1 */
 237         *MuxConfReg &= ~(0x00002000);
 238         MuxConfReg =
 239                 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
 240         /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
 241         *MuxConfReg |= 0x000C0000;
 242         MuxConfReg =
 243                 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
 244         *MuxConfReg &= ~(0x00000070);
 245         *MuxConfReg &= ~(0x00000008);
 246         *MuxConfReg |= 0x00000003;
 247         *MuxConfReg |= 0x00000180;
 248         MuxConfReg =
 249                 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
 250         /* bit 17, software controls VBUS */
 251         *MuxConfReg &= ~(0x00020000);
 252         /* Enable USB 48 and 12M clocks */
 253         *MuxConfReg |= 0x00000200;
 254         *MuxConfReg &= ~(0x00000180);
 255         /*2.75V for MMCSDIO1 */
 256         MuxConfReg =
 257                 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
 258         *MuxConfReg = 0x00001FE7;
 259         MuxConfReg =
 260                 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
 261         *MuxConfReg = 0x00000000;
 262         MuxConfReg =
 263                 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
 264         *MuxConfReg = 0x00000000;
 265         MuxConfReg =
 266                 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
 267         *MuxConfReg = 0x00000000;
 268         MuxConfReg =
 269                 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
 270         *MuxConfReg = 0x00000000;
 271         MuxConfReg =
 272                 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
 273         *MuxConfReg = 0x00000000;
 274         MuxConfReg =
 275                 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
 276         *MuxConfReg = 0x00000000;
 277         /* Turn on UART2 48 MHZ clock */
 278         MuxConfReg =
 279                 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
 280         *MuxConfReg |= 0x40000000;
 281         MuxConfReg =
 282                 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
 283         /* setup for USB VBus detection OMAP161x */
 284         *MuxConfReg |= 0x00040000;      /* bit 18 */
 285         MuxConfReg =
 286                 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
 287         /* PullUps for SD/MMC driver */
 288         *MuxConfReg |= ~(0xFFFE0FFF);
 289         MuxConfReg =
 290                 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
 291         *MuxConfReg = COMP_MODE_ENABLE;
 292 }
 293
 294 /******************************************************
 295  Routine: peripheral_power_enable
 296  Description: Enable the power for UART1
 297 *******************************************************/
 298 void peripheral_power_enable (void)
 299 {
 300 #define UART1_48MHZ_ENABLE      ((unsigned short)0x0200)
 301 #define SW_CLOCK_REQUEST        ((volatile unsigned short *)0xFFFE0834)
 302
 303         *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
 304 }