board/pcs440ep/init.S

   1 /*
   2  * (C) Copyright 2006
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <asm-offsets.h>
   9 #include <ppc_asm.tmpl>
  10 #include <asm/mmu.h>
  11 #include <config.h>
  12
  13 /**************************************************************************
  14  * TLB TABLE
  15  *
  16  * This table is used by the cpu boot code to setup the initial tlb
  17  * entries. Rather than make broad assumptions in the cpu source tree,
  18  * this table lets each board set things up however they like.
  19  *
  20  *  Pointer to the table is returned in r1
  21  *
  22  *************************************************************************/
  23
  24     .section .bootpg,"ax"
  25     .globl tlbtab
  26
  27 tlbtab:
  28         tlbtab_start
  29
  30         /*
  31          * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
  32          * speed up boot process. It is patched after relocation to enable SA_I
  33          */
  34         tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/)
  35
  36         /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
  37         tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G )
  38
  39         /*
  40          * TLB entries for SDRAM are not needed on this platform.
  41          * They are dynamically generated in the SPD DDR detection
  42          * routine.
  43          */
  44
  45         tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG )
  46
  47         /* PCI */
  48         tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG )
  49         tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG )
  50         tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG )
  51         tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG )
  52
  53         /* USB 2.0 Device */
  54         tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG )
  55
  56         tlbtab_end