]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/pcs440ep/pcs440ep.c
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/processor.h>
30 #include <spd_sdram.h>
31 #include <status_led.h>
35 DECLARE_GLOBAL_DATA_PTR
;
37 extern flash_info_t flash_info
[CFG_MAX_FLASH_BANKS
]; /* info for FLASH chips */
39 unsigned char sha1_checksum
[SHA1_SUM_LEN
];
41 /* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
42 unsigned char swapbits
[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
43 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
45 static void set_leds (int val
)
47 out32(GPIO0_OR
, (in32 (GPIO0_OR
) & ~0x78000000) | (val
<< 27));
50 #define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
52 void __led_init (led_id_t mask
, int state
)
56 if (state
== STATUS_LED_ON
)
63 void __led_set (led_id_t mask
, int state
)
67 if (state
== STATUS_LED_ON
)
69 else if (state
== STATUS_LED_OFF
)
74 void __led_toggle (led_id_t mask
)
82 static void status_led_blink (void)
87 /* set all LED which are on, to state BLINKING */
88 for (i
= 0; i
< 4; i
++) {
89 if (val
& 0x01) status_led_set (3 - i
, STATUS_LED_BLINKING
);
90 else status_led_set (3 - i
, STATUS_LED_OFF
);
95 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
96 void show_boot_progress (int val
)
98 /* find all valid Codes for val in README */
99 if (val
== -30) return;
101 /* smthing goes wrong */
107 /* validating Image */
108 status_led_set (0, STATUS_LED_OFF
);
109 status_led_set (1, STATUS_LED_ON
);
110 status_led_set (2, STATUS_LED_ON
);
114 status_led_set (0, STATUS_LED_ON
);
115 status_led_set (1, STATUS_LED_ON
);
116 status_led_set (2, STATUS_LED_ON
);
120 /* starting Ethernet configuration */
121 status_led_set (0, STATUS_LED_OFF
);
122 status_led_set (1, STATUS_LED_OFF
);
123 status_led_set (2, STATUS_LED_ON
);
128 status_led_set (0, STATUS_LED_ON
);
129 status_led_set (1, STATUS_LED_OFF
);
130 status_led_set (2, STATUS_LED_ON
);
136 int board_early_init_f(void)
140 set_leds(0); /* display boot info counter */
142 /*--------------------------------------------------------------------
143 * Setup the external bus controller/chip selects
144 *-------------------------------------------------------------------*/
145 mtdcr(ebccfga
, xbcfg
);
146 reg
= mfdcr(ebccfgd
);
147 mtdcr(ebccfgd
, reg
| 0x04000000); /* Set ATC */
149 /*--------------------------------------------------------------------
150 * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c
151 * via define from board config file.
152 *-------------------------------------------------------------------*/
154 /*--------------------------------------------------------------------
155 * Setup the interrupt controller polarities, triggers, etc.
156 *-------------------------------------------------------------------*/
157 mtdcr(uic0sr
, 0xffffffff); /* clear all */
158 mtdcr(uic0er
, 0x00000000); /* disable all */
159 mtdcr(uic0cr
, 0x00000001); /* UIC1 crit is critical */
160 mtdcr(uic0pr
, 0xfffffe1f); /* per ref-board manual */
161 mtdcr(uic0tr
, 0x01c00000); /* per ref-board manual */
162 mtdcr(uic0vr
, 0x00000001); /* int31 highest, base=0x000 */
163 mtdcr(uic0sr
, 0xffffffff); /* clear all */
165 mtdcr(uic1sr
, 0xffffffff); /* clear all */
166 mtdcr(uic1er
, 0x00000000); /* disable all */
167 mtdcr(uic1cr
, 0x00000000); /* all non-critical */
168 mtdcr(uic1pr
, 0xffffe0ff); /* per ref-board manual */
169 mtdcr(uic1tr
, 0x00ffc000); /* per ref-board manual */
170 mtdcr(uic1vr
, 0x00000001); /* int31 highest, base=0x000 */
171 mtdcr(uic1sr
, 0xffffffff); /* clear all */
173 /*--------------------------------------------------------------------
174 * Setup other serial configuration
175 *-------------------------------------------------------------------*/
176 mfsdr(sdr_pci0
, reg
);
177 mtsdr(sdr_pci0
, 0x80000000 | reg
); /* PCI arbiter enabled */
178 mtsdr(sdr_pfc0
, 0x00000000); /* Pin function: enable GPIO49-63 */
179 mtsdr(sdr_pfc1
, 0x00048000); /* Pin function: UART0 has 4 pins, select IRQ5 */
184 #define EEPROM_LEN 256
185 void load_sernum_ethaddr (void)
188 char buf
[EEPROM_LEN
];
191 u16 checksumcrc16
= 0;
193 /* read the MACs from EEprom */
194 status_led_set (0, STATUS_LED_ON
);
195 status_led_set (1, STATUS_LED_ON
);
196 ret
= eeprom_read (CFG_I2C_EEPROM_ADDR
, 0, (uchar
*)buf
, EEPROM_LEN
);
198 checksumcrc16
= cyg_crc16 ((uchar
*)buf
, EEPROM_LEN
- 2);
199 /* check, if the EEprom is programmed:
200 * - The Prefix(Byte 0,1,2) is equal to "ATR"
201 * - The checksum, stored in the last 2 Bytes, is correct
203 if ((strncmp (buf
,"ATR",3) != 0) ||
204 ((checksumcrc16
>> 8) != buf
[EEPROM_LEN
- 2]) ||
205 ((checksumcrc16
& 0xff) != buf
[EEPROM_LEN
- 1])) {
206 /* EEprom is not programmed */
207 printf("%s: EEPROM Checksum not OK\n", __FUNCTION__
);
210 sprintf (mac
, "%02x:%02x:%02x:%02x:%02x:%02x",
217 setenv ("ethaddr", (char *) mac
);
218 sprintf (mac
, "%02x:%02x:%02x:%02x:%02x:%02x",
225 setenv ("eth1addr", (char *) mac
);
230 /* some error reading the EEprom */
231 if ((use_eeprom
= getenv ("use_eeprom_ethaddr")) == NULL
) {
232 /* dont use bootcmd */
233 setenv("bootdelay", "-1");
236 /* == default ? use standard */
237 if (strncmp (use_eeprom
, "default", 7) == 0) {
240 /* Env doesnt exist -> hang */
242 /* here we do this "handy" because we have no interrupts
244 puts ("### EEPROM ERROR ### Please RESET the board ###\n");
252 #ifdef CONFIG_PREBOOT
254 static uchar kbd_magic_prefix
[] = "key_magic";
255 static uchar kbd_command_prefix
[] = "key_cmd";
262 struct kbd_data_t
* get_keys (struct kbd_data_t
*kbd_data
)
267 /* use the DIPs for some bootoptions */
268 val
= getenv (ENV_NAME_DIP
);
269 tmp
= simple_strtoul (val
, NULL
, 16);
271 kbd_data
->s2
= (tmp
& 0x0f);
272 kbd_data
->s1
= (tmp
& 0xf0) >> 4;
276 static int compare_magic (const struct kbd_data_t
*kbd_data
, char *str
)
280 if (s1
>= '0' && s1
<= '9')
282 else if (s1
>= 'a' && s1
<= 'f')
284 else if (s1
>= 'A' && s1
<= 'F')
289 if (s1
!= kbd_data
->s1
) return -1;
292 if (s1
>= '0' && s1
<= '9')
294 else if (s1
>= 'a' && s1
<= 'f')
296 else if (s1
>= 'A' && s1
<= 'F')
301 if (s1
!= kbd_data
->s2
) return -1;
305 static char *key_match (const struct kbd_data_t
*kbd_data
)
307 char magic
[sizeof (kbd_magic_prefix
) + 1];
309 char *kbd_magic_keys
;
312 * The following string defines the characters that can be appended
313 * to "key_magic" to form the names of environment variables that
314 * hold "magic" key codes, i. e. such key codes that can cause
315 * pre-boot actions. If the string is empty (""), then only
316 * "key_magic" is checked (old behaviour); the string "125" causes
317 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
319 if ((kbd_magic_keys
= getenv ("magic_keys")) == NULL
)
322 /* loop over all magic keys;
323 * use '\0' suffix in case of empty string
325 for (suffix
= kbd_magic_keys
; *suffix
||
326 suffix
== kbd_magic_keys
; ++suffix
) {
327 sprintf (magic
, "%s%c", kbd_magic_prefix
, *suffix
);
328 if (compare_magic (kbd_data
, getenv (magic
)) == 0) {
329 char cmd_name
[sizeof (kbd_command_prefix
) + 1];
332 sprintf (cmd_name
, "%s%c", kbd_command_prefix
, *suffix
);
333 cmd
= getenv (cmd_name
);
341 #endif /* CONFIG_PREBOOT */
343 static int pcs440ep_readinputs (void)
348 /* read the inputs and set the Envvars */
349 /* Revision Level Bit 26 - 29 */
350 i
= ((in32 (GPIO0_IR
) & 0x0000003c) >> 2);
352 sprintf (value
, "%02x", i
);
353 setenv (ENV_NAME_REVLEV
, value
);
354 /* Solder Switch Bit 30 - 33 */
355 i
= (in32 (GPIO0_IR
) & 0x00000003) << 2;
356 i
+= (in32 (GPIO1_IR
) & 0xc0000000) >> 30;
358 sprintf (value
, "%02x", i
);
359 setenv (ENV_NAME_SOLDER
, value
);
360 /* DIP Switch Bit 49 - 56 */
361 i
= ((in32 (GPIO1_IR
) & 0x00007f80) >> 7);
362 i
= (swapbits
[i
& 0x0f] << 4) + swapbits
[(i
& 0xf0) >> 4];
363 sprintf (value
, "%02x", i
);
364 setenv (ENV_NAME_DIP
, value
);
369 #if defined(CONFIG_SHA1_CHECK_UB_IMG)
370 /*************************************************************************
371 * calculate a SHA1 sum for the U-Boot image in Flash.
373 ************************************************************************/
374 static int pcs440ep_sha1 (int docheck
)
377 unsigned char *ptroff
;
378 unsigned char output
[20];
379 unsigned char org
[20];
380 int i
, len
= CONFIG_SHA1_LEN
;
382 memcpy ((char *)CFG_LOAD_ADDR
, (char *)CONFIG_SHA1_START
, len
);
383 data
= (unsigned char *)CFG_LOAD_ADDR
;
384 ptroff
= &data
[len
+ SHA1_SUM_POS
];
386 for (i
= 0; i
< SHA1_SUM_LEN
; i
++) {
391 sha1_csum ((unsigned char *) data
, len
, (unsigned char *)output
);
394 for (i
= 0; i
< 20 ; i
++) {
395 printf("%02X ", output
[i
]);
400 for (i
= 0; i
< 20 ; i
++) {
401 if (org
[i
] != output
[i
]) return 1;
407 /*************************************************************************
408 * do some checks after the SHA1 checksum from the U-Boot Image was
411 ************************************************************************/
412 static void pcs440ep_checksha1 (void)
417 status_led_set (0, STATUS_LED_OFF
);
418 status_led_set (1, STATUS_LED_OFF
);
419 status_led_set (2, STATUS_LED_ON
);
420 ret
= pcs440ep_sha1 (1);
421 if (ret
== 0) return;
423 if ((cs_test
= getenv ("cs_test")) == NULL
) {
424 /* Env doesnt exist -> hang */
426 /* here we do this "handy" because we have no interrupts
428 puts ("### SHA1 ERROR ### Please RESET the board ###\n");
435 if (strncmp (cs_test
, "off", 3) == 0) {
436 printf ("SHA1 U-Boot sum NOT ok!\n");
437 setenv ("bootdelay", "-1");
441 static __inline__
void pcs440ep_checksha1 (void) { do {} while (0);}
444 int misc_init_r (void)
449 /* Re-do sizing to get full correct info */
450 mtdcr(ebccfga
, pb0cr
);
451 pbcr
= mfdcr(ebccfgd
);
452 switch (gd
->bd
->bi_flashsize
) {
478 pbcr
= (pbcr
& 0x0001ffff) | gd
->bd
->bi_flashstart
| (size_val
<< 17);
479 mtdcr(ebccfga
, pb0cr
);
480 mtdcr(ebccfgd
, pbcr
);
482 /* adjust flash start and offset */
483 gd
->bd
->bi_flashstart
= 0 - gd
->bd
->bi_flashsize
;
484 gd
->bd
->bi_flashoffset
= 0;
486 /* Monitor protection ON by default */
487 (void)flash_protect(FLAG_PROTECT_SET
,
492 /* Env protection ON by default */
493 (void)flash_protect(FLAG_PROTECT_SET
,
495 CFG_ENV_ADDR_REDUND
+ 2*CFG_ENV_SECT_SIZE
- 1,
498 pcs440ep_readinputs ();
499 pcs440ep_checksha1 ();
500 #ifdef CONFIG_PREBOOT
502 struct kbd_data_t kbd_data
;
504 char *str
= strdup (key_match (get_keys (&kbd_data
)));
505 /* Set or delete definition */
506 setenv ("preboot", str
);
509 #endif /* CONFIG_PREBOOT */
515 char *s
= getenv("serial#");
517 printf("Board: PCS440EP");
527 void spd_ddr_init_hang (void)
529 status_led_set (0, STATUS_LED_OFF
);
530 status_led_set (1, STATUS_LED_ON
);
531 /* we cannot use hang() because we are still running from
532 Flash, and so the status_led driver is not initialized */
533 puts ("### SDRAM ERROR ### Please RESET the board ###\n");
540 long int initdram (int board_type
)
544 status_led_set (0, STATUS_LED_ON
);
545 status_led_set (1, STATUS_LED_OFF
);
546 dram_size
= spd_sdram();
547 status_led_set (0, STATUS_LED_OFF
);
548 status_led_set (1, STATUS_LED_ON
);
549 if (dram_size
== 0) {
556 #if defined(CFG_DRAM_TEST)
559 unsigned long *mem
= (unsigned long *)0;
560 const unsigned long kend
= (1024 / sizeof(unsigned long));
565 for (k
= 0; k
< CFG_KBYTES_SDRAM
;
566 ++k
, mem
+= (1024 / sizeof(unsigned long))) {
567 if ((k
& 1023) == 0) {
568 printf("%3d MB\r", k
/ 1024);
571 memset(mem
, 0xaaaaaaaa, 1024);
572 for (n
= 0; n
< kend
; ++n
) {
573 if (mem
[n
] != 0xaaaaaaaa) {
574 printf("SDRAM test fails at: %08x\n",
580 memset(mem
, 0x55555555, 1024);
581 for (n
= 0; n
< kend
; ++n
) {
582 if (mem
[n
] != 0x55555555) {
583 printf("SDRAM test fails at: %08x\n",
589 printf("SDRAM test passes\n");
594 /*************************************************************************
597 * This routine is called just prior to registering the hose and gives
598 * the board the opportunity to check things. Returning a value of zero
599 * indicates that things are bad & PCI initialization should be aborted.
601 * Different boards may wish to customize the pci controller structure
602 * (add regions, override default access routines, etc) or perform
603 * certain pre-initialization actions.
605 ************************************************************************/
606 #if defined(CONFIG_PCI)
607 int pci_pre_init(struct pci_controller
*hose
)
611 /*-------------------------------------------------------------------------+
612 | Set priority for all PLB3 devices to 0.
613 | Set PLB3 arbiter to fair mode.
614 +-------------------------------------------------------------------------*/
615 mfsdr(sdr_amp1
, addr
);
616 mtsdr(sdr_amp1
, (addr
& 0x000000FF) | 0x0000FF00);
617 addr
= mfdcr(plb3_acr
);
618 mtdcr(plb3_acr
, addr
| 0x80000000);
620 /*-------------------------------------------------------------------------+
621 | Set priority for all PLB4 devices to 0.
622 +-------------------------------------------------------------------------*/
623 mfsdr(sdr_amp0
, addr
);
624 mtsdr(sdr_amp0
, (addr
& 0x000000FF) | 0x0000FF00);
625 addr
= mfdcr(plb4_acr
) | 0xa0000000; /* Was 0x8---- */
626 mtdcr(plb4_acr
, addr
);
628 /*-------------------------------------------------------------------------+
629 | Set Nebula PLB4 arbiter to fair mode.
630 +-------------------------------------------------------------------------*/
632 addr
= (mfdcr(plb0_acr
) & ~plb0_acr_ppm_mask
) | plb0_acr_ppm_fair
;
633 addr
= (addr
& ~plb0_acr_hbu_mask
) | plb0_acr_hbu_enabled
;
634 addr
= (addr
& ~plb0_acr_rdp_mask
) | plb0_acr_rdp_4deep
;
635 addr
= (addr
& ~plb0_acr_wrp_mask
) | plb0_acr_wrp_2deep
;
636 mtdcr(plb0_acr
, addr
);
639 addr
= (mfdcr(plb1_acr
) & ~plb1_acr_ppm_mask
) | plb1_acr_ppm_fair
;
640 addr
= (addr
& ~plb1_acr_hbu_mask
) | plb1_acr_hbu_enabled
;
641 addr
= (addr
& ~plb1_acr_rdp_mask
) | plb1_acr_rdp_4deep
;
642 addr
= (addr
& ~plb1_acr_wrp_mask
) | plb1_acr_wrp_2deep
;
643 mtdcr(plb1_acr
, addr
);
647 #endif /* defined(CONFIG_PCI) */
649 /*************************************************************************
652 * The bootstrap configuration provides default settings for the pci
653 * inbound map (PIM). But the bootstrap config choices are limited and
654 * may not be sufficient for a given board.
656 ************************************************************************/
657 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
658 void pci_target_init(struct pci_controller
*hose
)
660 /*--------------------------------------------------------------------------+
661 * Set up Direct MMIO registers
662 *--------------------------------------------------------------------------*/
663 /*--------------------------------------------------------------------------+
664 | PowerPC440 EP PCI Master configuration.
665 | Map one 1Gig range of PLB/processor addresses to PCI memory space.
666 | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
667 | Use byte reversed out routines to handle endianess.
668 | Make this region non-prefetchable.
669 +--------------------------------------------------------------------------*/
670 out32r(PCIX0_PMM0MA
, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
671 out32r(PCIX0_PMM0LA
, CFG_PCI_MEMBASE
); /* PMM0 Local Address */
672 out32r(PCIX0_PMM0PCILA
, CFG_PCI_MEMBASE
); /* PMM0 PCI Low Address */
673 out32r(PCIX0_PMM0PCIHA
, 0x00000000); /* PMM0 PCI High Address */
674 out32r(PCIX0_PMM0MA
, 0xE0000001); /* 512M + No prefetching, and enable region */
676 out32r(PCIX0_PMM1MA
, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
677 out32r(PCIX0_PMM1LA
, CFG_PCI_MEMBASE2
); /* PMM0 Local Address */
678 out32r(PCIX0_PMM1PCILA
, CFG_PCI_MEMBASE2
); /* PMM0 PCI Low Address */
679 out32r(PCIX0_PMM1PCIHA
, 0x00000000); /* PMM0 PCI High Address */
680 out32r(PCIX0_PMM1MA
, 0xE0000001); /* 512M + No prefetching, and enable region */
682 out32r(PCIX0_PTM1MS
, 0x00000001); /* Memory Size/Attribute */
683 out32r(PCIX0_PTM1LA
, 0); /* Local Addr. Reg */
684 out32r(PCIX0_PTM2MS
, 0); /* Memory Size/Attribute */
685 out32r(PCIX0_PTM2LA
, 0); /* Local Addr. Reg */
687 /*--------------------------------------------------------------------------+
688 * Set up Configuration registers
689 *--------------------------------------------------------------------------*/
691 /* Program the board's subsystem id/vendor id */
692 pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID
,
693 CFG_PCI_SUBSYS_VENDORID
);
694 pci_write_config_word(0, PCI_SUBSYSTEM_ID
, CFG_PCI_SUBSYS_ID
);
696 /* Configure command register as bus master */
697 pci_write_config_word(0, PCI_COMMAND
, PCI_COMMAND_MASTER
);
699 /* 240nS PCI clock */
700 pci_write_config_word(0, PCI_LATENCY_TIMER
, 1);
702 /* No error reporting */
703 pci_write_config_word(0, PCI_ERREN
, 0);
705 pci_write_config_dword(0, PCI_BRDGOPT2
, 0x00000101);
708 #endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
710 /*************************************************************************
713 ************************************************************************/
714 #if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
715 void pci_master_init(struct pci_controller
*hose
)
717 unsigned short temp_short
;
719 /*--------------------------------------------------------------------------+
720 | Write the PowerPC440 EP PCI Configuration regs.
721 | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
722 | Enable PowerPC440 EP to act as a PCI memory target (PTM).
723 +--------------------------------------------------------------------------*/
724 pci_read_config_word(0, PCI_COMMAND
, &temp_short
);
725 pci_write_config_word(0, PCI_COMMAND
,
726 temp_short
| PCI_COMMAND_MASTER
|
729 #endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
731 /*************************************************************************
734 * This routine is called to determine if a pci scan should be
735 * performed. With various hardware environments (especially cPCI and
736 * PPMC) it's insufficient to depend on the state of the arbiter enable
737 * bit in the strap register, or generic host/adapter assumptions.
739 * Rather than hard-code a bad assumption in the general 440 code, the
740 * 440 pci code requires the board to decide at runtime.
742 * Return 0 for adapter mode, non-zero for host (monarch) mode.
745 ************************************************************************/
746 #if defined(CONFIG_PCI)
747 int is_pci_host(struct pci_controller
*hose
)
749 /* PCS440EP is always configured as host. */
752 #endif /* defined(CONFIG_PCI) */
754 /*************************************************************************
757 * This routine is called to reset (keep alive) the watchdog timer
759 ************************************************************************/
760 #if defined(CONFIG_HW_WATCHDOG)
761 void hw_watchdog_reset(void)
767 /*************************************************************************
768 * "led" Commando for the U-Boot shell
770 ************************************************************************/
771 int do_led (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
776 pattern
= simple_strtoul (argv
[1], NULL
, 16);
777 if (pattern
> 0x400) {
779 printf ("led: %x\n", val
);
782 if (pattern
> 0x200) {
787 if (pattern
> 0x100) {
792 for (i
= 0; i
< 4; i
++) {
793 if (pattern
& 0x01) status_led_set (i
, STATUS_LED_ON
);
794 else status_led_set (i
, STATUS_LED_OFF
);
795 pattern
= pattern
>> 1;
802 "led [bitmask] - set the DIAG-LED\n",
803 "[bitmask] 0x01 = DIAG 1 on\n"
804 " 0x02 = DIAG 2 on\n"
805 " 0x04 = DIAG 3 on\n"
806 " 0x08 = DIAG 4 on\n"
807 " > 0x100 set the LED, who are on, to state blinking\n"
810 #if defined(CONFIG_SHA1_CHECK_UB_IMG)
811 /*************************************************************************
812 * "sha1" Commando for the U-Boot shell
814 ************************************************************************/
815 int do_sha1 (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char *argv
[])
821 printf ("Usage:\n%s\n", cmdtp
->usage
);
827 unsigned char output
[20];
831 data
= (unsigned char *)simple_strtoul (argv
[1], NULL
, 16);
832 len
= simple_strtoul (argv
[2], NULL
, 16);
833 sha1_csum (data
, len
, (unsigned char *)output
);
834 printf ("U-Boot sum:\n");
835 for (i
= 0; i
< 20 ; i
++) {
836 printf ("%02X ", output
[i
]);
840 data
= (unsigned char *)simple_strtoul (argv
[3], NULL
, 16);
841 memcpy (data
, output
, 20);
847 if (*ptr
!= '-') goto usage
;
849 if ((*ptr
== 'c') || (*ptr
== 'C')) {
850 rcode
= pcs440ep_sha1 (1);
851 printf ("SHA1 U-Boot sum %sok!\n", (rcode
!= 0) ? "not " : "");
852 } else if ((*ptr
== 'p') || (*ptr
== 'P')) {
853 rcode
= pcs440ep_sha1 (2);
855 rcode
= pcs440ep_sha1 (0);
864 "sha1 - calculate the SHA1 Sum\n",
865 "address len [addr] calculate the SHA1 sum [save at addr]\n"
866 " -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
867 " -c check the U-Boot image in flash\n"
871 #if defined (CONFIG_CMD_IDE)
872 /* These addresses need to be shifted one place to the left
873 * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
874 * These values are shifted
876 extern ulong
*ide_bus_offset
;
877 void inline ide_outb(int dev
, int port
, unsigned char val
)
879 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
880 dev
, port
, val
, (ATA_CURR_BASE(dev
)+port
));
882 out_be16((u16
*)(ATA_CURR_BASE(dev
)+(port
<< 1)), val
);
884 unsigned char inline ide_inb(int dev
, int port
)
887 val
= in_be16((u16
*)(ATA_CURR_BASE(dev
)+(port
<< 1)));
888 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
889 dev
, port
, (ATA_CURR_BASE(dev
)+port
), val
);
894 #ifdef CONFIG_IDE_PREINIT
895 int ide_preinit (void)
897 /* Set True IDE Mode */
898 out32 (GPIO0_OR
, (in32 (GPIO0_OR
) | 0x00100000));
899 out32 (GPIO0_OR
, (in32 (GPIO0_OR
) | 0x00200000));
900 out32 (GPIO1_OR
, (in32 (GPIO1_OR
) & ~0x00008040));
906 #if defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET)
907 void ide_set_reset (int idereset
)
909 debug ("ide_reset(%d)\n", idereset
);
911 out32 (GPIO0_OR
, (in32 (GPIO0_OR
) | 0x00200000));
913 out32 (GPIO0_OR
, (in32 (GPIO0_OR
) & ~0x00200000));
917 #endif /* defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET) */